arcmsr_hba.c 46 KB

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  1. /*
  2. *******************************************************************************
  3. ** O.S : Linux
  4. ** FILE NAME : arcmsr_hba.c
  5. ** BY : Erich Chen
  6. ** Description: SCSI RAID Device Driver for
  7. ** ARECA RAID Host adapter
  8. *******************************************************************************
  9. ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
  10. **
  11. ** Web site: www.areca.com.tw
  12. ** E-mail: erich@areca.com.tw
  13. **
  14. ** This program is free software; you can redistribute it and/or modify
  15. ** it under the terms of the GNU General Public License version 2 as
  16. ** published by the Free Software Foundation.
  17. ** This program is distributed in the hope that it will be useful,
  18. ** but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. ** GNU General Public License for more details.
  21. *******************************************************************************
  22. ** Redistribution and use in source and binary forms, with or without
  23. ** modification, are permitted provided that the following conditions
  24. ** are met:
  25. ** 1. Redistributions of source code must retain the above copyright
  26. ** notice, this list of conditions and the following disclaimer.
  27. ** 2. Redistributions in binary form must reproduce the above copyright
  28. ** notice, this list of conditions and the following disclaimer in the
  29. ** documentation and/or other materials provided with the distribution.
  30. ** 3. The name of the author may not be used to endorse or promote products
  31. ** derived from this software without specific prior written permission.
  32. **
  33. ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  34. ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  35. ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  36. ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  37. ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
  38. ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  39. ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
  40. ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  41. ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
  42. ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  43. *******************************************************************************
  44. ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
  45. ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
  46. *******************************************************************************
  47. */
  48. #include <linux/module.h>
  49. #include <linux/reboot.h>
  50. #include <linux/spinlock.h>
  51. #include <linux/pci_ids.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/moduleparam.h>
  54. #include <linux/errno.h>
  55. #include <linux/types.h>
  56. #include <linux/delay.h>
  57. #include <linux/dma-mapping.h>
  58. #include <linux/timer.h>
  59. #include <linux/pci.h>
  60. #include <asm/dma.h>
  61. #include <asm/io.h>
  62. #include <asm/system.h>
  63. #include <asm/uaccess.h>
  64. #include <scsi/scsi_host.h>
  65. #include <scsi/scsi.h>
  66. #include <scsi/scsi_cmnd.h>
  67. #include <scsi/scsi_tcq.h>
  68. #include <scsi/scsi_device.h>
  69. #include <scsi/scsi_transport.h>
  70. #include <scsi/scsicam.h>
  71. #include "arcmsr.h"
  72. MODULE_AUTHOR("Erich Chen <erich@areca.com.tw>");
  73. MODULE_DESCRIPTION("ARECA (ARC11xx/12xx) SATA RAID HOST Adapter");
  74. MODULE_LICENSE("Dual BSD/GPL");
  75. MODULE_VERSION(ARCMSR_DRIVER_VERSION);
  76. static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd);
  77. static int arcmsr_abort(struct scsi_cmnd *);
  78. static int arcmsr_bus_reset(struct scsi_cmnd *);
  79. static int arcmsr_bios_param(struct scsi_device *sdev,
  80. struct block_device *bdev, sector_t capacity, int *info);
  81. static int arcmsr_queue_command(struct scsi_cmnd * cmd,
  82. void (*done) (struct scsi_cmnd *));
  83. static int arcmsr_probe(struct pci_dev *pdev,
  84. const struct pci_device_id *id);
  85. static void arcmsr_remove(struct pci_dev *pdev);
  86. static void arcmsr_shutdown(struct pci_dev *pdev);
  87. static void arcmsr_iop_init(struct AdapterControlBlock *acb);
  88. static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
  89. static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
  90. static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb);
  91. static uint8_t arcmsr_wait_msgint_ready(struct AdapterControlBlock *acb);
  92. static const char *arcmsr_info(struct Scsi_Host *);
  93. static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
  94. static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
  95. {
  96. if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
  97. queue_depth = ARCMSR_MAX_CMD_PERLUN;
  98. scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
  99. return queue_depth;
  100. }
  101. static struct scsi_host_template arcmsr_scsi_host_template = {
  102. .module = THIS_MODULE,
  103. .name = "ARCMSR ARECA SATA RAID HOST Adapter" ARCMSR_DRIVER_VERSION,
  104. .info = arcmsr_info,
  105. .queuecommand = arcmsr_queue_command,
  106. .eh_abort_handler = arcmsr_abort,
  107. .eh_bus_reset_handler = arcmsr_bus_reset,
  108. .bios_param = arcmsr_bios_param,
  109. .change_queue_depth = arcmsr_adjust_disk_queue_depth,
  110. .can_queue = ARCMSR_MAX_OUTSTANDING_CMD,
  111. .this_id = ARCMSR_SCSI_INITIATOR_ID,
  112. .sg_tablesize = ARCMSR_MAX_SG_ENTRIES,
  113. .max_sectors = ARCMSR_MAX_XFER_SECTORS,
  114. .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
  115. .use_clustering = ENABLE_CLUSTERING,
  116. .shost_attrs = arcmsr_host_attrs,
  117. };
  118. static struct pci_device_id arcmsr_device_id_table[] = {
  119. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
  120. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
  121. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
  122. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
  123. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
  124. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
  125. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
  126. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
  127. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
  128. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
  129. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
  130. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
  131. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
  132. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
  133. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
  134. {0, 0}, /* Terminating entry */
  135. };
  136. MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
  137. static struct pci_driver arcmsr_pci_driver = {
  138. .name = "arcmsr",
  139. .id_table = arcmsr_device_id_table,
  140. .probe = arcmsr_probe,
  141. .remove = arcmsr_remove,
  142. .shutdown = arcmsr_shutdown
  143. };
  144. static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
  145. {
  146. irqreturn_t handle_state;
  147. struct AdapterControlBlock *acb;
  148. unsigned long flags;
  149. acb = (struct AdapterControlBlock *)dev_id;
  150. spin_lock_irqsave(acb->host->host_lock, flags);
  151. handle_state = arcmsr_interrupt(acb);
  152. spin_unlock_irqrestore(acb->host->host_lock, flags);
  153. return handle_state;
  154. }
  155. static int arcmsr_bios_param(struct scsi_device *sdev,
  156. struct block_device *bdev, sector_t capacity, int *geom)
  157. {
  158. int ret, heads, sectors, cylinders, total_capacity;
  159. unsigned char *buffer;/* return copy of block device's partition table */
  160. buffer = scsi_bios_ptable(bdev);
  161. if (buffer) {
  162. ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
  163. kfree(buffer);
  164. if (ret != -1)
  165. return ret;
  166. }
  167. total_capacity = capacity;
  168. heads = 64;
  169. sectors = 32;
  170. cylinders = total_capacity / (heads * sectors);
  171. if (cylinders > 1024) {
  172. heads = 255;
  173. sectors = 63;
  174. cylinders = total_capacity / (heads * sectors);
  175. }
  176. geom[0] = heads;
  177. geom[1] = sectors;
  178. geom[2] = cylinders;
  179. return 0;
  180. }
  181. static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
  182. {
  183. struct pci_dev *pdev = acb->pdev;
  184. struct MessageUnit __iomem *reg = acb->pmu;
  185. u32 ccb_phyaddr_hi32;
  186. void *dma_coherent;
  187. dma_addr_t dma_coherent_handle, dma_addr;
  188. struct CommandControlBlock *ccb_tmp;
  189. int i, j;
  190. dma_coherent = dma_alloc_coherent(&pdev->dev,
  191. ARCMSR_MAX_FREECCB_NUM *
  192. sizeof (struct CommandControlBlock) + 0x20,
  193. &dma_coherent_handle, GFP_KERNEL);
  194. if (!dma_coherent)
  195. return -ENOMEM;
  196. acb->dma_coherent = dma_coherent;
  197. acb->dma_coherent_handle = dma_coherent_handle;
  198. if (((unsigned long)dma_coherent & 0x1F)) {
  199. dma_coherent = dma_coherent +
  200. (0x20 - ((unsigned long)dma_coherent & 0x1F));
  201. dma_coherent_handle = dma_coherent_handle +
  202. (0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
  203. }
  204. dma_addr = dma_coherent_handle;
  205. ccb_tmp = (struct CommandControlBlock *)dma_coherent;
  206. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  207. ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5;
  208. ccb_tmp->acb = acb;
  209. acb->pccb_pool[i] = ccb_tmp;
  210. list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
  211. dma_addr = dma_addr + sizeof (struct CommandControlBlock);
  212. ccb_tmp++;
  213. }
  214. acb->vir2phy_offset = (unsigned long)ccb_tmp -
  215. (unsigned long)dma_addr;
  216. for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
  217. for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
  218. acb->devstate[i][j] = ARECA_RAID_GOOD;
  219. /*
  220. ** here we need to tell iop 331 our ccb_tmp.HighPart
  221. ** if ccb_tmp.HighPart is not zero
  222. */
  223. ccb_phyaddr_hi32 = (uint32_t) ((dma_coherent_handle >> 16) >> 16);
  224. if (ccb_phyaddr_hi32 != 0) {
  225. writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->message_rwbuffer[0]);
  226. writel(ccb_phyaddr_hi32, &reg->message_rwbuffer[1]);
  227. writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
  228. if (arcmsr_wait_msgint_ready(acb))
  229. printk(KERN_NOTICE "arcmsr%d: "
  230. "'set ccb high part physical address' timeout\n",
  231. acb->host->host_no);
  232. }
  233. writel(readl(&reg->outbound_intmask) |
  234. ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE,
  235. &reg->outbound_intmask);
  236. return 0;
  237. }
  238. static int arcmsr_probe(struct pci_dev *pdev,
  239. const struct pci_device_id *id)
  240. {
  241. struct Scsi_Host *host;
  242. struct AdapterControlBlock *acb;
  243. uint8_t bus, dev_fun;
  244. int error;
  245. error = pci_enable_device(pdev);
  246. if (error)
  247. goto out;
  248. pci_set_master(pdev);
  249. host = scsi_host_alloc(&arcmsr_scsi_host_template,
  250. sizeof(struct AdapterControlBlock));
  251. if (!host) {
  252. error = -ENOMEM;
  253. goto out_disable_device;
  254. }
  255. acb = (struct AdapterControlBlock *)host->hostdata;
  256. memset(acb, 0, sizeof (struct AdapterControlBlock));
  257. error = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  258. if (error) {
  259. error = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  260. if (error) {
  261. printk(KERN_WARNING
  262. "scsi%d: No suitable DMA mask available\n",
  263. host->host_no);
  264. goto out_host_put;
  265. }
  266. }
  267. bus = pdev->bus->number;
  268. dev_fun = pdev->devfn;
  269. acb->host = host;
  270. acb->pdev = pdev;
  271. host->max_sectors = ARCMSR_MAX_XFER_SECTORS;
  272. host->max_lun = ARCMSR_MAX_TARGETLUN;
  273. host->max_id = ARCMSR_MAX_TARGETID;/*16:8*/
  274. host->max_cmd_len = 16; /*this is issue of 64bit LBA, over 2T byte*/
  275. host->sg_tablesize = ARCMSR_MAX_SG_ENTRIES;
  276. host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
  277. host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
  278. host->this_id = ARCMSR_SCSI_INITIATOR_ID;
  279. host->unique_id = (bus << 8) | dev_fun;
  280. host->irq = pdev->irq;
  281. error = pci_request_regions(pdev, "arcmsr");
  282. if (error)
  283. goto out_host_put;
  284. acb->pmu = ioremap(pci_resource_start(pdev, 0),
  285. pci_resource_len(pdev, 0));
  286. if (!acb->pmu) {
  287. printk(KERN_NOTICE "arcmsr%d: memory"
  288. " mapping region fail \n", acb->host->host_no);
  289. goto out_release_regions;
  290. }
  291. acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
  292. ACB_F_MESSAGE_RQBUFFER_CLEARED |
  293. ACB_F_MESSAGE_WQBUFFER_READED);
  294. acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
  295. INIT_LIST_HEAD(&acb->ccb_free_list);
  296. error = arcmsr_alloc_ccb_pool(acb);
  297. if (error)
  298. goto out_iounmap;
  299. error = request_irq(pdev->irq, arcmsr_do_interrupt,
  300. IRQF_DISABLED | IRQF_SHARED, "arcmsr", acb);
  301. if (error)
  302. goto out_free_ccb_pool;
  303. arcmsr_iop_init(acb);
  304. pci_set_drvdata(pdev, host);
  305. error = scsi_add_host(host, &pdev->dev);
  306. if (error)
  307. goto out_free_irq;
  308. error = arcmsr_alloc_sysfs_attr(acb);
  309. if (error)
  310. goto out_free_sysfs;
  311. scsi_scan_host(host);
  312. return 0;
  313. out_free_sysfs:
  314. out_free_irq:
  315. free_irq(pdev->irq, acb);
  316. out_free_ccb_pool:
  317. arcmsr_free_ccb_pool(acb);
  318. out_iounmap:
  319. iounmap(acb->pmu);
  320. out_release_regions:
  321. pci_release_regions(pdev);
  322. out_host_put:
  323. scsi_host_put(host);
  324. out_disable_device:
  325. pci_disable_device(pdev);
  326. out:
  327. return error;
  328. }
  329. static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
  330. {
  331. struct MessageUnit __iomem *reg = acb->pmu;
  332. writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
  333. if (arcmsr_wait_msgint_ready(acb))
  334. printk(KERN_NOTICE
  335. "arcmsr%d: wait 'abort all outstanding command' timeout \n"
  336. , acb->host->host_no);
  337. }
  338. static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
  339. {
  340. struct AdapterControlBlock *acb = ccb->acb;
  341. struct scsi_cmnd *pcmd = ccb->pcmd;
  342. if (pcmd->use_sg != 0) {
  343. struct scatterlist *sl;
  344. sl = (struct scatterlist *)pcmd->request_buffer;
  345. pci_unmap_sg(acb->pdev, sl, pcmd->use_sg, pcmd->sc_data_direction);
  346. }
  347. else if (pcmd->request_bufflen != 0)
  348. pci_unmap_single(acb->pdev,
  349. pcmd->SCp.dma_handle,
  350. pcmd->request_bufflen, pcmd->sc_data_direction);
  351. }
  352. static void arcmsr_ccb_complete(struct CommandControlBlock *ccb, int stand_flag)
  353. {
  354. struct AdapterControlBlock *acb = ccb->acb;
  355. struct scsi_cmnd *pcmd = ccb->pcmd;
  356. arcmsr_pci_unmap_dma(ccb);
  357. if (stand_flag == 1)
  358. atomic_dec(&acb->ccboutstandingcount);
  359. ccb->startdone = ARCMSR_CCB_DONE;
  360. ccb->ccb_flags = 0;
  361. list_add_tail(&ccb->list, &acb->ccb_free_list);
  362. pcmd->scsi_done(pcmd);
  363. }
  364. static void arcmsr_remove(struct pci_dev *pdev)
  365. {
  366. struct Scsi_Host *host = pci_get_drvdata(pdev);
  367. struct AdapterControlBlock *acb =
  368. (struct AdapterControlBlock *) host->hostdata;
  369. struct MessageUnit __iomem *reg = acb->pmu;
  370. int poll_count = 0;
  371. arcmsr_free_sysfs_attr(acb);
  372. scsi_remove_host(host);
  373. arcmsr_stop_adapter_bgrb(acb);
  374. arcmsr_flush_adapter_cache(acb);
  375. writel(readl(&reg->outbound_intmask) |
  376. ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE,
  377. &reg->outbound_intmask);
  378. acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
  379. acb->acb_flags &= ~ACB_F_IOP_INITED;
  380. for (poll_count = 0; poll_count < 256; poll_count++) {
  381. if (!atomic_read(&acb->ccboutstandingcount))
  382. break;
  383. arcmsr_interrupt(acb);
  384. msleep(25);
  385. }
  386. if (atomic_read(&acb->ccboutstandingcount)) {
  387. int i;
  388. arcmsr_abort_allcmd(acb);
  389. for (i = 0; i < ARCMSR_MAX_OUTSTANDING_CMD; i++)
  390. readl(&reg->outbound_queueport);
  391. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  392. struct CommandControlBlock *ccb = acb->pccb_pool[i];
  393. if (ccb->startdone == ARCMSR_CCB_START) {
  394. ccb->startdone = ARCMSR_CCB_ABORTED;
  395. ccb->pcmd->result = DID_ABORT << 16;
  396. arcmsr_ccb_complete(ccb, 1);
  397. }
  398. }
  399. }
  400. free_irq(pdev->irq, acb);
  401. iounmap(acb->pmu);
  402. arcmsr_free_ccb_pool(acb);
  403. pci_release_regions(pdev);
  404. scsi_host_put(host);
  405. pci_disable_device(pdev);
  406. pci_set_drvdata(pdev, NULL);
  407. }
  408. static void arcmsr_shutdown(struct pci_dev *pdev)
  409. {
  410. struct Scsi_Host *host = pci_get_drvdata(pdev);
  411. struct AdapterControlBlock *acb =
  412. (struct AdapterControlBlock *)host->hostdata;
  413. arcmsr_stop_adapter_bgrb(acb);
  414. arcmsr_flush_adapter_cache(acb);
  415. }
  416. static int arcmsr_module_init(void)
  417. {
  418. int error = 0;
  419. error = pci_register_driver(&arcmsr_pci_driver);
  420. return error;
  421. }
  422. static void arcmsr_module_exit(void)
  423. {
  424. pci_unregister_driver(&arcmsr_pci_driver);
  425. }
  426. module_init(arcmsr_module_init);
  427. module_exit(arcmsr_module_exit);
  428. static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
  429. {
  430. struct MessageUnit __iomem *reg = acb->pmu;
  431. u32 orig_mask = readl(&reg->outbound_intmask);
  432. writel(orig_mask | ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE,
  433. &reg->outbound_intmask);
  434. return orig_mask;
  435. }
  436. static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
  437. u32 orig_mask)
  438. {
  439. struct MessageUnit __iomem *reg = acb->pmu;
  440. u32 mask;
  441. mask = orig_mask & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
  442. ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE);
  443. writel(mask, &reg->outbound_intmask);
  444. }
  445. static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
  446. {
  447. struct MessageUnit __iomem *reg=acb->pmu;
  448. writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
  449. if (arcmsr_wait_msgint_ready(acb))
  450. printk(KERN_NOTICE
  451. "arcmsr%d: wait 'flush adapter cache' timeout \n"
  452. , acb->host->host_no);
  453. }
  454. static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
  455. {
  456. struct scsi_cmnd *pcmd = ccb->pcmd;
  457. struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
  458. pcmd->result = DID_OK << 16;
  459. if (sensebuffer) {
  460. int sense_data_length =
  461. sizeof (struct SENSE_DATA) < sizeof (pcmd->sense_buffer)
  462. ? sizeof (struct SENSE_DATA) : sizeof (pcmd->sense_buffer);
  463. memset(sensebuffer, 0, sizeof (pcmd->sense_buffer));
  464. memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
  465. sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
  466. sensebuffer->Valid = 1;
  467. }
  468. }
  469. static uint8_t arcmsr_wait_msgint_ready(struct AdapterControlBlock *acb)
  470. {
  471. struct MessageUnit __iomem *reg = acb->pmu;
  472. uint32_t Index;
  473. uint8_t Retries = 0x00;
  474. do {
  475. for (Index = 0; Index < 100; Index++) {
  476. if (readl(&reg->outbound_intstatus)
  477. & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
  478. writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT
  479. , &reg->outbound_intstatus);
  480. return 0x00;
  481. }
  482. msleep_interruptible(10);
  483. }/*max 1 seconds*/
  484. } while (Retries++ < 20);/*max 20 sec*/
  485. return 0xff;
  486. }
  487. static void arcmsr_build_ccb(struct AdapterControlBlock *acb,
  488. struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
  489. {
  490. struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
  491. int8_t *psge = (int8_t *)&arcmsr_cdb->u;
  492. uint32_t address_lo, address_hi;
  493. int arccdbsize = 0x30;
  494. ccb->pcmd = pcmd;
  495. memset(arcmsr_cdb, 0, sizeof (struct ARCMSR_CDB));
  496. arcmsr_cdb->Bus = 0;
  497. arcmsr_cdb->TargetID = pcmd->device->id;
  498. arcmsr_cdb->LUN = pcmd->device->lun;
  499. arcmsr_cdb->Function = 1;
  500. arcmsr_cdb->CdbLength = (uint8_t)pcmd->cmd_len;
  501. arcmsr_cdb->Context = (unsigned long)arcmsr_cdb;
  502. memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
  503. if (pcmd->use_sg) {
  504. int length, sgcount, i, cdb_sgcount = 0;
  505. struct scatterlist *sl;
  506. /* Get Scatter Gather List from scsiport. */
  507. sl = (struct scatterlist *) pcmd->request_buffer;
  508. sgcount = pci_map_sg(acb->pdev, sl, pcmd->use_sg,
  509. pcmd->sc_data_direction);
  510. /* map stor port SG list to our iop SG List. */
  511. for (i = 0; i < sgcount; i++) {
  512. /* Get the physical address of the current data pointer */
  513. length = cpu_to_le32(sg_dma_len(sl));
  514. address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sl)));
  515. address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sl)));
  516. if (address_hi == 0) {
  517. struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
  518. pdma_sg->address = address_lo;
  519. pdma_sg->length = length;
  520. psge += sizeof (struct SG32ENTRY);
  521. arccdbsize += sizeof (struct SG32ENTRY);
  522. } else {
  523. struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
  524. pdma_sg->addresshigh = address_hi;
  525. pdma_sg->address = address_lo;
  526. pdma_sg->length = length|IS_SG64_ADDR;
  527. psge += sizeof (struct SG64ENTRY);
  528. arccdbsize += sizeof (struct SG64ENTRY);
  529. }
  530. sl++;
  531. cdb_sgcount++;
  532. }
  533. arcmsr_cdb->sgcount = (uint8_t)cdb_sgcount;
  534. arcmsr_cdb->DataLength = pcmd->request_bufflen;
  535. if ( arccdbsize > 256)
  536. arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
  537. } else if (pcmd->request_bufflen) {
  538. dma_addr_t dma_addr;
  539. dma_addr = pci_map_single(acb->pdev, pcmd->request_buffer,
  540. pcmd->request_bufflen, pcmd->sc_data_direction);
  541. pcmd->SCp.dma_handle = dma_addr;
  542. address_lo = cpu_to_le32(dma_addr_lo32(dma_addr));
  543. address_hi = cpu_to_le32(dma_addr_hi32(dma_addr));
  544. if (address_hi == 0) {
  545. struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
  546. pdma_sg->address = address_lo;
  547. pdma_sg->length = pcmd->request_bufflen;
  548. } else {
  549. struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
  550. pdma_sg->addresshigh = address_hi;
  551. pdma_sg->address = address_lo;
  552. pdma_sg->length = pcmd->request_bufflen|IS_SG64_ADDR;
  553. }
  554. arcmsr_cdb->sgcount = 1;
  555. arcmsr_cdb->DataLength = pcmd->request_bufflen;
  556. }
  557. if (pcmd->sc_data_direction == DMA_TO_DEVICE ) {
  558. arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
  559. ccb->ccb_flags |= CCB_FLAG_WRITE;
  560. }
  561. }
  562. static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
  563. {
  564. struct MessageUnit __iomem *reg = acb->pmu;
  565. uint32_t cdb_shifted_phyaddr = ccb->cdb_shifted_phyaddr;
  566. struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
  567. atomic_inc(&acb->ccboutstandingcount);
  568. ccb->startdone = ARCMSR_CCB_START;
  569. if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
  570. writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
  571. &reg->inbound_queueport);
  572. else
  573. writel(cdb_shifted_phyaddr, &reg->inbound_queueport);
  574. }
  575. void arcmsr_post_Qbuffer(struct AdapterControlBlock *acb)
  576. {
  577. struct MessageUnit __iomem *reg = acb->pmu;
  578. struct QBUFFER __iomem *pwbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
  579. uint8_t __iomem *iop_data = (uint8_t __iomem *) pwbuffer->data;
  580. int32_t allxfer_len = 0;
  581. if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
  582. acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
  583. while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex)
  584. && (allxfer_len < 124)) {
  585. writeb(acb->wqbuffer[acb->wqbuf_firstindex], iop_data);
  586. acb->wqbuf_firstindex++;
  587. acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
  588. iop_data++;
  589. allxfer_len++;
  590. }
  591. writel(allxfer_len, &pwbuffer->data_len);
  592. writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK
  593. , &reg->inbound_doorbell);
  594. }
  595. }
  596. static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
  597. {
  598. struct MessageUnit __iomem *reg = acb->pmu;
  599. acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
  600. writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
  601. if (arcmsr_wait_msgint_ready(acb))
  602. printk(KERN_NOTICE
  603. "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
  604. , acb->host->host_no);
  605. }
  606. static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
  607. {
  608. dma_free_coherent(&acb->pdev->dev,
  609. ARCMSR_MAX_FREECCB_NUM * sizeof (struct CommandControlBlock) + 0x20,
  610. acb->dma_coherent,
  611. acb->dma_coherent_handle);
  612. }
  613. static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
  614. {
  615. struct MessageUnit __iomem *reg = acb->pmu;
  616. struct CommandControlBlock *ccb;
  617. uint32_t flag_ccb, outbound_intstatus, outbound_doorbell;
  618. outbound_intstatus = readl(&reg->outbound_intstatus)
  619. & acb->outbound_int_enable;
  620. writel(outbound_intstatus, &reg->outbound_intstatus);
  621. if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
  622. outbound_doorbell = readl(&reg->outbound_doorbell);
  623. writel(outbound_doorbell, &reg->outbound_doorbell);
  624. if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
  625. struct QBUFFER __iomem * prbuffer =
  626. (struct QBUFFER __iomem *) &reg->message_rbuffer;
  627. uint8_t __iomem * iop_data = (uint8_t __iomem *)prbuffer->data;
  628. int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
  629. rqbuf_lastindex = acb->rqbuf_lastindex;
  630. rqbuf_firstindex = acb->rqbuf_firstindex;
  631. iop_len = readl(&prbuffer->data_len);
  632. my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1)
  633. &(ARCMSR_MAX_QBUFFER - 1);
  634. if (my_empty_len >= iop_len) {
  635. while (iop_len > 0) {
  636. acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
  637. acb->rqbuf_lastindex++;
  638. acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
  639. iop_data++;
  640. iop_len--;
  641. }
  642. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK,
  643. &reg->inbound_doorbell);
  644. } else
  645. acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
  646. }
  647. if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
  648. acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
  649. if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
  650. struct QBUFFER __iomem * pwbuffer =
  651. (struct QBUFFER __iomem *) &reg->message_wbuffer;
  652. uint8_t __iomem * iop_data = (uint8_t __iomem *) pwbuffer->data;
  653. int32_t allxfer_len = 0;
  654. acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
  655. while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex)
  656. && (allxfer_len < 124)) {
  657. writeb(acb->wqbuffer[acb->wqbuf_firstindex], iop_data);
  658. acb->wqbuf_firstindex++;
  659. acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
  660. iop_data++;
  661. allxfer_len++;
  662. }
  663. writel(allxfer_len, &pwbuffer->data_len);
  664. writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK,
  665. &reg->inbound_doorbell);
  666. }
  667. if (acb->wqbuf_firstindex == acb->wqbuf_lastindex)
  668. acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
  669. }
  670. }
  671. if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
  672. int id, lun;
  673. /*
  674. ****************************************************************
  675. ** areca cdb command done
  676. ****************************************************************
  677. */
  678. while (1) {
  679. if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF)
  680. break;/*chip FIFO no ccb for completion already*/
  681. /* check if command done with no error*/
  682. ccb = (struct CommandControlBlock *)(acb->vir2phy_offset +
  683. (flag_ccb << 5));
  684. if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
  685. if (ccb->startdone == ARCMSR_CCB_ABORTED) {
  686. struct scsi_cmnd *abortcmd=ccb->pcmd;
  687. if (abortcmd) {
  688. abortcmd->result |= DID_ABORT >> 16;
  689. arcmsr_ccb_complete(ccb, 1);
  690. printk(KERN_NOTICE
  691. "arcmsr%d: ccb='0x%p' isr got aborted command \n"
  692. , acb->host->host_no, ccb);
  693. }
  694. continue;
  695. }
  696. printk(KERN_NOTICE
  697. "arcmsr%d: isr get an illegal ccb command done acb='0x%p'"
  698. "ccb='0x%p' ccbacb='0x%p' startdone = 0x%x"
  699. " ccboutstandingcount=%d \n"
  700. , acb->host->host_no
  701. , acb
  702. , ccb
  703. , ccb->acb
  704. , ccb->startdone
  705. , atomic_read(&acb->ccboutstandingcount));
  706. continue;
  707. }
  708. id = ccb->pcmd->device->id;
  709. lun = ccb->pcmd->device->lun;
  710. if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) {
  711. if (acb->devstate[id][lun] == ARECA_RAID_GONE)
  712. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  713. ccb->pcmd->result = DID_OK << 16;
  714. arcmsr_ccb_complete(ccb, 1);
  715. } else {
  716. switch(ccb->arcmsr_cdb.DeviceStatus) {
  717. case ARCMSR_DEV_SELECT_TIMEOUT: {
  718. acb->devstate[id][lun] = ARECA_RAID_GONE;
  719. ccb->pcmd->result = DID_TIME_OUT << 16;
  720. arcmsr_ccb_complete(ccb, 1);
  721. }
  722. break;
  723. case ARCMSR_DEV_ABORTED:
  724. case ARCMSR_DEV_INIT_FAIL: {
  725. acb->devstate[id][lun] = ARECA_RAID_GONE;
  726. ccb->pcmd->result = DID_BAD_TARGET << 16;
  727. arcmsr_ccb_complete(ccb, 1);
  728. }
  729. break;
  730. case ARCMSR_DEV_CHECK_CONDITION: {
  731. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  732. arcmsr_report_sense_info(ccb);
  733. arcmsr_ccb_complete(ccb, 1);
  734. }
  735. break;
  736. default:
  737. printk(KERN_NOTICE
  738. "arcmsr%d: scsi id=%d lun=%d"
  739. " isr get command error done,"
  740. "but got unknown DeviceStatus = 0x%x \n"
  741. , acb->host->host_no
  742. , id
  743. , lun
  744. , ccb->arcmsr_cdb.DeviceStatus);
  745. acb->devstate[id][lun] = ARECA_RAID_GONE;
  746. ccb->pcmd->result = DID_NO_CONNECT << 16;
  747. arcmsr_ccb_complete(ccb, 1);
  748. break;
  749. }
  750. }
  751. }/*drain reply FIFO*/
  752. }
  753. if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
  754. return IRQ_NONE;
  755. return IRQ_HANDLED;
  756. }
  757. static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
  758. {
  759. if (acb) {
  760. /* stop adapter background rebuild */
  761. if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
  762. acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
  763. arcmsr_stop_adapter_bgrb(acb);
  764. arcmsr_flush_adapter_cache(acb);
  765. }
  766. }
  767. }
  768. static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd)
  769. {
  770. struct MessageUnit __iomem *reg = acb->pmu;
  771. struct CMD_MESSAGE_FIELD *pcmdmessagefld;
  772. int retvalue = 0, transfer_len = 0;
  773. char *buffer;
  774. uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
  775. (uint32_t ) cmd->cmnd[6] << 16 |
  776. (uint32_t ) cmd->cmnd[7] << 8 |
  777. (uint32_t ) cmd->cmnd[8];
  778. /* 4 bytes: Areca io control code */
  779. if (cmd->use_sg) {
  780. struct scatterlist *sg = (struct scatterlist *)cmd->request_buffer;
  781. buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
  782. if (cmd->use_sg > 1) {
  783. retvalue = ARCMSR_MESSAGE_FAIL;
  784. goto message_out;
  785. }
  786. transfer_len += sg->length;
  787. } else {
  788. buffer = cmd->request_buffer;
  789. transfer_len = cmd->request_bufflen;
  790. }
  791. if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
  792. retvalue = ARCMSR_MESSAGE_FAIL;
  793. goto message_out;
  794. }
  795. pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
  796. switch(controlcode) {
  797. case ARCMSR_MESSAGE_READ_RQBUFFER: {
  798. unsigned long *ver_addr;
  799. dma_addr_t buf_handle;
  800. uint8_t *pQbuffer, *ptmpQbuffer;
  801. int32_t allxfer_len = 0;
  802. ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle);
  803. if (!ver_addr) {
  804. retvalue = ARCMSR_MESSAGE_FAIL;
  805. goto message_out;
  806. }
  807. ptmpQbuffer = (uint8_t *) ver_addr;
  808. while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
  809. && (allxfer_len < 1031)) {
  810. pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
  811. memcpy(ptmpQbuffer, pQbuffer, 1);
  812. acb->rqbuf_firstindex++;
  813. acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
  814. ptmpQbuffer++;
  815. allxfer_len++;
  816. }
  817. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  818. struct QBUFFER __iomem * prbuffer = (struct QBUFFER __iomem *)
  819. &reg->message_rbuffer;
  820. uint8_t __iomem * iop_data = (uint8_t __iomem *)prbuffer->data;
  821. int32_t iop_len;
  822. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  823. iop_len = readl(&prbuffer->data_len);
  824. while (iop_len > 0) {
  825. acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
  826. acb->rqbuf_lastindex++;
  827. acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
  828. iop_data++;
  829. iop_len--;
  830. }
  831. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK,
  832. &reg->inbound_doorbell);
  833. }
  834. memcpy(pcmdmessagefld->messagedatabuffer,
  835. (uint8_t *)ver_addr, allxfer_len);
  836. pcmdmessagefld->cmdmessage.Length = allxfer_len;
  837. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
  838. pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle);
  839. }
  840. break;
  841. case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
  842. unsigned long *ver_addr;
  843. dma_addr_t buf_handle;
  844. int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
  845. uint8_t *pQbuffer, *ptmpuserbuffer;
  846. ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle);
  847. if (!ver_addr) {
  848. retvalue = ARCMSR_MESSAGE_FAIL;
  849. goto message_out;
  850. }
  851. ptmpuserbuffer = (uint8_t *)ver_addr;
  852. user_len = pcmdmessagefld->cmdmessage.Length;
  853. memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
  854. wqbuf_lastindex = acb->wqbuf_lastindex;
  855. wqbuf_firstindex = acb->wqbuf_firstindex;
  856. if (wqbuf_lastindex != wqbuf_firstindex) {
  857. struct SENSE_DATA *sensebuffer =
  858. (struct SENSE_DATA *)cmd->sense_buffer;
  859. arcmsr_post_Qbuffer(acb);
  860. /* has error report sensedata */
  861. sensebuffer->ErrorCode = 0x70;
  862. sensebuffer->SenseKey = ILLEGAL_REQUEST;
  863. sensebuffer->AdditionalSenseLength = 0x0A;
  864. sensebuffer->AdditionalSenseCode = 0x20;
  865. sensebuffer->Valid = 1;
  866. retvalue = ARCMSR_MESSAGE_FAIL;
  867. } else {
  868. my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
  869. &(ARCMSR_MAX_QBUFFER - 1);
  870. if (my_empty_len >= user_len) {
  871. while (user_len > 0) {
  872. pQbuffer =
  873. &acb->wqbuffer[acb->wqbuf_lastindex];
  874. memcpy(pQbuffer, ptmpuserbuffer, 1);
  875. acb->wqbuf_lastindex++;
  876. acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
  877. ptmpuserbuffer++;
  878. user_len--;
  879. }
  880. if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
  881. acb->acb_flags &=
  882. ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
  883. arcmsr_post_Qbuffer(acb);
  884. }
  885. } else {
  886. /* has error report sensedata */
  887. struct SENSE_DATA *sensebuffer =
  888. (struct SENSE_DATA *)cmd->sense_buffer;
  889. sensebuffer->ErrorCode = 0x70;
  890. sensebuffer->SenseKey = ILLEGAL_REQUEST;
  891. sensebuffer->AdditionalSenseLength = 0x0A;
  892. sensebuffer->AdditionalSenseCode = 0x20;
  893. sensebuffer->Valid = 1;
  894. retvalue = ARCMSR_MESSAGE_FAIL;
  895. }
  896. }
  897. pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle);
  898. }
  899. break;
  900. case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
  901. uint8_t *pQbuffer = acb->rqbuffer;
  902. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  903. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  904. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK,
  905. &reg->inbound_doorbell);
  906. }
  907. acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
  908. acb->rqbuf_firstindex = 0;
  909. acb->rqbuf_lastindex = 0;
  910. memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
  911. pcmdmessagefld->cmdmessage.ReturnCode =
  912. ARCMSR_MESSAGE_RETURNCODE_OK;
  913. }
  914. break;
  915. case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
  916. uint8_t *pQbuffer = acb->wqbuffer;
  917. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  918. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  919. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK
  920. , &reg->inbound_doorbell);
  921. }
  922. acb->acb_flags |=
  923. (ACB_F_MESSAGE_WQBUFFER_CLEARED |
  924. ACB_F_MESSAGE_WQBUFFER_READED);
  925. acb->wqbuf_firstindex = 0;
  926. acb->wqbuf_lastindex = 0;
  927. memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
  928. pcmdmessagefld->cmdmessage.ReturnCode =
  929. ARCMSR_MESSAGE_RETURNCODE_OK;
  930. }
  931. break;
  932. case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
  933. uint8_t *pQbuffer;
  934. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  935. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  936. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK
  937. , &reg->inbound_doorbell);
  938. }
  939. acb->acb_flags |=
  940. (ACB_F_MESSAGE_WQBUFFER_CLEARED
  941. | ACB_F_MESSAGE_RQBUFFER_CLEARED
  942. | ACB_F_MESSAGE_WQBUFFER_READED);
  943. acb->rqbuf_firstindex = 0;
  944. acb->rqbuf_lastindex = 0;
  945. acb->wqbuf_firstindex = 0;
  946. acb->wqbuf_lastindex = 0;
  947. pQbuffer = acb->rqbuffer;
  948. memset(pQbuffer, 0, sizeof (struct QBUFFER));
  949. pQbuffer = acb->wqbuffer;
  950. memset(pQbuffer, 0, sizeof (struct QBUFFER));
  951. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
  952. }
  953. break;
  954. case ARCMSR_MESSAGE_RETURN_CODE_3F: {
  955. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F;
  956. }
  957. break;
  958. case ARCMSR_MESSAGE_SAY_HELLO: {
  959. int8_t * hello_string = "Hello! I am ARCMSR";
  960. memcpy(pcmdmessagefld->messagedatabuffer, hello_string
  961. , (int16_t)strlen(hello_string));
  962. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
  963. }
  964. break;
  965. case ARCMSR_MESSAGE_SAY_GOODBYE:
  966. arcmsr_iop_parking(acb);
  967. break;
  968. case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
  969. arcmsr_flush_adapter_cache(acb);
  970. break;
  971. default:
  972. retvalue = ARCMSR_MESSAGE_FAIL;
  973. }
  974. message_out:
  975. if (cmd->use_sg) {
  976. struct scatterlist *sg;
  977. sg = (struct scatterlist *) cmd->request_buffer;
  978. kunmap_atomic(buffer - sg->offset, KM_IRQ0);
  979. }
  980. return retvalue;
  981. }
  982. static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
  983. {
  984. struct list_head *head = &acb->ccb_free_list;
  985. struct CommandControlBlock *ccb = NULL;
  986. if (!list_empty(head)) {
  987. ccb = list_entry(head->next, struct CommandControlBlock, list);
  988. list_del(head->next);
  989. }
  990. return ccb;
  991. }
  992. static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
  993. struct scsi_cmnd *cmd)
  994. {
  995. switch (cmd->cmnd[0]) {
  996. case INQUIRY: {
  997. unsigned char inqdata[36];
  998. char *buffer;
  999. if (cmd->device->lun) {
  1000. cmd->result = (DID_TIME_OUT << 16);
  1001. cmd->scsi_done(cmd);
  1002. return;
  1003. }
  1004. inqdata[0] = TYPE_PROCESSOR;
  1005. /* Periph Qualifier & Periph Dev Type */
  1006. inqdata[1] = 0;
  1007. /* rem media bit & Dev Type Modifier */
  1008. inqdata[2] = 0;
  1009. /* ISO,ECMA,& ANSI versions */
  1010. inqdata[4] = 31;
  1011. /* length of additional data */
  1012. strncpy(&inqdata[8], "Areca ", 8);
  1013. /* Vendor Identification */
  1014. strncpy(&inqdata[16], "RAID controller ", 16);
  1015. /* Product Identification */
  1016. strncpy(&inqdata[32], "R001", 4); /* Product Revision */
  1017. if (cmd->use_sg) {
  1018. struct scatterlist *sg;
  1019. sg = (struct scatterlist *) cmd->request_buffer;
  1020. buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
  1021. } else {
  1022. buffer = cmd->request_buffer;
  1023. }
  1024. memcpy(buffer, inqdata, sizeof(inqdata));
  1025. if (cmd->use_sg) {
  1026. struct scatterlist *sg;
  1027. sg = (struct scatterlist *) cmd->request_buffer;
  1028. kunmap_atomic(buffer - sg->offset, KM_IRQ0);
  1029. }
  1030. cmd->scsi_done(cmd);
  1031. }
  1032. break;
  1033. case WRITE_BUFFER:
  1034. case READ_BUFFER: {
  1035. if (arcmsr_iop_message_xfer(acb, cmd))
  1036. cmd->result = (DID_ERROR << 16);
  1037. cmd->scsi_done(cmd);
  1038. }
  1039. break;
  1040. default:
  1041. cmd->scsi_done(cmd);
  1042. }
  1043. }
  1044. static int arcmsr_queue_command(struct scsi_cmnd *cmd,
  1045. void (* done)(struct scsi_cmnd *))
  1046. {
  1047. struct Scsi_Host *host = cmd->device->host;
  1048. struct AdapterControlBlock *acb =
  1049. (struct AdapterControlBlock *) host->hostdata;
  1050. struct CommandControlBlock *ccb;
  1051. int target = cmd->device->id;
  1052. int lun = cmd->device->lun;
  1053. cmd->scsi_done = done;
  1054. cmd->host_scribble = NULL;
  1055. cmd->result = 0;
  1056. if (acb->acb_flags & ACB_F_BUS_RESET) {
  1057. printk(KERN_NOTICE "arcmsr%d: bus reset"
  1058. " and return busy \n"
  1059. , acb->host->host_no);
  1060. return SCSI_MLQUEUE_HOST_BUSY;
  1061. }
  1062. if(target == 16) {
  1063. /* virtual device for iop message transfer */
  1064. arcmsr_handle_virtual_command(acb, cmd);
  1065. return 0;
  1066. }
  1067. if (acb->devstate[target][lun] == ARECA_RAID_GONE) {
  1068. uint8_t block_cmd;
  1069. block_cmd = cmd->cmnd[0] & 0x0f;
  1070. if (block_cmd == 0x08 || block_cmd == 0x0a) {
  1071. printk(KERN_NOTICE
  1072. "arcmsr%d: block 'read/write'"
  1073. "command with gone raid volume"
  1074. " Cmd=%2x, TargetId=%d, Lun=%d \n"
  1075. , acb->host->host_no
  1076. , cmd->cmnd[0]
  1077. , target, lun);
  1078. cmd->result = (DID_NO_CONNECT << 16);
  1079. cmd->scsi_done(cmd);
  1080. return 0;
  1081. }
  1082. }
  1083. if (atomic_read(&acb->ccboutstandingcount) >=
  1084. ARCMSR_MAX_OUTSTANDING_CMD)
  1085. return SCSI_MLQUEUE_HOST_BUSY;
  1086. ccb = arcmsr_get_freeccb(acb);
  1087. if (!ccb)
  1088. return SCSI_MLQUEUE_HOST_BUSY;
  1089. arcmsr_build_ccb(acb, ccb, cmd);
  1090. arcmsr_post_ccb(acb, ccb);
  1091. return 0;
  1092. }
  1093. static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
  1094. {
  1095. struct MessageUnit __iomem *reg = acb->pmu;
  1096. char *acb_firm_model = acb->firm_model;
  1097. char *acb_firm_version = acb->firm_version;
  1098. char __iomem *iop_firm_model = (char __iomem *) &reg->message_rwbuffer[15];
  1099. char __iomem *iop_firm_version = (char __iomem *) &reg->message_rwbuffer[17];
  1100. int count;
  1101. writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
  1102. if (arcmsr_wait_msgint_ready(acb))
  1103. printk(KERN_NOTICE
  1104. "arcmsr%d: wait "
  1105. "'get adapter firmware miscellaneous data' timeout \n"
  1106. , acb->host->host_no);
  1107. count = 8;
  1108. while (count) {
  1109. *acb_firm_model = readb(iop_firm_model);
  1110. acb_firm_model++;
  1111. iop_firm_model++;
  1112. count--;
  1113. }
  1114. count = 16;
  1115. while (count) {
  1116. *acb_firm_version = readb(iop_firm_version);
  1117. acb_firm_version++;
  1118. iop_firm_version++;
  1119. count--;
  1120. }
  1121. printk(KERN_INFO
  1122. "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n"
  1123. , acb->host->host_no
  1124. , acb->firm_version);
  1125. acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
  1126. acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
  1127. acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
  1128. acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
  1129. }
  1130. static void arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
  1131. struct CommandControlBlock *poll_ccb)
  1132. {
  1133. struct MessageUnit __iomem *reg = acb->pmu;
  1134. struct CommandControlBlock *ccb;
  1135. uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
  1136. int id, lun;
  1137. polling_ccb_retry:
  1138. poll_count++;
  1139. outbound_intstatus = readl(&reg->outbound_intstatus)
  1140. & acb->outbound_int_enable;
  1141. writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
  1142. while (1) {
  1143. if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
  1144. if (poll_ccb_done)
  1145. break;
  1146. else {
  1147. msleep(25);
  1148. if (poll_count > 100)
  1149. break;
  1150. goto polling_ccb_retry;
  1151. }
  1152. }
  1153. ccb = (struct CommandControlBlock *)
  1154. (acb->vir2phy_offset + (flag_ccb << 5));
  1155. if ((ccb->acb != acb) ||
  1156. (ccb->startdone != ARCMSR_CCB_START)) {
  1157. if ((ccb->startdone == ARCMSR_CCB_ABORTED) ||
  1158. (ccb == poll_ccb)) {
  1159. printk(KERN_NOTICE
  1160. "arcmsr%d: scsi id=%d lun=%d ccb='0x%p'"
  1161. " poll command abort successfully \n"
  1162. , acb->host->host_no
  1163. , ccb->pcmd->device->id
  1164. , ccb->pcmd->device->lun
  1165. , ccb);
  1166. ccb->pcmd->result = DID_ABORT << 16;
  1167. arcmsr_ccb_complete(ccb, 1);
  1168. poll_ccb_done = 1;
  1169. continue;
  1170. }
  1171. printk(KERN_NOTICE
  1172. "arcmsr%d: polling get an illegal ccb"
  1173. " command done ccb='0x%p'"
  1174. "ccboutstandingcount=%d \n"
  1175. , acb->host->host_no
  1176. , ccb
  1177. , atomic_read(&acb->ccboutstandingcount));
  1178. continue;
  1179. }
  1180. id = ccb->pcmd->device->id;
  1181. lun = ccb->pcmd->device->lun;
  1182. if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) {
  1183. if (acb->devstate[id][lun] == ARECA_RAID_GONE)
  1184. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  1185. ccb->pcmd->result = DID_OK << 16;
  1186. arcmsr_ccb_complete(ccb, 1);
  1187. } else {
  1188. switch(ccb->arcmsr_cdb.DeviceStatus) {
  1189. case ARCMSR_DEV_SELECT_TIMEOUT: {
  1190. acb->devstate[id][lun] = ARECA_RAID_GONE;
  1191. ccb->pcmd->result = DID_TIME_OUT << 16;
  1192. arcmsr_ccb_complete(ccb, 1);
  1193. }
  1194. break;
  1195. case ARCMSR_DEV_ABORTED:
  1196. case ARCMSR_DEV_INIT_FAIL: {
  1197. acb->devstate[id][lun] = ARECA_RAID_GONE;
  1198. ccb->pcmd->result = DID_BAD_TARGET << 16;
  1199. arcmsr_ccb_complete(ccb, 1);
  1200. }
  1201. break;
  1202. case ARCMSR_DEV_CHECK_CONDITION: {
  1203. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  1204. arcmsr_report_sense_info(ccb);
  1205. arcmsr_ccb_complete(ccb, 1);
  1206. }
  1207. break;
  1208. default:
  1209. printk(KERN_NOTICE
  1210. "arcmsr%d: scsi id=%d lun=%d"
  1211. " polling and getting command error done"
  1212. "but got unknown DeviceStatus = 0x%x \n"
  1213. , acb->host->host_no
  1214. , id
  1215. , lun
  1216. , ccb->arcmsr_cdb.DeviceStatus);
  1217. acb->devstate[id][lun] = ARECA_RAID_GONE;
  1218. ccb->pcmd->result = DID_BAD_TARGET << 16;
  1219. arcmsr_ccb_complete(ccb, 1);
  1220. break;
  1221. }
  1222. }
  1223. }
  1224. }
  1225. static void arcmsr_iop_init(struct AdapterControlBlock *acb)
  1226. {
  1227. struct MessageUnit __iomem *reg = acb->pmu;
  1228. uint32_t intmask_org, mask, outbound_doorbell, firmware_state = 0;
  1229. do {
  1230. firmware_state = readl(&reg->outbound_msgaddr1);
  1231. } while (!(firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK));
  1232. intmask_org = readl(&reg->outbound_intmask)
  1233. | ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE;
  1234. arcmsr_get_firmware_spec(acb);
  1235. acb->acb_flags |= ACB_F_MSG_START_BGRB;
  1236. writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
  1237. if (arcmsr_wait_msgint_ready(acb)) {
  1238. printk(KERN_NOTICE "arcmsr%d: "
  1239. "wait 'start adapter background rebulid' timeout\n",
  1240. acb->host->host_no);
  1241. }
  1242. outbound_doorbell = readl(&reg->outbound_doorbell);
  1243. writel(outbound_doorbell, &reg->outbound_doorbell);
  1244. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
  1245. mask = ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE
  1246. | ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE);
  1247. writel(intmask_org & mask, &reg->outbound_intmask);
  1248. acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
  1249. acb->acb_flags |= ACB_F_IOP_INITED;
  1250. }
  1251. static void arcmsr_iop_reset(struct AdapterControlBlock *acb)
  1252. {
  1253. struct MessageUnit __iomem *reg = acb->pmu;
  1254. struct CommandControlBlock *ccb;
  1255. uint32_t intmask_org;
  1256. int i = 0;
  1257. if (atomic_read(&acb->ccboutstandingcount) != 0) {
  1258. /* talk to iop 331 outstanding command aborted */
  1259. arcmsr_abort_allcmd(acb);
  1260. /* wait for 3 sec for all command aborted*/
  1261. msleep_interruptible(3000);
  1262. /* disable all outbound interrupt */
  1263. intmask_org = arcmsr_disable_outbound_ints(acb);
  1264. /* clear all outbound posted Q */
  1265. for (i = 0; i < ARCMSR_MAX_OUTSTANDING_CMD; i++)
  1266. readl(&reg->outbound_queueport);
  1267. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  1268. ccb = acb->pccb_pool[i];
  1269. if ((ccb->startdone == ARCMSR_CCB_START) ||
  1270. (ccb->startdone == ARCMSR_CCB_ABORTED)) {
  1271. ccb->startdone = ARCMSR_CCB_ABORTED;
  1272. ccb->pcmd->result = DID_ABORT << 16;
  1273. arcmsr_ccb_complete(ccb, 1);
  1274. }
  1275. }
  1276. /* enable all outbound interrupt */
  1277. arcmsr_enable_outbound_ints(acb, intmask_org);
  1278. }
  1279. atomic_set(&acb->ccboutstandingcount, 0);
  1280. }
  1281. static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
  1282. {
  1283. struct AdapterControlBlock *acb =
  1284. (struct AdapterControlBlock *)cmd->device->host->hostdata;
  1285. int i;
  1286. acb->num_resets++;
  1287. acb->acb_flags |= ACB_F_BUS_RESET;
  1288. for (i = 0; i < 400; i++) {
  1289. if (!atomic_read(&acb->ccboutstandingcount))
  1290. break;
  1291. arcmsr_interrupt(acb);
  1292. msleep(25);
  1293. }
  1294. arcmsr_iop_reset(acb);
  1295. acb->acb_flags &= ~ACB_F_BUS_RESET;
  1296. return SUCCESS;
  1297. }
  1298. static void arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
  1299. struct CommandControlBlock *ccb)
  1300. {
  1301. u32 intmask;
  1302. ccb->startdone = ARCMSR_CCB_ABORTED;
  1303. /*
  1304. ** Wait for 3 sec for all command done.
  1305. */
  1306. msleep_interruptible(3000);
  1307. intmask = arcmsr_disable_outbound_ints(acb);
  1308. arcmsr_polling_ccbdone(acb, ccb);
  1309. arcmsr_enable_outbound_ints(acb, intmask);
  1310. }
  1311. static int arcmsr_abort(struct scsi_cmnd *cmd)
  1312. {
  1313. struct AdapterControlBlock *acb =
  1314. (struct AdapterControlBlock *)cmd->device->host->hostdata;
  1315. int i = 0;
  1316. printk(KERN_NOTICE
  1317. "arcmsr%d: abort device command of scsi id=%d lun=%d \n",
  1318. acb->host->host_no, cmd->device->id, cmd->device->lun);
  1319. acb->num_aborts++;
  1320. /*
  1321. ************************************************
  1322. ** the all interrupt service routine is locked
  1323. ** we need to handle it as soon as possible and exit
  1324. ************************************************
  1325. */
  1326. if (!atomic_read(&acb->ccboutstandingcount))
  1327. return SUCCESS;
  1328. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  1329. struct CommandControlBlock *ccb = acb->pccb_pool[i];
  1330. if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
  1331. arcmsr_abort_one_cmd(acb, ccb);
  1332. break;
  1333. }
  1334. }
  1335. return SUCCESS;
  1336. }
  1337. static const char *arcmsr_info(struct Scsi_Host *host)
  1338. {
  1339. struct AdapterControlBlock *acb =
  1340. (struct AdapterControlBlock *) host->hostdata;
  1341. static char buf[256];
  1342. char *type;
  1343. int raid6 = 1;
  1344. switch (acb->pdev->device) {
  1345. case PCI_DEVICE_ID_ARECA_1110:
  1346. case PCI_DEVICE_ID_ARECA_1210:
  1347. raid6 = 0;
  1348. /*FALLTHRU*/
  1349. case PCI_DEVICE_ID_ARECA_1120:
  1350. case PCI_DEVICE_ID_ARECA_1130:
  1351. case PCI_DEVICE_ID_ARECA_1160:
  1352. case PCI_DEVICE_ID_ARECA_1170:
  1353. case PCI_DEVICE_ID_ARECA_1220:
  1354. case PCI_DEVICE_ID_ARECA_1230:
  1355. case PCI_DEVICE_ID_ARECA_1260:
  1356. case PCI_DEVICE_ID_ARECA_1270:
  1357. case PCI_DEVICE_ID_ARECA_1280:
  1358. type = "SATA";
  1359. break;
  1360. case PCI_DEVICE_ID_ARECA_1380:
  1361. case PCI_DEVICE_ID_ARECA_1381:
  1362. case PCI_DEVICE_ID_ARECA_1680:
  1363. case PCI_DEVICE_ID_ARECA_1681:
  1364. type = "SAS";
  1365. break;
  1366. default:
  1367. type = "X-TYPE";
  1368. break;
  1369. }
  1370. sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
  1371. type, raid6 ? "( RAID6 capable)" : "",
  1372. ARCMSR_DRIVER_VERSION);
  1373. return buf;
  1374. }