aic79xx_osm_pci.c 9.7 KB

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  1. /*
  2. * Linux driver attachment glue for PCI based U320 controllers.
  3. *
  4. * Copyright (c) 2000-2001 Adaptec Inc.
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions, and the following disclaimer,
  12. * without modification.
  13. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14. * substantially similar to the "NO WARRANTY" disclaimer below
  15. * ("Disclaimer") and any redistribution must be conditioned upon
  16. * including a substantially similar Disclaimer requirement for further
  17. * binary redistribution.
  18. * 3. Neither the names of the above-listed copyright holders nor the names
  19. * of any contributors may be used to endorse or promote products derived
  20. * from this software without specific prior written permission.
  21. *
  22. * Alternatively, this software may be distributed under the terms of the
  23. * GNU General Public License ("GPL") version 2 as published by the Free
  24. * Software Foundation.
  25. *
  26. * NO WARRANTY
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31. * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36. * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37. * POSSIBILITY OF SUCH DAMAGES.
  38. *
  39. * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#25 $
  40. */
  41. #include "aic79xx_osm.h"
  42. #include "aic79xx_inline.h"
  43. #include "aic79xx_pci.h"
  44. static int ahd_linux_pci_dev_probe(struct pci_dev *pdev,
  45. const struct pci_device_id *ent);
  46. static int ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd,
  47. u_long *base, u_long *base2);
  48. static int ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
  49. u_long *bus_addr,
  50. uint8_t __iomem **maddr);
  51. static void ahd_linux_pci_dev_remove(struct pci_dev *pdev);
  52. /* Define the macro locally since it's different for different class of chips.
  53. */
  54. #define ID(x) \
  55. ID2C(x), \
  56. ID2C(IDIROC(x))
  57. static struct pci_device_id ahd_linux_pci_id_table[] = {
  58. /* aic7901 based controllers */
  59. ID(ID_AHA_29320A),
  60. ID(ID_AHA_29320ALP),
  61. ID(ID_AHA_29320LPE),
  62. /* aic7902 based controllers */
  63. ID(ID_AHA_29320),
  64. ID(ID_AHA_29320B),
  65. ID(ID_AHA_29320LP),
  66. ID(ID_AHA_39320),
  67. ID(ID_AHA_39320_B),
  68. ID(ID_AHA_39320A),
  69. ID(ID_AHA_39320D),
  70. ID(ID_AHA_39320D_HP),
  71. ID(ID_AHA_39320D_B),
  72. ID(ID_AHA_39320D_B_HP),
  73. /* Generic chip probes for devices we don't know exactly. */
  74. ID16(ID_AIC7901 & ID_9005_GENERIC_MASK),
  75. ID(ID_AIC7901A & ID_DEV_VENDOR_MASK),
  76. ID16(ID_AIC7902 & ID_9005_GENERIC_MASK),
  77. { 0 }
  78. };
  79. MODULE_DEVICE_TABLE(pci, ahd_linux_pci_id_table);
  80. static struct pci_driver aic79xx_pci_driver = {
  81. .name = "aic79xx",
  82. .probe = ahd_linux_pci_dev_probe,
  83. .remove = ahd_linux_pci_dev_remove,
  84. .id_table = ahd_linux_pci_id_table
  85. };
  86. static void
  87. ahd_linux_pci_dev_remove(struct pci_dev *pdev)
  88. {
  89. struct ahd_softc *ahd = pci_get_drvdata(pdev);
  90. u_long s;
  91. if (ahd->platform_data && ahd->platform_data->host)
  92. scsi_remove_host(ahd->platform_data->host);
  93. ahd_lock(ahd, &s);
  94. ahd_intr_enable(ahd, FALSE);
  95. ahd_unlock(ahd, &s);
  96. ahd_free(ahd);
  97. }
  98. static void
  99. ahd_linux_pci_inherit_flags(struct ahd_softc *ahd)
  100. {
  101. struct pci_dev *pdev = ahd->dev_softc, *master_pdev;
  102. unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
  103. master_pdev = pci_get_slot(pdev->bus, master_devfn);
  104. if (master_pdev) {
  105. struct ahd_softc *master = pci_get_drvdata(master_pdev);
  106. if (master) {
  107. ahd->flags &= ~AHD_BIOS_ENABLED;
  108. ahd->flags |= master->flags & AHD_BIOS_ENABLED;
  109. } else
  110. printk(KERN_ERR "aic79xx: no multichannel peer found!\n");
  111. pci_dev_put(master_pdev);
  112. }
  113. }
  114. static int
  115. ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  116. {
  117. char buf[80];
  118. struct ahd_softc *ahd;
  119. ahd_dev_softc_t pci;
  120. struct ahd_pci_identity *entry;
  121. char *name;
  122. int error;
  123. struct device *dev = &pdev->dev;
  124. pci = pdev;
  125. entry = ahd_find_pci_device(pci);
  126. if (entry == NULL)
  127. return (-ENODEV);
  128. /*
  129. * Allocate a softc for this card and
  130. * set it up for attachment by our
  131. * common detect routine.
  132. */
  133. sprintf(buf, "ahd_pci:%d:%d:%d",
  134. ahd_get_pci_bus(pci),
  135. ahd_get_pci_slot(pci),
  136. ahd_get_pci_function(pci));
  137. name = malloc(strlen(buf) + 1, M_DEVBUF, M_NOWAIT);
  138. if (name == NULL)
  139. return (-ENOMEM);
  140. strcpy(name, buf);
  141. ahd = ahd_alloc(NULL, name);
  142. if (ahd == NULL)
  143. return (-ENOMEM);
  144. if (pci_enable_device(pdev)) {
  145. ahd_free(ahd);
  146. return (-ENODEV);
  147. }
  148. pci_set_master(pdev);
  149. if (sizeof(dma_addr_t) > 4) {
  150. const u64 required_mask = dma_get_required_mask(dev);
  151. if (required_mask > DMA_39BIT_MASK &&
  152. dma_set_mask(dev, DMA_64BIT_MASK) == 0)
  153. ahd->flags |= AHD_64BIT_ADDRESSING;
  154. else if (required_mask > DMA_32BIT_MASK &&
  155. dma_set_mask(dev, DMA_39BIT_MASK) == 0)
  156. ahd->flags |= AHD_39BIT_ADDRESSING;
  157. else
  158. dma_set_mask(dev, DMA_32BIT_MASK);
  159. } else {
  160. dma_set_mask(dev, DMA_32BIT_MASK);
  161. }
  162. ahd->dev_softc = pci;
  163. error = ahd_pci_config(ahd, entry);
  164. if (error != 0) {
  165. ahd_free(ahd);
  166. return (-error);
  167. }
  168. /*
  169. * Second Function PCI devices need to inherit some
  170. * * settings from function 0.
  171. */
  172. if ((ahd->features & AHD_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
  173. ahd_linux_pci_inherit_flags(ahd);
  174. pci_set_drvdata(pdev, ahd);
  175. ahd_linux_register_host(ahd, &aic79xx_driver_template);
  176. return (0);
  177. }
  178. int
  179. ahd_linux_pci_init(void)
  180. {
  181. return pci_register_driver(&aic79xx_pci_driver);
  182. }
  183. void
  184. ahd_linux_pci_exit(void)
  185. {
  186. pci_unregister_driver(&aic79xx_pci_driver);
  187. }
  188. static int
  189. ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd, u_long *base,
  190. u_long *base2)
  191. {
  192. *base = pci_resource_start(ahd->dev_softc, 0);
  193. /*
  194. * This is really the 3rd bar and should be at index 2,
  195. * but the Linux PCI code doesn't know how to "count" 64bit
  196. * bars.
  197. */
  198. *base2 = pci_resource_start(ahd->dev_softc, 3);
  199. if (*base == 0 || *base2 == 0)
  200. return (ENOMEM);
  201. if (!request_region(*base, 256, "aic79xx"))
  202. return (ENOMEM);
  203. if (!request_region(*base2, 256, "aic79xx")) {
  204. release_region(*base, 256);
  205. return (ENOMEM);
  206. }
  207. return (0);
  208. }
  209. static int
  210. ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
  211. u_long *bus_addr,
  212. uint8_t __iomem **maddr)
  213. {
  214. u_long start;
  215. u_long base_page;
  216. u_long base_offset;
  217. int error = 0;
  218. if (aic79xx_allow_memio == 0)
  219. return (ENOMEM);
  220. if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0)
  221. return (ENOMEM);
  222. start = pci_resource_start(ahd->dev_softc, 1);
  223. base_page = start & PAGE_MASK;
  224. base_offset = start - base_page;
  225. if (start != 0) {
  226. *bus_addr = start;
  227. if (!request_mem_region(start, 0x1000, "aic79xx"))
  228. error = ENOMEM;
  229. if (!error) {
  230. *maddr = ioremap_nocache(base_page, base_offset + 512);
  231. if (*maddr == NULL) {
  232. error = ENOMEM;
  233. release_mem_region(start, 0x1000);
  234. } else
  235. *maddr += base_offset;
  236. }
  237. } else
  238. error = ENOMEM;
  239. return (error);
  240. }
  241. int
  242. ahd_pci_map_registers(struct ahd_softc *ahd)
  243. {
  244. uint32_t command;
  245. u_long base;
  246. uint8_t __iomem *maddr;
  247. int error;
  248. /*
  249. * If its allowed, we prefer memory mapped access.
  250. */
  251. command = ahd_pci_read_config(ahd->dev_softc, PCIR_COMMAND, 4);
  252. command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
  253. base = 0;
  254. maddr = NULL;
  255. error = ahd_linux_pci_reserve_mem_region(ahd, &base, &maddr);
  256. if (error == 0) {
  257. ahd->platform_data->mem_busaddr = base;
  258. ahd->tags[0] = BUS_SPACE_MEMIO;
  259. ahd->bshs[0].maddr = maddr;
  260. ahd->tags[1] = BUS_SPACE_MEMIO;
  261. ahd->bshs[1].maddr = maddr + 0x100;
  262. ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND,
  263. command | PCIM_CMD_MEMEN, 4);
  264. if (ahd_pci_test_register_access(ahd) != 0) {
  265. printf("aic79xx: PCI Device %d:%d:%d "
  266. "failed memory mapped test. Using PIO.\n",
  267. ahd_get_pci_bus(ahd->dev_softc),
  268. ahd_get_pci_slot(ahd->dev_softc),
  269. ahd_get_pci_function(ahd->dev_softc));
  270. iounmap(maddr);
  271. release_mem_region(ahd->platform_data->mem_busaddr,
  272. 0x1000);
  273. ahd->bshs[0].maddr = NULL;
  274. maddr = NULL;
  275. } else
  276. command |= PCIM_CMD_MEMEN;
  277. } else if (bootverbose) {
  278. printf("aic79xx: PCI%d:%d:%d MEM region 0x%lx "
  279. "unavailable. Cannot memory map device.\n",
  280. ahd_get_pci_bus(ahd->dev_softc),
  281. ahd_get_pci_slot(ahd->dev_softc),
  282. ahd_get_pci_function(ahd->dev_softc),
  283. base);
  284. }
  285. if (maddr == NULL) {
  286. u_long base2;
  287. error = ahd_linux_pci_reserve_io_regions(ahd, &base, &base2);
  288. if (error == 0) {
  289. ahd->tags[0] = BUS_SPACE_PIO;
  290. ahd->tags[1] = BUS_SPACE_PIO;
  291. ahd->bshs[0].ioport = base;
  292. ahd->bshs[1].ioport = base2;
  293. command |= PCIM_CMD_PORTEN;
  294. } else {
  295. printf("aic79xx: PCI%d:%d:%d IO regions 0x%lx and 0x%lx"
  296. "unavailable. Cannot map device.\n",
  297. ahd_get_pci_bus(ahd->dev_softc),
  298. ahd_get_pci_slot(ahd->dev_softc),
  299. ahd_get_pci_function(ahd->dev_softc),
  300. base, base2);
  301. }
  302. }
  303. ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND, command, 4);
  304. return (error);
  305. }
  306. int
  307. ahd_pci_map_int(struct ahd_softc *ahd)
  308. {
  309. int error;
  310. error = request_irq(ahd->dev_softc->irq, ahd_linux_isr,
  311. IRQF_SHARED, "aic79xx", ahd);
  312. if (!error)
  313. ahd->platform_data->irq = ahd->dev_softc->irq;
  314. return (-error);
  315. }
  316. void
  317. ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state)
  318. {
  319. pci_set_power_state(ahd->dev_softc, new_state);
  320. }