rx.c 17 KB

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  1. /*
  2. * Adaptec AAC series RAID controller driver
  3. * (c) Copyright 2001 Red Hat Inc. <alan@redhat.com>
  4. *
  5. * based on the old aacraid driver that is..
  6. * Adaptec aacraid device driver for Linux.
  7. *
  8. * Copyright (c) 2000-2007 Adaptec, Inc. (aacraid@adaptec.com)
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2, or (at your option)
  13. * any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; see the file COPYING. If not, write to
  22. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. * Module Name:
  25. * rx.c
  26. *
  27. * Abstract: Hardware miniport for Drawbridge specific hardware functions.
  28. *
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/init.h>
  32. #include <linux/types.h>
  33. #include <linux/pci.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/slab.h>
  36. #include <linux/blkdev.h>
  37. #include <linux/delay.h>
  38. #include <linux/completion.h>
  39. #include <linux/time.h>
  40. #include <linux/interrupt.h>
  41. #include <asm/semaphore.h>
  42. #include <scsi/scsi_host.h>
  43. #include "aacraid.h"
  44. static irqreturn_t aac_rx_intr_producer(int irq, void *dev_id)
  45. {
  46. struct aac_dev *dev = dev_id;
  47. unsigned long bellbits;
  48. u8 intstat = rx_readb(dev, MUnit.OISR);
  49. /*
  50. * Read mask and invert because drawbridge is reversed.
  51. * This allows us to only service interrupts that have
  52. * been enabled.
  53. * Check to see if this is our interrupt. If it isn't just return
  54. */
  55. if (likely(intstat & ~(dev->OIMR))) {
  56. bellbits = rx_readl(dev, OutboundDoorbellReg);
  57. if (unlikely(bellbits & DoorBellPrintfReady)) {
  58. aac_printf(dev, readl (&dev->IndexRegs->Mailbox[5]));
  59. rx_writel(dev, MUnit.ODR,DoorBellPrintfReady);
  60. rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone);
  61. }
  62. else if (unlikely(bellbits & DoorBellAdapterNormCmdReady)) {
  63. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady);
  64. aac_command_normal(&dev->queues->queue[HostNormCmdQueue]);
  65. }
  66. else if (likely(bellbits & DoorBellAdapterNormRespReady)) {
  67. rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady);
  68. aac_response_normal(&dev->queues->queue[HostNormRespQueue]);
  69. }
  70. else if (unlikely(bellbits & DoorBellAdapterNormCmdNotFull)) {
  71. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
  72. }
  73. else if (unlikely(bellbits & DoorBellAdapterNormRespNotFull)) {
  74. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
  75. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull);
  76. }
  77. return IRQ_HANDLED;
  78. }
  79. return IRQ_NONE;
  80. }
  81. static irqreturn_t aac_rx_intr_message(int irq, void *dev_id)
  82. {
  83. struct aac_dev *dev = dev_id;
  84. u32 Index = rx_readl(dev, MUnit.OutboundQueue);
  85. if (unlikely(Index == 0xFFFFFFFFL))
  86. Index = rx_readl(dev, MUnit.OutboundQueue);
  87. if (likely(Index != 0xFFFFFFFFL)) {
  88. do {
  89. if (unlikely(aac_intr_normal(dev, Index))) {
  90. rx_writel(dev, MUnit.OutboundQueue, Index);
  91. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespReady);
  92. }
  93. Index = rx_readl(dev, MUnit.OutboundQueue);
  94. } while (Index != 0xFFFFFFFFL);
  95. return IRQ_HANDLED;
  96. }
  97. return IRQ_NONE;
  98. }
  99. /**
  100. * aac_rx_disable_interrupt - Disable interrupts
  101. * @dev: Adapter
  102. */
  103. static void aac_rx_disable_interrupt(struct aac_dev *dev)
  104. {
  105. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
  106. }
  107. /**
  108. * aac_rx_enable_interrupt_producer - Enable interrupts
  109. * @dev: Adapter
  110. */
  111. static void aac_rx_enable_interrupt_producer(struct aac_dev *dev)
  112. {
  113. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
  114. }
  115. /**
  116. * aac_rx_enable_interrupt_message - Enable interrupts
  117. * @dev: Adapter
  118. */
  119. static void aac_rx_enable_interrupt_message(struct aac_dev *dev)
  120. {
  121. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);
  122. }
  123. /**
  124. * rx_sync_cmd - send a command and wait
  125. * @dev: Adapter
  126. * @command: Command to execute
  127. * @p1: first parameter
  128. * @ret: adapter status
  129. *
  130. * This routine will send a synchronous command to the adapter and wait
  131. * for its completion.
  132. */
  133. static int rx_sync_cmd(struct aac_dev *dev, u32 command,
  134. u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
  135. u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
  136. {
  137. unsigned long start;
  138. int ok;
  139. /*
  140. * Write the command into Mailbox 0
  141. */
  142. writel(command, &dev->IndexRegs->Mailbox[0]);
  143. /*
  144. * Write the parameters into Mailboxes 1 - 6
  145. */
  146. writel(p1, &dev->IndexRegs->Mailbox[1]);
  147. writel(p2, &dev->IndexRegs->Mailbox[2]);
  148. writel(p3, &dev->IndexRegs->Mailbox[3]);
  149. writel(p4, &dev->IndexRegs->Mailbox[4]);
  150. /*
  151. * Clear the synch command doorbell to start on a clean slate.
  152. */
  153. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  154. /*
  155. * Disable doorbell interrupts
  156. */
  157. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
  158. /*
  159. * Force the completion of the mask register write before issuing
  160. * the interrupt.
  161. */
  162. rx_readb (dev, MUnit.OIMR);
  163. /*
  164. * Signal that there is a new synch command
  165. */
  166. rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0);
  167. ok = 0;
  168. start = jiffies;
  169. /*
  170. * Wait up to 30 seconds
  171. */
  172. while (time_before(jiffies, start+30*HZ))
  173. {
  174. udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
  175. /*
  176. * Mon960 will set doorbell0 bit when it has completed the command.
  177. */
  178. if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) {
  179. /*
  180. * Clear the doorbell.
  181. */
  182. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  183. ok = 1;
  184. break;
  185. }
  186. /*
  187. * Yield the processor in case we are slow
  188. */
  189. msleep(1);
  190. }
  191. if (unlikely(ok != 1)) {
  192. /*
  193. * Restore interrupt mask even though we timed out
  194. */
  195. aac_adapter_enable_int(dev);
  196. return -ETIMEDOUT;
  197. }
  198. /*
  199. * Pull the synch status from Mailbox 0.
  200. */
  201. if (status)
  202. *status = readl(&dev->IndexRegs->Mailbox[0]);
  203. if (r1)
  204. *r1 = readl(&dev->IndexRegs->Mailbox[1]);
  205. if (r2)
  206. *r2 = readl(&dev->IndexRegs->Mailbox[2]);
  207. if (r3)
  208. *r3 = readl(&dev->IndexRegs->Mailbox[3]);
  209. if (r4)
  210. *r4 = readl(&dev->IndexRegs->Mailbox[4]);
  211. /*
  212. * Clear the synch command doorbell.
  213. */
  214. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  215. /*
  216. * Restore interrupt mask
  217. */
  218. aac_adapter_enable_int(dev);
  219. return 0;
  220. }
  221. /**
  222. * aac_rx_interrupt_adapter - interrupt adapter
  223. * @dev: Adapter
  224. *
  225. * Send an interrupt to the i960 and breakpoint it.
  226. */
  227. static void aac_rx_interrupt_adapter(struct aac_dev *dev)
  228. {
  229. rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
  230. }
  231. /**
  232. * aac_rx_notify_adapter - send an event to the adapter
  233. * @dev: Adapter
  234. * @event: Event to send
  235. *
  236. * Notify the i960 that something it probably cares about has
  237. * happened.
  238. */
  239. static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event)
  240. {
  241. switch (event) {
  242. case AdapNormCmdQue:
  243. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1);
  244. break;
  245. case HostNormRespNotFull:
  246. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4);
  247. break;
  248. case AdapNormRespQue:
  249. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2);
  250. break;
  251. case HostNormCmdNotFull:
  252. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3);
  253. break;
  254. case HostShutdown:
  255. break;
  256. case FastIo:
  257. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6);
  258. break;
  259. case AdapPrintfDone:
  260. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5);
  261. break;
  262. default:
  263. BUG();
  264. break;
  265. }
  266. }
  267. /**
  268. * aac_rx_start_adapter - activate adapter
  269. * @dev: Adapter
  270. *
  271. * Start up processing on an i960 based AAC adapter
  272. */
  273. static void aac_rx_start_adapter(struct aac_dev *dev)
  274. {
  275. struct aac_init *init;
  276. init = dev->init;
  277. init->HostElapsedSeconds = cpu_to_le32(get_seconds());
  278. // We can only use a 32 bit address here
  279. rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
  280. 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
  281. }
  282. /**
  283. * aac_rx_check_health
  284. * @dev: device to check if healthy
  285. *
  286. * Will attempt to determine if the specified adapter is alive and
  287. * capable of handling requests, returning 0 if alive.
  288. */
  289. static int aac_rx_check_health(struct aac_dev *dev)
  290. {
  291. u32 status = rx_readl(dev, MUnit.OMRx[0]);
  292. /*
  293. * Check to see if the board failed any self tests.
  294. */
  295. if (unlikely(status & SELF_TEST_FAILED))
  296. return -1;
  297. /*
  298. * Check to see if the board panic'd.
  299. */
  300. if (unlikely(status & KERNEL_PANIC)) {
  301. char * buffer;
  302. struct POSTSTATUS {
  303. __le32 Post_Command;
  304. __le32 Post_Address;
  305. } * post;
  306. dma_addr_t paddr, baddr;
  307. int ret;
  308. if (likely((status & 0xFF000000L) == 0xBC000000L))
  309. return (status >> 16) & 0xFF;
  310. buffer = pci_alloc_consistent(dev->pdev, 512, &baddr);
  311. ret = -2;
  312. if (unlikely(buffer == NULL))
  313. return ret;
  314. post = pci_alloc_consistent(dev->pdev,
  315. sizeof(struct POSTSTATUS), &paddr);
  316. if (unlikely(post == NULL)) {
  317. pci_free_consistent(dev->pdev, 512, buffer, baddr);
  318. return ret;
  319. }
  320. memset(buffer, 0, 512);
  321. post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS);
  322. post->Post_Address = cpu_to_le32(baddr);
  323. rx_writel(dev, MUnit.IMRx[0], paddr);
  324. rx_sync_cmd(dev, COMMAND_POST_RESULTS, baddr, 0, 0, 0, 0, 0,
  325. NULL, NULL, NULL, NULL, NULL);
  326. pci_free_consistent(dev->pdev, sizeof(struct POSTSTATUS),
  327. post, paddr);
  328. if (likely((buffer[0] == '0') && ((buffer[1] == 'x') || (buffer[1] == 'X')))) {
  329. ret = (buffer[2] <= '9') ? (buffer[2] - '0') : (buffer[2] - 'A' + 10);
  330. ret <<= 4;
  331. ret += (buffer[3] <= '9') ? (buffer[3] - '0') : (buffer[3] - 'A' + 10);
  332. }
  333. pci_free_consistent(dev->pdev, 512, buffer, baddr);
  334. return ret;
  335. }
  336. /*
  337. * Wait for the adapter to be up and running.
  338. */
  339. if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
  340. return -3;
  341. /*
  342. * Everything is OK
  343. */
  344. return 0;
  345. }
  346. /**
  347. * aac_rx_deliver_producer
  348. * @fib: fib to issue
  349. *
  350. * Will send a fib, returning 0 if successful.
  351. */
  352. static int aac_rx_deliver_producer(struct fib * fib)
  353. {
  354. struct aac_dev *dev = fib->dev;
  355. struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
  356. unsigned long qflags;
  357. u32 Index;
  358. unsigned long nointr = 0;
  359. spin_lock_irqsave(q->lock, qflags);
  360. aac_queue_get( dev, &Index, AdapNormCmdQueue, fib->hw_fib_va, 1, fib, &nointr);
  361. q->numpending++;
  362. *(q->headers.producer) = cpu_to_le32(Index + 1);
  363. spin_unlock_irqrestore(q->lock, qflags);
  364. if (!(nointr & aac_config.irq_mod))
  365. aac_adapter_notify(dev, AdapNormCmdQueue);
  366. return 0;
  367. }
  368. /**
  369. * aac_rx_deliver_message
  370. * @fib: fib to issue
  371. *
  372. * Will send a fib, returning 0 if successful.
  373. */
  374. static int aac_rx_deliver_message(struct fib * fib)
  375. {
  376. struct aac_dev *dev = fib->dev;
  377. struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
  378. unsigned long qflags;
  379. u32 Index;
  380. u64 addr;
  381. volatile void __iomem *device;
  382. unsigned long count = 10000000L; /* 50 seconds */
  383. spin_lock_irqsave(q->lock, qflags);
  384. q->numpending++;
  385. spin_unlock_irqrestore(q->lock, qflags);
  386. for(;;) {
  387. Index = rx_readl(dev, MUnit.InboundQueue);
  388. if (unlikely(Index == 0xFFFFFFFFL))
  389. Index = rx_readl(dev, MUnit.InboundQueue);
  390. if (likely(Index != 0xFFFFFFFFL))
  391. break;
  392. if (--count == 0) {
  393. spin_lock_irqsave(q->lock, qflags);
  394. q->numpending--;
  395. spin_unlock_irqrestore(q->lock, qflags);
  396. return -ETIMEDOUT;
  397. }
  398. udelay(5);
  399. }
  400. device = dev->base + Index;
  401. addr = fib->hw_fib_pa;
  402. writel((u32)(addr & 0xffffffff), device);
  403. device += sizeof(u32);
  404. writel((u32)(addr >> 32), device);
  405. device += sizeof(u32);
  406. writel(le16_to_cpu(fib->hw_fib_va->header.Size), device);
  407. rx_writel(dev, MUnit.InboundQueue, Index);
  408. return 0;
  409. }
  410. /**
  411. * aac_rx_ioremap
  412. * @size: mapping resize request
  413. *
  414. */
  415. static int aac_rx_ioremap(struct aac_dev * dev, u32 size)
  416. {
  417. if (!size) {
  418. iounmap(dev->regs.rx);
  419. return 0;
  420. }
  421. dev->base = dev->regs.rx = ioremap(dev->scsi_host_ptr->base, size);
  422. if (dev->base == NULL)
  423. return -1;
  424. dev->IndexRegs = &dev->regs.rx->IndexRegs;
  425. return 0;
  426. }
  427. static int aac_rx_restart_adapter(struct aac_dev *dev, int bled)
  428. {
  429. u32 var;
  430. if (bled)
  431. printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n",
  432. dev->name, dev->id, bled);
  433. else {
  434. bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
  435. 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL);
  436. if (!bled && (var != 0x00000001))
  437. bled = -EINVAL;
  438. }
  439. if (bled && (bled != -ETIMEDOUT))
  440. bled = aac_adapter_sync_cmd(dev, IOP_RESET,
  441. 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL);
  442. if (bled && (bled != -ETIMEDOUT))
  443. return -EINVAL;
  444. if (bled || (var == 0x3803000F)) { /* USE_OTHER_METHOD */
  445. rx_writel(dev, MUnit.reserved2, 3);
  446. msleep(5000); /* Delay 5 seconds */
  447. var = 0x00000001;
  448. }
  449. if (var != 0x00000001)
  450. return -EINVAL;
  451. if (rx_readl(dev, MUnit.OMRx[0]) & KERNEL_PANIC)
  452. return -ENODEV;
  453. return 0;
  454. }
  455. /**
  456. * aac_rx_select_comm - Select communications method
  457. * @dev: Adapter
  458. * @comm: communications method
  459. */
  460. int aac_rx_select_comm(struct aac_dev *dev, int comm)
  461. {
  462. switch (comm) {
  463. case AAC_COMM_PRODUCER:
  464. dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_producer;
  465. dev->a_ops.adapter_intr = aac_rx_intr_producer;
  466. dev->a_ops.adapter_deliver = aac_rx_deliver_producer;
  467. break;
  468. case AAC_COMM_MESSAGE:
  469. dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_message;
  470. dev->a_ops.adapter_intr = aac_rx_intr_message;
  471. dev->a_ops.adapter_deliver = aac_rx_deliver_message;
  472. break;
  473. default:
  474. return 1;
  475. }
  476. return 0;
  477. }
  478. /**
  479. * aac_rx_init - initialize an i960 based AAC card
  480. * @dev: device to configure
  481. *
  482. * Allocate and set up resources for the i960 based AAC variants. The
  483. * device_interface in the commregion will be allocated and linked
  484. * to the comm region.
  485. */
  486. int _aac_rx_init(struct aac_dev *dev)
  487. {
  488. unsigned long start;
  489. unsigned long status;
  490. int restart = 0;
  491. int instance = dev->id;
  492. const char * name = dev->name;
  493. if (aac_adapter_ioremap(dev, dev->base_size)) {
  494. printk(KERN_WARNING "%s: unable to map adapter.\n", name);
  495. goto error_iounmap;
  496. }
  497. /* Failure to reset here is an option ... */
  498. dev->a_ops.adapter_sync_cmd = rx_sync_cmd;
  499. dev->a_ops.adapter_enable_int = aac_rx_disable_interrupt;
  500. dev->OIMR = status = rx_readb (dev, MUnit.OIMR);
  501. if ((((status & 0x0c) != 0x0c) || reset_devices) &&
  502. !aac_rx_restart_adapter(dev, 0))
  503. ++restart;
  504. /*
  505. * Check to see if the board panic'd while booting.
  506. */
  507. status = rx_readl(dev, MUnit.OMRx[0]);
  508. if (status & KERNEL_PANIC) {
  509. if (aac_rx_restart_adapter(dev, aac_rx_check_health(dev)))
  510. goto error_iounmap;
  511. ++restart;
  512. }
  513. /*
  514. * Check to see if the board failed any self tests.
  515. */
  516. status = rx_readl(dev, MUnit.OMRx[0]);
  517. if (status & SELF_TEST_FAILED) {
  518. printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
  519. goto error_iounmap;
  520. }
  521. /*
  522. * Check to see if the monitor panic'd while booting.
  523. */
  524. if (status & MONITOR_PANIC) {
  525. printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
  526. goto error_iounmap;
  527. }
  528. start = jiffies;
  529. /*
  530. * Wait for the adapter to be up and running. Wait up to 3 minutes
  531. */
  532. while (!((status = rx_readl(dev, MUnit.OMRx[0])) & KERNEL_UP_AND_RUNNING))
  533. {
  534. if ((restart &&
  535. (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
  536. time_after(jiffies, start+HZ*startup_timeout)) {
  537. printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
  538. dev->name, instance, status);
  539. goto error_iounmap;
  540. }
  541. if (!restart &&
  542. ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
  543. time_after(jiffies, start + HZ *
  544. ((startup_timeout > 60)
  545. ? (startup_timeout - 60)
  546. : (startup_timeout / 2))))) {
  547. if (likely(!aac_rx_restart_adapter(dev, aac_rx_check_health(dev))))
  548. start = jiffies;
  549. ++restart;
  550. }
  551. msleep(1);
  552. }
  553. /*
  554. * Fill in the common function dispatch table.
  555. */
  556. dev->a_ops.adapter_interrupt = aac_rx_interrupt_adapter;
  557. dev->a_ops.adapter_disable_int = aac_rx_disable_interrupt;
  558. dev->a_ops.adapter_notify = aac_rx_notify_adapter;
  559. dev->a_ops.adapter_sync_cmd = rx_sync_cmd;
  560. dev->a_ops.adapter_check_health = aac_rx_check_health;
  561. dev->a_ops.adapter_restart = aac_rx_restart_adapter;
  562. /*
  563. * First clear out all interrupts. Then enable the one's that we
  564. * can handle.
  565. */
  566. aac_adapter_comm(dev, AAC_COMM_PRODUCER);
  567. aac_adapter_disable_int(dev);
  568. rx_writel(dev, MUnit.ODR, 0xffffffff);
  569. aac_adapter_enable_int(dev);
  570. if (aac_init_adapter(dev) == NULL)
  571. goto error_iounmap;
  572. aac_adapter_comm(dev, dev->comm_interface);
  573. if (request_irq(dev->scsi_host_ptr->irq, dev->a_ops.adapter_intr,
  574. IRQF_SHARED|IRQF_DISABLED, "aacraid", dev) < 0) {
  575. printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
  576. name, instance);
  577. goto error_iounmap;
  578. }
  579. aac_adapter_enable_int(dev);
  580. /*
  581. * Tell the adapter that all is configured, and it can
  582. * start accepting requests
  583. */
  584. aac_rx_start_adapter(dev);
  585. return 0;
  586. error_iounmap:
  587. return -1;
  588. }
  589. int aac_rx_init(struct aac_dev *dev)
  590. {
  591. /*
  592. * Fill in the function dispatch table.
  593. */
  594. dev->a_ops.adapter_ioremap = aac_rx_ioremap;
  595. dev->a_ops.adapter_comm = aac_rx_select_comm;
  596. return _aac_rx_init(dev);
  597. }