ioasm.h 3.9 KB

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  1. #ifndef S390_CIO_IOASM_H
  2. #define S390_CIO_IOASM_H
  3. #include <asm/chpid.h>
  4. #include "schid.h"
  5. /*
  6. * TPI info structure
  7. */
  8. struct tpi_info {
  9. struct subchannel_id schid;
  10. __u32 intparm; /* interruption parameter */
  11. __u32 adapter_IO : 1;
  12. __u32 reserved2 : 1;
  13. __u32 isc : 3;
  14. __u32 reserved3 : 12;
  15. __u32 int_type : 3;
  16. __u32 reserved4 : 12;
  17. } __attribute__ ((packed));
  18. /*
  19. * Some S390 specific IO instructions as inline
  20. */
  21. static inline int stsch(struct subchannel_id schid,
  22. volatile struct schib *addr)
  23. {
  24. register struct subchannel_id reg1 asm ("1") = schid;
  25. int ccode;
  26. asm volatile(
  27. " stsch 0(%2)\n"
  28. " ipm %0\n"
  29. " srl %0,28"
  30. : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc");
  31. return ccode;
  32. }
  33. static inline int stsch_err(struct subchannel_id schid,
  34. volatile struct schib *addr)
  35. {
  36. register struct subchannel_id reg1 asm ("1") = schid;
  37. int ccode = -EIO;
  38. asm volatile(
  39. " stsch 0(%2)\n"
  40. "0: ipm %0\n"
  41. " srl %0,28\n"
  42. "1:\n"
  43. EX_TABLE(0b,1b)
  44. : "+d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc");
  45. return ccode;
  46. }
  47. static inline int msch(struct subchannel_id schid,
  48. volatile struct schib *addr)
  49. {
  50. register struct subchannel_id reg1 asm ("1") = schid;
  51. int ccode;
  52. asm volatile(
  53. " msch 0(%2)\n"
  54. " ipm %0\n"
  55. " srl %0,28"
  56. : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc");
  57. return ccode;
  58. }
  59. static inline int msch_err(struct subchannel_id schid,
  60. volatile struct schib *addr)
  61. {
  62. register struct subchannel_id reg1 asm ("1") = schid;
  63. int ccode = -EIO;
  64. asm volatile(
  65. " msch 0(%2)\n"
  66. "0: ipm %0\n"
  67. " srl %0,28\n"
  68. "1:\n"
  69. EX_TABLE(0b,1b)
  70. : "+d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc");
  71. return ccode;
  72. }
  73. static inline int tsch(struct subchannel_id schid,
  74. volatile struct irb *addr)
  75. {
  76. register struct subchannel_id reg1 asm ("1") = schid;
  77. int ccode;
  78. asm volatile(
  79. " tsch 0(%2)\n"
  80. " ipm %0\n"
  81. " srl %0,28"
  82. : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc");
  83. return ccode;
  84. }
  85. static inline int tpi( volatile struct tpi_info *addr)
  86. {
  87. int ccode;
  88. asm volatile(
  89. " tpi 0(%1)\n"
  90. " ipm %0\n"
  91. " srl %0,28"
  92. : "=d" (ccode) : "a" (addr), "m" (*addr) : "cc");
  93. return ccode;
  94. }
  95. static inline int ssch(struct subchannel_id schid,
  96. volatile struct orb *addr)
  97. {
  98. register struct subchannel_id reg1 asm ("1") = schid;
  99. int ccode;
  100. asm volatile(
  101. " ssch 0(%2)\n"
  102. " ipm %0\n"
  103. " srl %0,28"
  104. : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc");
  105. return ccode;
  106. }
  107. static inline int rsch(struct subchannel_id schid)
  108. {
  109. register struct subchannel_id reg1 asm ("1") = schid;
  110. int ccode;
  111. asm volatile(
  112. " rsch\n"
  113. " ipm %0\n"
  114. " srl %0,28"
  115. : "=d" (ccode) : "d" (reg1) : "cc");
  116. return ccode;
  117. }
  118. static inline int csch(struct subchannel_id schid)
  119. {
  120. register struct subchannel_id reg1 asm ("1") = schid;
  121. int ccode;
  122. asm volatile(
  123. " csch\n"
  124. " ipm %0\n"
  125. " srl %0,28"
  126. : "=d" (ccode) : "d" (reg1) : "cc");
  127. return ccode;
  128. }
  129. static inline int hsch(struct subchannel_id schid)
  130. {
  131. register struct subchannel_id reg1 asm ("1") = schid;
  132. int ccode;
  133. asm volatile(
  134. " hsch\n"
  135. " ipm %0\n"
  136. " srl %0,28"
  137. : "=d" (ccode) : "d" (reg1) : "cc");
  138. return ccode;
  139. }
  140. static inline int xsch(struct subchannel_id schid)
  141. {
  142. register struct subchannel_id reg1 asm ("1") = schid;
  143. int ccode;
  144. asm volatile(
  145. " .insn rre,0xb2760000,%1,0\n"
  146. " ipm %0\n"
  147. " srl %0,28"
  148. : "=d" (ccode) : "d" (reg1) : "cc");
  149. return ccode;
  150. }
  151. static inline int chsc(void *chsc_area)
  152. {
  153. typedef struct { char _[4096]; } addr_type;
  154. int cc;
  155. asm volatile(
  156. " .insn rre,0xb25f0000,%2,0\n"
  157. " ipm %0\n"
  158. " srl %0,28\n"
  159. : "=d" (cc), "=m" (*(addr_type *) chsc_area)
  160. : "d" (chsc_area), "m" (*(addr_type *) chsc_area)
  161. : "cc");
  162. return cc;
  163. }
  164. static inline int rchp(struct chp_id chpid)
  165. {
  166. register struct chp_id reg1 asm ("1") = chpid;
  167. int ccode;
  168. asm volatile(
  169. " lr 1,%1\n"
  170. " rchp\n"
  171. " ipm %0\n"
  172. " srl %0,28"
  173. : "=d" (ccode) : "d" (reg1) : "cc");
  174. return ccode;
  175. }
  176. #endif