rtc-s3c.c 13 KB

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  1. /* drivers/rtc/rtc-s3c.c
  2. *
  3. * Copyright (c) 2004,2006 Simtec Electronics
  4. * Ben Dooks, <ben@simtec.co.uk>
  5. * http://armlinux.simtec.co.uk/
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * S3C2410/S3C2440/S3C24XX Internal RTC Driver
  12. */
  13. #include <linux/module.h>
  14. #include <linux/fs.h>
  15. #include <linux/string.h>
  16. #include <linux/init.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/clk.h>
  22. #include <asm/hardware.h>
  23. #include <asm/uaccess.h>
  24. #include <asm/io.h>
  25. #include <asm/irq.h>
  26. #include <asm/rtc.h>
  27. #include <asm/mach/time.h>
  28. #include <asm/arch/regs-rtc.h>
  29. /* I have yet to find an S3C implementation with more than one
  30. * of these rtc blocks in */
  31. static struct resource *s3c_rtc_mem;
  32. static void __iomem *s3c_rtc_base;
  33. static int s3c_rtc_alarmno = NO_IRQ;
  34. static int s3c_rtc_tickno = NO_IRQ;
  35. static int s3c_rtc_freq = 1;
  36. static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
  37. static unsigned int tick_count;
  38. /* IRQ Handlers */
  39. static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
  40. {
  41. struct rtc_device *rdev = id;
  42. rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
  43. return IRQ_HANDLED;
  44. }
  45. static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
  46. {
  47. struct rtc_device *rdev = id;
  48. rtc_update_irq(rdev, tick_count++, RTC_PF | RTC_IRQF);
  49. return IRQ_HANDLED;
  50. }
  51. /* Update control registers */
  52. static void s3c_rtc_setaie(int to)
  53. {
  54. unsigned int tmp;
  55. pr_debug("%s: aie=%d\n", __FUNCTION__, to);
  56. tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
  57. if (to)
  58. tmp |= S3C2410_RTCALM_ALMEN;
  59. writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
  60. }
  61. static void s3c_rtc_setpie(int to)
  62. {
  63. unsigned int tmp;
  64. pr_debug("%s: pie=%d\n", __FUNCTION__, to);
  65. spin_lock_irq(&s3c_rtc_pie_lock);
  66. tmp = readb(s3c_rtc_base + S3C2410_TICNT) & ~S3C2410_TICNT_ENABLE;
  67. if (to)
  68. tmp |= S3C2410_TICNT_ENABLE;
  69. writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
  70. spin_unlock_irq(&s3c_rtc_pie_lock);
  71. }
  72. static void s3c_rtc_setfreq(int freq)
  73. {
  74. unsigned int tmp;
  75. spin_lock_irq(&s3c_rtc_pie_lock);
  76. tmp = readb(s3c_rtc_base + S3C2410_TICNT) & S3C2410_TICNT_ENABLE;
  77. s3c_rtc_freq = freq;
  78. tmp |= (128 / freq)-1;
  79. writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
  80. spin_unlock_irq(&s3c_rtc_pie_lock);
  81. }
  82. /* Time read/write */
  83. static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  84. {
  85. unsigned int have_retried = 0;
  86. void __iomem *base = s3c_rtc_base;
  87. retry_get_time:
  88. rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
  89. rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
  90. rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
  91. rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
  92. rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
  93. rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
  94. /* the only way to work out wether the system was mid-update
  95. * when we read it is to check the second counter, and if it
  96. * is zero, then we re-try the entire read
  97. */
  98. if (rtc_tm->tm_sec == 0 && !have_retried) {
  99. have_retried = 1;
  100. goto retry_get_time;
  101. }
  102. pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n",
  103. rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
  104. rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
  105. BCD_TO_BIN(rtc_tm->tm_sec);
  106. BCD_TO_BIN(rtc_tm->tm_min);
  107. BCD_TO_BIN(rtc_tm->tm_hour);
  108. BCD_TO_BIN(rtc_tm->tm_mday);
  109. BCD_TO_BIN(rtc_tm->tm_mon);
  110. BCD_TO_BIN(rtc_tm->tm_year);
  111. rtc_tm->tm_year += 100;
  112. rtc_tm->tm_mon -= 1;
  113. return 0;
  114. }
  115. static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
  116. {
  117. void __iomem *base = s3c_rtc_base;
  118. int year = tm->tm_year - 100;
  119. pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n",
  120. tm->tm_year, tm->tm_mon, tm->tm_mday,
  121. tm->tm_hour, tm->tm_min, tm->tm_sec);
  122. /* we get around y2k by simply not supporting it */
  123. if (year < 0 || year >= 100) {
  124. dev_err(dev, "rtc only supports 100 years\n");
  125. return -EINVAL;
  126. }
  127. writeb(BIN2BCD(tm->tm_sec), base + S3C2410_RTCSEC);
  128. writeb(BIN2BCD(tm->tm_min), base + S3C2410_RTCMIN);
  129. writeb(BIN2BCD(tm->tm_hour), base + S3C2410_RTCHOUR);
  130. writeb(BIN2BCD(tm->tm_mday), base + S3C2410_RTCDATE);
  131. writeb(BIN2BCD(tm->tm_mon + 1), base + S3C2410_RTCMON);
  132. writeb(BIN2BCD(year), base + S3C2410_RTCYEAR);
  133. return 0;
  134. }
  135. static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
  136. {
  137. struct rtc_time *alm_tm = &alrm->time;
  138. void __iomem *base = s3c_rtc_base;
  139. unsigned int alm_en;
  140. alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
  141. alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
  142. alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
  143. alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
  144. alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
  145. alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
  146. alm_en = readb(base + S3C2410_RTCALM);
  147. alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
  148. pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n",
  149. alm_en,
  150. alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
  151. alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
  152. /* decode the alarm enable field */
  153. if (alm_en & S3C2410_RTCALM_SECEN)
  154. BCD_TO_BIN(alm_tm->tm_sec);
  155. else
  156. alm_tm->tm_sec = 0xff;
  157. if (alm_en & S3C2410_RTCALM_MINEN)
  158. BCD_TO_BIN(alm_tm->tm_min);
  159. else
  160. alm_tm->tm_min = 0xff;
  161. if (alm_en & S3C2410_RTCALM_HOUREN)
  162. BCD_TO_BIN(alm_tm->tm_hour);
  163. else
  164. alm_tm->tm_hour = 0xff;
  165. if (alm_en & S3C2410_RTCALM_DAYEN)
  166. BCD_TO_BIN(alm_tm->tm_mday);
  167. else
  168. alm_tm->tm_mday = 0xff;
  169. if (alm_en & S3C2410_RTCALM_MONEN) {
  170. BCD_TO_BIN(alm_tm->tm_mon);
  171. alm_tm->tm_mon -= 1;
  172. } else {
  173. alm_tm->tm_mon = 0xff;
  174. }
  175. if (alm_en & S3C2410_RTCALM_YEAREN)
  176. BCD_TO_BIN(alm_tm->tm_year);
  177. else
  178. alm_tm->tm_year = 0xffff;
  179. return 0;
  180. }
  181. static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  182. {
  183. struct rtc_time *tm = &alrm->time;
  184. void __iomem *base = s3c_rtc_base;
  185. unsigned int alrm_en;
  186. pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n",
  187. alrm->enabled,
  188. tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff,
  189. tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec);
  190. alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
  191. writeb(0x00, base + S3C2410_RTCALM);
  192. if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
  193. alrm_en |= S3C2410_RTCALM_SECEN;
  194. writeb(BIN2BCD(tm->tm_sec), base + S3C2410_ALMSEC);
  195. }
  196. if (tm->tm_min < 60 && tm->tm_min >= 0) {
  197. alrm_en |= S3C2410_RTCALM_MINEN;
  198. writeb(BIN2BCD(tm->tm_min), base + S3C2410_ALMMIN);
  199. }
  200. if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
  201. alrm_en |= S3C2410_RTCALM_HOUREN;
  202. writeb(BIN2BCD(tm->tm_hour), base + S3C2410_ALMHOUR);
  203. }
  204. pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
  205. writeb(alrm_en, base + S3C2410_RTCALM);
  206. if (0) {
  207. alrm_en = readb(base + S3C2410_RTCALM);
  208. alrm_en &= ~S3C2410_RTCALM_ALMEN;
  209. writeb(alrm_en, base + S3C2410_RTCALM);
  210. disable_irq_wake(s3c_rtc_alarmno);
  211. }
  212. if (alrm->enabled)
  213. enable_irq_wake(s3c_rtc_alarmno);
  214. else
  215. disable_irq_wake(s3c_rtc_alarmno);
  216. return 0;
  217. }
  218. static int s3c_rtc_ioctl(struct device *dev,
  219. unsigned int cmd, unsigned long arg)
  220. {
  221. unsigned int ret = -ENOIOCTLCMD;
  222. switch (cmd) {
  223. case RTC_AIE_OFF:
  224. case RTC_AIE_ON:
  225. s3c_rtc_setaie((cmd == RTC_AIE_ON) ? 1 : 0);
  226. ret = 0;
  227. break;
  228. case RTC_PIE_OFF:
  229. case RTC_PIE_ON:
  230. tick_count = 0;
  231. s3c_rtc_setpie((cmd == RTC_PIE_ON) ? 1 : 0);
  232. ret = 0;
  233. break;
  234. case RTC_IRQP_READ:
  235. ret = put_user(s3c_rtc_freq, (unsigned long __user *)arg);
  236. break;
  237. case RTC_IRQP_SET:
  238. /* check for power of 2 */
  239. if ((arg & (arg-1)) != 0 || arg < 1) {
  240. ret = -EINVAL;
  241. goto exit;
  242. }
  243. pr_debug("s3c2410_rtc: setting frequency %ld\n", arg);
  244. s3c_rtc_setfreq(arg);
  245. ret = 0;
  246. break;
  247. case RTC_UIE_ON:
  248. case RTC_UIE_OFF:
  249. ret = -EINVAL;
  250. }
  251. exit:
  252. return ret;
  253. }
  254. static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
  255. {
  256. unsigned int ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
  257. seq_printf(seq, "periodic_IRQ\t: %s\n",
  258. (ticnt & S3C2410_TICNT_ENABLE) ? "yes" : "no" );
  259. seq_printf(seq, "periodic_freq\t: %d\n", s3c_rtc_freq);
  260. return 0;
  261. }
  262. static int s3c_rtc_open(struct device *dev)
  263. {
  264. struct platform_device *pdev = to_platform_device(dev);
  265. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  266. int ret;
  267. ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
  268. IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev);
  269. if (ret) {
  270. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
  271. return ret;
  272. }
  273. ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
  274. IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev);
  275. if (ret) {
  276. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
  277. goto tick_err;
  278. }
  279. return ret;
  280. tick_err:
  281. free_irq(s3c_rtc_alarmno, rtc_dev);
  282. return ret;
  283. }
  284. static void s3c_rtc_release(struct device *dev)
  285. {
  286. struct platform_device *pdev = to_platform_device(dev);
  287. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  288. /* do not clear AIE here, it may be needed for wake */
  289. s3c_rtc_setpie(0);
  290. free_irq(s3c_rtc_alarmno, rtc_dev);
  291. free_irq(s3c_rtc_tickno, rtc_dev);
  292. }
  293. static const struct rtc_class_ops s3c_rtcops = {
  294. .open = s3c_rtc_open,
  295. .release = s3c_rtc_release,
  296. .ioctl = s3c_rtc_ioctl,
  297. .read_time = s3c_rtc_gettime,
  298. .set_time = s3c_rtc_settime,
  299. .read_alarm = s3c_rtc_getalarm,
  300. .set_alarm = s3c_rtc_setalarm,
  301. .proc = s3c_rtc_proc,
  302. };
  303. static void s3c_rtc_enable(struct platform_device *pdev, int en)
  304. {
  305. void __iomem *base = s3c_rtc_base;
  306. unsigned int tmp;
  307. if (s3c_rtc_base == NULL)
  308. return;
  309. if (!en) {
  310. tmp = readb(base + S3C2410_RTCCON);
  311. writeb(tmp & ~S3C2410_RTCCON_RTCEN, base + S3C2410_RTCCON);
  312. tmp = readb(base + S3C2410_TICNT);
  313. writeb(tmp & ~S3C2410_TICNT_ENABLE, base + S3C2410_TICNT);
  314. } else {
  315. /* re-enable the device, and check it is ok */
  316. if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){
  317. dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
  318. tmp = readb(base + S3C2410_RTCCON);
  319. writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON);
  320. }
  321. if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){
  322. dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
  323. tmp = readb(base + S3C2410_RTCCON);
  324. writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON);
  325. }
  326. if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){
  327. dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
  328. tmp = readb(base + S3C2410_RTCCON);
  329. writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON);
  330. }
  331. }
  332. }
  333. static int s3c_rtc_remove(struct platform_device *dev)
  334. {
  335. struct rtc_device *rtc = platform_get_drvdata(dev);
  336. platform_set_drvdata(dev, NULL);
  337. rtc_device_unregister(rtc);
  338. s3c_rtc_setpie(0);
  339. s3c_rtc_setaie(0);
  340. iounmap(s3c_rtc_base);
  341. release_resource(s3c_rtc_mem);
  342. kfree(s3c_rtc_mem);
  343. return 0;
  344. }
  345. static int s3c_rtc_probe(struct platform_device *pdev)
  346. {
  347. struct rtc_device *rtc;
  348. struct resource *res;
  349. int ret;
  350. pr_debug("%s: probe=%p\n", __FUNCTION__, pdev);
  351. /* find the IRQs */
  352. s3c_rtc_tickno = platform_get_irq(pdev, 1);
  353. if (s3c_rtc_tickno < 0) {
  354. dev_err(&pdev->dev, "no irq for rtc tick\n");
  355. return -ENOENT;
  356. }
  357. s3c_rtc_alarmno = platform_get_irq(pdev, 0);
  358. if (s3c_rtc_alarmno < 0) {
  359. dev_err(&pdev->dev, "no irq for alarm\n");
  360. return -ENOENT;
  361. }
  362. pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
  363. s3c_rtc_tickno, s3c_rtc_alarmno);
  364. /* get the memory region */
  365. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  366. if (res == NULL) {
  367. dev_err(&pdev->dev, "failed to get memory region resource\n");
  368. return -ENOENT;
  369. }
  370. s3c_rtc_mem = request_mem_region(res->start,
  371. res->end-res->start+1,
  372. pdev->name);
  373. if (s3c_rtc_mem == NULL) {
  374. dev_err(&pdev->dev, "failed to reserve memory region\n");
  375. ret = -ENOENT;
  376. goto err_nores;
  377. }
  378. s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
  379. if (s3c_rtc_base == NULL) {
  380. dev_err(&pdev->dev, "failed ioremap()\n");
  381. ret = -EINVAL;
  382. goto err_nomap;
  383. }
  384. /* check to see if everything is setup correctly */
  385. s3c_rtc_enable(pdev, 1);
  386. pr_debug("s3c2410_rtc: RTCCON=%02x\n",
  387. readb(s3c_rtc_base + S3C2410_RTCCON));
  388. s3c_rtc_setfreq(s3c_rtc_freq);
  389. /* register RTC and exit */
  390. rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
  391. THIS_MODULE);
  392. if (IS_ERR(rtc)) {
  393. dev_err(&pdev->dev, "cannot attach rtc\n");
  394. ret = PTR_ERR(rtc);
  395. goto err_nortc;
  396. }
  397. rtc->max_user_freq = 128;
  398. platform_set_drvdata(pdev, rtc);
  399. return 0;
  400. err_nortc:
  401. s3c_rtc_enable(pdev, 0);
  402. iounmap(s3c_rtc_base);
  403. err_nomap:
  404. release_resource(s3c_rtc_mem);
  405. err_nores:
  406. return ret;
  407. }
  408. #ifdef CONFIG_PM
  409. /* RTC Power management control */
  410. static struct timespec s3c_rtc_delta;
  411. static int ticnt_save;
  412. static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  413. {
  414. /* save TICNT for anyone using periodic interrupts */
  415. ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
  416. s3c_rtc_enable(pdev, 0);
  417. return 0;
  418. }
  419. static int s3c_rtc_resume(struct platform_device *pdev)
  420. {
  421. s3c_rtc_enable(pdev, 1);
  422. writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
  423. return 0;
  424. }
  425. #else
  426. #define s3c_rtc_suspend NULL
  427. #define s3c_rtc_resume NULL
  428. #endif
  429. static struct platform_driver s3c2410_rtcdrv = {
  430. .probe = s3c_rtc_probe,
  431. .remove = s3c_rtc_remove,
  432. .suspend = s3c_rtc_suspend,
  433. .resume = s3c_rtc_resume,
  434. .driver = {
  435. .name = "s3c2410-rtc",
  436. .owner = THIS_MODULE,
  437. },
  438. };
  439. static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
  440. static int __init s3c_rtc_init(void)
  441. {
  442. printk(banner);
  443. return platform_driver_register(&s3c2410_rtcdrv);
  444. }
  445. static void __exit s3c_rtc_exit(void)
  446. {
  447. platform_driver_unregister(&s3c2410_rtcdrv);
  448. }
  449. module_init(s3c_rtc_init);
  450. module_exit(s3c_rtc_exit);
  451. MODULE_DESCRIPTION("Samsung S3C RTC Driver");
  452. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  453. MODULE_LICENSE("GPL");