rtc-omap.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526
  1. /*
  2. * TI OMAP1 Real Time Clock interface for Linux
  3. *
  4. * Copyright (C) 2003 MontaVista Software, Inc.
  5. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  6. *
  7. * Copyright (C) 2006 David Brownell (new RTC framework)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/ioport.h>
  18. #include <linux/delay.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/platform_device.h>
  22. #include <asm/io.h>
  23. #include <asm/mach/time.h>
  24. /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  25. * with century-range alarm matching, driven by the 32kHz clock.
  26. *
  27. * The main user-visible ways it differs from PC RTCs are by omitting
  28. * "don't care" alarm fields and sub-second periodic IRQs, and having
  29. * an autoadjust mechanism to calibrate to the true oscillator rate.
  30. *
  31. * Board-specific wiring options include using split power mode with
  32. * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  33. * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  34. * low power modes). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  35. */
  36. #define OMAP_RTC_BASE 0xfffb4800
  37. /* RTC registers */
  38. #define OMAP_RTC_SECONDS_REG 0x00
  39. #define OMAP_RTC_MINUTES_REG 0x04
  40. #define OMAP_RTC_HOURS_REG 0x08
  41. #define OMAP_RTC_DAYS_REG 0x0C
  42. #define OMAP_RTC_MONTHS_REG 0x10
  43. #define OMAP_RTC_YEARS_REG 0x14
  44. #define OMAP_RTC_WEEKS_REG 0x18
  45. #define OMAP_RTC_ALARM_SECONDS_REG 0x20
  46. #define OMAP_RTC_ALARM_MINUTES_REG 0x24
  47. #define OMAP_RTC_ALARM_HOURS_REG 0x28
  48. #define OMAP_RTC_ALARM_DAYS_REG 0x2c
  49. #define OMAP_RTC_ALARM_MONTHS_REG 0x30
  50. #define OMAP_RTC_ALARM_YEARS_REG 0x34
  51. #define OMAP_RTC_CTRL_REG 0x40
  52. #define OMAP_RTC_STATUS_REG 0x44
  53. #define OMAP_RTC_INTERRUPTS_REG 0x48
  54. #define OMAP_RTC_COMP_LSB_REG 0x4c
  55. #define OMAP_RTC_COMP_MSB_REG 0x50
  56. #define OMAP_RTC_OSC_REG 0x54
  57. /* OMAP_RTC_CTRL_REG bit fields: */
  58. #define OMAP_RTC_CTRL_SPLIT (1<<7)
  59. #define OMAP_RTC_CTRL_DISABLE (1<<6)
  60. #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
  61. #define OMAP_RTC_CTRL_TEST (1<<4)
  62. #define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
  63. #define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
  64. #define OMAP_RTC_CTRL_ROUND_30S (1<<1)
  65. #define OMAP_RTC_CTRL_STOP (1<<0)
  66. /* OMAP_RTC_STATUS_REG bit fields: */
  67. #define OMAP_RTC_STATUS_POWER_UP (1<<7)
  68. #define OMAP_RTC_STATUS_ALARM (1<<6)
  69. #define OMAP_RTC_STATUS_1D_EVENT (1<<5)
  70. #define OMAP_RTC_STATUS_1H_EVENT (1<<4)
  71. #define OMAP_RTC_STATUS_1M_EVENT (1<<3)
  72. #define OMAP_RTC_STATUS_1S_EVENT (1<<2)
  73. #define OMAP_RTC_STATUS_RUN (1<<1)
  74. #define OMAP_RTC_STATUS_BUSY (1<<0)
  75. /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  76. #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
  77. #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
  78. #define rtc_read(addr) omap_readb(OMAP_RTC_BASE + (addr))
  79. #define rtc_write(val, addr) omap_writeb(val, OMAP_RTC_BASE + (addr))
  80. /* platform_bus isn't hotpluggable, so for static linkage it'd be safe
  81. * to get rid of probe() and remove() code ... too bad the driver struct
  82. * remembers probe(), that's about 25% of the runtime footprint!!
  83. */
  84. #ifndef MODULE
  85. #undef __devexit
  86. #undef __devexit_p
  87. #define __devexit __exit
  88. #define __devexit_p __exit_p
  89. #endif
  90. /* we rely on the rtc framework to handle locking (rtc->ops_lock),
  91. * so the only other requirement is that register accesses which
  92. * require BUSY to be clear are made with IRQs locally disabled
  93. */
  94. static void rtc_wait_not_busy(void)
  95. {
  96. int count = 0;
  97. u8 status;
  98. /* BUSY may stay active for 1/32768 second (~30 usec) */
  99. for (count = 0; count < 50; count++) {
  100. status = rtc_read(OMAP_RTC_STATUS_REG);
  101. if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
  102. break;
  103. udelay(1);
  104. }
  105. /* now we have ~15 usec to read/write various registers */
  106. }
  107. static irqreturn_t rtc_irq(int irq, void *rtc)
  108. {
  109. unsigned long events = 0;
  110. u8 irq_data;
  111. irq_data = rtc_read(OMAP_RTC_STATUS_REG);
  112. /* alarm irq? */
  113. if (irq_data & OMAP_RTC_STATUS_ALARM) {
  114. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  115. events |= RTC_IRQF | RTC_AF;
  116. }
  117. /* 1/sec periodic/update irq? */
  118. if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
  119. events |= RTC_IRQF | RTC_UF;
  120. rtc_update_irq(rtc, 1, events);
  121. return IRQ_HANDLED;
  122. }
  123. #ifdef CONFIG_RTC_INTF_DEV
  124. static int
  125. omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  126. {
  127. u8 reg;
  128. switch (cmd) {
  129. case RTC_AIE_OFF:
  130. case RTC_AIE_ON:
  131. case RTC_UIE_OFF:
  132. case RTC_UIE_ON:
  133. break;
  134. default:
  135. return -ENOIOCTLCMD;
  136. }
  137. local_irq_disable();
  138. rtc_wait_not_busy();
  139. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  140. switch (cmd) {
  141. /* AIE = Alarm Interrupt Enable */
  142. case RTC_AIE_OFF:
  143. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  144. break;
  145. case RTC_AIE_ON:
  146. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  147. break;
  148. /* UIE = Update Interrupt Enable (1/second) */
  149. case RTC_UIE_OFF:
  150. reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER;
  151. break;
  152. case RTC_UIE_ON:
  153. reg |= OMAP_RTC_INTERRUPTS_IT_TIMER;
  154. break;
  155. }
  156. rtc_wait_not_busy();
  157. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  158. local_irq_enable();
  159. return 0;
  160. }
  161. #else
  162. #define omap_rtc_ioctl NULL
  163. #endif
  164. /* this hardware doesn't support "don't care" alarm fields */
  165. static int tm2bcd(struct rtc_time *tm)
  166. {
  167. if (rtc_valid_tm(tm) != 0)
  168. return -EINVAL;
  169. tm->tm_sec = BIN2BCD(tm->tm_sec);
  170. tm->tm_min = BIN2BCD(tm->tm_min);
  171. tm->tm_hour = BIN2BCD(tm->tm_hour);
  172. tm->tm_mday = BIN2BCD(tm->tm_mday);
  173. tm->tm_mon = BIN2BCD(tm->tm_mon + 1);
  174. /* epoch == 1900 */
  175. if (tm->tm_year < 100 || tm->tm_year > 199)
  176. return -EINVAL;
  177. tm->tm_year = BIN2BCD(tm->tm_year - 100);
  178. return 0;
  179. }
  180. static void bcd2tm(struct rtc_time *tm)
  181. {
  182. tm->tm_sec = BCD2BIN(tm->tm_sec);
  183. tm->tm_min = BCD2BIN(tm->tm_min);
  184. tm->tm_hour = BCD2BIN(tm->tm_hour);
  185. tm->tm_mday = BCD2BIN(tm->tm_mday);
  186. tm->tm_mon = BCD2BIN(tm->tm_mon) - 1;
  187. /* epoch == 1900 */
  188. tm->tm_year = BCD2BIN(tm->tm_year) + 100;
  189. }
  190. static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
  191. {
  192. /* we don't report wday/yday/isdst ... */
  193. local_irq_disable();
  194. rtc_wait_not_busy();
  195. tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
  196. tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
  197. tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
  198. tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
  199. tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
  200. tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
  201. local_irq_enable();
  202. bcd2tm(tm);
  203. return 0;
  204. }
  205. static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
  206. {
  207. if (tm2bcd(tm) < 0)
  208. return -EINVAL;
  209. local_irq_disable();
  210. rtc_wait_not_busy();
  211. rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
  212. rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
  213. rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
  214. rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
  215. rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
  216. rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
  217. local_irq_enable();
  218. return 0;
  219. }
  220. static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  221. {
  222. local_irq_disable();
  223. rtc_wait_not_busy();
  224. alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
  225. alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
  226. alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
  227. alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
  228. alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
  229. alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
  230. local_irq_enable();
  231. bcd2tm(&alm->time);
  232. alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
  233. & OMAP_RTC_INTERRUPTS_IT_ALARM);
  234. return 0;
  235. }
  236. static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  237. {
  238. u8 reg;
  239. if (tm2bcd(&alm->time) < 0)
  240. return -EINVAL;
  241. local_irq_disable();
  242. rtc_wait_not_busy();
  243. rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
  244. rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
  245. rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
  246. rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
  247. rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
  248. rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
  249. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  250. if (alm->enabled)
  251. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  252. else
  253. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  254. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  255. local_irq_enable();
  256. return 0;
  257. }
  258. static struct rtc_class_ops omap_rtc_ops = {
  259. .ioctl = omap_rtc_ioctl,
  260. .read_time = omap_rtc_read_time,
  261. .set_time = omap_rtc_set_time,
  262. .read_alarm = omap_rtc_read_alarm,
  263. .set_alarm = omap_rtc_set_alarm,
  264. };
  265. static int omap_rtc_alarm;
  266. static int omap_rtc_timer;
  267. static int __devinit omap_rtc_probe(struct platform_device *pdev)
  268. {
  269. struct resource *res, *mem;
  270. struct rtc_device *rtc;
  271. u8 reg, new_ctrl;
  272. omap_rtc_timer = platform_get_irq(pdev, 0);
  273. if (omap_rtc_timer <= 0) {
  274. pr_debug("%s: no update irq?\n", pdev->name);
  275. return -ENOENT;
  276. }
  277. omap_rtc_alarm = platform_get_irq(pdev, 1);
  278. if (omap_rtc_alarm <= 0) {
  279. pr_debug("%s: no alarm irq?\n", pdev->name);
  280. return -ENOENT;
  281. }
  282. /* NOTE: using static mapping for RTC registers */
  283. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  284. if (res && res->start != OMAP_RTC_BASE) {
  285. pr_debug("%s: RTC registers at %08x, expected %08x\n",
  286. pdev->name, (unsigned) res->start, OMAP_RTC_BASE);
  287. return -ENOENT;
  288. }
  289. if (res)
  290. mem = request_mem_region(res->start,
  291. res->end - res->start + 1,
  292. pdev->name);
  293. else
  294. mem = NULL;
  295. if (!mem) {
  296. pr_debug("%s: RTC registers at %08x are not free\n",
  297. pdev->name, OMAP_RTC_BASE);
  298. return -EBUSY;
  299. }
  300. rtc = rtc_device_register(pdev->name, &pdev->dev,
  301. &omap_rtc_ops, THIS_MODULE);
  302. if (IS_ERR(rtc)) {
  303. pr_debug("%s: can't register RTC device, err %ld\n",
  304. pdev->name, PTR_ERR(rtc));
  305. goto fail;
  306. }
  307. platform_set_drvdata(pdev, rtc);
  308. dev_set_devdata(&rtc->dev, mem);
  309. /* clear pending irqs, and set 1/second periodic,
  310. * which we'll use instead of update irqs
  311. */
  312. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  313. /* clear old status */
  314. reg = rtc_read(OMAP_RTC_STATUS_REG);
  315. if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
  316. pr_info("%s: RTC power up reset detected\n",
  317. pdev->name);
  318. rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
  319. }
  320. if (reg & (u8) OMAP_RTC_STATUS_ALARM)
  321. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  322. /* handle periodic and alarm irqs */
  323. if (request_irq(omap_rtc_timer, rtc_irq, IRQF_DISABLED,
  324. rtc->dev.bus_id, rtc)) {
  325. pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
  326. pdev->name, omap_rtc_timer);
  327. goto fail0;
  328. }
  329. if (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED,
  330. rtc->dev.bus_id, rtc)) {
  331. pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
  332. pdev->name, omap_rtc_alarm);
  333. goto fail1;
  334. }
  335. /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
  336. reg = rtc_read(OMAP_RTC_CTRL_REG);
  337. if (reg & (u8) OMAP_RTC_CTRL_STOP)
  338. pr_info("%s: already running\n", pdev->name);
  339. /* force to 24 hour mode */
  340. new_ctrl = reg & ~(OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
  341. new_ctrl |= OMAP_RTC_CTRL_STOP;
  342. /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
  343. *
  344. * - Boards wired so that RTC_WAKE_INT does something, and muxed
  345. * right (W13_1610_RTC_WAKE_INT is the default after chip reset),
  346. * should initialize the device wakeup flag appropriately.
  347. *
  348. * - Boards wired so RTC_ON_nOFF is used as the reset signal,
  349. * rather than nPWRON_RESET, should forcibly enable split
  350. * power mode. (Some chip errata report that RTC_CTRL_SPLIT
  351. * is write-only, and always reads as zero...)
  352. */
  353. device_init_wakeup(&pdev->dev, 0);
  354. if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
  355. pr_info("%s: split power mode\n", pdev->name);
  356. if (reg != new_ctrl)
  357. rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
  358. return 0;
  359. fail1:
  360. free_irq(omap_rtc_timer, NULL);
  361. fail0:
  362. rtc_device_unregister(rtc);
  363. fail:
  364. release_resource(mem);
  365. return -EIO;
  366. }
  367. static int __devexit omap_rtc_remove(struct platform_device *pdev)
  368. {
  369. struct rtc_device *rtc = platform_get_drvdata(pdev);;
  370. device_init_wakeup(&pdev->dev, 0);
  371. /* leave rtc running, but disable irqs */
  372. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  373. free_irq(omap_rtc_timer, rtc);
  374. free_irq(omap_rtc_alarm, rtc);
  375. release_resource(dev_get_devdata(&rtc->dev));
  376. rtc_device_unregister(rtc);
  377. return 0;
  378. }
  379. #ifdef CONFIG_PM
  380. static u8 irqstat;
  381. static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  382. {
  383. irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  384. /* FIXME the RTC alarm is not currently acting as a wakeup event
  385. * source, and in fact this enable() call is just saving a flag
  386. * that's never used...
  387. */
  388. if (device_may_wakeup(&pdev->dev))
  389. enable_irq_wake(omap_rtc_alarm);
  390. else
  391. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  392. return 0;
  393. }
  394. static int omap_rtc_resume(struct platform_device *pdev)
  395. {
  396. if (device_may_wakeup(&pdev->dev))
  397. disable_irq_wake(omap_rtc_alarm);
  398. else
  399. rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
  400. return 0;
  401. }
  402. #else
  403. #define omap_rtc_suspend NULL
  404. #define omap_rtc_resume NULL
  405. #endif
  406. static void omap_rtc_shutdown(struct platform_device *pdev)
  407. {
  408. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  409. }
  410. MODULE_ALIAS("omap_rtc");
  411. static struct platform_driver omap_rtc_driver = {
  412. .probe = omap_rtc_probe,
  413. .remove = __devexit_p(omap_rtc_remove),
  414. .suspend = omap_rtc_suspend,
  415. .resume = omap_rtc_resume,
  416. .shutdown = omap_rtc_shutdown,
  417. .driver = {
  418. .name = "omap_rtc",
  419. .owner = THIS_MODULE,
  420. },
  421. };
  422. static int __init rtc_init(void)
  423. {
  424. return platform_driver_register(&omap_rtc_driver);
  425. }
  426. module_init(rtc_init);
  427. static void __exit rtc_exit(void)
  428. {
  429. platform_driver_unregister(&omap_rtc_driver);
  430. }
  431. module_exit(rtc_exit);
  432. MODULE_AUTHOR("George G. Davis (and others)");
  433. MODULE_LICENSE("GPL");