zd_rf_al7230b.c 12 KB

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  1. /* zd_rf_al7230b.c: Functions for the AL7230B RF controller
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License as published by
  5. * the Free Software Foundation; either version 2 of the License, or
  6. * (at your option) any later version.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program; if not, write to the Free Software
  15. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  16. */
  17. #include <linux/kernel.h>
  18. #include "zd_rf.h"
  19. #include "zd_usb.h"
  20. #include "zd_chip.h"
  21. static const u32 chan_rv[][2] = {
  22. RF_CHANNEL( 1) = { 0x09ec00, 0x8cccc8 },
  23. RF_CHANNEL( 2) = { 0x09ec00, 0x8cccd8 },
  24. RF_CHANNEL( 3) = { 0x09ec00, 0x8cccc0 },
  25. RF_CHANNEL( 4) = { 0x09ec00, 0x8cccd0 },
  26. RF_CHANNEL( 5) = { 0x05ec00, 0x8cccc8 },
  27. RF_CHANNEL( 6) = { 0x05ec00, 0x8cccd8 },
  28. RF_CHANNEL( 7) = { 0x05ec00, 0x8cccc0 },
  29. RF_CHANNEL( 8) = { 0x05ec00, 0x8cccd0 },
  30. RF_CHANNEL( 9) = { 0x0dec00, 0x8cccc8 },
  31. RF_CHANNEL(10) = { 0x0dec00, 0x8cccd8 },
  32. RF_CHANNEL(11) = { 0x0dec00, 0x8cccc0 },
  33. RF_CHANNEL(12) = { 0x0dec00, 0x8cccd0 },
  34. RF_CHANNEL(13) = { 0x03ec00, 0x8cccc8 },
  35. RF_CHANNEL(14) = { 0x03ec00, 0x866660 },
  36. };
  37. static const u32 std_rv[] = {
  38. 0x4ff821,
  39. 0xc5fbfc,
  40. 0x21ebfe,
  41. 0xafd401, /* freq shift 0xaad401 */
  42. 0x6cf56a,
  43. 0xe04073,
  44. 0x193d76,
  45. 0x9dd844,
  46. 0x500007,
  47. 0xd8c010,
  48. };
  49. static const u32 rv_init1[] = {
  50. 0x3c9000,
  51. 0xbfffff,
  52. 0x700000,
  53. 0xf15d58,
  54. };
  55. static const u32 rv_init2[] = {
  56. 0xf15d59,
  57. 0xf15d5c,
  58. 0xf15d58,
  59. };
  60. static const struct zd_ioreq16 ioreqs_sw[] = {
  61. { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
  62. { CR38, 0x38 }, { CR136, 0xdf },
  63. };
  64. static int zd1211b_al7230b_finalize(struct zd_chip *chip)
  65. {
  66. int r;
  67. static const struct zd_ioreq16 ioreqs[] = {
  68. { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 },
  69. { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 },
  70. { CR203, 0x04 },
  71. { },
  72. { CR240, 0x80 },
  73. };
  74. r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  75. if (r)
  76. return r;
  77. if (chip->new_phy_layout) {
  78. /* antenna selection? */
  79. r = zd_iowrite16_locked(chip, 0xe5, CR9);
  80. if (r)
  81. return r;
  82. }
  83. return zd_iowrite16_locked(chip, 0x04, CR203);
  84. }
  85. static int zd1211_al7230b_init_hw(struct zd_rf *rf)
  86. {
  87. int r;
  88. struct zd_chip *chip = zd_rf_to_chip(rf);
  89. /* All of these writes are identical to AL2230 unless otherwise
  90. * specified */
  91. static const struct zd_ioreq16 ioreqs_1[] = {
  92. /* This one is 7230-specific, and happens before the rest */
  93. { CR240, 0x57 },
  94. { },
  95. { CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 },
  96. { CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 },
  97. { CR44, 0x33 },
  98. /* This value is different for 7230 (was: 0x2a) */
  99. { CR106, 0x22 },
  100. { CR107, 0x1a }, { CR109, 0x09 }, { CR110, 0x27 },
  101. { CR111, 0x2b }, { CR112, 0x2b }, { CR119, 0x0a },
  102. /* This happened further down in AL2230,
  103. * and the value changed (was: 0xe0) */
  104. { CR122, 0xfc },
  105. { CR10, 0x89 },
  106. /* for newest (3rd cut) AL2300 */
  107. { CR17, 0x28 },
  108. { CR26, 0x93 }, { CR34, 0x30 },
  109. /* for newest (3rd cut) AL2300 */
  110. { CR35, 0x3e },
  111. { CR41, 0x24 }, { CR44, 0x32 },
  112. /* for newest (3rd cut) AL2300 */
  113. { CR46, 0x96 },
  114. { CR47, 0x1e }, { CR79, 0x58 }, { CR80, 0x30 },
  115. { CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 },
  116. { CR92, 0x0a }, { CR99, 0x28 },
  117. /* This value is different for 7230 (was: 0x00) */
  118. { CR100, 0x02 },
  119. { CR101, 0x13 }, { CR102, 0x27 },
  120. /* This value is different for 7230 (was: 0x24) */
  121. { CR106, 0x22 },
  122. /* This value is different for 7230 (was: 0x2a) */
  123. { CR107, 0x3f },
  124. { CR109, 0x09 },
  125. /* This value is different for 7230 (was: 0x13) */
  126. { CR110, 0x1f },
  127. { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
  128. { CR114, 0x27 },
  129. /* for newest (3rd cut) AL2300 */
  130. { CR115, 0x24 },
  131. /* This value is different for 7230 (was: 0x24) */
  132. { CR116, 0x3f },
  133. /* This value is different for 7230 (was: 0xf4) */
  134. { CR117, 0xfa },
  135. { CR118, 0xfc }, { CR119, 0x10 }, { CR120, 0x4f },
  136. { CR121, 0x77 }, { CR137, 0x88 },
  137. /* This one is 7230-specific */
  138. { CR138, 0xa8 },
  139. /* This value is different for 7230 (was: 0xff) */
  140. { CR252, 0x34 },
  141. /* This value is different for 7230 (was: 0xff) */
  142. { CR253, 0x34 },
  143. /* PLL_OFF */
  144. { CR251, 0x2f },
  145. };
  146. static const struct zd_ioreq16 ioreqs_2[] = {
  147. { CR251, 0x3f }, /* PLL_ON */
  148. { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
  149. { CR38, 0x38 }, { CR136, 0xdf },
  150. };
  151. r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
  152. if (r)
  153. return r;
  154. r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
  155. if (r)
  156. return r;
  157. r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
  158. if (r)
  159. return r;
  160. r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
  161. if (r)
  162. return r;
  163. r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
  164. if (r)
  165. return r;
  166. r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
  167. if (r)
  168. return r;
  169. r = zd_iowrite16_locked(chip, 0x06, CR203);
  170. if (r)
  171. return r;
  172. r = zd_iowrite16_locked(chip, 0x80, CR240);
  173. if (r)
  174. return r;
  175. return 0;
  176. }
  177. static int zd1211b_al7230b_init_hw(struct zd_rf *rf)
  178. {
  179. int r;
  180. struct zd_chip *chip = zd_rf_to_chip(rf);
  181. static const struct zd_ioreq16 ioreqs_1[] = {
  182. { CR240, 0x57 }, { CR9, 0x9 },
  183. { },
  184. { CR10, 0x8b }, { CR15, 0x20 },
  185. { CR17, 0x2B }, /* for newest (3rd cut) AL2230 */
  186. { CR20, 0x10 }, /* 4N25->Stone Request */
  187. { CR23, 0x40 }, { CR24, 0x20 }, { CR26, 0x93 },
  188. { CR28, 0x3e }, { CR29, 0x00 },
  189. { CR33, 0x28 }, /* 5613 */
  190. { CR34, 0x30 },
  191. { CR35, 0x3e }, /* for newest (3rd cut) AL2230 */
  192. { CR41, 0x24 }, { CR44, 0x32 },
  193. { CR46, 0x99 }, /* for newest (3rd cut) AL2230 */
  194. { CR47, 0x1e },
  195. /* ZD1215 5610 */
  196. { CR48, 0x00 }, { CR49, 0x00 }, { CR51, 0x01 },
  197. { CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 },
  198. { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 },
  199. { CR69, 0x28 },
  200. { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 },
  201. { CR87, 0x0A }, { CR89, 0x04 },
  202. { CR90, 0x58 }, /* 5112 */
  203. { CR91, 0x00 }, /* 5613 */
  204. { CR92, 0x0a },
  205. { CR98, 0x8d }, /* 4804, for 1212 new algorithm */
  206. { CR99, 0x00 }, { CR100, 0x02 }, { CR101, 0x13 },
  207. { CR102, 0x27 },
  208. { CR106, 0x20 }, /* change to 0x24 for AL7230B */
  209. { CR109, 0x13 }, /* 4804, for 1212 new algorithm */
  210. { CR112, 0x1f },
  211. };
  212. static const struct zd_ioreq16 ioreqs_new_phy[] = {
  213. { CR107, 0x28 },
  214. { CR110, 0x1f }, /* 5127, 0x13->0x1f */
  215. { CR111, 0x1f }, /* 0x13 to 0x1f for AL7230B */
  216. { CR116, 0x2a }, { CR118, 0xfa }, { CR119, 0x12 },
  217. { CR121, 0x6c }, /* 5613 */
  218. };
  219. static const struct zd_ioreq16 ioreqs_old_phy[] = {
  220. { CR107, 0x24 },
  221. { CR110, 0x13 }, /* 5127, 0x13->0x1f */
  222. { CR111, 0x13 }, /* 0x13 to 0x1f for AL7230B */
  223. { CR116, 0x24 }, { CR118, 0xfc }, { CR119, 0x11 },
  224. { CR121, 0x6a }, /* 5613 */
  225. };
  226. static const struct zd_ioreq16 ioreqs_2[] = {
  227. { CR113, 0x27 }, { CR114, 0x27 }, { CR115, 0x24 },
  228. { CR117, 0xfa }, { CR120, 0x4f },
  229. { CR122, 0xfc }, /* E0->FCh at 4901 */
  230. { CR123, 0x57 }, /* 5613 */
  231. { CR125, 0xad }, /* 4804, for 1212 new algorithm */
  232. { CR126, 0x6c }, /* 5613 */
  233. { CR127, 0x03 }, /* 4804, for 1212 new algorithm */
  234. { CR130, 0x10 },
  235. { CR131, 0x00 }, /* 5112 */
  236. { CR137, 0x50 }, /* 5613 */
  237. { CR138, 0xa8 }, /* 5112 */
  238. { CR144, 0xac }, /* 5613 */
  239. { CR148, 0x40 }, /* 5112 */
  240. { CR149, 0x40 }, /* 4O07, 50->40 */
  241. { CR150, 0x1a }, /* 5112, 0C->1A */
  242. { CR252, 0x34 }, { CR253, 0x34 },
  243. { CR251, 0x2f }, /* PLL_OFF */
  244. };
  245. static const struct zd_ioreq16 ioreqs_3[] = {
  246. { CR251, 0x7f }, /* PLL_ON */
  247. { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
  248. { CR38, 0x38 }, { CR136, 0xdf },
  249. };
  250. r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
  251. if (r)
  252. return r;
  253. if (chip->new_phy_layout)
  254. r = zd_iowrite16a_locked(chip, ioreqs_new_phy,
  255. ARRAY_SIZE(ioreqs_new_phy));
  256. else
  257. r = zd_iowrite16a_locked(chip, ioreqs_old_phy,
  258. ARRAY_SIZE(ioreqs_old_phy));
  259. if (r)
  260. return r;
  261. r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
  262. if (r)
  263. return r;
  264. r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
  265. if (r)
  266. return r;
  267. r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
  268. if (r)
  269. return r;
  270. r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
  271. if (r)
  272. return r;
  273. r = zd_iowrite16a_locked(chip, ioreqs_3, ARRAY_SIZE(ioreqs_3));
  274. if (r)
  275. return r;
  276. r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
  277. if (r)
  278. return r;
  279. return zd1211b_al7230b_finalize(chip);
  280. }
  281. static int zd1211_al7230b_set_channel(struct zd_rf *rf, u8 channel)
  282. {
  283. int r;
  284. const u32 *rv = chan_rv[channel-1];
  285. struct zd_chip *chip = zd_rf_to_chip(rf);
  286. static const struct zd_ioreq16 ioreqs[] = {
  287. /* PLL_ON */
  288. { CR251, 0x3f },
  289. { CR203, 0x06 }, { CR240, 0x08 },
  290. };
  291. r = zd_iowrite16_locked(chip, 0x57, CR240);
  292. if (r)
  293. return r;
  294. /* PLL_OFF */
  295. r = zd_iowrite16_locked(chip, 0x2f, CR251);
  296. if (r)
  297. return r;
  298. r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
  299. if (r)
  300. return r;
  301. r = zd_rfwrite_cr_locked(chip, 0x3c9000);
  302. if (r)
  303. return r;
  304. r = zd_rfwrite_cr_locked(chip, 0xf15d58);
  305. if (r)
  306. return r;
  307. r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
  308. if (r)
  309. return r;
  310. r = zd_rfwritev_cr_locked(chip, rv, 2);
  311. if (r)
  312. return r;
  313. r = zd_rfwrite_cr_locked(chip, 0x3c9000);
  314. if (r)
  315. return r;
  316. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  317. }
  318. static int zd1211b_al7230b_set_channel(struct zd_rf *rf, u8 channel)
  319. {
  320. int r;
  321. const u32 *rv = chan_rv[channel-1];
  322. struct zd_chip *chip = zd_rf_to_chip(rf);
  323. r = zd_iowrite16_locked(chip, 0x57, CR240);
  324. if (r)
  325. return r;
  326. r = zd_iowrite16_locked(chip, 0xe4, CR9);
  327. if (r)
  328. return r;
  329. /* PLL_OFF */
  330. r = zd_iowrite16_locked(chip, 0x2f, CR251);
  331. if (r)
  332. return r;
  333. r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
  334. if (r)
  335. return r;
  336. r = zd_rfwrite_cr_locked(chip, 0x3c9000);
  337. if (r)
  338. return r;
  339. r = zd_rfwrite_cr_locked(chip, 0xf15d58);
  340. if (r)
  341. return r;
  342. r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
  343. if (r)
  344. return r;
  345. r = zd_rfwritev_cr_locked(chip, rv, 2);
  346. if (r)
  347. return r;
  348. r = zd_rfwrite_cr_locked(chip, 0x3c9000);
  349. if (r)
  350. return r;
  351. r = zd_iowrite16_locked(chip, 0x7f, CR251);
  352. if (r)
  353. return r;
  354. return zd1211b_al7230b_finalize(chip);
  355. }
  356. static int zd1211_al7230b_switch_radio_on(struct zd_rf *rf)
  357. {
  358. struct zd_chip *chip = zd_rf_to_chip(rf);
  359. static const struct zd_ioreq16 ioreqs[] = {
  360. { CR11, 0x00 },
  361. { CR251, 0x3f },
  362. };
  363. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  364. }
  365. static int zd1211b_al7230b_switch_radio_on(struct zd_rf *rf)
  366. {
  367. struct zd_chip *chip = zd_rf_to_chip(rf);
  368. static const struct zd_ioreq16 ioreqs[] = {
  369. { CR11, 0x00 },
  370. { CR251, 0x7f },
  371. };
  372. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  373. }
  374. static int al7230b_switch_radio_off(struct zd_rf *rf)
  375. {
  376. struct zd_chip *chip = zd_rf_to_chip(rf);
  377. static const struct zd_ioreq16 ioreqs[] = {
  378. { CR11, 0x04 },
  379. { CR251, 0x2f },
  380. };
  381. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  382. }
  383. /* ZD1211B+AL7230B 6m band edge patching differs slightly from other
  384. * configurations */
  385. static int zd1211b_al7230b_patch_6m(struct zd_rf *rf, u8 channel)
  386. {
  387. struct zd_chip *chip = zd_rf_to_chip(rf);
  388. struct zd_ioreq16 ioreqs[] = {
  389. { CR128, 0x14 }, { CR129, 0x12 },
  390. };
  391. /* FIXME: Channel 11 is not the edge for all regulatory domains. */
  392. if (channel == 1) {
  393. ioreqs[0].value = 0x0e;
  394. ioreqs[1].value = 0x10;
  395. } else if (channel == 11) {
  396. ioreqs[0].value = 0x10;
  397. ioreqs[1].value = 0x10;
  398. }
  399. dev_dbg_f(zd_chip_dev(chip), "patching for channel %d\n", channel);
  400. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  401. }
  402. int zd_rf_init_al7230b(struct zd_rf *rf)
  403. {
  404. struct zd_chip *chip = zd_rf_to_chip(rf);
  405. if (chip->is_zd1211b) {
  406. rf->init_hw = zd1211b_al7230b_init_hw;
  407. rf->switch_radio_on = zd1211b_al7230b_switch_radio_on;
  408. rf->set_channel = zd1211b_al7230b_set_channel;
  409. rf->patch_6m_band_edge = zd1211b_al7230b_patch_6m;
  410. } else {
  411. rf->init_hw = zd1211_al7230b_init_hw;
  412. rf->switch_radio_on = zd1211_al7230b_switch_radio_on;
  413. rf->set_channel = zd1211_al7230b_set_channel;
  414. rf->patch_6m_band_edge = zd_rf_generic_patch_6m;
  415. }
  416. rf->switch_radio_off = al7230b_switch_radio_off;
  417. return 0;
  418. }