bcm43xx_radio.c 62 KB

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  1. /*
  2. Broadcom BCM43xx wireless driver
  3. Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
  4. Stefano Brivio <st3@riseup.net>
  5. Michael Buesch <mbuesch@freenet.de>
  6. Danny van Dyk <kugelfang@gentoo.org>
  7. Andreas Jaggi <andreas.jaggi@waterwave.ch>
  8. Some parts of the code in this file are derived from the ipw2200
  9. driver Copyright(c) 2003 - 2004 Intel Corporation.
  10. This program is free software; you can redistribute it and/or modify
  11. it under the terms of the GNU General Public License as published by
  12. the Free Software Foundation; either version 2 of the License, or
  13. (at your option) any later version.
  14. This program is distributed in the hope that it will be useful,
  15. but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. GNU General Public License for more details.
  18. You should have received a copy of the GNU General Public License
  19. along with this program; see the file COPYING. If not, write to
  20. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  21. Boston, MA 02110-1301, USA.
  22. */
  23. #include <linux/delay.h>
  24. #include "bcm43xx.h"
  25. #include "bcm43xx_main.h"
  26. #include "bcm43xx_phy.h"
  27. #include "bcm43xx_radio.h"
  28. #include "bcm43xx_ilt.h"
  29. /* Table for bcm43xx_radio_calibrationvalue() */
  30. static const u16 rcc_table[16] = {
  31. 0x0002, 0x0003, 0x0001, 0x000F,
  32. 0x0006, 0x0007, 0x0005, 0x000F,
  33. 0x000A, 0x000B, 0x0009, 0x000F,
  34. 0x000E, 0x000F, 0x000D, 0x000F,
  35. };
  36. /* Reverse the bits of a 4bit value.
  37. * Example: 1101 is flipped 1011
  38. */
  39. static u16 flip_4bit(u16 value)
  40. {
  41. u16 flipped = 0x0000;
  42. assert((value & ~0x000F) == 0x0000);
  43. flipped |= (value & 0x0001) << 3;
  44. flipped |= (value & 0x0002) << 1;
  45. flipped |= (value & 0x0004) >> 1;
  46. flipped |= (value & 0x0008) >> 3;
  47. return flipped;
  48. }
  49. /* Get the freq, as it has to be written to the device. */
  50. static inline
  51. u16 channel2freq_bg(u8 channel)
  52. {
  53. /* Frequencies are given as frequencies_bg[index] + 2.4GHz
  54. * Starting with channel 1
  55. */
  56. static const u16 frequencies_bg[14] = {
  57. 12, 17, 22, 27,
  58. 32, 37, 42, 47,
  59. 52, 57, 62, 67,
  60. 72, 84,
  61. };
  62. assert(channel >= 1 && channel <= 14);
  63. return frequencies_bg[channel - 1];
  64. }
  65. /* Get the freq, as it has to be written to the device. */
  66. static inline
  67. u16 channel2freq_a(u8 channel)
  68. {
  69. assert(channel <= 200);
  70. return (5000 + 5 * channel);
  71. }
  72. void bcm43xx_radio_lock(struct bcm43xx_private *bcm)
  73. {
  74. u32 status;
  75. status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
  76. status |= BCM43xx_SBF_RADIOREG_LOCK;
  77. bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
  78. mmiowb();
  79. udelay(10);
  80. }
  81. void bcm43xx_radio_unlock(struct bcm43xx_private *bcm)
  82. {
  83. u32 status;
  84. bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_VER); /* dummy read */
  85. status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
  86. status &= ~BCM43xx_SBF_RADIOREG_LOCK;
  87. bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
  88. mmiowb();
  89. }
  90. u16 bcm43xx_radio_read16(struct bcm43xx_private *bcm, u16 offset)
  91. {
  92. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  93. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  94. switch (phy->type) {
  95. case BCM43xx_PHYTYPE_A:
  96. offset |= 0x0040;
  97. break;
  98. case BCM43xx_PHYTYPE_B:
  99. if (radio->version == 0x2053) {
  100. if (offset < 0x70)
  101. offset += 0x80;
  102. else if (offset < 0x80)
  103. offset += 0x70;
  104. } else if (radio->version == 0x2050) {
  105. offset |= 0x80;
  106. } else
  107. assert(0);
  108. break;
  109. case BCM43xx_PHYTYPE_G:
  110. offset |= 0x80;
  111. break;
  112. }
  113. bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_CONTROL, offset);
  114. return bcm43xx_read16(bcm, BCM43xx_MMIO_RADIO_DATA_LOW);
  115. }
  116. void bcm43xx_radio_write16(struct bcm43xx_private *bcm, u16 offset, u16 val)
  117. {
  118. bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_CONTROL, offset);
  119. mmiowb();
  120. bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_DATA_LOW, val);
  121. }
  122. static void bcm43xx_set_all_gains(struct bcm43xx_private *bcm,
  123. s16 first, s16 second, s16 third)
  124. {
  125. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  126. u16 i;
  127. u16 start = 0x08, end = 0x18;
  128. u16 offset = 0x0400;
  129. u16 tmp;
  130. if (phy->rev <= 1) {
  131. offset = 0x5000;
  132. start = 0x10;
  133. end = 0x20;
  134. }
  135. for (i = 0; i < 4; i++)
  136. bcm43xx_ilt_write(bcm, offset + i, first);
  137. for (i = start; i < end; i++)
  138. bcm43xx_ilt_write(bcm, offset + i, second);
  139. if (third != -1) {
  140. tmp = ((u16)third << 14) | ((u16)third << 6);
  141. bcm43xx_phy_write(bcm, 0x04A0,
  142. (bcm43xx_phy_read(bcm, 0x04A0) & 0xBFBF) | tmp);
  143. bcm43xx_phy_write(bcm, 0x04A1,
  144. (bcm43xx_phy_read(bcm, 0x04A1) & 0xBFBF) | tmp);
  145. bcm43xx_phy_write(bcm, 0x04A2,
  146. (bcm43xx_phy_read(bcm, 0x04A2) & 0xBFBF) | tmp);
  147. }
  148. bcm43xx_dummy_transmission(bcm);
  149. }
  150. static void bcm43xx_set_original_gains(struct bcm43xx_private *bcm)
  151. {
  152. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  153. u16 i, tmp;
  154. u16 offset = 0x0400;
  155. u16 start = 0x0008, end = 0x0018;
  156. if (phy->rev <= 1) {
  157. offset = 0x5000;
  158. start = 0x0010;
  159. end = 0x0020;
  160. }
  161. for (i = 0; i < 4; i++) {
  162. tmp = (i & 0xFFFC);
  163. tmp |= (i & 0x0001) << 1;
  164. tmp |= (i & 0x0002) >> 1;
  165. bcm43xx_ilt_write(bcm, offset + i, tmp);
  166. }
  167. for (i = start; i < end; i++)
  168. bcm43xx_ilt_write(bcm, offset + i, i - start);
  169. bcm43xx_phy_write(bcm, 0x04A0,
  170. (bcm43xx_phy_read(bcm, 0x04A0) & 0xBFBF) | 0x4040);
  171. bcm43xx_phy_write(bcm, 0x04A1,
  172. (bcm43xx_phy_read(bcm, 0x04A1) & 0xBFBF) | 0x4040);
  173. bcm43xx_phy_write(bcm, 0x04A2,
  174. (bcm43xx_phy_read(bcm, 0x04A2) & 0xBFBF) | 0x4000);
  175. bcm43xx_dummy_transmission(bcm);
  176. }
  177. /* Synthetic PU workaround */
  178. static void bcm43xx_synth_pu_workaround(struct bcm43xx_private *bcm, u8 channel)
  179. {
  180. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  181. if (radio->version != 0x2050 || radio->revision >= 6) {
  182. /* We do not need the workaround. */
  183. return;
  184. }
  185. if (channel <= 10) {
  186. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
  187. channel2freq_bg(channel + 4));
  188. } else {
  189. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
  190. channel2freq_bg(1));
  191. }
  192. udelay(100);
  193. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
  194. channel2freq_bg(channel));
  195. }
  196. u8 bcm43xx_radio_aci_detect(struct bcm43xx_private *bcm, u8 channel)
  197. {
  198. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  199. u8 ret = 0;
  200. u16 saved, rssi, temp;
  201. int i, j = 0;
  202. saved = bcm43xx_phy_read(bcm, 0x0403);
  203. bcm43xx_radio_selectchannel(bcm, channel, 0);
  204. bcm43xx_phy_write(bcm, 0x0403, (saved & 0xFFF8) | 5);
  205. if (radio->aci_hw_rssi)
  206. rssi = bcm43xx_phy_read(bcm, 0x048A) & 0x3F;
  207. else
  208. rssi = saved & 0x3F;
  209. /* clamp temp to signed 5bit */
  210. if (rssi > 32)
  211. rssi -= 64;
  212. for (i = 0;i < 100; i++) {
  213. temp = (bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x3F;
  214. if (temp > 32)
  215. temp -= 64;
  216. if (temp < rssi)
  217. j++;
  218. if (j >= 20)
  219. ret = 1;
  220. }
  221. bcm43xx_phy_write(bcm, 0x0403, saved);
  222. return ret;
  223. }
  224. u8 bcm43xx_radio_aci_scan(struct bcm43xx_private *bcm)
  225. {
  226. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  227. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  228. u8 ret[13];
  229. unsigned int channel = radio->channel;
  230. unsigned int i, j, start, end;
  231. unsigned long phylock_flags;
  232. if (!((phy->type == BCM43xx_PHYTYPE_G) && (phy->rev > 0)))
  233. return 0;
  234. bcm43xx_phy_lock(bcm, phylock_flags);
  235. bcm43xx_radio_lock(bcm);
  236. bcm43xx_phy_write(bcm, 0x0802,
  237. bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC);
  238. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  239. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x7FFF);
  240. bcm43xx_set_all_gains(bcm, 3, 8, 1);
  241. start = (channel - 5 > 0) ? channel - 5 : 1;
  242. end = (channel + 5 < 14) ? channel + 5 : 13;
  243. for (i = start; i <= end; i++) {
  244. if (abs(channel - i) > 2)
  245. ret[i-1] = bcm43xx_radio_aci_detect(bcm, i);
  246. }
  247. bcm43xx_radio_selectchannel(bcm, channel, 0);
  248. bcm43xx_phy_write(bcm, 0x0802,
  249. (bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC) | 0x0003);
  250. bcm43xx_phy_write(bcm, 0x0403,
  251. bcm43xx_phy_read(bcm, 0x0403) & 0xFFF8);
  252. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  253. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x8000);
  254. bcm43xx_set_original_gains(bcm);
  255. for (i = 0; i < 13; i++) {
  256. if (!ret[i])
  257. continue;
  258. end = (i + 5 < 13) ? i + 5 : 13;
  259. for (j = i; j < end; j++)
  260. ret[j] = 1;
  261. }
  262. bcm43xx_radio_unlock(bcm);
  263. bcm43xx_phy_unlock(bcm, phylock_flags);
  264. return ret[channel - 1];
  265. }
  266. /* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
  267. void bcm43xx_nrssi_hw_write(struct bcm43xx_private *bcm, u16 offset, s16 val)
  268. {
  269. bcm43xx_phy_write(bcm, BCM43xx_PHY_NRSSILT_CTRL, offset);
  270. mmiowb();
  271. bcm43xx_phy_write(bcm, BCM43xx_PHY_NRSSILT_DATA, (u16)val);
  272. }
  273. /* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
  274. s16 bcm43xx_nrssi_hw_read(struct bcm43xx_private *bcm, u16 offset)
  275. {
  276. u16 val;
  277. bcm43xx_phy_write(bcm, BCM43xx_PHY_NRSSILT_CTRL, offset);
  278. val = bcm43xx_phy_read(bcm, BCM43xx_PHY_NRSSILT_DATA);
  279. return (s16)val;
  280. }
  281. /* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
  282. void bcm43xx_nrssi_hw_update(struct bcm43xx_private *bcm, u16 val)
  283. {
  284. u16 i;
  285. s16 tmp;
  286. for (i = 0; i < 64; i++) {
  287. tmp = bcm43xx_nrssi_hw_read(bcm, i);
  288. tmp -= val;
  289. tmp = limit_value(tmp, -32, 31);
  290. bcm43xx_nrssi_hw_write(bcm, i, tmp);
  291. }
  292. }
  293. /* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
  294. void bcm43xx_nrssi_mem_update(struct bcm43xx_private *bcm)
  295. {
  296. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  297. s16 i, delta;
  298. s32 tmp;
  299. delta = 0x1F - radio->nrssi[0];
  300. for (i = 0; i < 64; i++) {
  301. tmp = (i - delta) * radio->nrssislope;
  302. tmp /= 0x10000;
  303. tmp += 0x3A;
  304. tmp = limit_value(tmp, 0, 0x3F);
  305. radio->nrssi_lt[i] = tmp;
  306. }
  307. }
  308. static void bcm43xx_calc_nrssi_offset(struct bcm43xx_private *bcm)
  309. {
  310. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  311. u16 backup[20] = { 0 };
  312. s16 v47F;
  313. u16 i;
  314. u16 saved = 0xFFFF;
  315. backup[0] = bcm43xx_phy_read(bcm, 0x0001);
  316. backup[1] = bcm43xx_phy_read(bcm, 0x0811);
  317. backup[2] = bcm43xx_phy_read(bcm, 0x0812);
  318. backup[3] = bcm43xx_phy_read(bcm, 0x0814);
  319. backup[4] = bcm43xx_phy_read(bcm, 0x0815);
  320. backup[5] = bcm43xx_phy_read(bcm, 0x005A);
  321. backup[6] = bcm43xx_phy_read(bcm, 0x0059);
  322. backup[7] = bcm43xx_phy_read(bcm, 0x0058);
  323. backup[8] = bcm43xx_phy_read(bcm, 0x000A);
  324. backup[9] = bcm43xx_phy_read(bcm, 0x0003);
  325. backup[10] = bcm43xx_radio_read16(bcm, 0x007A);
  326. backup[11] = bcm43xx_radio_read16(bcm, 0x0043);
  327. bcm43xx_phy_write(bcm, 0x0429,
  328. bcm43xx_phy_read(bcm, 0x0429) & 0x7FFF);
  329. bcm43xx_phy_write(bcm, 0x0001,
  330. (bcm43xx_phy_read(bcm, 0x0001) & 0x3FFF) | 0x4000);
  331. bcm43xx_phy_write(bcm, 0x0811,
  332. bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
  333. bcm43xx_phy_write(bcm, 0x0812,
  334. (bcm43xx_phy_read(bcm, 0x0812) & 0xFFF3) | 0x0004);
  335. bcm43xx_phy_write(bcm, 0x0802,
  336. bcm43xx_phy_read(bcm, 0x0802) & ~(0x1 | 0x2));
  337. if (phy->rev >= 6) {
  338. backup[12] = bcm43xx_phy_read(bcm, 0x002E);
  339. backup[13] = bcm43xx_phy_read(bcm, 0x002F);
  340. backup[14] = bcm43xx_phy_read(bcm, 0x080F);
  341. backup[15] = bcm43xx_phy_read(bcm, 0x0810);
  342. backup[16] = bcm43xx_phy_read(bcm, 0x0801);
  343. backup[17] = bcm43xx_phy_read(bcm, 0x0060);
  344. backup[18] = bcm43xx_phy_read(bcm, 0x0014);
  345. backup[19] = bcm43xx_phy_read(bcm, 0x0478);
  346. bcm43xx_phy_write(bcm, 0x002E, 0);
  347. bcm43xx_phy_write(bcm, 0x002F, 0);
  348. bcm43xx_phy_write(bcm, 0x080F, 0);
  349. bcm43xx_phy_write(bcm, 0x0810, 0);
  350. bcm43xx_phy_write(bcm, 0x0478,
  351. bcm43xx_phy_read(bcm, 0x0478) | 0x0100);
  352. bcm43xx_phy_write(bcm, 0x0801,
  353. bcm43xx_phy_read(bcm, 0x0801) | 0x0040);
  354. bcm43xx_phy_write(bcm, 0x0060,
  355. bcm43xx_phy_read(bcm, 0x0060) | 0x0040);
  356. bcm43xx_phy_write(bcm, 0x0014,
  357. bcm43xx_phy_read(bcm, 0x0014) | 0x0200);
  358. }
  359. bcm43xx_radio_write16(bcm, 0x007A,
  360. bcm43xx_radio_read16(bcm, 0x007A) | 0x0070);
  361. bcm43xx_radio_write16(bcm, 0x007A,
  362. bcm43xx_radio_read16(bcm, 0x007A) | 0x0080);
  363. udelay(30);
  364. v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
  365. if (v47F >= 0x20)
  366. v47F -= 0x40;
  367. if (v47F == 31) {
  368. for (i = 7; i >= 4; i--) {
  369. bcm43xx_radio_write16(bcm, 0x007B, i);
  370. udelay(20);
  371. v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
  372. if (v47F >= 0x20)
  373. v47F -= 0x40;
  374. if (v47F < 31 && saved == 0xFFFF)
  375. saved = i;
  376. }
  377. if (saved == 0xFFFF)
  378. saved = 4;
  379. } else {
  380. bcm43xx_radio_write16(bcm, 0x007A,
  381. bcm43xx_radio_read16(bcm, 0x007A) & 0x007F);
  382. bcm43xx_phy_write(bcm, 0x0814,
  383. bcm43xx_phy_read(bcm, 0x0814) | 0x0001);
  384. bcm43xx_phy_write(bcm, 0x0815,
  385. bcm43xx_phy_read(bcm, 0x0815) & 0xFFFE);
  386. bcm43xx_phy_write(bcm, 0x0811,
  387. bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
  388. bcm43xx_phy_write(bcm, 0x0812,
  389. bcm43xx_phy_read(bcm, 0x0812) | 0x000C);
  390. bcm43xx_phy_write(bcm, 0x0811,
  391. bcm43xx_phy_read(bcm, 0x0811) | 0x0030);
  392. bcm43xx_phy_write(bcm, 0x0812,
  393. bcm43xx_phy_read(bcm, 0x0812) | 0x0030);
  394. bcm43xx_phy_write(bcm, 0x005A, 0x0480);
  395. bcm43xx_phy_write(bcm, 0x0059, 0x0810);
  396. bcm43xx_phy_write(bcm, 0x0058, 0x000D);
  397. if (phy->analog == 0) {
  398. bcm43xx_phy_write(bcm, 0x0003, 0x0122);
  399. } else {
  400. bcm43xx_phy_write(bcm, 0x000A,
  401. bcm43xx_phy_read(bcm, 0x000A)
  402. | 0x2000);
  403. }
  404. bcm43xx_phy_write(bcm, 0x0814,
  405. bcm43xx_phy_read(bcm, 0x0814) | 0x0004);
  406. bcm43xx_phy_write(bcm, 0x0815,
  407. bcm43xx_phy_read(bcm, 0x0815) & 0xFFFB);
  408. bcm43xx_phy_write(bcm, 0x0003,
  409. (bcm43xx_phy_read(bcm, 0x0003) & 0xFF9F)
  410. | 0x0040);
  411. bcm43xx_radio_write16(bcm, 0x007A,
  412. bcm43xx_radio_read16(bcm, 0x007A) | 0x000F);
  413. bcm43xx_set_all_gains(bcm, 3, 0, 1);
  414. bcm43xx_radio_write16(bcm, 0x0043,
  415. (bcm43xx_radio_read16(bcm, 0x0043)
  416. & 0x00F0) | 0x000F);
  417. udelay(30);
  418. v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
  419. if (v47F >= 0x20)
  420. v47F -= 0x40;
  421. if (v47F == -32) {
  422. for (i = 0; i < 4; i++) {
  423. bcm43xx_radio_write16(bcm, 0x007B, i);
  424. udelay(20);
  425. v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
  426. if (v47F >= 0x20)
  427. v47F -= 0x40;
  428. if (v47F > -31 && saved == 0xFFFF)
  429. saved = i;
  430. }
  431. if (saved == 0xFFFF)
  432. saved = 3;
  433. } else
  434. saved = 0;
  435. }
  436. bcm43xx_radio_write16(bcm, 0x007B, saved);
  437. if (phy->rev >= 6) {
  438. bcm43xx_phy_write(bcm, 0x002E, backup[12]);
  439. bcm43xx_phy_write(bcm, 0x002F, backup[13]);
  440. bcm43xx_phy_write(bcm, 0x080F, backup[14]);
  441. bcm43xx_phy_write(bcm, 0x0810, backup[15]);
  442. }
  443. bcm43xx_phy_write(bcm, 0x0814, backup[3]);
  444. bcm43xx_phy_write(bcm, 0x0815, backup[4]);
  445. bcm43xx_phy_write(bcm, 0x005A, backup[5]);
  446. bcm43xx_phy_write(bcm, 0x0059, backup[6]);
  447. bcm43xx_phy_write(bcm, 0x0058, backup[7]);
  448. bcm43xx_phy_write(bcm, 0x000A, backup[8]);
  449. bcm43xx_phy_write(bcm, 0x0003, backup[9]);
  450. bcm43xx_radio_write16(bcm, 0x0043, backup[11]);
  451. bcm43xx_radio_write16(bcm, 0x007A, backup[10]);
  452. bcm43xx_phy_write(bcm, 0x0802,
  453. bcm43xx_phy_read(bcm, 0x0802) | 0x1 | 0x2);
  454. bcm43xx_phy_write(bcm, 0x0429,
  455. bcm43xx_phy_read(bcm, 0x0429) | 0x8000);
  456. bcm43xx_set_original_gains(bcm);
  457. if (phy->rev >= 6) {
  458. bcm43xx_phy_write(bcm, 0x0801, backup[16]);
  459. bcm43xx_phy_write(bcm, 0x0060, backup[17]);
  460. bcm43xx_phy_write(bcm, 0x0014, backup[18]);
  461. bcm43xx_phy_write(bcm, 0x0478, backup[19]);
  462. }
  463. bcm43xx_phy_write(bcm, 0x0001, backup[0]);
  464. bcm43xx_phy_write(bcm, 0x0812, backup[2]);
  465. bcm43xx_phy_write(bcm, 0x0811, backup[1]);
  466. }
  467. void bcm43xx_calc_nrssi_slope(struct bcm43xx_private *bcm)
  468. {
  469. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  470. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  471. u16 backup[18] = { 0 };
  472. u16 tmp;
  473. s16 nrssi0, nrssi1;
  474. switch (phy->type) {
  475. case BCM43xx_PHYTYPE_B:
  476. backup[0] = bcm43xx_radio_read16(bcm, 0x007A);
  477. backup[1] = bcm43xx_radio_read16(bcm, 0x0052);
  478. backup[2] = bcm43xx_radio_read16(bcm, 0x0043);
  479. backup[3] = bcm43xx_phy_read(bcm, 0x0030);
  480. backup[4] = bcm43xx_phy_read(bcm, 0x0026);
  481. backup[5] = bcm43xx_phy_read(bcm, 0x0015);
  482. backup[6] = bcm43xx_phy_read(bcm, 0x002A);
  483. backup[7] = bcm43xx_phy_read(bcm, 0x0020);
  484. backup[8] = bcm43xx_phy_read(bcm, 0x005A);
  485. backup[9] = bcm43xx_phy_read(bcm, 0x0059);
  486. backup[10] = bcm43xx_phy_read(bcm, 0x0058);
  487. backup[11] = bcm43xx_read16(bcm, 0x03E2);
  488. backup[12] = bcm43xx_read16(bcm, 0x03E6);
  489. backup[13] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
  490. tmp = bcm43xx_radio_read16(bcm, 0x007A);
  491. tmp &= (phy->rev >= 5) ? 0x007F : 0x000F;
  492. bcm43xx_radio_write16(bcm, 0x007A, tmp);
  493. bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
  494. bcm43xx_write16(bcm, 0x03EC, 0x7F7F);
  495. bcm43xx_phy_write(bcm, 0x0026, 0x0000);
  496. bcm43xx_phy_write(bcm, 0x0015,
  497. bcm43xx_phy_read(bcm, 0x0015) | 0x0020);
  498. bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
  499. bcm43xx_radio_write16(bcm, 0x007A,
  500. bcm43xx_radio_read16(bcm, 0x007A) | 0x0080);
  501. nrssi0 = (s16)bcm43xx_phy_read(bcm, 0x0027);
  502. bcm43xx_radio_write16(bcm, 0x007A,
  503. bcm43xx_radio_read16(bcm, 0x007A) & 0x007F);
  504. if (phy->analog >= 2) {
  505. bcm43xx_write16(bcm, 0x03E6, 0x0040);
  506. } else if (phy->analog == 0) {
  507. bcm43xx_write16(bcm, 0x03E6, 0x0122);
  508. } else {
  509. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
  510. bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT) & 0x2000);
  511. }
  512. bcm43xx_phy_write(bcm, 0x0020, 0x3F3F);
  513. bcm43xx_phy_write(bcm, 0x0015, 0xF330);
  514. bcm43xx_radio_write16(bcm, 0x005A, 0x0060);
  515. bcm43xx_radio_write16(bcm, 0x0043,
  516. bcm43xx_radio_read16(bcm, 0x0043) & 0x00F0);
  517. bcm43xx_phy_write(bcm, 0x005A, 0x0480);
  518. bcm43xx_phy_write(bcm, 0x0059, 0x0810);
  519. bcm43xx_phy_write(bcm, 0x0058, 0x000D);
  520. udelay(20);
  521. nrssi1 = (s16)bcm43xx_phy_read(bcm, 0x0027);
  522. bcm43xx_phy_write(bcm, 0x0030, backup[3]);
  523. bcm43xx_radio_write16(bcm, 0x007A, backup[0]);
  524. bcm43xx_write16(bcm, 0x03E2, backup[11]);
  525. bcm43xx_phy_write(bcm, 0x0026, backup[4]);
  526. bcm43xx_phy_write(bcm, 0x0015, backup[5]);
  527. bcm43xx_phy_write(bcm, 0x002A, backup[6]);
  528. bcm43xx_synth_pu_workaround(bcm, radio->channel);
  529. if (phy->analog != 0)
  530. bcm43xx_write16(bcm, 0x03F4, backup[13]);
  531. bcm43xx_phy_write(bcm, 0x0020, backup[7]);
  532. bcm43xx_phy_write(bcm, 0x005A, backup[8]);
  533. bcm43xx_phy_write(bcm, 0x0059, backup[9]);
  534. bcm43xx_phy_write(bcm, 0x0058, backup[10]);
  535. bcm43xx_radio_write16(bcm, 0x0052, backup[1]);
  536. bcm43xx_radio_write16(bcm, 0x0043, backup[2]);
  537. if (nrssi0 == nrssi1)
  538. radio->nrssislope = 0x00010000;
  539. else
  540. radio->nrssislope = 0x00400000 / (nrssi0 - nrssi1);
  541. if (nrssi0 <= -4) {
  542. radio->nrssi[0] = nrssi0;
  543. radio->nrssi[1] = nrssi1;
  544. }
  545. break;
  546. case BCM43xx_PHYTYPE_G:
  547. if (radio->revision >= 9)
  548. return;
  549. if (radio->revision == 8)
  550. bcm43xx_calc_nrssi_offset(bcm);
  551. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  552. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x7FFF);
  553. bcm43xx_phy_write(bcm, 0x0802,
  554. bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC);
  555. backup[7] = bcm43xx_read16(bcm, 0x03E2);
  556. bcm43xx_write16(bcm, 0x03E2,
  557. bcm43xx_read16(bcm, 0x03E2) | 0x8000);
  558. backup[0] = bcm43xx_radio_read16(bcm, 0x007A);
  559. backup[1] = bcm43xx_radio_read16(bcm, 0x0052);
  560. backup[2] = bcm43xx_radio_read16(bcm, 0x0043);
  561. backup[3] = bcm43xx_phy_read(bcm, 0x0015);
  562. backup[4] = bcm43xx_phy_read(bcm, 0x005A);
  563. backup[5] = bcm43xx_phy_read(bcm, 0x0059);
  564. backup[6] = bcm43xx_phy_read(bcm, 0x0058);
  565. backup[8] = bcm43xx_read16(bcm, 0x03E6);
  566. backup[9] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
  567. if (phy->rev >= 3) {
  568. backup[10] = bcm43xx_phy_read(bcm, 0x002E);
  569. backup[11] = bcm43xx_phy_read(bcm, 0x002F);
  570. backup[12] = bcm43xx_phy_read(bcm, 0x080F);
  571. backup[13] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_LO_CONTROL);
  572. backup[14] = bcm43xx_phy_read(bcm, 0x0801);
  573. backup[15] = bcm43xx_phy_read(bcm, 0x0060);
  574. backup[16] = bcm43xx_phy_read(bcm, 0x0014);
  575. backup[17] = bcm43xx_phy_read(bcm, 0x0478);
  576. bcm43xx_phy_write(bcm, 0x002E, 0);
  577. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, 0);
  578. switch (phy->rev) {
  579. case 4: case 6: case 7:
  580. bcm43xx_phy_write(bcm, 0x0478,
  581. bcm43xx_phy_read(bcm, 0x0478)
  582. | 0x0100);
  583. bcm43xx_phy_write(bcm, 0x0801,
  584. bcm43xx_phy_read(bcm, 0x0801)
  585. | 0x0040);
  586. break;
  587. case 3: case 5:
  588. bcm43xx_phy_write(bcm, 0x0801,
  589. bcm43xx_phy_read(bcm, 0x0801)
  590. & 0xFFBF);
  591. break;
  592. }
  593. bcm43xx_phy_write(bcm, 0x0060,
  594. bcm43xx_phy_read(bcm, 0x0060)
  595. | 0x0040);
  596. bcm43xx_phy_write(bcm, 0x0014,
  597. bcm43xx_phy_read(bcm, 0x0014)
  598. | 0x0200);
  599. }
  600. bcm43xx_radio_write16(bcm, 0x007A,
  601. bcm43xx_radio_read16(bcm, 0x007A) | 0x0070);
  602. bcm43xx_set_all_gains(bcm, 0, 8, 0);
  603. bcm43xx_radio_write16(bcm, 0x007A,
  604. bcm43xx_radio_read16(bcm, 0x007A) & 0x00F7);
  605. if (phy->rev >= 2) {
  606. bcm43xx_phy_write(bcm, 0x0811,
  607. (bcm43xx_phy_read(bcm, 0x0811) & 0xFFCF) | 0x0030);
  608. bcm43xx_phy_write(bcm, 0x0812,
  609. (bcm43xx_phy_read(bcm, 0x0812) & 0xFFCF) | 0x0010);
  610. }
  611. bcm43xx_radio_write16(bcm, 0x007A,
  612. bcm43xx_radio_read16(bcm, 0x007A) | 0x0080);
  613. udelay(20);
  614. nrssi0 = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
  615. if (nrssi0 >= 0x0020)
  616. nrssi0 -= 0x0040;
  617. bcm43xx_radio_write16(bcm, 0x007A,
  618. bcm43xx_radio_read16(bcm, 0x007A) & 0x007F);
  619. if (phy->analog >= 2) {
  620. bcm43xx_phy_write(bcm, 0x0003,
  621. (bcm43xx_phy_read(bcm, 0x0003)
  622. & 0xFF9F) | 0x0040);
  623. }
  624. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
  625. bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
  626. | 0x2000);
  627. bcm43xx_radio_write16(bcm, 0x007A,
  628. bcm43xx_radio_read16(bcm, 0x007A) | 0x000F);
  629. bcm43xx_phy_write(bcm, 0x0015, 0xF330);
  630. if (phy->rev >= 2) {
  631. bcm43xx_phy_write(bcm, 0x0812,
  632. (bcm43xx_phy_read(bcm, 0x0812) & 0xFFCF) | 0x0020);
  633. bcm43xx_phy_write(bcm, 0x0811,
  634. (bcm43xx_phy_read(bcm, 0x0811) & 0xFFCF) | 0x0020);
  635. }
  636. bcm43xx_set_all_gains(bcm, 3, 0, 1);
  637. if (radio->revision == 8) {
  638. bcm43xx_radio_write16(bcm, 0x0043, 0x001F);
  639. } else {
  640. tmp = bcm43xx_radio_read16(bcm, 0x0052) & 0xFF0F;
  641. bcm43xx_radio_write16(bcm, 0x0052, tmp | 0x0060);
  642. tmp = bcm43xx_radio_read16(bcm, 0x0043) & 0xFFF0;
  643. bcm43xx_radio_write16(bcm, 0x0043, tmp | 0x0009);
  644. }
  645. bcm43xx_phy_write(bcm, 0x005A, 0x0480);
  646. bcm43xx_phy_write(bcm, 0x0059, 0x0810);
  647. bcm43xx_phy_write(bcm, 0x0058, 0x000D);
  648. udelay(20);
  649. nrssi1 = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
  650. if (nrssi1 >= 0x0020)
  651. nrssi1 -= 0x0040;
  652. if (nrssi0 == nrssi1)
  653. radio->nrssislope = 0x00010000;
  654. else
  655. radio->nrssislope = 0x00400000 / (nrssi0 - nrssi1);
  656. if (nrssi0 >= -4) {
  657. radio->nrssi[0] = nrssi1;
  658. radio->nrssi[1] = nrssi0;
  659. }
  660. if (phy->rev >= 3) {
  661. bcm43xx_phy_write(bcm, 0x002E, backup[10]);
  662. bcm43xx_phy_write(bcm, 0x002F, backup[11]);
  663. bcm43xx_phy_write(bcm, 0x080F, backup[12]);
  664. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, backup[13]);
  665. }
  666. if (phy->rev >= 2) {
  667. bcm43xx_phy_write(bcm, 0x0812,
  668. bcm43xx_phy_read(bcm, 0x0812) & 0xFFCF);
  669. bcm43xx_phy_write(bcm, 0x0811,
  670. bcm43xx_phy_read(bcm, 0x0811) & 0xFFCF);
  671. }
  672. bcm43xx_radio_write16(bcm, 0x007A, backup[0]);
  673. bcm43xx_radio_write16(bcm, 0x0052, backup[1]);
  674. bcm43xx_radio_write16(bcm, 0x0043, backup[2]);
  675. bcm43xx_write16(bcm, 0x03E2, backup[7]);
  676. bcm43xx_write16(bcm, 0x03E6, backup[8]);
  677. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, backup[9]);
  678. bcm43xx_phy_write(bcm, 0x0015, backup[3]);
  679. bcm43xx_phy_write(bcm, 0x005A, backup[4]);
  680. bcm43xx_phy_write(bcm, 0x0059, backup[5]);
  681. bcm43xx_phy_write(bcm, 0x0058, backup[6]);
  682. bcm43xx_synth_pu_workaround(bcm, radio->channel);
  683. bcm43xx_phy_write(bcm, 0x0802,
  684. bcm43xx_phy_read(bcm, 0x0802) | (0x0001 | 0x0002));
  685. bcm43xx_set_original_gains(bcm);
  686. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  687. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x8000);
  688. if (phy->rev >= 3) {
  689. bcm43xx_phy_write(bcm, 0x0801, backup[14]);
  690. bcm43xx_phy_write(bcm, 0x0060, backup[15]);
  691. bcm43xx_phy_write(bcm, 0x0014, backup[16]);
  692. bcm43xx_phy_write(bcm, 0x0478, backup[17]);
  693. }
  694. bcm43xx_nrssi_mem_update(bcm);
  695. bcm43xx_calc_nrssi_threshold(bcm);
  696. break;
  697. default:
  698. assert(0);
  699. }
  700. }
  701. void bcm43xx_calc_nrssi_threshold(struct bcm43xx_private *bcm)
  702. {
  703. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  704. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  705. s32 threshold;
  706. s32 a, b;
  707. s16 tmp16;
  708. u16 tmp_u16;
  709. switch (phy->type) {
  710. case BCM43xx_PHYTYPE_B: {
  711. if (radio->version != 0x2050)
  712. return;
  713. if (!(bcm->sprom.boardflags & BCM43xx_BFL_RSSI))
  714. return;
  715. if (radio->revision >= 6) {
  716. threshold = (radio->nrssi[1] - radio->nrssi[0]) * 32;
  717. threshold += 20 * (radio->nrssi[0] + 1);
  718. threshold /= 40;
  719. } else
  720. threshold = radio->nrssi[1] - 5;
  721. threshold = limit_value(threshold, 0, 0x3E);
  722. bcm43xx_phy_read(bcm, 0x0020); /* dummy read */
  723. bcm43xx_phy_write(bcm, 0x0020, (((u16)threshold) << 8) | 0x001C);
  724. if (radio->revision >= 6) {
  725. bcm43xx_phy_write(bcm, 0x0087, 0x0E0D);
  726. bcm43xx_phy_write(bcm, 0x0086, 0x0C0B);
  727. bcm43xx_phy_write(bcm, 0x0085, 0x0A09);
  728. bcm43xx_phy_write(bcm, 0x0084, 0x0808);
  729. bcm43xx_phy_write(bcm, 0x0083, 0x0808);
  730. bcm43xx_phy_write(bcm, 0x0082, 0x0604);
  731. bcm43xx_phy_write(bcm, 0x0081, 0x0302);
  732. bcm43xx_phy_write(bcm, 0x0080, 0x0100);
  733. }
  734. break;
  735. }
  736. case BCM43xx_PHYTYPE_G:
  737. if (!phy->connected ||
  738. !(bcm->sprom.boardflags & BCM43xx_BFL_RSSI)) {
  739. tmp16 = bcm43xx_nrssi_hw_read(bcm, 0x20);
  740. if (tmp16 >= 0x20)
  741. tmp16 -= 0x40;
  742. if (tmp16 < 3) {
  743. bcm43xx_phy_write(bcm, 0x048A,
  744. (bcm43xx_phy_read(bcm, 0x048A)
  745. & 0xF000) | 0x09EB);
  746. } else {
  747. bcm43xx_phy_write(bcm, 0x048A,
  748. (bcm43xx_phy_read(bcm, 0x048A)
  749. & 0xF000) | 0x0AED);
  750. }
  751. } else {
  752. if (radio->interfmode == BCM43xx_RADIO_INTERFMODE_NONWLAN) {
  753. a = 0xE;
  754. b = 0xA;
  755. } else if (!radio->aci_wlan_automatic && radio->aci_enable) {
  756. a = 0x13;
  757. b = 0x12;
  758. } else {
  759. a = 0xE;
  760. b = 0x11;
  761. }
  762. a = a * (radio->nrssi[1] - radio->nrssi[0]);
  763. a += (radio->nrssi[0] << 6);
  764. if (a < 32)
  765. a += 31;
  766. else
  767. a += 32;
  768. a = a >> 6;
  769. a = limit_value(a, -31, 31);
  770. b = b * (radio->nrssi[1] - radio->nrssi[0]);
  771. b += (radio->nrssi[0] << 6);
  772. if (b < 32)
  773. b += 31;
  774. else
  775. b += 32;
  776. b = b >> 6;
  777. b = limit_value(b, -31, 31);
  778. tmp_u16 = bcm43xx_phy_read(bcm, 0x048A) & 0xF000;
  779. tmp_u16 |= ((u32)b & 0x0000003F);
  780. tmp_u16 |= (((u32)a & 0x0000003F) << 6);
  781. bcm43xx_phy_write(bcm, 0x048A, tmp_u16);
  782. }
  783. break;
  784. default:
  785. assert(0);
  786. }
  787. }
  788. /* Stack implementation to save/restore values from the
  789. * interference mitigation code.
  790. * It is save to restore values in random order.
  791. */
  792. static void _stack_save(u32 *_stackptr, size_t *stackidx,
  793. u8 id, u16 offset, u16 value)
  794. {
  795. u32 *stackptr = &(_stackptr[*stackidx]);
  796. assert((offset & 0xE000) == 0x0000);
  797. assert((id & 0xF8) == 0x00);
  798. *stackptr = offset;
  799. *stackptr |= ((u32)id) << 13;
  800. *stackptr |= ((u32)value) << 16;
  801. (*stackidx)++;
  802. assert(*stackidx < BCM43xx_INTERFSTACK_SIZE);
  803. }
  804. static u16 _stack_restore(u32 *stackptr,
  805. u8 id, u16 offset)
  806. {
  807. size_t i;
  808. assert((offset & 0xE000) == 0x0000);
  809. assert((id & 0xF8) == 0x00);
  810. for (i = 0; i < BCM43xx_INTERFSTACK_SIZE; i++, stackptr++) {
  811. if ((*stackptr & 0x00001FFF) != offset)
  812. continue;
  813. if (((*stackptr & 0x00007000) >> 13) != id)
  814. continue;
  815. return ((*stackptr & 0xFFFF0000) >> 16);
  816. }
  817. assert(0);
  818. return 0;
  819. }
  820. #define phy_stacksave(offset) \
  821. do { \
  822. _stack_save(stack, &stackidx, 0x1, (offset), \
  823. bcm43xx_phy_read(bcm, (offset))); \
  824. } while (0)
  825. #define phy_stackrestore(offset) \
  826. do { \
  827. bcm43xx_phy_write(bcm, (offset), \
  828. _stack_restore(stack, 0x1, \
  829. (offset))); \
  830. } while (0)
  831. #define radio_stacksave(offset) \
  832. do { \
  833. _stack_save(stack, &stackidx, 0x2, (offset), \
  834. bcm43xx_radio_read16(bcm, (offset))); \
  835. } while (0)
  836. #define radio_stackrestore(offset) \
  837. do { \
  838. bcm43xx_radio_write16(bcm, (offset), \
  839. _stack_restore(stack, 0x2, \
  840. (offset))); \
  841. } while (0)
  842. #define ilt_stacksave(offset) \
  843. do { \
  844. _stack_save(stack, &stackidx, 0x3, (offset), \
  845. bcm43xx_ilt_read(bcm, (offset))); \
  846. } while (0)
  847. #define ilt_stackrestore(offset) \
  848. do { \
  849. bcm43xx_ilt_write(bcm, (offset), \
  850. _stack_restore(stack, 0x3, \
  851. (offset))); \
  852. } while (0)
  853. static void
  854. bcm43xx_radio_interference_mitigation_enable(struct bcm43xx_private *bcm,
  855. int mode)
  856. {
  857. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  858. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  859. u16 tmp, flipped;
  860. u32 tmp32;
  861. size_t stackidx = 0;
  862. u32 *stack = radio->interfstack;
  863. switch (mode) {
  864. case BCM43xx_RADIO_INTERFMODE_NONWLAN:
  865. if (phy->rev != 1) {
  866. bcm43xx_phy_write(bcm, 0x042B,
  867. bcm43xx_phy_read(bcm, 0x042B) | 0x0800);
  868. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  869. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & ~0x4000);
  870. break;
  871. }
  872. radio_stacksave(0x0078);
  873. tmp = (bcm43xx_radio_read16(bcm, 0x0078) & 0x001E);
  874. flipped = flip_4bit(tmp);
  875. if (flipped < 10 && flipped >= 8)
  876. flipped = 7;
  877. else if (flipped >= 10)
  878. flipped -= 3;
  879. flipped = flip_4bit(flipped);
  880. flipped = (flipped << 1) | 0x0020;
  881. bcm43xx_radio_write16(bcm, 0x0078, flipped);
  882. bcm43xx_calc_nrssi_threshold(bcm);
  883. phy_stacksave(0x0406);
  884. bcm43xx_phy_write(bcm, 0x0406, 0x7E28);
  885. bcm43xx_phy_write(bcm, 0x042B,
  886. bcm43xx_phy_read(bcm, 0x042B) | 0x0800);
  887. bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
  888. bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | 0x1000);
  889. phy_stacksave(0x04A0);
  890. bcm43xx_phy_write(bcm, 0x04A0,
  891. (bcm43xx_phy_read(bcm, 0x04A0) & 0xC0C0) | 0x0008);
  892. phy_stacksave(0x04A1);
  893. bcm43xx_phy_write(bcm, 0x04A1,
  894. (bcm43xx_phy_read(bcm, 0x04A1) & 0xC0C0) | 0x0605);
  895. phy_stacksave(0x04A2);
  896. bcm43xx_phy_write(bcm, 0x04A2,
  897. (bcm43xx_phy_read(bcm, 0x04A2) & 0xC0C0) | 0x0204);
  898. phy_stacksave(0x04A8);
  899. bcm43xx_phy_write(bcm, 0x04A8,
  900. (bcm43xx_phy_read(bcm, 0x04A8) & 0xC0C0) | 0x0803);
  901. phy_stacksave(0x04AB);
  902. bcm43xx_phy_write(bcm, 0x04AB,
  903. (bcm43xx_phy_read(bcm, 0x04AB) & 0xC0C0) | 0x0605);
  904. phy_stacksave(0x04A7);
  905. bcm43xx_phy_write(bcm, 0x04A7, 0x0002);
  906. phy_stacksave(0x04A3);
  907. bcm43xx_phy_write(bcm, 0x04A3, 0x287A);
  908. phy_stacksave(0x04A9);
  909. bcm43xx_phy_write(bcm, 0x04A9, 0x2027);
  910. phy_stacksave(0x0493);
  911. bcm43xx_phy_write(bcm, 0x0493, 0x32F5);
  912. phy_stacksave(0x04AA);
  913. bcm43xx_phy_write(bcm, 0x04AA, 0x2027);
  914. phy_stacksave(0x04AC);
  915. bcm43xx_phy_write(bcm, 0x04AC, 0x32F5);
  916. break;
  917. case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
  918. if (bcm43xx_phy_read(bcm, 0x0033) & 0x0800)
  919. break;
  920. radio->aci_enable = 1;
  921. phy_stacksave(BCM43xx_PHY_RADIO_BITFIELD);
  922. phy_stacksave(BCM43xx_PHY_G_CRS);
  923. if (phy->rev < 2) {
  924. phy_stacksave(0x0406);
  925. } else {
  926. phy_stacksave(0x04C0);
  927. phy_stacksave(0x04C1);
  928. }
  929. phy_stacksave(0x0033);
  930. phy_stacksave(0x04A7);
  931. phy_stacksave(0x04A3);
  932. phy_stacksave(0x04A9);
  933. phy_stacksave(0x04AA);
  934. phy_stacksave(0x04AC);
  935. phy_stacksave(0x0493);
  936. phy_stacksave(0x04A1);
  937. phy_stacksave(0x04A0);
  938. phy_stacksave(0x04A2);
  939. phy_stacksave(0x048A);
  940. phy_stacksave(0x04A8);
  941. phy_stacksave(0x04AB);
  942. if (phy->rev == 2) {
  943. phy_stacksave(0x04AD);
  944. phy_stacksave(0x04AE);
  945. } else if (phy->rev >= 3) {
  946. phy_stacksave(0x04AD);
  947. phy_stacksave(0x0415);
  948. phy_stacksave(0x0416);
  949. phy_stacksave(0x0417);
  950. ilt_stacksave(0x1A00 + 0x2);
  951. ilt_stacksave(0x1A00 + 0x3);
  952. }
  953. phy_stacksave(0x042B);
  954. phy_stacksave(0x048C);
  955. bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
  956. bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD)
  957. & ~0x1000);
  958. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  959. (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS)
  960. & 0xFFFC) | 0x0002);
  961. bcm43xx_phy_write(bcm, 0x0033, 0x0800);
  962. bcm43xx_phy_write(bcm, 0x04A3, 0x2027);
  963. bcm43xx_phy_write(bcm, 0x04A9, 0x1CA8);
  964. bcm43xx_phy_write(bcm, 0x0493, 0x287A);
  965. bcm43xx_phy_write(bcm, 0x04AA, 0x1CA8);
  966. bcm43xx_phy_write(bcm, 0x04AC, 0x287A);
  967. bcm43xx_phy_write(bcm, 0x04A0,
  968. (bcm43xx_phy_read(bcm, 0x04A0)
  969. & 0xFFC0) | 0x001A);
  970. bcm43xx_phy_write(bcm, 0x04A7, 0x000D);
  971. if (phy->rev < 2) {
  972. bcm43xx_phy_write(bcm, 0x0406, 0xFF0D);
  973. } else if (phy->rev == 2) {
  974. bcm43xx_phy_write(bcm, 0x04C0, 0xFFFF);
  975. bcm43xx_phy_write(bcm, 0x04C1, 0x00A9);
  976. } else {
  977. bcm43xx_phy_write(bcm, 0x04C0, 0x00C1);
  978. bcm43xx_phy_write(bcm, 0x04C1, 0x0059);
  979. }
  980. bcm43xx_phy_write(bcm, 0x04A1,
  981. (bcm43xx_phy_read(bcm, 0x04A1)
  982. & 0xC0FF) | 0x1800);
  983. bcm43xx_phy_write(bcm, 0x04A1,
  984. (bcm43xx_phy_read(bcm, 0x04A1)
  985. & 0xFFC0) | 0x0015);
  986. bcm43xx_phy_write(bcm, 0x04A8,
  987. (bcm43xx_phy_read(bcm, 0x04A8)
  988. & 0xCFFF) | 0x1000);
  989. bcm43xx_phy_write(bcm, 0x04A8,
  990. (bcm43xx_phy_read(bcm, 0x04A8)
  991. & 0xF0FF) | 0x0A00);
  992. bcm43xx_phy_write(bcm, 0x04AB,
  993. (bcm43xx_phy_read(bcm, 0x04AB)
  994. & 0xCFFF) | 0x1000);
  995. bcm43xx_phy_write(bcm, 0x04AB,
  996. (bcm43xx_phy_read(bcm, 0x04AB)
  997. & 0xF0FF) | 0x0800);
  998. bcm43xx_phy_write(bcm, 0x04AB,
  999. (bcm43xx_phy_read(bcm, 0x04AB)
  1000. & 0xFFCF) | 0x0010);
  1001. bcm43xx_phy_write(bcm, 0x04AB,
  1002. (bcm43xx_phy_read(bcm, 0x04AB)
  1003. & 0xFFF0) | 0x0005);
  1004. bcm43xx_phy_write(bcm, 0x04A8,
  1005. (bcm43xx_phy_read(bcm, 0x04A8)
  1006. & 0xFFCF) | 0x0010);
  1007. bcm43xx_phy_write(bcm, 0x04A8,
  1008. (bcm43xx_phy_read(bcm, 0x04A8)
  1009. & 0xFFF0) | 0x0006);
  1010. bcm43xx_phy_write(bcm, 0x04A2,
  1011. (bcm43xx_phy_read(bcm, 0x04A2)
  1012. & 0xF0FF) | 0x0800);
  1013. bcm43xx_phy_write(bcm, 0x04A0,
  1014. (bcm43xx_phy_read(bcm, 0x04A0)
  1015. & 0xF0FF) | 0x0500);
  1016. bcm43xx_phy_write(bcm, 0x04A2,
  1017. (bcm43xx_phy_read(bcm, 0x04A2)
  1018. & 0xFFF0) | 0x000B);
  1019. if (phy->rev >= 3) {
  1020. bcm43xx_phy_write(bcm, 0x048A,
  1021. bcm43xx_phy_read(bcm, 0x048A)
  1022. & ~0x8000);
  1023. bcm43xx_phy_write(bcm, 0x0415,
  1024. (bcm43xx_phy_read(bcm, 0x0415)
  1025. & 0x8000) | 0x36D8);
  1026. bcm43xx_phy_write(bcm, 0x0416,
  1027. (bcm43xx_phy_read(bcm, 0x0416)
  1028. & 0x8000) | 0x36D8);
  1029. bcm43xx_phy_write(bcm, 0x0417,
  1030. (bcm43xx_phy_read(bcm, 0x0417)
  1031. & 0xFE00) | 0x016D);
  1032. } else {
  1033. bcm43xx_phy_write(bcm, 0x048A,
  1034. bcm43xx_phy_read(bcm, 0x048A)
  1035. | 0x1000);
  1036. bcm43xx_phy_write(bcm, 0x048A,
  1037. (bcm43xx_phy_read(bcm, 0x048A)
  1038. & 0x9FFF) | 0x2000);
  1039. tmp32 = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
  1040. BCM43xx_UCODEFLAGS_OFFSET);
  1041. if (!(tmp32 & 0x800)) {
  1042. tmp32 |= 0x800;
  1043. bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
  1044. BCM43xx_UCODEFLAGS_OFFSET,
  1045. tmp32);
  1046. }
  1047. }
  1048. if (phy->rev >= 2) {
  1049. bcm43xx_phy_write(bcm, 0x042B,
  1050. bcm43xx_phy_read(bcm, 0x042B)
  1051. | 0x0800);
  1052. }
  1053. bcm43xx_phy_write(bcm, 0x048C,
  1054. (bcm43xx_phy_read(bcm, 0x048C)
  1055. & 0xF0FF) | 0x0200);
  1056. if (phy->rev == 2) {
  1057. bcm43xx_phy_write(bcm, 0x04AE,
  1058. (bcm43xx_phy_read(bcm, 0x04AE)
  1059. & 0xFF00) | 0x007F);
  1060. bcm43xx_phy_write(bcm, 0x04AD,
  1061. (bcm43xx_phy_read(bcm, 0x04AD)
  1062. & 0x00FF) | 0x1300);
  1063. } else if (phy->rev >= 6) {
  1064. bcm43xx_ilt_write(bcm, 0x1A00 + 0x3, 0x007F);
  1065. bcm43xx_ilt_write(bcm, 0x1A00 + 0x2, 0x007F);
  1066. bcm43xx_phy_write(bcm, 0x04AD,
  1067. bcm43xx_phy_read(bcm, 0x04AD)
  1068. & 0x00FF);
  1069. }
  1070. bcm43xx_calc_nrssi_slope(bcm);
  1071. break;
  1072. default:
  1073. assert(0);
  1074. }
  1075. }
  1076. static void
  1077. bcm43xx_radio_interference_mitigation_disable(struct bcm43xx_private *bcm,
  1078. int mode)
  1079. {
  1080. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1081. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1082. u32 tmp32;
  1083. u32 *stack = radio->interfstack;
  1084. switch (mode) {
  1085. case BCM43xx_RADIO_INTERFMODE_NONWLAN:
  1086. if (phy->rev != 1) {
  1087. bcm43xx_phy_write(bcm, 0x042B,
  1088. bcm43xx_phy_read(bcm, 0x042B) & ~0x0800);
  1089. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  1090. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x4000);
  1091. break;
  1092. }
  1093. phy_stackrestore(0x0078);
  1094. bcm43xx_calc_nrssi_threshold(bcm);
  1095. phy_stackrestore(0x0406);
  1096. bcm43xx_phy_write(bcm, 0x042B,
  1097. bcm43xx_phy_read(bcm, 0x042B) & ~0x0800);
  1098. if (!bcm->bad_frames_preempt) {
  1099. bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
  1100. bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD)
  1101. & ~(1 << 11));
  1102. }
  1103. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  1104. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x4000);
  1105. phy_stackrestore(0x04A0);
  1106. phy_stackrestore(0x04A1);
  1107. phy_stackrestore(0x04A2);
  1108. phy_stackrestore(0x04A8);
  1109. phy_stackrestore(0x04AB);
  1110. phy_stackrestore(0x04A7);
  1111. phy_stackrestore(0x04A3);
  1112. phy_stackrestore(0x04A9);
  1113. phy_stackrestore(0x0493);
  1114. phy_stackrestore(0x04AA);
  1115. phy_stackrestore(0x04AC);
  1116. break;
  1117. case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
  1118. if (!(bcm43xx_phy_read(bcm, 0x0033) & 0x0800))
  1119. break;
  1120. radio->aci_enable = 0;
  1121. phy_stackrestore(BCM43xx_PHY_RADIO_BITFIELD);
  1122. phy_stackrestore(BCM43xx_PHY_G_CRS);
  1123. phy_stackrestore(0x0033);
  1124. phy_stackrestore(0x04A3);
  1125. phy_stackrestore(0x04A9);
  1126. phy_stackrestore(0x0493);
  1127. phy_stackrestore(0x04AA);
  1128. phy_stackrestore(0x04AC);
  1129. phy_stackrestore(0x04A0);
  1130. phy_stackrestore(0x04A7);
  1131. if (phy->rev >= 2) {
  1132. phy_stackrestore(0x04C0);
  1133. phy_stackrestore(0x04C1);
  1134. } else
  1135. phy_stackrestore(0x0406);
  1136. phy_stackrestore(0x04A1);
  1137. phy_stackrestore(0x04AB);
  1138. phy_stackrestore(0x04A8);
  1139. if (phy->rev == 2) {
  1140. phy_stackrestore(0x04AD);
  1141. phy_stackrestore(0x04AE);
  1142. } else if (phy->rev >= 3) {
  1143. phy_stackrestore(0x04AD);
  1144. phy_stackrestore(0x0415);
  1145. phy_stackrestore(0x0416);
  1146. phy_stackrestore(0x0417);
  1147. ilt_stackrestore(0x1A00 + 0x2);
  1148. ilt_stackrestore(0x1A00 + 0x3);
  1149. }
  1150. phy_stackrestore(0x04A2);
  1151. phy_stackrestore(0x04A8);
  1152. phy_stackrestore(0x042B);
  1153. phy_stackrestore(0x048C);
  1154. tmp32 = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
  1155. BCM43xx_UCODEFLAGS_OFFSET);
  1156. if (tmp32 & 0x800) {
  1157. tmp32 &= ~0x800;
  1158. bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
  1159. BCM43xx_UCODEFLAGS_OFFSET,
  1160. tmp32);
  1161. }
  1162. bcm43xx_calc_nrssi_slope(bcm);
  1163. break;
  1164. default:
  1165. assert(0);
  1166. }
  1167. }
  1168. #undef phy_stacksave
  1169. #undef phy_stackrestore
  1170. #undef radio_stacksave
  1171. #undef radio_stackrestore
  1172. #undef ilt_stacksave
  1173. #undef ilt_stackrestore
  1174. int bcm43xx_radio_set_interference_mitigation(struct bcm43xx_private *bcm,
  1175. int mode)
  1176. {
  1177. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1178. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1179. int currentmode;
  1180. if ((phy->type != BCM43xx_PHYTYPE_G) ||
  1181. (phy->rev == 0) ||
  1182. (!phy->connected))
  1183. return -ENODEV;
  1184. radio->aci_wlan_automatic = 0;
  1185. switch (mode) {
  1186. case BCM43xx_RADIO_INTERFMODE_AUTOWLAN:
  1187. radio->aci_wlan_automatic = 1;
  1188. if (radio->aci_enable)
  1189. mode = BCM43xx_RADIO_INTERFMODE_MANUALWLAN;
  1190. else
  1191. mode = BCM43xx_RADIO_INTERFMODE_NONE;
  1192. break;
  1193. case BCM43xx_RADIO_INTERFMODE_NONE:
  1194. case BCM43xx_RADIO_INTERFMODE_NONWLAN:
  1195. case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
  1196. break;
  1197. default:
  1198. return -EINVAL;
  1199. }
  1200. currentmode = radio->interfmode;
  1201. if (currentmode == mode)
  1202. return 0;
  1203. if (currentmode != BCM43xx_RADIO_INTERFMODE_NONE)
  1204. bcm43xx_radio_interference_mitigation_disable(bcm, currentmode);
  1205. if (mode == BCM43xx_RADIO_INTERFMODE_NONE) {
  1206. radio->aci_enable = 0;
  1207. radio->aci_hw_rssi = 0;
  1208. } else
  1209. bcm43xx_radio_interference_mitigation_enable(bcm, mode);
  1210. radio->interfmode = mode;
  1211. return 0;
  1212. }
  1213. u16 bcm43xx_radio_calibrationvalue(struct bcm43xx_private *bcm)
  1214. {
  1215. u16 reg, index, ret;
  1216. reg = bcm43xx_radio_read16(bcm, 0x0060);
  1217. index = (reg & 0x001E) >> 1;
  1218. ret = rcc_table[index] << 1;
  1219. ret |= (reg & 0x0001);
  1220. ret |= 0x0020;
  1221. return ret;
  1222. }
  1223. #define LPD(L, P, D) (((L) << 2) | ((P) << 1) | ((D) << 0))
  1224. static u16 bcm43xx_get_812_value(struct bcm43xx_private *bcm, u8 lpd)
  1225. {
  1226. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1227. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1228. u16 loop_or = 0;
  1229. u16 adj_loopback_gain = phy->loopback_gain[0];
  1230. u8 loop;
  1231. u16 extern_lna_control;
  1232. if (!phy->connected)
  1233. return 0;
  1234. if (!has_loopback_gain(phy)) {
  1235. if (phy->rev < 7 || !(bcm->sprom.boardflags
  1236. & BCM43xx_BFL_EXTLNA)) {
  1237. switch (lpd) {
  1238. case LPD(0, 1, 1):
  1239. return 0x0FB2;
  1240. case LPD(0, 0, 1):
  1241. return 0x00B2;
  1242. case LPD(1, 0, 1):
  1243. return 0x30B2;
  1244. case LPD(1, 0, 0):
  1245. return 0x30B3;
  1246. default:
  1247. assert(0);
  1248. }
  1249. } else {
  1250. switch (lpd) {
  1251. case LPD(0, 1, 1):
  1252. return 0x8FB2;
  1253. case LPD(0, 0, 1):
  1254. return 0x80B2;
  1255. case LPD(1, 0, 1):
  1256. return 0x20B2;
  1257. case LPD(1, 0, 0):
  1258. return 0x20B3;
  1259. default:
  1260. assert(0);
  1261. }
  1262. }
  1263. } else {
  1264. if (radio->revision == 8)
  1265. adj_loopback_gain += 0x003E;
  1266. else
  1267. adj_loopback_gain += 0x0026;
  1268. if (adj_loopback_gain >= 0x46) {
  1269. adj_loopback_gain -= 0x46;
  1270. extern_lna_control = 0x3000;
  1271. } else if (adj_loopback_gain >= 0x3A) {
  1272. adj_loopback_gain -= 0x3A;
  1273. extern_lna_control = 0x2000;
  1274. } else if (adj_loopback_gain >= 0x2E) {
  1275. adj_loopback_gain -= 0x2E;
  1276. extern_lna_control = 0x1000;
  1277. } else {
  1278. adj_loopback_gain -= 0x10;
  1279. extern_lna_control = 0x0000;
  1280. }
  1281. for (loop = 0; loop < 16; loop++) {
  1282. u16 tmp = adj_loopback_gain - 6 * loop;
  1283. if (tmp < 6)
  1284. break;
  1285. }
  1286. loop_or = (loop << 8) | extern_lna_control;
  1287. if (phy->rev >= 7 && bcm->sprom.boardflags
  1288. & BCM43xx_BFL_EXTLNA) {
  1289. if (extern_lna_control)
  1290. loop_or |= 0x8000;
  1291. switch (lpd) {
  1292. case LPD(0, 1, 1):
  1293. return 0x8F92;
  1294. case LPD(0, 0, 1):
  1295. return (0x8092 | loop_or);
  1296. case LPD(1, 0, 1):
  1297. return (0x2092 | loop_or);
  1298. case LPD(1, 0, 0):
  1299. return (0x2093 | loop_or);
  1300. default:
  1301. assert(0);
  1302. }
  1303. } else {
  1304. switch (lpd) {
  1305. case LPD(0, 1, 1):
  1306. return 0x0F92;
  1307. case LPD(0, 0, 1):
  1308. case LPD(1, 0, 1):
  1309. return (0x0092 | loop_or);
  1310. case LPD(1, 0, 0):
  1311. return (0x0093 | loop_or);
  1312. default:
  1313. assert(0);
  1314. }
  1315. }
  1316. }
  1317. return 0;
  1318. }
  1319. u16 bcm43xx_radio_init2050(struct bcm43xx_private *bcm)
  1320. {
  1321. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1322. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1323. u16 backup[21] = { 0 };
  1324. u16 ret;
  1325. u16 i, j;
  1326. u32 tmp1 = 0, tmp2 = 0;
  1327. backup[0] = bcm43xx_radio_read16(bcm, 0x0043);
  1328. backup[14] = bcm43xx_radio_read16(bcm, 0x0051);
  1329. backup[15] = bcm43xx_radio_read16(bcm, 0x0052);
  1330. backup[1] = bcm43xx_phy_read(bcm, 0x0015);
  1331. backup[16] = bcm43xx_phy_read(bcm, 0x005A);
  1332. backup[17] = bcm43xx_phy_read(bcm, 0x0059);
  1333. backup[18] = bcm43xx_phy_read(bcm, 0x0058);
  1334. if (phy->type == BCM43xx_PHYTYPE_B) {
  1335. backup[2] = bcm43xx_phy_read(bcm, 0x0030);
  1336. backup[3] = bcm43xx_read16(bcm, 0x03EC);
  1337. bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
  1338. bcm43xx_write16(bcm, 0x03EC, 0x3F3F);
  1339. } else {
  1340. if (phy->connected) {
  1341. backup[4] = bcm43xx_phy_read(bcm, 0x0811);
  1342. backup[5] = bcm43xx_phy_read(bcm, 0x0812);
  1343. backup[6] = bcm43xx_phy_read(bcm, 0x0814);
  1344. backup[7] = bcm43xx_phy_read(bcm, 0x0815);
  1345. backup[8] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS);
  1346. backup[9] = bcm43xx_phy_read(bcm, 0x0802);
  1347. bcm43xx_phy_write(bcm, 0x0814,
  1348. (bcm43xx_phy_read(bcm, 0x0814)
  1349. | 0x0003));
  1350. bcm43xx_phy_write(bcm, 0x0815,
  1351. (bcm43xx_phy_read(bcm, 0x0815)
  1352. & 0xFFFC));
  1353. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  1354. (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS)
  1355. & 0x7FFF));
  1356. bcm43xx_phy_write(bcm, 0x0802,
  1357. (bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC));
  1358. if (phy->rev > 1) { /* loopback gain enabled */
  1359. backup[19] = bcm43xx_phy_read(bcm, 0x080F);
  1360. backup[20] = bcm43xx_phy_read(bcm, 0x0810);
  1361. if (phy->rev >= 3)
  1362. bcm43xx_phy_write(bcm, 0x080F, 0xC020);
  1363. else
  1364. bcm43xx_phy_write(bcm, 0x080F, 0x8020);
  1365. bcm43xx_phy_write(bcm, 0x0810, 0x0000);
  1366. }
  1367. bcm43xx_phy_write(bcm, 0x0812,
  1368. bcm43xx_get_812_value(bcm, LPD(0, 1, 1)));
  1369. if (phy->rev < 7 || !(bcm->sprom.boardflags
  1370. & BCM43xx_BFL_EXTLNA))
  1371. bcm43xx_phy_write(bcm, 0x0811, 0x01B3);
  1372. else
  1373. bcm43xx_phy_write(bcm, 0x0811, 0x09B3);
  1374. }
  1375. }
  1376. bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO,
  1377. (bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_RADIO) | 0x8000));
  1378. backup[10] = bcm43xx_phy_read(bcm, 0x0035);
  1379. bcm43xx_phy_write(bcm, 0x0035,
  1380. (bcm43xx_phy_read(bcm, 0x0035) & 0xFF7F));
  1381. backup[11] = bcm43xx_read16(bcm, 0x03E6);
  1382. backup[12] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
  1383. // Initialization
  1384. if (phy->analog == 0) {
  1385. bcm43xx_write16(bcm, 0x03E6, 0x0122);
  1386. } else {
  1387. if (phy->analog >= 2)
  1388. bcm43xx_phy_write(bcm, 0x0003,
  1389. (bcm43xx_phy_read(bcm, 0x0003)
  1390. & 0xFFBF) | 0x0040);
  1391. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
  1392. (bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
  1393. | 0x2000));
  1394. }
  1395. ret = bcm43xx_radio_calibrationvalue(bcm);
  1396. if (phy->type == BCM43xx_PHYTYPE_B)
  1397. bcm43xx_radio_write16(bcm, 0x0078, 0x0026);
  1398. if (phy->connected)
  1399. bcm43xx_phy_write(bcm, 0x0812,
  1400. bcm43xx_get_812_value(bcm, LPD(0, 1, 1)));
  1401. bcm43xx_phy_write(bcm, 0x0015, 0xBFAF);
  1402. bcm43xx_phy_write(bcm, 0x002B, 0x1403);
  1403. if (phy->connected)
  1404. bcm43xx_phy_write(bcm, 0x0812,
  1405. bcm43xx_get_812_value(bcm, LPD(0, 0, 1)));
  1406. bcm43xx_phy_write(bcm, 0x0015, 0xBFA0);
  1407. bcm43xx_radio_write16(bcm, 0x0051,
  1408. (bcm43xx_radio_read16(bcm, 0x0051) | 0x0004));
  1409. if (radio->revision == 8)
  1410. bcm43xx_radio_write16(bcm, 0x0043, 0x001F);
  1411. else {
  1412. bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
  1413. bcm43xx_radio_write16(bcm, 0x0043,
  1414. (bcm43xx_radio_read16(bcm, 0x0043) & 0xFFF0)
  1415. | 0x0009);
  1416. }
  1417. bcm43xx_phy_write(bcm, 0x0058, 0x0000);
  1418. for (i = 0; i < 16; i++) {
  1419. bcm43xx_phy_write(bcm, 0x005A, 0x0480);
  1420. bcm43xx_phy_write(bcm, 0x0059, 0xC810);
  1421. bcm43xx_phy_write(bcm, 0x0058, 0x000D);
  1422. if (phy->connected)
  1423. bcm43xx_phy_write(bcm, 0x0812,
  1424. bcm43xx_get_812_value(bcm, LPD(1, 0, 1)));
  1425. bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
  1426. udelay(10);
  1427. if (phy->connected)
  1428. bcm43xx_phy_write(bcm, 0x0812,
  1429. bcm43xx_get_812_value(bcm, LPD(1, 0, 1)));
  1430. bcm43xx_phy_write(bcm, 0x0015, 0xEFB0);
  1431. udelay(10);
  1432. if (phy->connected)
  1433. bcm43xx_phy_write(bcm, 0x0812,
  1434. bcm43xx_get_812_value(bcm, LPD(1, 0, 0)));
  1435. bcm43xx_phy_write(bcm, 0x0015, 0xFFF0);
  1436. udelay(20);
  1437. tmp1 += bcm43xx_phy_read(bcm, 0x002D);
  1438. bcm43xx_phy_write(bcm, 0x0058, 0x0000);
  1439. if (phy->connected)
  1440. bcm43xx_phy_write(bcm, 0x0812,
  1441. bcm43xx_get_812_value(bcm, LPD(1, 0, 1)));
  1442. bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
  1443. }
  1444. tmp1++;
  1445. tmp1 >>= 9;
  1446. udelay(10);
  1447. bcm43xx_phy_write(bcm, 0x0058, 0x0000);
  1448. for (i = 0; i < 16; i++) {
  1449. bcm43xx_radio_write16(bcm, 0x0078, (flip_4bit(i) << 1) | 0x0020);
  1450. backup[13] = bcm43xx_radio_read16(bcm, 0x0078);
  1451. udelay(10);
  1452. for (j = 0; j < 16; j++) {
  1453. bcm43xx_phy_write(bcm, 0x005A, 0x0D80);
  1454. bcm43xx_phy_write(bcm, 0x0059, 0xC810);
  1455. bcm43xx_phy_write(bcm, 0x0058, 0x000D);
  1456. if (phy->connected)
  1457. bcm43xx_phy_write(bcm, 0x0812,
  1458. bcm43xx_get_812_value(bcm,
  1459. LPD(1, 0, 1)));
  1460. bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
  1461. udelay(10);
  1462. if (phy->connected)
  1463. bcm43xx_phy_write(bcm, 0x0812,
  1464. bcm43xx_get_812_value(bcm,
  1465. LPD(1, 0, 1)));
  1466. bcm43xx_phy_write(bcm, 0x0015, 0xEFB0);
  1467. udelay(10);
  1468. if (phy->connected)
  1469. bcm43xx_phy_write(bcm, 0x0812,
  1470. bcm43xx_get_812_value(bcm,
  1471. LPD(1, 0, 0)));
  1472. bcm43xx_phy_write(bcm, 0x0015, 0xFFF0);
  1473. udelay(10);
  1474. tmp2 += bcm43xx_phy_read(bcm, 0x002D);
  1475. bcm43xx_phy_write(bcm, 0x0058, 0x0000);
  1476. if (phy->connected)
  1477. bcm43xx_phy_write(bcm, 0x0812,
  1478. bcm43xx_get_812_value(bcm,
  1479. LPD(1, 0, 1)));
  1480. bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
  1481. }
  1482. tmp2++;
  1483. tmp2 >>= 8;
  1484. if (tmp1 < tmp2)
  1485. break;
  1486. }
  1487. /* Restore the registers */
  1488. bcm43xx_phy_write(bcm, 0x0015, backup[1]);
  1489. bcm43xx_radio_write16(bcm, 0x0051, backup[14]);
  1490. bcm43xx_radio_write16(bcm, 0x0052, backup[15]);
  1491. bcm43xx_radio_write16(bcm, 0x0043, backup[0]);
  1492. bcm43xx_phy_write(bcm, 0x005A, backup[16]);
  1493. bcm43xx_phy_write(bcm, 0x0059, backup[17]);
  1494. bcm43xx_phy_write(bcm, 0x0058, backup[18]);
  1495. bcm43xx_write16(bcm, 0x03E6, backup[11]);
  1496. if (phy->analog != 0)
  1497. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, backup[12]);
  1498. bcm43xx_phy_write(bcm, 0x0035, backup[10]);
  1499. bcm43xx_radio_selectchannel(bcm, radio->channel, 1);
  1500. if (phy->type == BCM43xx_PHYTYPE_B) {
  1501. bcm43xx_phy_write(bcm, 0x0030, backup[2]);
  1502. bcm43xx_write16(bcm, 0x03EC, backup[3]);
  1503. } else {
  1504. if (phy->connected) {
  1505. bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO,
  1506. (bcm43xx_read16(bcm,
  1507. BCM43xx_MMIO_PHY_RADIO) & 0x7FFF));
  1508. bcm43xx_phy_write(bcm, 0x0811, backup[4]);
  1509. bcm43xx_phy_write(bcm, 0x0812, backup[5]);
  1510. bcm43xx_phy_write(bcm, 0x0814, backup[6]);
  1511. bcm43xx_phy_write(bcm, 0x0815, backup[7]);
  1512. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, backup[8]);
  1513. bcm43xx_phy_write(bcm, 0x0802, backup[9]);
  1514. if (phy->rev > 1) {
  1515. bcm43xx_phy_write(bcm, 0x080F, backup[19]);
  1516. bcm43xx_phy_write(bcm, 0x0810, backup[20]);
  1517. }
  1518. }
  1519. }
  1520. if (i >= 15)
  1521. ret = backup[13];
  1522. return ret;
  1523. }
  1524. void bcm43xx_radio_init2060(struct bcm43xx_private *bcm)
  1525. {
  1526. int err;
  1527. bcm43xx_radio_write16(bcm, 0x0004, 0x00C0);
  1528. bcm43xx_radio_write16(bcm, 0x0005, 0x0008);
  1529. bcm43xx_radio_write16(bcm, 0x0009, 0x0040);
  1530. bcm43xx_radio_write16(bcm, 0x0005, 0x00AA);
  1531. bcm43xx_radio_write16(bcm, 0x0032, 0x008F);
  1532. bcm43xx_radio_write16(bcm, 0x0006, 0x008F);
  1533. bcm43xx_radio_write16(bcm, 0x0034, 0x008F);
  1534. bcm43xx_radio_write16(bcm, 0x002C, 0x0007);
  1535. bcm43xx_radio_write16(bcm, 0x0082, 0x0080);
  1536. bcm43xx_radio_write16(bcm, 0x0080, 0x0000);
  1537. bcm43xx_radio_write16(bcm, 0x003F, 0x00DA);
  1538. bcm43xx_radio_write16(bcm, 0x0005, bcm43xx_radio_read16(bcm, 0x0005) & ~0x0008);
  1539. bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0010);
  1540. bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0020);
  1541. bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0020);
  1542. udelay(400);
  1543. bcm43xx_radio_write16(bcm, 0x0081, (bcm43xx_radio_read16(bcm, 0x0081) & ~0x0020) | 0x0010);
  1544. udelay(400);
  1545. bcm43xx_radio_write16(bcm, 0x0005, (bcm43xx_radio_read16(bcm, 0x0005) & ~0x0008) | 0x0008);
  1546. bcm43xx_radio_write16(bcm, 0x0085, bcm43xx_radio_read16(bcm, 0x0085) & ~0x0010);
  1547. bcm43xx_radio_write16(bcm, 0x0005, bcm43xx_radio_read16(bcm, 0x0005) & ~0x0008);
  1548. bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0040);
  1549. bcm43xx_radio_write16(bcm, 0x0081, (bcm43xx_radio_read16(bcm, 0x0081) & ~0x0040) | 0x0040);
  1550. bcm43xx_radio_write16(bcm, 0x0005, (bcm43xx_radio_read16(bcm, 0x0081) & ~0x0008) | 0x0008);
  1551. bcm43xx_phy_write(bcm, 0x0063, 0xDDC6);
  1552. bcm43xx_phy_write(bcm, 0x0069, 0x07BE);
  1553. bcm43xx_phy_write(bcm, 0x006A, 0x0000);
  1554. err = bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_A, 0);
  1555. assert(err == 0);
  1556. udelay(1000);
  1557. }
  1558. static inline
  1559. u16 freq_r3A_value(u16 frequency)
  1560. {
  1561. u16 value;
  1562. if (frequency < 5091)
  1563. value = 0x0040;
  1564. else if (frequency < 5321)
  1565. value = 0x0000;
  1566. else if (frequency < 5806)
  1567. value = 0x0080;
  1568. else
  1569. value = 0x0040;
  1570. return value;
  1571. }
  1572. void bcm43xx_radio_set_tx_iq(struct bcm43xx_private *bcm)
  1573. {
  1574. static const u8 data_high[5] = { 0x00, 0x40, 0x80, 0x90, 0xD0 };
  1575. static const u8 data_low[5] = { 0x00, 0x01, 0x05, 0x06, 0x0A };
  1576. u16 tmp = bcm43xx_radio_read16(bcm, 0x001E);
  1577. int i, j;
  1578. for (i = 0; i < 5; i++) {
  1579. for (j = 0; j < 5; j++) {
  1580. if (tmp == (data_high[i] | data_low[j])) {
  1581. bcm43xx_phy_write(bcm, 0x0069, (i - j) << 8 | 0x00C0);
  1582. return;
  1583. }
  1584. }
  1585. }
  1586. }
  1587. int bcm43xx_radio_selectchannel(struct bcm43xx_private *bcm,
  1588. u8 channel,
  1589. int synthetic_pu_workaround)
  1590. {
  1591. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1592. u16 r8, tmp;
  1593. u16 freq;
  1594. if (!ieee80211_is_valid_channel(bcm->ieee, channel))
  1595. return -EINVAL;
  1596. if ((radio->manufact == 0x17F) &&
  1597. (radio->version == 0x2060) &&
  1598. (radio->revision == 1)) {
  1599. freq = channel2freq_a(channel);
  1600. r8 = bcm43xx_radio_read16(bcm, 0x0008);
  1601. bcm43xx_write16(bcm, 0x03F0, freq);
  1602. bcm43xx_radio_write16(bcm, 0x0008, r8);
  1603. TODO();//TODO: write max channel TX power? to Radio 0x2D
  1604. tmp = bcm43xx_radio_read16(bcm, 0x002E);
  1605. tmp &= 0x0080;
  1606. TODO();//TODO: OR tmp with the Power out estimation for this channel?
  1607. bcm43xx_radio_write16(bcm, 0x002E, tmp);
  1608. if (freq >= 4920 && freq <= 5500) {
  1609. /*
  1610. * r8 = (((freq * 15 * 0xE1FC780F) >> 32) / 29) & 0x0F;
  1611. * = (freq * 0.025862069
  1612. */
  1613. r8 = 3 * freq / 116; /* is equal to r8 = freq * 0.025862 */
  1614. }
  1615. bcm43xx_radio_write16(bcm, 0x0007, (r8 << 4) | r8);
  1616. bcm43xx_radio_write16(bcm, 0x0020, (r8 << 4) | r8);
  1617. bcm43xx_radio_write16(bcm, 0x0021, (r8 << 4) | r8);
  1618. bcm43xx_radio_write16(bcm, 0x0022,
  1619. (bcm43xx_radio_read16(bcm, 0x0022)
  1620. & 0x000F) | (r8 << 4));
  1621. bcm43xx_radio_write16(bcm, 0x002A, (r8 << 4));
  1622. bcm43xx_radio_write16(bcm, 0x002B, (r8 << 4));
  1623. bcm43xx_radio_write16(bcm, 0x0008,
  1624. (bcm43xx_radio_read16(bcm, 0x0008)
  1625. & 0x00F0) | (r8 << 4));
  1626. bcm43xx_radio_write16(bcm, 0x0029,
  1627. (bcm43xx_radio_read16(bcm, 0x0029)
  1628. & 0xFF0F) | 0x00B0);
  1629. bcm43xx_radio_write16(bcm, 0x0035, 0x00AA);
  1630. bcm43xx_radio_write16(bcm, 0x0036, 0x0085);
  1631. bcm43xx_radio_write16(bcm, 0x003A,
  1632. (bcm43xx_radio_read16(bcm, 0x003A)
  1633. & 0xFF20) | freq_r3A_value(freq));
  1634. bcm43xx_radio_write16(bcm, 0x003D,
  1635. bcm43xx_radio_read16(bcm, 0x003D) & 0x00FF);
  1636. bcm43xx_radio_write16(bcm, 0x0081,
  1637. (bcm43xx_radio_read16(bcm, 0x0081)
  1638. & 0xFF7F) | 0x0080);
  1639. bcm43xx_radio_write16(bcm, 0x0035,
  1640. bcm43xx_radio_read16(bcm, 0x0035) & 0xFFEF);
  1641. bcm43xx_radio_write16(bcm, 0x0035,
  1642. (bcm43xx_radio_read16(bcm, 0x0035)
  1643. & 0xFFEF) | 0x0010);
  1644. bcm43xx_radio_set_tx_iq(bcm);
  1645. TODO(); //TODO: TSSI2dbm workaround
  1646. bcm43xx_phy_xmitpower(bcm);//FIXME correct?
  1647. } else {
  1648. if (synthetic_pu_workaround)
  1649. bcm43xx_synth_pu_workaround(bcm, channel);
  1650. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
  1651. channel2freq_bg(channel));
  1652. if (channel == 14) {
  1653. if (bcm->sprom.locale == BCM43xx_LOCALE_JAPAN) {
  1654. bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
  1655. BCM43xx_UCODEFLAGS_OFFSET,
  1656. bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
  1657. BCM43xx_UCODEFLAGS_OFFSET)
  1658. & ~(1 << 7));
  1659. } else {
  1660. bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
  1661. BCM43xx_UCODEFLAGS_OFFSET,
  1662. bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
  1663. BCM43xx_UCODEFLAGS_OFFSET)
  1664. | (1 << 7));
  1665. }
  1666. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
  1667. bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
  1668. | (1 << 11));
  1669. } else {
  1670. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
  1671. bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
  1672. & 0xF7BF);
  1673. }
  1674. }
  1675. radio->channel = channel;
  1676. //XXX: Using the longer of 2 timeouts (8000 vs 2000 usecs). Specs states
  1677. // that 2000 usecs might suffice.
  1678. udelay(8000);
  1679. return 0;
  1680. }
  1681. void bcm43xx_radio_set_txantenna(struct bcm43xx_private *bcm, u32 val)
  1682. {
  1683. u16 tmp;
  1684. val <<= 8;
  1685. tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0022) & 0xFCFF;
  1686. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0022, tmp | val);
  1687. tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x03A8) & 0xFCFF;
  1688. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x03A8, tmp | val);
  1689. tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0054) & 0xFCFF;
  1690. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0054, tmp | val);
  1691. }
  1692. /* http://bcm-specs.sipsolutions.net/TX_Gain_Base_Band */
  1693. static u16 bcm43xx_get_txgain_base_band(u16 txpower)
  1694. {
  1695. u16 ret;
  1696. assert(txpower <= 63);
  1697. if (txpower >= 54)
  1698. ret = 2;
  1699. else if (txpower >= 49)
  1700. ret = 4;
  1701. else if (txpower >= 44)
  1702. ret = 5;
  1703. else
  1704. ret = 6;
  1705. return ret;
  1706. }
  1707. /* http://bcm-specs.sipsolutions.net/TX_Gain_Radio_Frequency_Power_Amplifier */
  1708. static u16 bcm43xx_get_txgain_freq_power_amp(u16 txpower)
  1709. {
  1710. u16 ret;
  1711. assert(txpower <= 63);
  1712. if (txpower >= 32)
  1713. ret = 0;
  1714. else if (txpower >= 25)
  1715. ret = 1;
  1716. else if (txpower >= 20)
  1717. ret = 2;
  1718. else if (txpower >= 12)
  1719. ret = 3;
  1720. else
  1721. ret = 4;
  1722. return ret;
  1723. }
  1724. /* http://bcm-specs.sipsolutions.net/TX_Gain_Digital_Analog_Converter */
  1725. static u16 bcm43xx_get_txgain_dac(u16 txpower)
  1726. {
  1727. u16 ret;
  1728. assert(txpower <= 63);
  1729. if (txpower >= 54)
  1730. ret = txpower - 53;
  1731. else if (txpower >= 49)
  1732. ret = txpower - 42;
  1733. else if (txpower >= 44)
  1734. ret = txpower - 37;
  1735. else if (txpower >= 32)
  1736. ret = txpower - 32;
  1737. else if (txpower >= 25)
  1738. ret = txpower - 20;
  1739. else if (txpower >= 20)
  1740. ret = txpower - 13;
  1741. else if (txpower >= 12)
  1742. ret = txpower - 8;
  1743. else
  1744. ret = txpower;
  1745. return ret;
  1746. }
  1747. void bcm43xx_radio_set_txpower_a(struct bcm43xx_private *bcm, u16 txpower)
  1748. {
  1749. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1750. u16 pamp, base, dac, ilt;
  1751. txpower = limit_value(txpower, 0, 63);
  1752. pamp = bcm43xx_get_txgain_freq_power_amp(txpower);
  1753. pamp <<= 5;
  1754. pamp &= 0x00E0;
  1755. bcm43xx_phy_write(bcm, 0x0019, pamp);
  1756. base = bcm43xx_get_txgain_base_band(txpower);
  1757. base &= 0x000F;
  1758. bcm43xx_phy_write(bcm, 0x0017, base | 0x0020);
  1759. ilt = bcm43xx_ilt_read(bcm, 0x3001);
  1760. ilt &= 0x0007;
  1761. dac = bcm43xx_get_txgain_dac(txpower);
  1762. dac <<= 3;
  1763. dac |= ilt;
  1764. bcm43xx_ilt_write(bcm, 0x3001, dac);
  1765. radio->txpwr_offset = txpower;
  1766. TODO();
  1767. //TODO: FuncPlaceholder (Adjust BB loft cancel)
  1768. }
  1769. void bcm43xx_radio_set_txpower_bg(struct bcm43xx_private *bcm,
  1770. u16 baseband_attenuation, u16 radio_attenuation,
  1771. u16 txpower)
  1772. {
  1773. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1774. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1775. if (baseband_attenuation == 0xFFFF)
  1776. baseband_attenuation = radio->baseband_atten;
  1777. if (radio_attenuation == 0xFFFF)
  1778. radio_attenuation = radio->radio_atten;
  1779. if (txpower == 0xFFFF)
  1780. txpower = radio->txctl1;
  1781. radio->baseband_atten = baseband_attenuation;
  1782. radio->radio_atten = radio_attenuation;
  1783. radio->txctl1 = txpower;
  1784. assert(/*baseband_attenuation >= 0 &&*/ baseband_attenuation <= 11);
  1785. if (radio->revision < 6)
  1786. assert(/*radio_attenuation >= 0 &&*/ radio_attenuation <= 9);
  1787. else
  1788. assert(/* radio_attenuation >= 0 &&*/ radio_attenuation <= 31);
  1789. assert(/*txpower >= 0 &&*/ txpower <= 7);
  1790. bcm43xx_phy_set_baseband_attenuation(bcm, baseband_attenuation);
  1791. bcm43xx_radio_write16(bcm, 0x0043, radio_attenuation);
  1792. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0064, radio_attenuation);
  1793. if (radio->version == 0x2050) {
  1794. bcm43xx_radio_write16(bcm, 0x0052,
  1795. (bcm43xx_radio_read16(bcm, 0x0052) & ~0x0070)
  1796. | ((txpower << 4) & 0x0070));
  1797. }
  1798. //FIXME: The spec is very weird and unclear here.
  1799. if (phy->type == BCM43xx_PHYTYPE_G)
  1800. bcm43xx_phy_lo_adjust(bcm, 0);
  1801. }
  1802. u16 bcm43xx_default_baseband_attenuation(struct bcm43xx_private *bcm)
  1803. {
  1804. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1805. if (radio->version == 0x2050 && radio->revision < 6)
  1806. return 0;
  1807. return 2;
  1808. }
  1809. u16 bcm43xx_default_radio_attenuation(struct bcm43xx_private *bcm)
  1810. {
  1811. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1812. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1813. u16 att = 0xFFFF;
  1814. if (phy->type == BCM43xx_PHYTYPE_A)
  1815. return 0x60;
  1816. switch (radio->version) {
  1817. case 0x2053:
  1818. switch (radio->revision) {
  1819. case 1:
  1820. att = 6;
  1821. break;
  1822. }
  1823. break;
  1824. case 0x2050:
  1825. switch (radio->revision) {
  1826. case 0:
  1827. att = 5;
  1828. break;
  1829. case 1:
  1830. if (phy->type == BCM43xx_PHYTYPE_G) {
  1831. if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
  1832. bcm->board_type == 0x421 &&
  1833. bcm->board_revision >= 30)
  1834. att = 3;
  1835. else if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
  1836. bcm->board_type == 0x416)
  1837. att = 3;
  1838. else
  1839. att = 1;
  1840. } else {
  1841. if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
  1842. bcm->board_type == 0x421 &&
  1843. bcm->board_revision >= 30)
  1844. att = 7;
  1845. else
  1846. att = 6;
  1847. }
  1848. break;
  1849. case 2:
  1850. if (phy->type == BCM43xx_PHYTYPE_G) {
  1851. if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
  1852. bcm->board_type == 0x421 &&
  1853. bcm->board_revision >= 30)
  1854. att = 3;
  1855. else if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
  1856. bcm->board_type == 0x416)
  1857. att = 5;
  1858. else if (bcm->chip_id == 0x4320)
  1859. att = 4;
  1860. else
  1861. att = 3;
  1862. } else
  1863. att = 6;
  1864. break;
  1865. case 3:
  1866. att = 5;
  1867. break;
  1868. case 4:
  1869. case 5:
  1870. att = 1;
  1871. break;
  1872. case 6:
  1873. case 7:
  1874. att = 5;
  1875. break;
  1876. case 8:
  1877. att = 0x1A;
  1878. break;
  1879. case 9:
  1880. default:
  1881. att = 5;
  1882. }
  1883. }
  1884. if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
  1885. bcm->board_type == 0x421) {
  1886. if (bcm->board_revision < 0x43)
  1887. att = 2;
  1888. else if (bcm->board_revision < 0x51)
  1889. att = 3;
  1890. }
  1891. if (att == 0xFFFF)
  1892. att = 5;
  1893. return att;
  1894. }
  1895. u16 bcm43xx_default_txctl1(struct bcm43xx_private *bcm)
  1896. {
  1897. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1898. if (radio->version != 0x2050)
  1899. return 0;
  1900. if (radio->revision == 1)
  1901. return 3;
  1902. if (radio->revision < 6)
  1903. return 2;
  1904. if (radio->revision == 8)
  1905. return 1;
  1906. return 0;
  1907. }
  1908. void bcm43xx_radio_turn_on(struct bcm43xx_private *bcm)
  1909. {
  1910. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1911. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1912. int err;
  1913. if (radio->enabled)
  1914. return;
  1915. switch (phy->type) {
  1916. case BCM43xx_PHYTYPE_A:
  1917. bcm43xx_radio_write16(bcm, 0x0004, 0x00C0);
  1918. bcm43xx_radio_write16(bcm, 0x0005, 0x0008);
  1919. bcm43xx_phy_write(bcm, 0x0010, bcm43xx_phy_read(bcm, 0x0010) & 0xFFF7);
  1920. bcm43xx_phy_write(bcm, 0x0011, bcm43xx_phy_read(bcm, 0x0011) & 0xFFF7);
  1921. bcm43xx_radio_init2060(bcm);
  1922. break;
  1923. case BCM43xx_PHYTYPE_B:
  1924. case BCM43xx_PHYTYPE_G:
  1925. bcm43xx_phy_write(bcm, 0x0015, 0x8000);
  1926. bcm43xx_phy_write(bcm, 0x0015, 0xCC00);
  1927. bcm43xx_phy_write(bcm, 0x0015, (phy->connected ? 0x00C0 : 0x0000));
  1928. err = bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 1);
  1929. assert(err == 0);
  1930. break;
  1931. default:
  1932. assert(0);
  1933. }
  1934. radio->enabled = 1;
  1935. dprintk(KERN_INFO PFX "Radio turned on\n");
  1936. bcm43xx_leds_update(bcm, 0);
  1937. }
  1938. void bcm43xx_radio_turn_off(struct bcm43xx_private *bcm)
  1939. {
  1940. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1941. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1942. if (phy->type == BCM43xx_PHYTYPE_A) {
  1943. bcm43xx_radio_write16(bcm, 0x0004, 0x00FF);
  1944. bcm43xx_radio_write16(bcm, 0x0005, 0x00FB);
  1945. bcm43xx_phy_write(bcm, 0x0010, bcm43xx_phy_read(bcm, 0x0010) | 0x0008);
  1946. bcm43xx_phy_write(bcm, 0x0011, bcm43xx_phy_read(bcm, 0x0011) | 0x0008);
  1947. }
  1948. if (phy->type == BCM43xx_PHYTYPE_G && bcm->current_core->rev >= 5) {
  1949. bcm43xx_phy_write(bcm, 0x0811, bcm43xx_phy_read(bcm, 0x0811) | 0x008C);
  1950. bcm43xx_phy_write(bcm, 0x0812, bcm43xx_phy_read(bcm, 0x0812) & 0xFF73);
  1951. } else
  1952. bcm43xx_phy_write(bcm, 0x0015, 0xAA00);
  1953. radio->enabled = 0;
  1954. dprintk(KERN_INFO PFX "Radio turned off\n");
  1955. bcm43xx_leds_update(bcm, 0);
  1956. }
  1957. void bcm43xx_radio_clear_tssi(struct bcm43xx_private *bcm)
  1958. {
  1959. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1960. switch (phy->type) {
  1961. case BCM43xx_PHYTYPE_A:
  1962. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0068, 0x7F7F);
  1963. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x006a, 0x7F7F);
  1964. break;
  1965. case BCM43xx_PHYTYPE_B:
  1966. case BCM43xx_PHYTYPE_G:
  1967. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0058, 0x7F7F);
  1968. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x005a, 0x7F7F);
  1969. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0070, 0x7F7F);
  1970. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0072, 0x7F7F);
  1971. break;
  1972. }
  1973. }