tsi108_eth.c 46 KB

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  1. /*******************************************************************************
  2. Copyright(c) 2006 Tundra Semiconductor Corporation.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. *******************************************************************************/
  15. /* This driver is based on the driver code originally developed
  16. * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
  17. * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation
  18. *
  19. * Currently changes from original version are:
  20. * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
  21. * - modifications to handle two ports independently and support for
  22. * additional PHY devices (alexandre.bounine@tundra.com)
  23. * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
  24. *
  25. */
  26. #include <linux/module.h>
  27. #include <linux/types.h>
  28. #include <linux/init.h>
  29. #include <linux/net.h>
  30. #include <linux/netdevice.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/skbuff.h>
  33. #include <linux/slab.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/delay.h>
  36. #include <linux/crc32.h>
  37. #include <linux/mii.h>
  38. #include <linux/device.h>
  39. #include <linux/pci.h>
  40. #include <linux/rtnetlink.h>
  41. #include <linux/timer.h>
  42. #include <linux/platform_device.h>
  43. #include <linux/etherdevice.h>
  44. #include <asm/system.h>
  45. #include <asm/io.h>
  46. #include <asm/tsi108.h>
  47. #include "tsi108_eth.h"
  48. #define MII_READ_DELAY 10000 /* max link wait time in msec */
  49. #define TSI108_RXRING_LEN 256
  50. /* NOTE: The driver currently does not support receiving packets
  51. * larger than the buffer size, so don't decrease this (unless you
  52. * want to add such support).
  53. */
  54. #define TSI108_RXBUF_SIZE 1536
  55. #define TSI108_TXRING_LEN 256
  56. #define TSI108_TX_INT_FREQ 64
  57. /* Check the phy status every half a second. */
  58. #define CHECK_PHY_INTERVAL (HZ/2)
  59. static int tsi108_init_one(struct platform_device *pdev);
  60. static int tsi108_ether_remove(struct platform_device *pdev);
  61. struct tsi108_prv_data {
  62. void __iomem *regs; /* Base of normal regs */
  63. void __iomem *phyregs; /* Base of register bank used for PHY access */
  64. unsigned int phy; /* Index of PHY for this interface */
  65. unsigned int irq_num;
  66. unsigned int id;
  67. unsigned int phy_type;
  68. struct timer_list timer;/* Timer that triggers the check phy function */
  69. unsigned int rxtail; /* Next entry in rxring to read */
  70. unsigned int rxhead; /* Next entry in rxring to give a new buffer */
  71. unsigned int rxfree; /* Number of free, allocated RX buffers */
  72. unsigned int rxpending; /* Non-zero if there are still descriptors
  73. * to be processed from a previous descriptor
  74. * interrupt condition that has been cleared */
  75. unsigned int txtail; /* Next TX descriptor to check status on */
  76. unsigned int txhead; /* Next TX descriptor to use */
  77. /* Number of free TX descriptors. This could be calculated from
  78. * rxhead and rxtail if one descriptor were left unused to disambiguate
  79. * full and empty conditions, but it's simpler to just keep track
  80. * explicitly. */
  81. unsigned int txfree;
  82. unsigned int phy_ok; /* The PHY is currently powered on. */
  83. /* PHY status (duplex is 1 for half, 2 for full,
  84. * so that the default 0 indicates that neither has
  85. * yet been configured). */
  86. unsigned int link_up;
  87. unsigned int speed;
  88. unsigned int duplex;
  89. tx_desc *txring;
  90. rx_desc *rxring;
  91. struct sk_buff *txskbs[TSI108_TXRING_LEN];
  92. struct sk_buff *rxskbs[TSI108_RXRING_LEN];
  93. dma_addr_t txdma, rxdma;
  94. /* txlock nests in misclock and phy_lock */
  95. spinlock_t txlock, misclock;
  96. /* stats is used to hold the upper bits of each hardware counter,
  97. * and tmpstats is used to hold the full values for returning
  98. * to the caller of get_stats(). They must be separate in case
  99. * an overflow interrupt occurs before the stats are consumed.
  100. */
  101. struct net_device_stats stats;
  102. struct net_device_stats tmpstats;
  103. /* These stats are kept separate in hardware, thus require individual
  104. * fields for handling carry. They are combined in get_stats.
  105. */
  106. unsigned long rx_fcs; /* Add to rx_frame_errors */
  107. unsigned long rx_short_fcs; /* Add to rx_frame_errors */
  108. unsigned long rx_long_fcs; /* Add to rx_frame_errors */
  109. unsigned long rx_underruns; /* Add to rx_length_errors */
  110. unsigned long rx_overruns; /* Add to rx_length_errors */
  111. unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */
  112. unsigned long tx_pause_drop; /* Add to tx_aborted_errors */
  113. unsigned long mc_hash[16];
  114. u32 msg_enable; /* debug message level */
  115. struct mii_if_info mii_if;
  116. unsigned int init_media;
  117. };
  118. /* Structure for a device driver */
  119. static struct platform_driver tsi_eth_driver = {
  120. .probe = tsi108_init_one,
  121. .remove = tsi108_ether_remove,
  122. .driver = {
  123. .name = "tsi-ethernet",
  124. },
  125. };
  126. static void tsi108_timed_checker(unsigned long dev_ptr);
  127. static void dump_eth_one(struct net_device *dev)
  128. {
  129. struct tsi108_prv_data *data = netdev_priv(dev);
  130. printk("Dumping %s...\n", dev->name);
  131. printk("intstat %x intmask %x phy_ok %d"
  132. " link %d speed %d duplex %d\n",
  133. TSI_READ(TSI108_EC_INTSTAT),
  134. TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
  135. data->link_up, data->speed, data->duplex);
  136. printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
  137. data->txhead, data->txtail, data->txfree,
  138. TSI_READ(TSI108_EC_TXSTAT),
  139. TSI_READ(TSI108_EC_TXESTAT),
  140. TSI_READ(TSI108_EC_TXERR));
  141. printk("RX: head %d, tail %d, free %d, stat %x,"
  142. " estat %x, err %x, pending %d\n\n",
  143. data->rxhead, data->rxtail, data->rxfree,
  144. TSI_READ(TSI108_EC_RXSTAT),
  145. TSI_READ(TSI108_EC_RXESTAT),
  146. TSI_READ(TSI108_EC_RXERR), data->rxpending);
  147. }
  148. /* Synchronization is needed between the thread and up/down events.
  149. * Note that the PHY is accessed through the same registers for both
  150. * interfaces, so this can't be made interface-specific.
  151. */
  152. static DEFINE_SPINLOCK(phy_lock);
  153. static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
  154. {
  155. unsigned i;
  156. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  157. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  158. (reg << TSI108_MAC_MII_ADDR_REG));
  159. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
  160. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
  161. for (i = 0; i < 100; i++) {
  162. if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  163. (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
  164. break;
  165. udelay(10);
  166. }
  167. if (i == 100)
  168. return 0xffff;
  169. else
  170. return (TSI_READ_PHY(TSI108_MAC_MII_DATAIN));
  171. }
  172. static void tsi108_write_mii(struct tsi108_prv_data *data,
  173. int reg, u16 val)
  174. {
  175. unsigned i = 100;
  176. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  177. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  178. (reg << TSI108_MAC_MII_ADDR_REG));
  179. TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
  180. while (i--) {
  181. if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  182. TSI108_MAC_MII_IND_BUSY))
  183. break;
  184. udelay(10);
  185. }
  186. }
  187. static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
  188. {
  189. struct tsi108_prv_data *data = netdev_priv(dev);
  190. return tsi108_read_mii(data, reg);
  191. }
  192. static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
  193. {
  194. struct tsi108_prv_data *data = netdev_priv(dev);
  195. tsi108_write_mii(data, reg, val);
  196. }
  197. static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
  198. int reg, u16 val)
  199. {
  200. unsigned i = 1000;
  201. TSI_WRITE(TSI108_MAC_MII_ADDR,
  202. (0x1e << TSI108_MAC_MII_ADDR_PHY)
  203. | (reg << TSI108_MAC_MII_ADDR_REG));
  204. TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
  205. while(i--) {
  206. if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
  207. return;
  208. udelay(10);
  209. }
  210. printk(KERN_ERR "%s function time out \n", __FUNCTION__);
  211. }
  212. static int mii_speed(struct mii_if_info *mii)
  213. {
  214. int advert, lpa, val, media;
  215. int lpa2 = 0;
  216. int speed;
  217. if (!mii_link_ok(mii))
  218. return 0;
  219. val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
  220. if ((val & BMSR_ANEGCOMPLETE) == 0)
  221. return 0;
  222. advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
  223. lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
  224. media = mii_nway_result(advert & lpa);
  225. if (mii->supports_gmii)
  226. lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
  227. speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
  228. (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
  229. return speed;
  230. }
  231. static void tsi108_check_phy(struct net_device *dev)
  232. {
  233. struct tsi108_prv_data *data = netdev_priv(dev);
  234. u32 mac_cfg2_reg, portctrl_reg;
  235. u32 duplex;
  236. u32 speed;
  237. unsigned long flags;
  238. /* Do a dummy read, as for some reason the first read
  239. * after a link becomes up returns link down, even if
  240. * it's been a while since the link came up.
  241. */
  242. spin_lock_irqsave(&phy_lock, flags);
  243. if (!data->phy_ok)
  244. goto out;
  245. tsi108_read_mii(data, MII_BMSR);
  246. duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
  247. data->init_media = 0;
  248. if (netif_carrier_ok(dev)) {
  249. speed = mii_speed(&data->mii_if);
  250. if ((speed != data->speed) || duplex) {
  251. mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
  252. portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
  253. mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
  254. if (speed == 1000) {
  255. mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
  256. portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
  257. } else {
  258. mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
  259. portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
  260. }
  261. data->speed = speed;
  262. if (data->mii_if.full_duplex) {
  263. mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
  264. portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
  265. data->duplex = 2;
  266. } else {
  267. mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
  268. portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
  269. data->duplex = 1;
  270. }
  271. TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
  272. TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
  273. if (data->link_up == 0) {
  274. /* The manual says it can take 3-4 usecs for the speed change
  275. * to take effect.
  276. */
  277. udelay(5);
  278. spin_lock(&data->txlock);
  279. if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
  280. netif_wake_queue(dev);
  281. data->link_up = 1;
  282. spin_unlock(&data->txlock);
  283. }
  284. }
  285. } else {
  286. if (data->link_up == 1) {
  287. netif_stop_queue(dev);
  288. data->link_up = 0;
  289. printk(KERN_NOTICE "%s : link is down\n", dev->name);
  290. }
  291. goto out;
  292. }
  293. out:
  294. spin_unlock_irqrestore(&phy_lock, flags);
  295. }
  296. static inline void
  297. tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
  298. unsigned long *upper)
  299. {
  300. if (carry & carry_bit)
  301. *upper += carry_shift;
  302. }
  303. static void tsi108_stat_carry(struct net_device *dev)
  304. {
  305. struct tsi108_prv_data *data = netdev_priv(dev);
  306. u32 carry1, carry2;
  307. spin_lock_irq(&data->misclock);
  308. carry1 = TSI_READ(TSI108_STAT_CARRY1);
  309. carry2 = TSI_READ(TSI108_STAT_CARRY2);
  310. TSI_WRITE(TSI108_STAT_CARRY1, carry1);
  311. TSI_WRITE(TSI108_STAT_CARRY2, carry2);
  312. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
  313. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  314. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
  315. TSI108_STAT_RXPKTS_CARRY,
  316. &data->stats.rx_packets);
  317. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
  318. TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
  319. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
  320. TSI108_STAT_RXMCAST_CARRY,
  321. &data->stats.multicast);
  322. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
  323. TSI108_STAT_RXALIGN_CARRY,
  324. &data->stats.rx_frame_errors);
  325. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
  326. TSI108_STAT_RXLENGTH_CARRY,
  327. &data->stats.rx_length_errors);
  328. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
  329. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  330. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
  331. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  332. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
  333. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  334. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
  335. TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
  336. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
  337. TSI108_STAT_RXDROP_CARRY,
  338. &data->stats.rx_missed_errors);
  339. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
  340. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  341. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
  342. TSI108_STAT_TXPKTS_CARRY,
  343. &data->stats.tx_packets);
  344. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
  345. TSI108_STAT_TXEXDEF_CARRY,
  346. &data->stats.tx_aborted_errors);
  347. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
  348. TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
  349. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
  350. TSI108_STAT_TXTCOL_CARRY,
  351. &data->stats.collisions);
  352. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
  353. TSI108_STAT_TXPAUSEDROP_CARRY,
  354. &data->tx_pause_drop);
  355. spin_unlock_irq(&data->misclock);
  356. }
  357. /* Read a stat counter atomically with respect to carries.
  358. * data->misclock must be held.
  359. */
  360. static inline unsigned long
  361. tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
  362. int carry_shift, unsigned long *upper)
  363. {
  364. int carryreg;
  365. unsigned long val;
  366. if (reg < 0xb0)
  367. carryreg = TSI108_STAT_CARRY1;
  368. else
  369. carryreg = TSI108_STAT_CARRY2;
  370. again:
  371. val = TSI_READ(reg) | *upper;
  372. /* Check to see if it overflowed, but the interrupt hasn't
  373. * been serviced yet. If so, handle the carry here, and
  374. * try again.
  375. */
  376. if (unlikely(TSI_READ(carryreg) & carry_bit)) {
  377. *upper += carry_shift;
  378. TSI_WRITE(carryreg, carry_bit);
  379. goto again;
  380. }
  381. return val;
  382. }
  383. static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
  384. {
  385. unsigned long excol;
  386. struct tsi108_prv_data *data = netdev_priv(dev);
  387. spin_lock_irq(&data->misclock);
  388. data->tmpstats.rx_packets =
  389. tsi108_read_stat(data, TSI108_STAT_RXPKTS,
  390. TSI108_STAT_CARRY1_RXPKTS,
  391. TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
  392. data->tmpstats.tx_packets =
  393. tsi108_read_stat(data, TSI108_STAT_TXPKTS,
  394. TSI108_STAT_CARRY2_TXPKTS,
  395. TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
  396. data->tmpstats.rx_bytes =
  397. tsi108_read_stat(data, TSI108_STAT_RXBYTES,
  398. TSI108_STAT_CARRY1_RXBYTES,
  399. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  400. data->tmpstats.tx_bytes =
  401. tsi108_read_stat(data, TSI108_STAT_TXBYTES,
  402. TSI108_STAT_CARRY2_TXBYTES,
  403. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  404. data->tmpstats.multicast =
  405. tsi108_read_stat(data, TSI108_STAT_RXMCAST,
  406. TSI108_STAT_CARRY1_RXMCAST,
  407. TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
  408. excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
  409. TSI108_STAT_CARRY2_TXEXCOL,
  410. TSI108_STAT_TXEXCOL_CARRY,
  411. &data->tx_coll_abort);
  412. data->tmpstats.collisions =
  413. tsi108_read_stat(data, TSI108_STAT_TXTCOL,
  414. TSI108_STAT_CARRY2_TXTCOL,
  415. TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
  416. data->tmpstats.collisions += excol;
  417. data->tmpstats.rx_length_errors =
  418. tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
  419. TSI108_STAT_CARRY1_RXLENGTH,
  420. TSI108_STAT_RXLENGTH_CARRY,
  421. &data->stats.rx_length_errors);
  422. data->tmpstats.rx_length_errors +=
  423. tsi108_read_stat(data, TSI108_STAT_RXRUNT,
  424. TSI108_STAT_CARRY1_RXRUNT,
  425. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  426. data->tmpstats.rx_length_errors +=
  427. tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
  428. TSI108_STAT_CARRY1_RXJUMBO,
  429. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  430. data->tmpstats.rx_frame_errors =
  431. tsi108_read_stat(data, TSI108_STAT_RXALIGN,
  432. TSI108_STAT_CARRY1_RXALIGN,
  433. TSI108_STAT_RXALIGN_CARRY,
  434. &data->stats.rx_frame_errors);
  435. data->tmpstats.rx_frame_errors +=
  436. tsi108_read_stat(data, TSI108_STAT_RXFCS,
  437. TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
  438. &data->rx_fcs);
  439. data->tmpstats.rx_frame_errors +=
  440. tsi108_read_stat(data, TSI108_STAT_RXFRAG,
  441. TSI108_STAT_CARRY1_RXFRAG,
  442. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  443. data->tmpstats.rx_missed_errors =
  444. tsi108_read_stat(data, TSI108_STAT_RXDROP,
  445. TSI108_STAT_CARRY1_RXDROP,
  446. TSI108_STAT_RXDROP_CARRY,
  447. &data->stats.rx_missed_errors);
  448. /* These three are maintained by software. */
  449. data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
  450. data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
  451. data->tmpstats.tx_aborted_errors =
  452. tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
  453. TSI108_STAT_CARRY2_TXEXDEF,
  454. TSI108_STAT_TXEXDEF_CARRY,
  455. &data->stats.tx_aborted_errors);
  456. data->tmpstats.tx_aborted_errors +=
  457. tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
  458. TSI108_STAT_CARRY2_TXPAUSE,
  459. TSI108_STAT_TXPAUSEDROP_CARRY,
  460. &data->tx_pause_drop);
  461. data->tmpstats.tx_aborted_errors += excol;
  462. data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
  463. data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
  464. data->tmpstats.rx_crc_errors +
  465. data->tmpstats.rx_frame_errors +
  466. data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
  467. spin_unlock_irq(&data->misclock);
  468. return &data->tmpstats;
  469. }
  470. static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
  471. {
  472. TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
  473. TSI108_EC_RXQ_PTRHIGH_VALID);
  474. TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
  475. | TSI108_EC_RXCTRL_QUEUE0);
  476. }
  477. static void tsi108_restart_tx(struct tsi108_prv_data * data)
  478. {
  479. TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
  480. TSI108_EC_TXQ_PTRHIGH_VALID);
  481. TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
  482. TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
  483. }
  484. /* txlock must be held by caller, with IRQs disabled, and
  485. * with permission to re-enable them when the lock is dropped.
  486. */
  487. static void tsi108_complete_tx(struct net_device *dev)
  488. {
  489. struct tsi108_prv_data *data = netdev_priv(dev);
  490. int tx;
  491. struct sk_buff *skb;
  492. int release = 0;
  493. while (!data->txfree || data->txhead != data->txtail) {
  494. tx = data->txtail;
  495. if (data->txring[tx].misc & TSI108_TX_OWN)
  496. break;
  497. skb = data->txskbs[tx];
  498. if (!(data->txring[tx].misc & TSI108_TX_OK))
  499. printk("%s: bad tx packet, misc %x\n",
  500. dev->name, data->txring[tx].misc);
  501. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  502. data->txfree++;
  503. if (data->txring[tx].misc & TSI108_TX_EOF) {
  504. dev_kfree_skb_any(skb);
  505. release++;
  506. }
  507. }
  508. if (release) {
  509. if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
  510. netif_wake_queue(dev);
  511. }
  512. }
  513. static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
  514. {
  515. struct tsi108_prv_data *data = netdev_priv(dev);
  516. int frags = skb_shinfo(skb)->nr_frags + 1;
  517. int i;
  518. if (!data->phy_ok && net_ratelimit())
  519. printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
  520. if (!data->link_up) {
  521. printk(KERN_ERR "%s: Transmit while link is down!\n",
  522. dev->name);
  523. netif_stop_queue(dev);
  524. return NETDEV_TX_BUSY;
  525. }
  526. if (data->txfree < MAX_SKB_FRAGS + 1) {
  527. netif_stop_queue(dev);
  528. if (net_ratelimit())
  529. printk(KERN_ERR "%s: Transmit with full tx ring!\n",
  530. dev->name);
  531. return NETDEV_TX_BUSY;
  532. }
  533. if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
  534. netif_stop_queue(dev);
  535. }
  536. spin_lock_irq(&data->txlock);
  537. for (i = 0; i < frags; i++) {
  538. int misc = 0;
  539. int tx = data->txhead;
  540. /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
  541. * the interrupt bit. TX descriptor-complete interrupts are
  542. * enabled when the queue fills up, and masked when there is
  543. * still free space. This way, when saturating the outbound
  544. * link, the tx interrupts are kept to a reasonable level.
  545. * When the queue is not full, reclamation of skbs still occurs
  546. * as new packets are transmitted, or on a queue-empty
  547. * interrupt.
  548. */
  549. if ((tx % TSI108_TX_INT_FREQ == 0) &&
  550. ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
  551. misc = TSI108_TX_INT;
  552. data->txskbs[tx] = skb;
  553. if (i == 0) {
  554. data->txring[tx].buf0 = dma_map_single(NULL, skb->data,
  555. skb->len - skb->data_len, DMA_TO_DEVICE);
  556. data->txring[tx].len = skb->len - skb->data_len;
  557. misc |= TSI108_TX_SOF;
  558. } else {
  559. skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
  560. data->txring[tx].buf0 =
  561. dma_map_page(NULL, frag->page, frag->page_offset,
  562. frag->size, DMA_TO_DEVICE);
  563. data->txring[tx].len = frag->size;
  564. }
  565. if (i == frags - 1)
  566. misc |= TSI108_TX_EOF;
  567. if (netif_msg_pktdata(data)) {
  568. int i;
  569. printk("%s: Tx Frame contents (%d)\n", dev->name,
  570. skb->len);
  571. for (i = 0; i < skb->len; i++)
  572. printk(" %2.2x", skb->data[i]);
  573. printk(".\n");
  574. }
  575. data->txring[tx].misc = misc | TSI108_TX_OWN;
  576. data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
  577. data->txfree--;
  578. }
  579. tsi108_complete_tx(dev);
  580. /* This must be done after the check for completed tx descriptors,
  581. * so that the tail pointer is correct.
  582. */
  583. if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
  584. tsi108_restart_tx(data);
  585. spin_unlock_irq(&data->txlock);
  586. return NETDEV_TX_OK;
  587. }
  588. static int tsi108_complete_rx(struct net_device *dev, int budget)
  589. {
  590. struct tsi108_prv_data *data = netdev_priv(dev);
  591. int done = 0;
  592. while (data->rxfree && done != budget) {
  593. int rx = data->rxtail;
  594. struct sk_buff *skb;
  595. if (data->rxring[rx].misc & TSI108_RX_OWN)
  596. break;
  597. skb = data->rxskbs[rx];
  598. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  599. data->rxfree--;
  600. done++;
  601. if (data->rxring[rx].misc & TSI108_RX_BAD) {
  602. spin_lock_irq(&data->misclock);
  603. if (data->rxring[rx].misc & TSI108_RX_CRC)
  604. data->stats.rx_crc_errors++;
  605. if (data->rxring[rx].misc & TSI108_RX_OVER)
  606. data->stats.rx_fifo_errors++;
  607. spin_unlock_irq(&data->misclock);
  608. dev_kfree_skb_any(skb);
  609. continue;
  610. }
  611. if (netif_msg_pktdata(data)) {
  612. int i;
  613. printk("%s: Rx Frame contents (%d)\n",
  614. dev->name, data->rxring[rx].len);
  615. for (i = 0; i < data->rxring[rx].len; i++)
  616. printk(" %2.2x", skb->data[i]);
  617. printk(".\n");
  618. }
  619. skb_put(skb, data->rxring[rx].len);
  620. skb->protocol = eth_type_trans(skb, dev);
  621. netif_receive_skb(skb);
  622. dev->last_rx = jiffies;
  623. }
  624. return done;
  625. }
  626. static int tsi108_refill_rx(struct net_device *dev, int budget)
  627. {
  628. struct tsi108_prv_data *data = netdev_priv(dev);
  629. int done = 0;
  630. while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
  631. int rx = data->rxhead;
  632. struct sk_buff *skb;
  633. data->rxskbs[rx] = skb = dev_alloc_skb(TSI108_RXBUF_SIZE + 2);
  634. if (!skb)
  635. break;
  636. skb_reserve(skb, 2); /* Align the data on a 4-byte boundary. */
  637. data->rxring[rx].buf0 = dma_map_single(NULL, skb->data,
  638. TSI108_RX_SKB_SIZE,
  639. DMA_FROM_DEVICE);
  640. /* Sometimes the hardware sets blen to zero after packet
  641. * reception, even though the manual says that it's only ever
  642. * modified by the driver.
  643. */
  644. data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
  645. data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
  646. data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
  647. data->rxfree++;
  648. done++;
  649. }
  650. if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
  651. TSI108_EC_RXSTAT_QUEUE0))
  652. tsi108_restart_rx(data, dev);
  653. return done;
  654. }
  655. static int tsi108_poll(struct net_device *dev, int *budget)
  656. {
  657. struct tsi108_prv_data *data = netdev_priv(dev);
  658. u32 estat = TSI_READ(TSI108_EC_RXESTAT);
  659. u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
  660. int total_budget = min(*budget, dev->quota);
  661. int num_received = 0, num_filled = 0, budget_used;
  662. intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  663. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
  664. TSI_WRITE(TSI108_EC_RXESTAT, estat);
  665. TSI_WRITE(TSI108_EC_INTSTAT, intstat);
  666. if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
  667. num_received = tsi108_complete_rx(dev, total_budget);
  668. /* This should normally fill no more slots than the number of
  669. * packets received in tsi108_complete_rx(). The exception
  670. * is when we previously ran out of memory for RX SKBs. In that
  671. * case, it's helpful to obey the budget, not only so that the
  672. * CPU isn't hogged, but so that memory (which may still be low)
  673. * is not hogged by one device.
  674. *
  675. * A work unit is considered to be two SKBs to allow us to catch
  676. * up when the ring has shrunk due to out-of-memory but we're
  677. * still removing the full budget's worth of packets each time.
  678. */
  679. if (data->rxfree < TSI108_RXRING_LEN)
  680. num_filled = tsi108_refill_rx(dev, total_budget * 2);
  681. if (intstat & TSI108_INT_RXERROR) {
  682. u32 err = TSI_READ(TSI108_EC_RXERR);
  683. TSI_WRITE(TSI108_EC_RXERR, err);
  684. if (err) {
  685. if (net_ratelimit())
  686. printk(KERN_DEBUG "%s: RX error %x\n",
  687. dev->name, err);
  688. if (!(TSI_READ(TSI108_EC_RXSTAT) &
  689. TSI108_EC_RXSTAT_QUEUE0))
  690. tsi108_restart_rx(data, dev);
  691. }
  692. }
  693. if (intstat & TSI108_INT_RXOVERRUN) {
  694. spin_lock_irq(&data->misclock);
  695. data->stats.rx_fifo_errors++;
  696. spin_unlock_irq(&data->misclock);
  697. }
  698. budget_used = max(num_received, num_filled / 2);
  699. *budget -= budget_used;
  700. dev->quota -= budget_used;
  701. if (budget_used != total_budget) {
  702. data->rxpending = 0;
  703. netif_rx_complete(dev);
  704. TSI_WRITE(TSI108_EC_INTMASK,
  705. TSI_READ(TSI108_EC_INTMASK)
  706. & ~(TSI108_INT_RXQUEUE0
  707. | TSI108_INT_RXTHRESH |
  708. TSI108_INT_RXOVERRUN |
  709. TSI108_INT_RXERROR |
  710. TSI108_INT_RXWAIT));
  711. /* IRQs are level-triggered, so no need to re-check */
  712. return 0;
  713. } else {
  714. data->rxpending = 1;
  715. }
  716. return 1;
  717. }
  718. static void tsi108_rx_int(struct net_device *dev)
  719. {
  720. struct tsi108_prv_data *data = netdev_priv(dev);
  721. /* A race could cause dev to already be scheduled, so it's not an
  722. * error if that happens (and interrupts shouldn't be re-masked,
  723. * because that can cause harmful races, if poll has already
  724. * unmasked them but not cleared LINK_STATE_SCHED).
  725. *
  726. * This can happen if this code races with tsi108_poll(), which masks
  727. * the interrupts after tsi108_irq_one() read the mask, but before
  728. * netif_rx_schedule is called. It could also happen due to calls
  729. * from tsi108_check_rxring().
  730. */
  731. if (netif_rx_schedule_prep(dev)) {
  732. /* Mask, rather than ack, the receive interrupts. The ack
  733. * will happen in tsi108_poll().
  734. */
  735. TSI_WRITE(TSI108_EC_INTMASK,
  736. TSI_READ(TSI108_EC_INTMASK) |
  737. TSI108_INT_RXQUEUE0
  738. | TSI108_INT_RXTHRESH |
  739. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
  740. TSI108_INT_RXWAIT);
  741. __netif_rx_schedule(dev);
  742. } else {
  743. if (!netif_running(dev)) {
  744. /* This can happen if an interrupt occurs while the
  745. * interface is being brought down, as the START
  746. * bit is cleared before the stop function is called.
  747. *
  748. * In this case, the interrupts must be masked, or
  749. * they will continue indefinitely.
  750. *
  751. * There's a race here if the interface is brought down
  752. * and then up in rapid succession, as the device could
  753. * be made running after the above check and before
  754. * the masking below. This will only happen if the IRQ
  755. * thread has a lower priority than the task brining
  756. * up the interface. Fixing this race would likely
  757. * require changes in generic code.
  758. */
  759. TSI_WRITE(TSI108_EC_INTMASK,
  760. TSI_READ
  761. (TSI108_EC_INTMASK) |
  762. TSI108_INT_RXQUEUE0 |
  763. TSI108_INT_RXTHRESH |
  764. TSI108_INT_RXOVERRUN |
  765. TSI108_INT_RXERROR |
  766. TSI108_INT_RXWAIT);
  767. }
  768. }
  769. }
  770. /* If the RX ring has run out of memory, try periodically
  771. * to allocate some more, as otherwise poll would never
  772. * get called (apart from the initial end-of-queue condition).
  773. *
  774. * This is called once per second (by default) from the thread.
  775. */
  776. static void tsi108_check_rxring(struct net_device *dev)
  777. {
  778. struct tsi108_prv_data *data = netdev_priv(dev);
  779. /* A poll is scheduled, as opposed to caling tsi108_refill_rx
  780. * directly, so as to keep the receive path single-threaded
  781. * (and thus not needing a lock).
  782. */
  783. if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
  784. tsi108_rx_int(dev);
  785. }
  786. static void tsi108_tx_int(struct net_device *dev)
  787. {
  788. struct tsi108_prv_data *data = netdev_priv(dev);
  789. u32 estat = TSI_READ(TSI108_EC_TXESTAT);
  790. TSI_WRITE(TSI108_EC_TXESTAT, estat);
  791. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
  792. TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
  793. if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
  794. u32 err = TSI_READ(TSI108_EC_TXERR);
  795. TSI_WRITE(TSI108_EC_TXERR, err);
  796. if (err && net_ratelimit())
  797. printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
  798. }
  799. if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
  800. spin_lock(&data->txlock);
  801. tsi108_complete_tx(dev);
  802. spin_unlock(&data->txlock);
  803. }
  804. }
  805. static irqreturn_t tsi108_irq(int irq, void *dev_id)
  806. {
  807. struct net_device *dev = dev_id;
  808. struct tsi108_prv_data *data = netdev_priv(dev);
  809. u32 stat = TSI_READ(TSI108_EC_INTSTAT);
  810. if (!(stat & TSI108_INT_ANY))
  811. return IRQ_NONE; /* Not our interrupt */
  812. stat &= ~TSI_READ(TSI108_EC_INTMASK);
  813. if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
  814. TSI108_INT_TXERROR))
  815. tsi108_tx_int(dev);
  816. if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  817. TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
  818. TSI108_INT_RXERROR))
  819. tsi108_rx_int(dev);
  820. if (stat & TSI108_INT_SFN) {
  821. if (net_ratelimit())
  822. printk(KERN_DEBUG "%s: SFN error\n", dev->name);
  823. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
  824. }
  825. if (stat & TSI108_INT_STATCARRY) {
  826. tsi108_stat_carry(dev);
  827. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
  828. }
  829. return IRQ_HANDLED;
  830. }
  831. static void tsi108_stop_ethernet(struct net_device *dev)
  832. {
  833. struct tsi108_prv_data *data = netdev_priv(dev);
  834. int i = 1000;
  835. /* Disable all TX and RX queues ... */
  836. TSI_WRITE(TSI108_EC_TXCTRL, 0);
  837. TSI_WRITE(TSI108_EC_RXCTRL, 0);
  838. /* ...and wait for them to become idle */
  839. while(i--) {
  840. if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
  841. break;
  842. udelay(10);
  843. }
  844. i = 1000;
  845. while(i--){
  846. if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
  847. return;
  848. udelay(10);
  849. }
  850. printk(KERN_ERR "%s function time out \n", __FUNCTION__);
  851. }
  852. static void tsi108_reset_ether(struct tsi108_prv_data * data)
  853. {
  854. TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
  855. udelay(100);
  856. TSI_WRITE(TSI108_MAC_CFG1, 0);
  857. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
  858. udelay(100);
  859. TSI_WRITE(TSI108_EC_PORTCTRL,
  860. TSI_READ(TSI108_EC_PORTCTRL) &
  861. ~TSI108_EC_PORTCTRL_STATRST);
  862. TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
  863. udelay(100);
  864. TSI_WRITE(TSI108_EC_TXCFG,
  865. TSI_READ(TSI108_EC_TXCFG) &
  866. ~TSI108_EC_TXCFG_RST);
  867. TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
  868. udelay(100);
  869. TSI_WRITE(TSI108_EC_RXCFG,
  870. TSI_READ(TSI108_EC_RXCFG) &
  871. ~TSI108_EC_RXCFG_RST);
  872. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  873. TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
  874. TSI108_MAC_MII_MGMT_RST);
  875. udelay(100);
  876. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  877. (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
  878. ~(TSI108_MAC_MII_MGMT_RST |
  879. TSI108_MAC_MII_MGMT_CLK)) | 0x07);
  880. }
  881. static int tsi108_get_mac(struct net_device *dev)
  882. {
  883. struct tsi108_prv_data *data = netdev_priv(dev);
  884. u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
  885. u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
  886. /* Note that the octets are reversed from what the manual says,
  887. * producing an even weirder ordering...
  888. */
  889. if (word2 == 0 && word1 == 0) {
  890. dev->dev_addr[0] = 0x00;
  891. dev->dev_addr[1] = 0x06;
  892. dev->dev_addr[2] = 0xd2;
  893. dev->dev_addr[3] = 0x00;
  894. dev->dev_addr[4] = 0x00;
  895. if (0x8 == data->phy)
  896. dev->dev_addr[5] = 0x01;
  897. else
  898. dev->dev_addr[5] = 0x02;
  899. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  900. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  901. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  902. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  903. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  904. } else {
  905. dev->dev_addr[0] = (word2 >> 16) & 0xff;
  906. dev->dev_addr[1] = (word2 >> 24) & 0xff;
  907. dev->dev_addr[2] = (word1 >> 0) & 0xff;
  908. dev->dev_addr[3] = (word1 >> 8) & 0xff;
  909. dev->dev_addr[4] = (word1 >> 16) & 0xff;
  910. dev->dev_addr[5] = (word1 >> 24) & 0xff;
  911. }
  912. if (!is_valid_ether_addr(dev->dev_addr)) {
  913. printk("KERN_ERR: word1: %08x, word2: %08x\n", word1, word2);
  914. return -EINVAL;
  915. }
  916. return 0;
  917. }
  918. static int tsi108_set_mac(struct net_device *dev, void *addr)
  919. {
  920. struct tsi108_prv_data *data = netdev_priv(dev);
  921. u32 word1, word2;
  922. int i;
  923. if (!is_valid_ether_addr(addr))
  924. return -EINVAL;
  925. for (i = 0; i < 6; i++)
  926. /* +2 is for the offset of the HW addr type */
  927. dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
  928. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  929. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  930. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  931. spin_lock_irq(&data->misclock);
  932. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  933. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  934. spin_lock(&data->txlock);
  935. if (data->txfree && data->link_up)
  936. netif_wake_queue(dev);
  937. spin_unlock(&data->txlock);
  938. spin_unlock_irq(&data->misclock);
  939. return 0;
  940. }
  941. /* Protected by dev->xmit_lock. */
  942. static void tsi108_set_rx_mode(struct net_device *dev)
  943. {
  944. struct tsi108_prv_data *data = netdev_priv(dev);
  945. u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
  946. if (dev->flags & IFF_PROMISC) {
  947. rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
  948. rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
  949. goto out;
  950. }
  951. rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
  952. if (dev->flags & IFF_ALLMULTI || dev->mc_count) {
  953. int i;
  954. struct dev_mc_list *mc = dev->mc_list;
  955. rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
  956. memset(data->mc_hash, 0, sizeof(data->mc_hash));
  957. while (mc) {
  958. u32 hash, crc;
  959. if (mc->dmi_addrlen == 6) {
  960. crc = ether_crc(6, mc->dmi_addr);
  961. hash = crc >> 23;
  962. __set_bit(hash, &data->mc_hash[0]);
  963. } else {
  964. printk(KERN_ERR
  965. "%s: got multicast address of length %d "
  966. "instead of 6.\n", dev->name,
  967. mc->dmi_addrlen);
  968. }
  969. mc = mc->next;
  970. }
  971. TSI_WRITE(TSI108_EC_HASHADDR,
  972. TSI108_EC_HASHADDR_AUTOINC |
  973. TSI108_EC_HASHADDR_MCAST);
  974. for (i = 0; i < 16; i++) {
  975. /* The manual says that the hardware may drop
  976. * back-to-back writes to the data register.
  977. */
  978. udelay(1);
  979. TSI_WRITE(TSI108_EC_HASHDATA,
  980. data->mc_hash[i]);
  981. }
  982. }
  983. out:
  984. TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
  985. }
  986. static void tsi108_init_phy(struct net_device *dev)
  987. {
  988. struct tsi108_prv_data *data = netdev_priv(dev);
  989. u32 i = 0;
  990. u16 phyval = 0;
  991. unsigned long flags;
  992. spin_lock_irqsave(&phy_lock, flags);
  993. tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
  994. while (i--){
  995. if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
  996. break;
  997. udelay(10);
  998. }
  999. if (i == 0)
  1000. printk(KERN_ERR "%s function time out \n", __FUNCTION__);
  1001. if (data->phy_type == TSI108_PHY_BCM54XX) {
  1002. tsi108_write_mii(data, 0x09, 0x0300);
  1003. tsi108_write_mii(data, 0x10, 0x1020);
  1004. tsi108_write_mii(data, 0x1c, 0x8c00);
  1005. }
  1006. tsi108_write_mii(data,
  1007. MII_BMCR,
  1008. BMCR_ANENABLE | BMCR_ANRESTART);
  1009. while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
  1010. cpu_relax();
  1011. /* Set G/MII mode and receive clock select in TBI control #2. The
  1012. * second port won't work if this isn't done, even though we don't
  1013. * use TBI mode.
  1014. */
  1015. tsi108_write_tbi(data, 0x11, 0x30);
  1016. /* FIXME: It seems to take more than 2 back-to-back reads to the
  1017. * PHY_STAT register before the link up status bit is set.
  1018. */
  1019. data->link_up = 1;
  1020. while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
  1021. BMSR_LSTATUS)) {
  1022. if (i++ > (MII_READ_DELAY / 10)) {
  1023. data->link_up = 0;
  1024. break;
  1025. }
  1026. spin_unlock_irqrestore(&phy_lock, flags);
  1027. msleep(10);
  1028. spin_lock_irqsave(&phy_lock, flags);
  1029. }
  1030. printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
  1031. data->phy_ok = 1;
  1032. data->init_media = 1;
  1033. spin_unlock_irqrestore(&phy_lock, flags);
  1034. }
  1035. static void tsi108_kill_phy(struct net_device *dev)
  1036. {
  1037. struct tsi108_prv_data *data = netdev_priv(dev);
  1038. unsigned long flags;
  1039. spin_lock_irqsave(&phy_lock, flags);
  1040. tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
  1041. data->phy_ok = 0;
  1042. spin_unlock_irqrestore(&phy_lock, flags);
  1043. }
  1044. static int tsi108_open(struct net_device *dev)
  1045. {
  1046. int i;
  1047. struct tsi108_prv_data *data = netdev_priv(dev);
  1048. unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
  1049. unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
  1050. i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
  1051. if (i != 0) {
  1052. printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
  1053. data->id, data->irq_num);
  1054. return i;
  1055. } else {
  1056. dev->irq = data->irq_num;
  1057. printk(KERN_NOTICE
  1058. "tsi108_open : Port %d Assigned IRQ %d to %s\n",
  1059. data->id, dev->irq, dev->name);
  1060. }
  1061. data->rxring = dma_alloc_coherent(NULL, rxring_size,
  1062. &data->rxdma, GFP_KERNEL);
  1063. if (!data->rxring) {
  1064. printk(KERN_DEBUG
  1065. "TSI108_ETH: failed to allocate memory for rxring!\n");
  1066. return -ENOMEM;
  1067. } else {
  1068. memset(data->rxring, 0, rxring_size);
  1069. }
  1070. data->txring = dma_alloc_coherent(NULL, txring_size,
  1071. &data->txdma, GFP_KERNEL);
  1072. if (!data->txring) {
  1073. printk(KERN_DEBUG
  1074. "TSI108_ETH: failed to allocate memory for txring!\n");
  1075. pci_free_consistent(0, rxring_size, data->rxring, data->rxdma);
  1076. return -ENOMEM;
  1077. } else {
  1078. memset(data->txring, 0, txring_size);
  1079. }
  1080. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1081. data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
  1082. data->rxring[i].blen = TSI108_RXBUF_SIZE;
  1083. data->rxring[i].vlan = 0;
  1084. }
  1085. data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
  1086. data->rxtail = 0;
  1087. data->rxhead = 0;
  1088. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1089. struct sk_buff *skb = dev_alloc_skb(TSI108_RXBUF_SIZE + NET_IP_ALIGN);
  1090. if (!skb) {
  1091. /* Bah. No memory for now, but maybe we'll get
  1092. * some more later.
  1093. * For now, we'll live with the smaller ring.
  1094. */
  1095. printk(KERN_WARNING
  1096. "%s: Could only allocate %d receive skb(s).\n",
  1097. dev->name, i);
  1098. data->rxhead = i;
  1099. break;
  1100. }
  1101. data->rxskbs[i] = skb;
  1102. /* Align the payload on a 4-byte boundary */
  1103. skb_reserve(skb, 2);
  1104. data->rxskbs[i] = skb;
  1105. data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
  1106. data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
  1107. }
  1108. data->rxfree = i;
  1109. TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
  1110. for (i = 0; i < TSI108_TXRING_LEN; i++) {
  1111. data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
  1112. data->txring[i].misc = 0;
  1113. }
  1114. data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
  1115. data->txtail = 0;
  1116. data->txhead = 0;
  1117. data->txfree = TSI108_TXRING_LEN;
  1118. TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
  1119. tsi108_init_phy(dev);
  1120. setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev);
  1121. mod_timer(&data->timer, jiffies + 1);
  1122. tsi108_restart_rx(data, dev);
  1123. TSI_WRITE(TSI108_EC_INTSTAT, ~0);
  1124. TSI_WRITE(TSI108_EC_INTMASK,
  1125. ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
  1126. TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
  1127. TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
  1128. TSI108_INT_SFN | TSI108_INT_STATCARRY));
  1129. TSI_WRITE(TSI108_MAC_CFG1,
  1130. TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
  1131. netif_start_queue(dev);
  1132. return 0;
  1133. }
  1134. static int tsi108_close(struct net_device *dev)
  1135. {
  1136. struct tsi108_prv_data *data = netdev_priv(dev);
  1137. netif_stop_queue(dev);
  1138. del_timer_sync(&data->timer);
  1139. tsi108_stop_ethernet(dev);
  1140. tsi108_kill_phy(dev);
  1141. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1142. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1143. /* Check for any pending TX packets, and drop them. */
  1144. while (!data->txfree || data->txhead != data->txtail) {
  1145. int tx = data->txtail;
  1146. struct sk_buff *skb;
  1147. skb = data->txskbs[tx];
  1148. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  1149. data->txfree++;
  1150. dev_kfree_skb(skb);
  1151. }
  1152. synchronize_irq(data->irq_num);
  1153. free_irq(data->irq_num, dev);
  1154. /* Discard the RX ring. */
  1155. while (data->rxfree) {
  1156. int rx = data->rxtail;
  1157. struct sk_buff *skb;
  1158. skb = data->rxskbs[rx];
  1159. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  1160. data->rxfree--;
  1161. dev_kfree_skb(skb);
  1162. }
  1163. dma_free_coherent(0,
  1164. TSI108_RXRING_LEN * sizeof(rx_desc),
  1165. data->rxring, data->rxdma);
  1166. dma_free_coherent(0,
  1167. TSI108_TXRING_LEN * sizeof(tx_desc),
  1168. data->txring, data->txdma);
  1169. return 0;
  1170. }
  1171. static void tsi108_init_mac(struct net_device *dev)
  1172. {
  1173. struct tsi108_prv_data *data = netdev_priv(dev);
  1174. TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
  1175. TSI108_MAC_CFG2_PADCRC);
  1176. TSI_WRITE(TSI108_EC_TXTHRESH,
  1177. (192 << TSI108_EC_TXTHRESH_STARTFILL) |
  1178. (192 << TSI108_EC_TXTHRESH_STOPFILL));
  1179. TSI_WRITE(TSI108_STAT_CARRYMASK1,
  1180. ~(TSI108_STAT_CARRY1_RXBYTES |
  1181. TSI108_STAT_CARRY1_RXPKTS |
  1182. TSI108_STAT_CARRY1_RXFCS |
  1183. TSI108_STAT_CARRY1_RXMCAST |
  1184. TSI108_STAT_CARRY1_RXALIGN |
  1185. TSI108_STAT_CARRY1_RXLENGTH |
  1186. TSI108_STAT_CARRY1_RXRUNT |
  1187. TSI108_STAT_CARRY1_RXJUMBO |
  1188. TSI108_STAT_CARRY1_RXFRAG |
  1189. TSI108_STAT_CARRY1_RXJABBER |
  1190. TSI108_STAT_CARRY1_RXDROP));
  1191. TSI_WRITE(TSI108_STAT_CARRYMASK2,
  1192. ~(TSI108_STAT_CARRY2_TXBYTES |
  1193. TSI108_STAT_CARRY2_TXPKTS |
  1194. TSI108_STAT_CARRY2_TXEXDEF |
  1195. TSI108_STAT_CARRY2_TXEXCOL |
  1196. TSI108_STAT_CARRY2_TXTCOL |
  1197. TSI108_STAT_CARRY2_TXPAUSE));
  1198. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
  1199. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1200. TSI_WRITE(TSI108_EC_RXCFG,
  1201. TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
  1202. TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
  1203. TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
  1204. TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1205. TSI108_EC_TXQ_CFG_SFNPORT));
  1206. TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
  1207. TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
  1208. TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1209. TSI108_EC_RXQ_CFG_SFNPORT));
  1210. TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
  1211. TSI108_EC_TXQ_BUFCFG_BURST256 |
  1212. TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1213. TSI108_EC_TXQ_BUFCFG_SFNPORT));
  1214. TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
  1215. TSI108_EC_RXQ_BUFCFG_BURST256 |
  1216. TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1217. TSI108_EC_RXQ_BUFCFG_SFNPORT));
  1218. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1219. }
  1220. static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1221. {
  1222. struct tsi108_prv_data *data = netdev_priv(dev);
  1223. return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
  1224. }
  1225. static int
  1226. tsi108_init_one(struct platform_device *pdev)
  1227. {
  1228. struct net_device *dev = NULL;
  1229. struct tsi108_prv_data *data = NULL;
  1230. hw_info *einfo;
  1231. int err = 0;
  1232. einfo = pdev->dev.platform_data;
  1233. if (NULL == einfo) {
  1234. printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
  1235. pdev->id);
  1236. return -ENODEV;
  1237. }
  1238. /* Create an ethernet device instance */
  1239. dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
  1240. if (!dev) {
  1241. printk("tsi108_eth: Could not allocate a device structure\n");
  1242. return -ENOMEM;
  1243. }
  1244. printk("tsi108_eth%d: probe...\n", pdev->id);
  1245. data = netdev_priv(dev);
  1246. pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
  1247. pdev->id, einfo->regs, einfo->phyregs,
  1248. einfo->phy, einfo->irq_num);
  1249. data->regs = ioremap(einfo->regs, 0x400);
  1250. if (NULL == data->regs) {
  1251. err = -ENOMEM;
  1252. goto regs_fail;
  1253. }
  1254. data->phyregs = ioremap(einfo->phyregs, 0x400);
  1255. if (NULL == data->phyregs) {
  1256. err = -ENOMEM;
  1257. goto regs_fail;
  1258. }
  1259. /* MII setup */
  1260. data->mii_if.dev = dev;
  1261. data->mii_if.mdio_read = tsi108_mdio_read;
  1262. data->mii_if.mdio_write = tsi108_mdio_write;
  1263. data->mii_if.phy_id = einfo->phy;
  1264. data->mii_if.phy_id_mask = 0x1f;
  1265. data->mii_if.reg_num_mask = 0x1f;
  1266. data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
  1267. data->phy = einfo->phy;
  1268. data->phy_type = einfo->phy_type;
  1269. data->irq_num = einfo->irq_num;
  1270. data->id = pdev->id;
  1271. dev->open = tsi108_open;
  1272. dev->stop = tsi108_close;
  1273. dev->hard_start_xmit = tsi108_send_packet;
  1274. dev->set_mac_address = tsi108_set_mac;
  1275. dev->set_multicast_list = tsi108_set_rx_mode;
  1276. dev->get_stats = tsi108_get_stats;
  1277. dev->poll = tsi108_poll;
  1278. dev->do_ioctl = tsi108_do_ioctl;
  1279. dev->weight = 64; /* 64 is more suitable for GigE interface - klai */
  1280. /* Apparently, the Linux networking code won't use scatter-gather
  1281. * if the hardware doesn't do checksums. However, it's faster
  1282. * to checksum in place and use SG, as (among other reasons)
  1283. * the cache won't be dirtied (which then has to be flushed
  1284. * before DMA). The checksumming is done by the driver (via
  1285. * a new function skb_csum_dev() in net/core/skbuff.c).
  1286. */
  1287. dev->features = NETIF_F_HIGHDMA;
  1288. SET_MODULE_OWNER(dev);
  1289. spin_lock_init(&data->txlock);
  1290. spin_lock_init(&data->misclock);
  1291. tsi108_reset_ether(data);
  1292. tsi108_kill_phy(dev);
  1293. if ((err = tsi108_get_mac(dev)) != 0) {
  1294. printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n",
  1295. dev->name);
  1296. goto register_fail;
  1297. }
  1298. tsi108_init_mac(dev);
  1299. err = register_netdev(dev);
  1300. if (err) {
  1301. printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
  1302. dev->name);
  1303. goto register_fail;
  1304. }
  1305. printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: "
  1306. "%02x:%02x:%02x:%02x:%02x:%02x\n", dev->name,
  1307. dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
  1308. dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
  1309. #ifdef DEBUG
  1310. data->msg_enable = DEBUG;
  1311. dump_eth_one(dev);
  1312. #endif
  1313. return 0;
  1314. register_fail:
  1315. iounmap(data->regs);
  1316. iounmap(data->phyregs);
  1317. regs_fail:
  1318. free_netdev(dev);
  1319. return err;
  1320. }
  1321. /* There's no way to either get interrupts from the PHY when
  1322. * something changes, or to have the Tsi108 automatically communicate
  1323. * with the PHY to reconfigure itself.
  1324. *
  1325. * Thus, we have to do it using a timer.
  1326. */
  1327. static void tsi108_timed_checker(unsigned long dev_ptr)
  1328. {
  1329. struct net_device *dev = (struct net_device *)dev_ptr;
  1330. struct tsi108_prv_data *data = netdev_priv(dev);
  1331. tsi108_check_phy(dev);
  1332. tsi108_check_rxring(dev);
  1333. mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
  1334. }
  1335. static int tsi108_ether_init(void)
  1336. {
  1337. int ret;
  1338. ret = platform_driver_register (&tsi_eth_driver);
  1339. if (ret < 0){
  1340. printk("tsi108_ether_init: error initializing ethernet "
  1341. "device\n");
  1342. return ret;
  1343. }
  1344. return 0;
  1345. }
  1346. static int tsi108_ether_remove(struct platform_device *pdev)
  1347. {
  1348. struct net_device *dev = platform_get_drvdata(pdev);
  1349. struct tsi108_prv_data *priv = netdev_priv(dev);
  1350. unregister_netdev(dev);
  1351. tsi108_stop_ethernet(dev);
  1352. platform_set_drvdata(pdev, NULL);
  1353. iounmap(priv->regs);
  1354. iounmap(priv->phyregs);
  1355. free_netdev(dev);
  1356. return 0;
  1357. }
  1358. static void tsi108_ether_exit(void)
  1359. {
  1360. platform_driver_unregister(&tsi_eth_driver);
  1361. }
  1362. module_init(tsi108_ether_init);
  1363. module_exit(tsi108_ether_exit);
  1364. MODULE_AUTHOR("Tundra Semiconductor Corporation");
  1365. MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
  1366. MODULE_LICENSE("GPL");