tc35815.c 86 KB

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  1. /*
  2. * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
  3. *
  4. * Based on skelton.c by Donald Becker.
  5. *
  6. * This driver is a replacement of older and less maintained version.
  7. * This is a header of the older version:
  8. * -----<snip>-----
  9. * Copyright 2001 MontaVista Software Inc.
  10. * Author: MontaVista Software, Inc.
  11. * ahennessy@mvista.com
  12. * Copyright (C) 2000-2001 Toshiba Corporation
  13. * static const char *version =
  14. * "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
  15. * -----<snip>-----
  16. *
  17. * This file is subject to the terms and conditions of the GNU General Public
  18. * License. See the file "COPYING" in the main directory of this archive
  19. * for more details.
  20. *
  21. * (C) Copyright TOSHIBA CORPORATION 2004-2005
  22. * All Rights Reserved.
  23. */
  24. #ifdef TC35815_NAPI
  25. #define DRV_VERSION "1.35-NAPI"
  26. #else
  27. #define DRV_VERSION "1.35"
  28. #endif
  29. static const char *version = "tc35815.c:v" DRV_VERSION "\n";
  30. #define MODNAME "tc35815"
  31. #include <linux/module.h>
  32. #include <linux/kernel.h>
  33. #include <linux/types.h>
  34. #include <linux/fcntl.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/ioport.h>
  37. #include <linux/in.h>
  38. #include <linux/slab.h>
  39. #include <linux/string.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/errno.h>
  42. #include <linux/init.h>
  43. #include <linux/netdevice.h>
  44. #include <linux/etherdevice.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/delay.h>
  47. #include <linux/pci.h>
  48. #include <linux/mii.h>
  49. #include <linux/ethtool.h>
  50. #include <asm/io.h>
  51. #include <asm/byteorder.h>
  52. /* First, a few definitions that the brave might change. */
  53. #define GATHER_TXINT /* On-Demand Tx Interrupt */
  54. #define WORKAROUND_LOSTCAR
  55. #define WORKAROUND_100HALF_PROMISC
  56. /* #define TC35815_USE_PACKEDBUFFER */
  57. typedef enum {
  58. TC35815CF = 0,
  59. TC35815_NWU,
  60. TC35815_TX4939,
  61. } board_t;
  62. /* indexed by board_t, above */
  63. static const struct {
  64. const char *name;
  65. } board_info[] __devinitdata = {
  66. { "TOSHIBA TC35815CF 10/100BaseTX" },
  67. { "TOSHIBA TC35815 with Wake on LAN" },
  68. { "TOSHIBA TC35815/TX4939" },
  69. };
  70. static const struct pci_device_id tc35815_pci_tbl[] = {
  71. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
  72. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
  73. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
  74. {0,}
  75. };
  76. MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
  77. /* see MODULE_PARM_DESC */
  78. static struct tc35815_options {
  79. int speed;
  80. int duplex;
  81. int doforce;
  82. } options;
  83. /*
  84. * Registers
  85. */
  86. struct tc35815_regs {
  87. volatile __u32 DMA_Ctl; /* 0x00 */
  88. volatile __u32 TxFrmPtr;
  89. volatile __u32 TxThrsh;
  90. volatile __u32 TxPollCtr;
  91. volatile __u32 BLFrmPtr;
  92. volatile __u32 RxFragSize;
  93. volatile __u32 Int_En;
  94. volatile __u32 FDA_Bas;
  95. volatile __u32 FDA_Lim; /* 0x20 */
  96. volatile __u32 Int_Src;
  97. volatile __u32 unused0[2];
  98. volatile __u32 PauseCnt;
  99. volatile __u32 RemPauCnt;
  100. volatile __u32 TxCtlFrmStat;
  101. volatile __u32 unused1;
  102. volatile __u32 MAC_Ctl; /* 0x40 */
  103. volatile __u32 CAM_Ctl;
  104. volatile __u32 Tx_Ctl;
  105. volatile __u32 Tx_Stat;
  106. volatile __u32 Rx_Ctl;
  107. volatile __u32 Rx_Stat;
  108. volatile __u32 MD_Data;
  109. volatile __u32 MD_CA;
  110. volatile __u32 CAM_Adr; /* 0x60 */
  111. volatile __u32 CAM_Data;
  112. volatile __u32 CAM_Ena;
  113. volatile __u32 PROM_Ctl;
  114. volatile __u32 PROM_Data;
  115. volatile __u32 Algn_Cnt;
  116. volatile __u32 CRC_Cnt;
  117. volatile __u32 Miss_Cnt;
  118. };
  119. /*
  120. * Bit assignments
  121. */
  122. /* DMA_Ctl bit asign ------------------------------------------------------- */
  123. #define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
  124. #define DMA_RxAlign_1 0x00400000
  125. #define DMA_RxAlign_2 0x00800000
  126. #define DMA_RxAlign_3 0x00c00000
  127. #define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
  128. #define DMA_IntMask 0x00040000 /* 1:Interupt mask */
  129. #define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
  130. #define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
  131. #define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
  132. #define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
  133. #define DMA_TestMode 0x00002000 /* 1:Test Mode */
  134. #define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
  135. #define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
  136. /* RxFragSize bit asign ---------------------------------------------------- */
  137. #define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
  138. #define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
  139. /* MAC_Ctl bit asign ------------------------------------------------------- */
  140. #define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
  141. #define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
  142. #define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
  143. #define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
  144. #define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
  145. #define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
  146. #define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
  147. #define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
  148. #define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
  149. #define MAC_Reset 0x00000004 /* 1:Software Reset */
  150. #define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
  151. #define MAC_HaltReq 0x00000001 /* 1:Halt request */
  152. /* PROM_Ctl bit asign ------------------------------------------------------ */
  153. #define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
  154. #define PROM_Read 0x00004000 /*10:Read operation */
  155. #define PROM_Write 0x00002000 /*01:Write operation */
  156. #define PROM_Erase 0x00006000 /*11:Erase operation */
  157. /*00:Enable or Disable Writting, */
  158. /* as specified in PROM_Addr. */
  159. #define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
  160. /*00xxxx: disable */
  161. /* CAM_Ctl bit asign ------------------------------------------------------- */
  162. #define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
  163. #define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
  164. /* accept other */
  165. #define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
  166. #define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
  167. #define CAM_StationAcc 0x00000001 /* 1:unicast accept */
  168. /* CAM_Ena bit asign ------------------------------------------------------- */
  169. #define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
  170. #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */
  171. #define CAM_Ena_Bit(index) (1<<(index))
  172. #define CAM_ENTRY_DESTINATION 0
  173. #define CAM_ENTRY_SOURCE 1
  174. #define CAM_ENTRY_MACCTL 20
  175. /* Tx_Ctl bit asign -------------------------------------------------------- */
  176. #define Tx_En 0x00000001 /* 1:Transmit enable */
  177. #define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
  178. #define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
  179. #define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
  180. #define Tx_FBack 0x00000010 /* 1:Fast Back-off */
  181. #define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
  182. #define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
  183. #define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
  184. #define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
  185. #define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
  186. #define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
  187. #define Tx_EnComp 0x00004000 /* 1:Enable Completion */
  188. /* Tx_Stat bit asign ------------------------------------------------------- */
  189. #define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
  190. #define Tx_ExColl 0x00000010 /* Excessive Collision */
  191. #define Tx_TXDefer 0x00000020 /* Transmit Defered */
  192. #define Tx_Paused 0x00000040 /* Transmit Paused */
  193. #define Tx_IntTx 0x00000080 /* Interrupt on Tx */
  194. #define Tx_Under 0x00000100 /* Underrun */
  195. #define Tx_Defer 0x00000200 /* Deferral */
  196. #define Tx_NCarr 0x00000400 /* No Carrier */
  197. #define Tx_10Stat 0x00000800 /* 10Mbps Status */
  198. #define Tx_LateColl 0x00001000 /* Late Collision */
  199. #define Tx_TxPar 0x00002000 /* Tx Parity Error */
  200. #define Tx_Comp 0x00004000 /* Completion */
  201. #define Tx_Halted 0x00008000 /* Tx Halted */
  202. #define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
  203. /* Rx_Ctl bit asign -------------------------------------------------------- */
  204. #define Rx_EnGood 0x00004000 /* 1:Enable Good */
  205. #define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
  206. #define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
  207. #define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
  208. #define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
  209. #define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
  210. #define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
  211. #define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
  212. #define Rx_ShortEn 0x00000008 /* 1:Short Enable */
  213. #define Rx_LongEn 0x00000004 /* 1:Long Enable */
  214. #define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
  215. #define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
  216. /* Rx_Stat bit asign ------------------------------------------------------- */
  217. #define Rx_Halted 0x00008000 /* Rx Halted */
  218. #define Rx_Good 0x00004000 /* Rx Good */
  219. #define Rx_RxPar 0x00002000 /* Rx Parity Error */
  220. /* 0x00001000 not use */
  221. #define Rx_LongErr 0x00000800 /* Rx Long Error */
  222. #define Rx_Over 0x00000400 /* Rx Overflow */
  223. #define Rx_CRCErr 0x00000200 /* Rx CRC Error */
  224. #define Rx_Align 0x00000100 /* Rx Alignment Error */
  225. #define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
  226. #define Rx_IntRx 0x00000040 /* Rx Interrupt */
  227. #define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
  228. #define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
  229. /* Int_En bit asign -------------------------------------------------------- */
  230. #define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
  231. #define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */
  232. #define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
  233. #define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
  234. #define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
  235. #define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
  236. #define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
  237. #define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
  238. #define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
  239. #define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
  240. #define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
  241. #define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
  242. /* Exhausted Enable */
  243. /* Int_Src bit asign ------------------------------------------------------- */
  244. #define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
  245. #define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
  246. #define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
  247. #define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
  248. #define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
  249. #define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
  250. #define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
  251. #define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
  252. #define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
  253. #define Int_SWInt 0x00000020 /* 1:Software request & Clear */
  254. #define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
  255. #define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
  256. #define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
  257. #define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
  258. #define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
  259. /* MD_CA bit asign --------------------------------------------------------- */
  260. #define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
  261. #define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
  262. #define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
  263. /*
  264. * Descriptors
  265. */
  266. /* Frame descripter */
  267. struct FDesc {
  268. volatile __u32 FDNext;
  269. volatile __u32 FDSystem;
  270. volatile __u32 FDStat;
  271. volatile __u32 FDCtl;
  272. };
  273. /* Buffer descripter */
  274. struct BDesc {
  275. volatile __u32 BuffData;
  276. volatile __u32 BDCtl;
  277. };
  278. #define FD_ALIGN 16
  279. /* Frame Descripter bit asign ---------------------------------------------- */
  280. #define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
  281. #define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
  282. #define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
  283. #define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */
  284. #define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
  285. #define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
  286. #define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */
  287. #define FD_FrmOpt_Packing 0x04000000 /* Rx only */
  288. #define FD_CownsFD 0x80000000 /* FD Controller owner bit */
  289. #define FD_Next_EOL 0x00000001 /* FD EOL indicator */
  290. #define FD_BDCnt_SHIFT 16
  291. /* Buffer Descripter bit asign --------------------------------------------- */
  292. #define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
  293. #define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
  294. #define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
  295. #define BD_CownsBD 0x80000000 /* BD Controller owner bit */
  296. #define BD_RxBDID_SHIFT 16
  297. #define BD_RxBDSeqN_SHIFT 24
  298. /* Some useful constants. */
  299. #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
  300. #ifdef NO_CHECK_CARRIER
  301. #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
  302. Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
  303. Tx_En) /* maybe 0x7b01 */
  304. #else
  305. #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
  306. Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
  307. Tx_En) /* maybe 0x7b01 */
  308. #endif
  309. #define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
  310. | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */
  311. #define INT_EN_CMD (Int_NRAbtEn | \
  312. Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
  313. Int_SSysErrEn | Int_RMasAbtEn | Int_RTargAbtEn | \
  314. Int_STargAbtEn | \
  315. Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/
  316. #define DMA_CTL_CMD DMA_BURST_SIZE
  317. #define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF)
  318. /* Tuning parameters */
  319. #define DMA_BURST_SIZE 32
  320. #define TX_THRESHOLD 1024
  321. #define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/
  322. #define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */
  323. /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
  324. #ifdef TC35815_USE_PACKEDBUFFER
  325. #define FD_PAGE_NUM 2
  326. #define RX_BUF_NUM 8 /* >= 2 */
  327. #define RX_FD_NUM 250 /* >= 32 */
  328. #define TX_FD_NUM 128
  329. #define RX_BUF_SIZE PAGE_SIZE
  330. #else /* TC35815_USE_PACKEDBUFFER */
  331. #define FD_PAGE_NUM 4
  332. #define RX_BUF_NUM 128 /* < 256 */
  333. #define RX_FD_NUM 256 /* >= 32 */
  334. #define TX_FD_NUM 128
  335. #if RX_CTL_CMD & Rx_LongEn
  336. #define RX_BUF_SIZE PAGE_SIZE
  337. #elif RX_CTL_CMD & Rx_StripCRC
  338. #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
  339. #else
  340. #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
  341. #endif
  342. #endif /* TC35815_USE_PACKEDBUFFER */
  343. #define RX_FD_RESERVE (2 / 2) /* max 2 BD per RxFD */
  344. #define NAPI_WEIGHT 16
  345. struct TxFD {
  346. struct FDesc fd;
  347. struct BDesc bd;
  348. struct BDesc unused;
  349. };
  350. struct RxFD {
  351. struct FDesc fd;
  352. struct BDesc bd[0]; /* variable length */
  353. };
  354. struct FrFD {
  355. struct FDesc fd;
  356. struct BDesc bd[RX_BUF_NUM];
  357. };
  358. #define tc_readl(addr) readl(addr)
  359. #define tc_writel(d, addr) writel(d, addr)
  360. #define TC35815_TX_TIMEOUT msecs_to_jiffies(400)
  361. /* Timer state engine. */
  362. enum tc35815_timer_state {
  363. arbwait = 0, /* Waiting for auto negotiation to complete. */
  364. lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
  365. ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
  366. asleep = 3, /* Time inactive. */
  367. lcheck = 4, /* Check link status. */
  368. };
  369. /* Information that need to be kept for each board. */
  370. struct tc35815_local {
  371. struct pci_dev *pci_dev;
  372. /* statistics */
  373. struct net_device_stats stats;
  374. struct {
  375. int max_tx_qlen;
  376. int tx_ints;
  377. int rx_ints;
  378. int tx_underrun;
  379. } lstats;
  380. /* Tx control lock. This protects the transmit buffer ring
  381. * state along with the "tx full" state of the driver. This
  382. * means all netif_queue flow control actions are protected
  383. * by this lock as well.
  384. */
  385. spinlock_t lock;
  386. int phy_addr;
  387. int fullduplex;
  388. unsigned short saved_lpa;
  389. struct timer_list timer;
  390. enum tc35815_timer_state timer_state; /* State of auto-neg timer. */
  391. unsigned int timer_ticks; /* Number of clicks at each state */
  392. /*
  393. * Transmitting: Batch Mode.
  394. * 1 BD in 1 TxFD.
  395. * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
  396. * 1 circular FD for Free Buffer List.
  397. * RX_BUF_NUM BD in Free Buffer FD.
  398. * One Free Buffer BD has PAGE_SIZE data buffer.
  399. * Or Non-Packing Mode.
  400. * 1 circular FD for Free Buffer List.
  401. * RX_BUF_NUM BD in Free Buffer FD.
  402. * One Free Buffer BD has ETH_FRAME_LEN data buffer.
  403. */
  404. void * fd_buf; /* for TxFD, RxFD, FrFD */
  405. dma_addr_t fd_buf_dma;
  406. struct TxFD *tfd_base;
  407. unsigned int tfd_start;
  408. unsigned int tfd_end;
  409. struct RxFD *rfd_base;
  410. struct RxFD *rfd_limit;
  411. struct RxFD *rfd_cur;
  412. struct FrFD *fbl_ptr;
  413. #ifdef TC35815_USE_PACKEDBUFFER
  414. unsigned char fbl_curid;
  415. void * data_buf[RX_BUF_NUM]; /* packing */
  416. dma_addr_t data_buf_dma[RX_BUF_NUM];
  417. struct {
  418. struct sk_buff *skb;
  419. dma_addr_t skb_dma;
  420. } tx_skbs[TX_FD_NUM];
  421. #else
  422. unsigned int fbl_count;
  423. struct {
  424. struct sk_buff *skb;
  425. dma_addr_t skb_dma;
  426. } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
  427. #endif
  428. struct mii_if_info mii;
  429. unsigned short mii_id[2];
  430. u32 msg_enable;
  431. board_t boardtype;
  432. };
  433. static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
  434. {
  435. return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
  436. }
  437. #ifdef DEBUG
  438. static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
  439. {
  440. return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
  441. }
  442. #endif
  443. #ifdef TC35815_USE_PACKEDBUFFER
  444. static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
  445. {
  446. int i;
  447. for (i = 0; i < RX_BUF_NUM; i++) {
  448. if (bus >= lp->data_buf_dma[i] &&
  449. bus < lp->data_buf_dma[i] + PAGE_SIZE)
  450. return (void *)((u8 *)lp->data_buf[i] +
  451. (bus - lp->data_buf_dma[i]));
  452. }
  453. return NULL;
  454. }
  455. #define TC35815_DMA_SYNC_ONDEMAND
  456. static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
  457. {
  458. #ifdef TC35815_DMA_SYNC_ONDEMAND
  459. void *buf;
  460. /* pci_map + pci_dma_sync will be more effective than
  461. * pci_alloc_consistent on some archs. */
  462. if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL)
  463. return NULL;
  464. *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
  465. PCI_DMA_FROMDEVICE);
  466. if (pci_dma_mapping_error(*dma_handle)) {
  467. free_page((unsigned long)buf);
  468. return NULL;
  469. }
  470. return buf;
  471. #else
  472. return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
  473. #endif
  474. }
  475. static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
  476. {
  477. #ifdef TC35815_DMA_SYNC_ONDEMAND
  478. pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
  479. free_page((unsigned long)buf);
  480. #else
  481. pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
  482. #endif
  483. }
  484. #else /* TC35815_USE_PACKEDBUFFER */
  485. static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
  486. struct pci_dev *hwdev,
  487. dma_addr_t *dma_handle)
  488. {
  489. struct sk_buff *skb;
  490. skb = dev_alloc_skb(RX_BUF_SIZE);
  491. if (!skb)
  492. return NULL;
  493. *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
  494. PCI_DMA_FROMDEVICE);
  495. if (pci_dma_mapping_error(*dma_handle)) {
  496. dev_kfree_skb_any(skb);
  497. return NULL;
  498. }
  499. skb_reserve(skb, 2); /* make IP header 4byte aligned */
  500. return skb;
  501. }
  502. static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
  503. {
  504. pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
  505. PCI_DMA_FROMDEVICE);
  506. dev_kfree_skb_any(skb);
  507. }
  508. #endif /* TC35815_USE_PACKEDBUFFER */
  509. /* Index to functions, as function prototypes. */
  510. static int tc35815_open(struct net_device *dev);
  511. static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
  512. static irqreturn_t tc35815_interrupt(int irq, void *dev_id);
  513. #ifdef TC35815_NAPI
  514. static int tc35815_rx(struct net_device *dev, int limit);
  515. static int tc35815_poll(struct net_device *dev, int *budget);
  516. #else
  517. static void tc35815_rx(struct net_device *dev);
  518. #endif
  519. static void tc35815_txdone(struct net_device *dev);
  520. static int tc35815_close(struct net_device *dev);
  521. static struct net_device_stats *tc35815_get_stats(struct net_device *dev);
  522. static void tc35815_set_multicast_list(struct net_device *dev);
  523. static void tc35815_tx_timeout(struct net_device *dev);
  524. static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
  525. #ifdef CONFIG_NET_POLL_CONTROLLER
  526. static void tc35815_poll_controller(struct net_device *dev);
  527. #endif
  528. static const struct ethtool_ops tc35815_ethtool_ops;
  529. /* Example routines you must write ;->. */
  530. static void tc35815_chip_reset(struct net_device *dev);
  531. static void tc35815_chip_init(struct net_device *dev);
  532. static void tc35815_find_phy(struct net_device *dev);
  533. static void tc35815_phy_chip_init(struct net_device *dev);
  534. #ifdef DEBUG
  535. static void panic_queues(struct net_device *dev);
  536. #endif
  537. static void tc35815_timer(unsigned long data);
  538. static void tc35815_start_auto_negotiation(struct net_device *dev,
  539. struct ethtool_cmd *ep);
  540. static int tc_mdio_read(struct net_device *dev, int phy_id, int location);
  541. static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
  542. int val);
  543. static void __devinit tc35815_init_dev_addr (struct net_device *dev)
  544. {
  545. struct tc35815_regs __iomem *tr =
  546. (struct tc35815_regs __iomem *)dev->base_addr;
  547. int i;
  548. /* dev_addr will be overwritten on NETDEV_REGISTER event */
  549. while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
  550. ;
  551. for (i = 0; i < 6; i += 2) {
  552. unsigned short data;
  553. tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
  554. while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
  555. ;
  556. data = tc_readl(&tr->PROM_Data);
  557. dev->dev_addr[i] = data & 0xff;
  558. dev->dev_addr[i+1] = data >> 8;
  559. }
  560. }
  561. static int __devinit tc35815_init_one (struct pci_dev *pdev,
  562. const struct pci_device_id *ent)
  563. {
  564. void __iomem *ioaddr = NULL;
  565. struct net_device *dev;
  566. struct tc35815_local *lp;
  567. int rc;
  568. unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
  569. static int printed_version;
  570. if (!printed_version++) {
  571. printk(version);
  572. dev_printk(KERN_DEBUG, &pdev->dev,
  573. "speed:%d duplex:%d doforce:%d\n",
  574. options.speed, options.duplex, options.doforce);
  575. }
  576. if (!pdev->irq) {
  577. dev_warn(&pdev->dev, "no IRQ assigned.\n");
  578. return -ENODEV;
  579. }
  580. /* dev zeroed in alloc_etherdev */
  581. dev = alloc_etherdev (sizeof (*lp));
  582. if (dev == NULL) {
  583. dev_err(&pdev->dev, "unable to alloc new ethernet\n");
  584. return -ENOMEM;
  585. }
  586. SET_MODULE_OWNER(dev);
  587. SET_NETDEV_DEV(dev, &pdev->dev);
  588. lp = dev->priv;
  589. /* enable device (incl. PCI PM wakeup), and bus-mastering */
  590. rc = pci_enable_device (pdev);
  591. if (rc)
  592. goto err_out;
  593. mmio_start = pci_resource_start (pdev, 1);
  594. mmio_end = pci_resource_end (pdev, 1);
  595. mmio_flags = pci_resource_flags (pdev, 1);
  596. mmio_len = pci_resource_len (pdev, 1);
  597. /* set this immediately, we need to know before
  598. * we talk to the chip directly */
  599. /* make sure PCI base addr 1 is MMIO */
  600. if (!(mmio_flags & IORESOURCE_MEM)) {
  601. dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
  602. rc = -ENODEV;
  603. goto err_out;
  604. }
  605. /* check for weird/broken PCI region reporting */
  606. if ((mmio_len < sizeof(struct tc35815_regs))) {
  607. dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
  608. rc = -ENODEV;
  609. goto err_out;
  610. }
  611. rc = pci_request_regions (pdev, MODNAME);
  612. if (rc)
  613. goto err_out;
  614. pci_set_master (pdev);
  615. /* ioremap MMIO region */
  616. ioaddr = ioremap (mmio_start, mmio_len);
  617. if (ioaddr == NULL) {
  618. dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
  619. rc = -EIO;
  620. goto err_out_free_res;
  621. }
  622. /* Initialize the device structure. */
  623. dev->open = tc35815_open;
  624. dev->hard_start_xmit = tc35815_send_packet;
  625. dev->stop = tc35815_close;
  626. dev->get_stats = tc35815_get_stats;
  627. dev->set_multicast_list = tc35815_set_multicast_list;
  628. dev->do_ioctl = tc35815_ioctl;
  629. dev->ethtool_ops = &tc35815_ethtool_ops;
  630. dev->tx_timeout = tc35815_tx_timeout;
  631. dev->watchdog_timeo = TC35815_TX_TIMEOUT;
  632. #ifdef TC35815_NAPI
  633. dev->poll = tc35815_poll;
  634. dev->weight = NAPI_WEIGHT;
  635. #endif
  636. #ifdef CONFIG_NET_POLL_CONTROLLER
  637. dev->poll_controller = tc35815_poll_controller;
  638. #endif
  639. dev->irq = pdev->irq;
  640. dev->base_addr = (unsigned long) ioaddr;
  641. /* dev->priv/lp zeroed and aligned in alloc_etherdev */
  642. lp = dev->priv;
  643. spin_lock_init(&lp->lock);
  644. lp->pci_dev = pdev;
  645. lp->boardtype = ent->driver_data;
  646. lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
  647. pci_set_drvdata(pdev, dev);
  648. /* Soft reset the chip. */
  649. tc35815_chip_reset(dev);
  650. /* Retrieve the ethernet address. */
  651. tc35815_init_dev_addr(dev);
  652. rc = register_netdev (dev);
  653. if (rc)
  654. goto err_out_unmap;
  655. memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
  656. printk(KERN_INFO "%s: %s at 0x%lx, "
  657. "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
  658. "IRQ %d\n",
  659. dev->name,
  660. board_info[ent->driver_data].name,
  661. dev->base_addr,
  662. dev->dev_addr[0], dev->dev_addr[1],
  663. dev->dev_addr[2], dev->dev_addr[3],
  664. dev->dev_addr[4], dev->dev_addr[5],
  665. dev->irq);
  666. setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev);
  667. lp->mii.dev = dev;
  668. lp->mii.mdio_read = tc_mdio_read;
  669. lp->mii.mdio_write = tc_mdio_write;
  670. lp->mii.phy_id_mask = 0x1f;
  671. lp->mii.reg_num_mask = 0x1f;
  672. tc35815_find_phy(dev);
  673. lp->mii.phy_id = lp->phy_addr;
  674. lp->mii.full_duplex = 0;
  675. lp->mii.force_media = 0;
  676. return 0;
  677. err_out_unmap:
  678. iounmap(ioaddr);
  679. err_out_free_res:
  680. pci_release_regions (pdev);
  681. err_out:
  682. free_netdev (dev);
  683. return rc;
  684. }
  685. static void __devexit tc35815_remove_one (struct pci_dev *pdev)
  686. {
  687. struct net_device *dev = pci_get_drvdata (pdev);
  688. unsigned long mmio_addr;
  689. mmio_addr = dev->base_addr;
  690. unregister_netdev (dev);
  691. if (mmio_addr) {
  692. iounmap ((void __iomem *)mmio_addr);
  693. pci_release_regions (pdev);
  694. }
  695. free_netdev (dev);
  696. pci_set_drvdata (pdev, NULL);
  697. }
  698. static int
  699. tc35815_init_queues(struct net_device *dev)
  700. {
  701. struct tc35815_local *lp = dev->priv;
  702. int i;
  703. unsigned long fd_addr;
  704. if (!lp->fd_buf) {
  705. BUG_ON(sizeof(struct FDesc) +
  706. sizeof(struct BDesc) * RX_BUF_NUM +
  707. sizeof(struct FDesc) * RX_FD_NUM +
  708. sizeof(struct TxFD) * TX_FD_NUM >
  709. PAGE_SIZE * FD_PAGE_NUM);
  710. if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0)
  711. return -ENOMEM;
  712. for (i = 0; i < RX_BUF_NUM; i++) {
  713. #ifdef TC35815_USE_PACKEDBUFFER
  714. if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) {
  715. while (--i >= 0) {
  716. free_rxbuf_page(lp->pci_dev,
  717. lp->data_buf[i],
  718. lp->data_buf_dma[i]);
  719. lp->data_buf[i] = NULL;
  720. }
  721. pci_free_consistent(lp->pci_dev,
  722. PAGE_SIZE * FD_PAGE_NUM,
  723. lp->fd_buf,
  724. lp->fd_buf_dma);
  725. lp->fd_buf = NULL;
  726. return -ENOMEM;
  727. }
  728. #else
  729. lp->rx_skbs[i].skb =
  730. alloc_rxbuf_skb(dev, lp->pci_dev,
  731. &lp->rx_skbs[i].skb_dma);
  732. if (!lp->rx_skbs[i].skb) {
  733. while (--i >= 0) {
  734. free_rxbuf_skb(lp->pci_dev,
  735. lp->rx_skbs[i].skb,
  736. lp->rx_skbs[i].skb_dma);
  737. lp->rx_skbs[i].skb = NULL;
  738. }
  739. pci_free_consistent(lp->pci_dev,
  740. PAGE_SIZE * FD_PAGE_NUM,
  741. lp->fd_buf,
  742. lp->fd_buf_dma);
  743. lp->fd_buf = NULL;
  744. return -ENOMEM;
  745. }
  746. #endif
  747. }
  748. printk(KERN_DEBUG "%s: FD buf %p DataBuf",
  749. dev->name, lp->fd_buf);
  750. #ifdef TC35815_USE_PACKEDBUFFER
  751. printk(" DataBuf");
  752. for (i = 0; i < RX_BUF_NUM; i++)
  753. printk(" %p", lp->data_buf[i]);
  754. #endif
  755. printk("\n");
  756. } else {
  757. for (i = 0; i < FD_PAGE_NUM; i++) {
  758. clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE));
  759. }
  760. }
  761. fd_addr = (unsigned long)lp->fd_buf;
  762. /* Free Descriptors (for Receive) */
  763. lp->rfd_base = (struct RxFD *)fd_addr;
  764. fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
  765. for (i = 0; i < RX_FD_NUM; i++) {
  766. lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
  767. }
  768. lp->rfd_cur = lp->rfd_base;
  769. lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
  770. /* Transmit Descriptors */
  771. lp->tfd_base = (struct TxFD *)fd_addr;
  772. fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
  773. for (i = 0; i < TX_FD_NUM; i++) {
  774. lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
  775. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  776. lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
  777. }
  778. lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
  779. lp->tfd_start = 0;
  780. lp->tfd_end = 0;
  781. /* Buffer List (for Receive) */
  782. lp->fbl_ptr = (struct FrFD *)fd_addr;
  783. lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
  784. lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
  785. #ifndef TC35815_USE_PACKEDBUFFER
  786. /*
  787. * move all allocated skbs to head of rx_skbs[] array.
  788. * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
  789. * tc35815_rx() had failed.
  790. */
  791. lp->fbl_count = 0;
  792. for (i = 0; i < RX_BUF_NUM; i++) {
  793. if (lp->rx_skbs[i].skb) {
  794. if (i != lp->fbl_count) {
  795. lp->rx_skbs[lp->fbl_count].skb =
  796. lp->rx_skbs[i].skb;
  797. lp->rx_skbs[lp->fbl_count].skb_dma =
  798. lp->rx_skbs[i].skb_dma;
  799. }
  800. lp->fbl_count++;
  801. }
  802. }
  803. #endif
  804. for (i = 0; i < RX_BUF_NUM; i++) {
  805. #ifdef TC35815_USE_PACKEDBUFFER
  806. lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
  807. #else
  808. if (i >= lp->fbl_count) {
  809. lp->fbl_ptr->bd[i].BuffData = 0;
  810. lp->fbl_ptr->bd[i].BDCtl = 0;
  811. continue;
  812. }
  813. lp->fbl_ptr->bd[i].BuffData =
  814. cpu_to_le32(lp->rx_skbs[i].skb_dma);
  815. #endif
  816. /* BDID is index of FrFD.bd[] */
  817. lp->fbl_ptr->bd[i].BDCtl =
  818. cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
  819. RX_BUF_SIZE);
  820. }
  821. #ifdef TC35815_USE_PACKEDBUFFER
  822. lp->fbl_curid = 0;
  823. #endif
  824. printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
  825. dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
  826. return 0;
  827. }
  828. static void
  829. tc35815_clear_queues(struct net_device *dev)
  830. {
  831. struct tc35815_local *lp = dev->priv;
  832. int i;
  833. for (i = 0; i < TX_FD_NUM; i++) {
  834. u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
  835. struct sk_buff *skb =
  836. fdsystem != 0xffffffff ?
  837. lp->tx_skbs[fdsystem].skb : NULL;
  838. #ifdef DEBUG
  839. if (lp->tx_skbs[i].skb != skb) {
  840. printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
  841. panic_queues(dev);
  842. }
  843. #else
  844. BUG_ON(lp->tx_skbs[i].skb != skb);
  845. #endif
  846. if (skb) {
  847. pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
  848. lp->tx_skbs[i].skb = NULL;
  849. lp->tx_skbs[i].skb_dma = 0;
  850. dev_kfree_skb_any(skb);
  851. }
  852. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  853. }
  854. tc35815_init_queues(dev);
  855. }
  856. static void
  857. tc35815_free_queues(struct net_device *dev)
  858. {
  859. struct tc35815_local *lp = dev->priv;
  860. int i;
  861. if (lp->tfd_base) {
  862. for (i = 0; i < TX_FD_NUM; i++) {
  863. u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
  864. struct sk_buff *skb =
  865. fdsystem != 0xffffffff ?
  866. lp->tx_skbs[fdsystem].skb : NULL;
  867. #ifdef DEBUG
  868. if (lp->tx_skbs[i].skb != skb) {
  869. printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
  870. panic_queues(dev);
  871. }
  872. #else
  873. BUG_ON(lp->tx_skbs[i].skb != skb);
  874. #endif
  875. if (skb) {
  876. dev_kfree_skb(skb);
  877. pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
  878. lp->tx_skbs[i].skb = NULL;
  879. lp->tx_skbs[i].skb_dma = 0;
  880. }
  881. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  882. }
  883. }
  884. lp->rfd_base = NULL;
  885. lp->rfd_limit = NULL;
  886. lp->rfd_cur = NULL;
  887. lp->fbl_ptr = NULL;
  888. for (i = 0; i < RX_BUF_NUM; i++) {
  889. #ifdef TC35815_USE_PACKEDBUFFER
  890. if (lp->data_buf[i]) {
  891. free_rxbuf_page(lp->pci_dev,
  892. lp->data_buf[i], lp->data_buf_dma[i]);
  893. lp->data_buf[i] = NULL;
  894. }
  895. #else
  896. if (lp->rx_skbs[i].skb) {
  897. free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
  898. lp->rx_skbs[i].skb_dma);
  899. lp->rx_skbs[i].skb = NULL;
  900. }
  901. #endif
  902. }
  903. if (lp->fd_buf) {
  904. pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
  905. lp->fd_buf, lp->fd_buf_dma);
  906. lp->fd_buf = NULL;
  907. }
  908. }
  909. static void
  910. dump_txfd(struct TxFD *fd)
  911. {
  912. printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
  913. le32_to_cpu(fd->fd.FDNext),
  914. le32_to_cpu(fd->fd.FDSystem),
  915. le32_to_cpu(fd->fd.FDStat),
  916. le32_to_cpu(fd->fd.FDCtl));
  917. printk("BD: ");
  918. printk(" %08x %08x",
  919. le32_to_cpu(fd->bd.BuffData),
  920. le32_to_cpu(fd->bd.BDCtl));
  921. printk("\n");
  922. }
  923. static int
  924. dump_rxfd(struct RxFD *fd)
  925. {
  926. int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
  927. if (bd_count > 8)
  928. bd_count = 8;
  929. printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
  930. le32_to_cpu(fd->fd.FDNext),
  931. le32_to_cpu(fd->fd.FDSystem),
  932. le32_to_cpu(fd->fd.FDStat),
  933. le32_to_cpu(fd->fd.FDCtl));
  934. if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
  935. return 0;
  936. printk("BD: ");
  937. for (i = 0; i < bd_count; i++)
  938. printk(" %08x %08x",
  939. le32_to_cpu(fd->bd[i].BuffData),
  940. le32_to_cpu(fd->bd[i].BDCtl));
  941. printk("\n");
  942. return bd_count;
  943. }
  944. #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
  945. static void
  946. dump_frfd(struct FrFD *fd)
  947. {
  948. int i;
  949. printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
  950. le32_to_cpu(fd->fd.FDNext),
  951. le32_to_cpu(fd->fd.FDSystem),
  952. le32_to_cpu(fd->fd.FDStat),
  953. le32_to_cpu(fd->fd.FDCtl));
  954. printk("BD: ");
  955. for (i = 0; i < RX_BUF_NUM; i++)
  956. printk(" %08x %08x",
  957. le32_to_cpu(fd->bd[i].BuffData),
  958. le32_to_cpu(fd->bd[i].BDCtl));
  959. printk("\n");
  960. }
  961. #endif
  962. #ifdef DEBUG
  963. static void
  964. panic_queues(struct net_device *dev)
  965. {
  966. struct tc35815_local *lp = dev->priv;
  967. int i;
  968. printk("TxFD base %p, start %u, end %u\n",
  969. lp->tfd_base, lp->tfd_start, lp->tfd_end);
  970. printk("RxFD base %p limit %p cur %p\n",
  971. lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
  972. printk("FrFD %p\n", lp->fbl_ptr);
  973. for (i = 0; i < TX_FD_NUM; i++)
  974. dump_txfd(&lp->tfd_base[i]);
  975. for (i = 0; i < RX_FD_NUM; i++) {
  976. int bd_count = dump_rxfd(&lp->rfd_base[i]);
  977. i += (bd_count + 1) / 2; /* skip BDs */
  978. }
  979. dump_frfd(lp->fbl_ptr);
  980. panic("%s: Illegal queue state.", dev->name);
  981. }
  982. #endif
  983. static void print_eth(char *add)
  984. {
  985. int i;
  986. printk("print_eth(%p)\n", add);
  987. for (i = 0; i < 6; i++)
  988. printk(" %2.2X", (unsigned char) add[i + 6]);
  989. printk(" =>");
  990. for (i = 0; i < 6; i++)
  991. printk(" %2.2X", (unsigned char) add[i]);
  992. printk(" : %2.2X%2.2X\n", (unsigned char) add[12], (unsigned char) add[13]);
  993. }
  994. static int tc35815_tx_full(struct net_device *dev)
  995. {
  996. struct tc35815_local *lp = dev->priv;
  997. return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
  998. }
  999. static void tc35815_restart(struct net_device *dev)
  1000. {
  1001. struct tc35815_local *lp = dev->priv;
  1002. int pid = lp->phy_addr;
  1003. int do_phy_reset = 1;
  1004. del_timer(&lp->timer); /* Kill if running */
  1005. if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) {
  1006. /* Resetting PHY cause problem on some chip... (SEEQ 80221) */
  1007. do_phy_reset = 0;
  1008. }
  1009. if (do_phy_reset) {
  1010. int timeout;
  1011. tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET);
  1012. timeout = 100;
  1013. while (--timeout) {
  1014. if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET))
  1015. break;
  1016. udelay(1);
  1017. }
  1018. if (!timeout)
  1019. printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
  1020. }
  1021. tc35815_chip_reset(dev);
  1022. tc35815_clear_queues(dev);
  1023. tc35815_chip_init(dev);
  1024. /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
  1025. tc35815_set_multicast_list(dev);
  1026. }
  1027. static void tc35815_tx_timeout(struct net_device *dev)
  1028. {
  1029. struct tc35815_local *lp = dev->priv;
  1030. struct tc35815_regs __iomem *tr =
  1031. (struct tc35815_regs __iomem *)dev->base_addr;
  1032. printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
  1033. dev->name, tc_readl(&tr->Tx_Stat));
  1034. /* Try to restart the adaptor. */
  1035. spin_lock_irq(&lp->lock);
  1036. tc35815_restart(dev);
  1037. spin_unlock_irq(&lp->lock);
  1038. lp->stats.tx_errors++;
  1039. /* If we have space available to accept new transmit
  1040. * requests, wake up the queueing layer. This would
  1041. * be the case if the chipset_init() call above just
  1042. * flushes out the tx queue and empties it.
  1043. *
  1044. * If instead, the tx queue is retained then the
  1045. * netif_wake_queue() call should be placed in the
  1046. * TX completion interrupt handler of the driver instead
  1047. * of here.
  1048. */
  1049. if (!tc35815_tx_full(dev))
  1050. netif_wake_queue(dev);
  1051. }
  1052. /*
  1053. * Open/initialize the board. This is called (in the current kernel)
  1054. * sometime after booting when the 'ifconfig' program is run.
  1055. *
  1056. * This routine should set everything up anew at each open, even
  1057. * registers that "should" only need to be set once at boot, so that
  1058. * there is non-reboot way to recover if something goes wrong.
  1059. */
  1060. static int
  1061. tc35815_open(struct net_device *dev)
  1062. {
  1063. struct tc35815_local *lp = dev->priv;
  1064. /*
  1065. * This is used if the interrupt line can turned off (shared).
  1066. * See 3c503.c for an example of selecting the IRQ at config-time.
  1067. */
  1068. if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) {
  1069. return -EAGAIN;
  1070. }
  1071. del_timer(&lp->timer); /* Kill if running */
  1072. tc35815_chip_reset(dev);
  1073. if (tc35815_init_queues(dev) != 0) {
  1074. free_irq(dev->irq, dev);
  1075. return -EAGAIN;
  1076. }
  1077. /* Reset the hardware here. Don't forget to set the station address. */
  1078. spin_lock_irq(&lp->lock);
  1079. tc35815_chip_init(dev);
  1080. spin_unlock_irq(&lp->lock);
  1081. /* We are now ready to accept transmit requeusts from
  1082. * the queueing layer of the networking.
  1083. */
  1084. netif_start_queue(dev);
  1085. return 0;
  1086. }
  1087. /* This will only be invoked if your driver is _not_ in XOFF state.
  1088. * What this means is that you need not check it, and that this
  1089. * invariant will hold if you make sure that the netif_*_queue()
  1090. * calls are done at the proper times.
  1091. */
  1092. static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
  1093. {
  1094. struct tc35815_local *lp = dev->priv;
  1095. struct TxFD *txfd;
  1096. unsigned long flags;
  1097. /* If some error occurs while trying to transmit this
  1098. * packet, you should return '1' from this function.
  1099. * In such a case you _may not_ do anything to the
  1100. * SKB, it is still owned by the network queueing
  1101. * layer when an error is returned. This means you
  1102. * may not modify any SKB fields, you may not free
  1103. * the SKB, etc.
  1104. */
  1105. /* This is the most common case for modern hardware.
  1106. * The spinlock protects this code from the TX complete
  1107. * hardware interrupt handler. Queue flow control is
  1108. * thus managed under this lock as well.
  1109. */
  1110. spin_lock_irqsave(&lp->lock, flags);
  1111. /* failsafe... (handle txdone now if half of FDs are used) */
  1112. if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
  1113. TX_FD_NUM / 2)
  1114. tc35815_txdone(dev);
  1115. if (netif_msg_pktdata(lp))
  1116. print_eth(skb->data);
  1117. #ifdef DEBUG
  1118. if (lp->tx_skbs[lp->tfd_start].skb) {
  1119. printk("%s: tx_skbs conflict.\n", dev->name);
  1120. panic_queues(dev);
  1121. }
  1122. #else
  1123. BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
  1124. #endif
  1125. lp->tx_skbs[lp->tfd_start].skb = skb;
  1126. lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
  1127. /*add to ring */
  1128. txfd = &lp->tfd_base[lp->tfd_start];
  1129. txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
  1130. txfd->bd.BDCtl = cpu_to_le32(skb->len);
  1131. txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
  1132. txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
  1133. if (lp->tfd_start == lp->tfd_end) {
  1134. struct tc35815_regs __iomem *tr =
  1135. (struct tc35815_regs __iomem *)dev->base_addr;
  1136. /* Start DMA Transmitter. */
  1137. txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
  1138. #ifdef GATHER_TXINT
  1139. txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
  1140. #endif
  1141. if (netif_msg_tx_queued(lp)) {
  1142. printk("%s: starting TxFD.\n", dev->name);
  1143. dump_txfd(txfd);
  1144. }
  1145. tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
  1146. } else {
  1147. txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
  1148. if (netif_msg_tx_queued(lp)) {
  1149. printk("%s: queueing TxFD.\n", dev->name);
  1150. dump_txfd(txfd);
  1151. }
  1152. }
  1153. lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
  1154. dev->trans_start = jiffies;
  1155. /* If we just used up the very last entry in the
  1156. * TX ring on this device, tell the queueing
  1157. * layer to send no more.
  1158. */
  1159. if (tc35815_tx_full(dev)) {
  1160. if (netif_msg_tx_queued(lp))
  1161. printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
  1162. netif_stop_queue(dev);
  1163. }
  1164. /* When the TX completion hw interrupt arrives, this
  1165. * is when the transmit statistics are updated.
  1166. */
  1167. spin_unlock_irqrestore(&lp->lock, flags);
  1168. return 0;
  1169. }
  1170. #define FATAL_ERROR_INT \
  1171. (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
  1172. static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
  1173. {
  1174. static int count;
  1175. printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
  1176. dev->name, status);
  1177. if (status & Int_IntPCI)
  1178. printk(" IntPCI");
  1179. if (status & Int_DmParErr)
  1180. printk(" DmParErr");
  1181. if (status & Int_IntNRAbt)
  1182. printk(" IntNRAbt");
  1183. printk("\n");
  1184. if (count++ > 100)
  1185. panic("%s: Too many fatal errors.", dev->name);
  1186. printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
  1187. /* Try to restart the adaptor. */
  1188. tc35815_restart(dev);
  1189. }
  1190. #ifdef TC35815_NAPI
  1191. static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
  1192. #else
  1193. static int tc35815_do_interrupt(struct net_device *dev, u32 status)
  1194. #endif
  1195. {
  1196. struct tc35815_local *lp = dev->priv;
  1197. struct tc35815_regs __iomem *tr =
  1198. (struct tc35815_regs __iomem *)dev->base_addr;
  1199. int ret = -1;
  1200. /* Fatal errors... */
  1201. if (status & FATAL_ERROR_INT) {
  1202. tc35815_fatal_error_interrupt(dev, status);
  1203. return 0;
  1204. }
  1205. /* recoverable errors */
  1206. if (status & Int_IntFDAEx) {
  1207. /* disable FDAEx int. (until we make rooms...) */
  1208. tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
  1209. printk(KERN_WARNING
  1210. "%s: Free Descriptor Area Exhausted (%#x).\n",
  1211. dev->name, status);
  1212. lp->stats.rx_dropped++;
  1213. ret = 0;
  1214. }
  1215. if (status & Int_IntBLEx) {
  1216. /* disable BLEx int. (until we make rooms...) */
  1217. tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
  1218. printk(KERN_WARNING
  1219. "%s: Buffer List Exhausted (%#x).\n",
  1220. dev->name, status);
  1221. lp->stats.rx_dropped++;
  1222. ret = 0;
  1223. }
  1224. if (status & Int_IntExBD) {
  1225. printk(KERN_WARNING
  1226. "%s: Excessive Buffer Descriptiors (%#x).\n",
  1227. dev->name, status);
  1228. lp->stats.rx_length_errors++;
  1229. ret = 0;
  1230. }
  1231. /* normal notification */
  1232. if (status & Int_IntMacRx) {
  1233. /* Got a packet(s). */
  1234. #ifdef TC35815_NAPI
  1235. ret = tc35815_rx(dev, limit);
  1236. #else
  1237. tc35815_rx(dev);
  1238. ret = 0;
  1239. #endif
  1240. lp->lstats.rx_ints++;
  1241. }
  1242. if (status & Int_IntMacTx) {
  1243. /* Transmit complete. */
  1244. lp->lstats.tx_ints++;
  1245. tc35815_txdone(dev);
  1246. netif_wake_queue(dev);
  1247. ret = 0;
  1248. }
  1249. return ret;
  1250. }
  1251. /*
  1252. * The typical workload of the driver:
  1253. * Handle the network interface interrupts.
  1254. */
  1255. static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
  1256. {
  1257. struct net_device *dev = dev_id;
  1258. struct tc35815_regs __iomem *tr =
  1259. (struct tc35815_regs __iomem *)dev->base_addr;
  1260. #ifdef TC35815_NAPI
  1261. u32 dmactl = tc_readl(&tr->DMA_Ctl);
  1262. if (!(dmactl & DMA_IntMask)) {
  1263. /* disable interrupts */
  1264. tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
  1265. if (netif_rx_schedule_prep(dev))
  1266. __netif_rx_schedule(dev);
  1267. else {
  1268. printk(KERN_ERR "%s: interrupt taken in poll\n",
  1269. dev->name);
  1270. BUG();
  1271. }
  1272. (void)tc_readl(&tr->Int_Src); /* flush */
  1273. return IRQ_HANDLED;
  1274. }
  1275. return IRQ_NONE;
  1276. #else
  1277. struct tc35815_local *lp = dev->priv;
  1278. int handled;
  1279. u32 status;
  1280. spin_lock(&lp->lock);
  1281. status = tc_readl(&tr->Int_Src);
  1282. tc_writel(status, &tr->Int_Src); /* write to clear */
  1283. handled = tc35815_do_interrupt(dev, status);
  1284. (void)tc_readl(&tr->Int_Src); /* flush */
  1285. spin_unlock(&lp->lock);
  1286. return IRQ_RETVAL(handled >= 0);
  1287. #endif /* TC35815_NAPI */
  1288. }
  1289. #ifdef CONFIG_NET_POLL_CONTROLLER
  1290. static void tc35815_poll_controller(struct net_device *dev)
  1291. {
  1292. disable_irq(dev->irq);
  1293. tc35815_interrupt(dev->irq, dev);
  1294. enable_irq(dev->irq);
  1295. }
  1296. #endif
  1297. /* We have a good packet(s), get it/them out of the buffers. */
  1298. #ifdef TC35815_NAPI
  1299. static int
  1300. tc35815_rx(struct net_device *dev, int limit)
  1301. #else
  1302. static void
  1303. tc35815_rx(struct net_device *dev)
  1304. #endif
  1305. {
  1306. struct tc35815_local *lp = dev->priv;
  1307. unsigned int fdctl;
  1308. int i;
  1309. int buf_free_count = 0;
  1310. int fd_free_count = 0;
  1311. #ifdef TC35815_NAPI
  1312. int received = 0;
  1313. #endif
  1314. while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
  1315. int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
  1316. int pkt_len = fdctl & FD_FDLength_MASK;
  1317. int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
  1318. #ifdef DEBUG
  1319. struct RxFD *next_rfd;
  1320. #endif
  1321. #if (RX_CTL_CMD & Rx_StripCRC) == 0
  1322. pkt_len -= 4;
  1323. #endif
  1324. if (netif_msg_rx_status(lp))
  1325. dump_rxfd(lp->rfd_cur);
  1326. if (status & Rx_Good) {
  1327. struct sk_buff *skb;
  1328. unsigned char *data;
  1329. int cur_bd;
  1330. #ifdef TC35815_USE_PACKEDBUFFER
  1331. int offset;
  1332. #endif
  1333. #ifdef TC35815_NAPI
  1334. if (--limit < 0)
  1335. break;
  1336. #endif
  1337. #ifdef TC35815_USE_PACKEDBUFFER
  1338. BUG_ON(bd_count > 2);
  1339. skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
  1340. if (skb == NULL) {
  1341. printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
  1342. dev->name);
  1343. lp->stats.rx_dropped++;
  1344. break;
  1345. }
  1346. skb_reserve(skb, 2); /* 16 bit alignment */
  1347. data = skb_put(skb, pkt_len);
  1348. /* copy from receive buffer */
  1349. cur_bd = 0;
  1350. offset = 0;
  1351. while (offset < pkt_len && cur_bd < bd_count) {
  1352. int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
  1353. BD_BuffLength_MASK;
  1354. dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
  1355. void *rxbuf = rxbuf_bus_to_virt(lp, dma);
  1356. if (offset + len > pkt_len)
  1357. len = pkt_len - offset;
  1358. #ifdef TC35815_DMA_SYNC_ONDEMAND
  1359. pci_dma_sync_single_for_cpu(lp->pci_dev,
  1360. dma, len,
  1361. PCI_DMA_FROMDEVICE);
  1362. #endif
  1363. memcpy(data + offset, rxbuf, len);
  1364. #ifdef TC35815_DMA_SYNC_ONDEMAND
  1365. pci_dma_sync_single_for_device(lp->pci_dev,
  1366. dma, len,
  1367. PCI_DMA_FROMDEVICE);
  1368. #endif
  1369. offset += len;
  1370. cur_bd++;
  1371. }
  1372. #else /* TC35815_USE_PACKEDBUFFER */
  1373. BUG_ON(bd_count > 1);
  1374. cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
  1375. & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
  1376. #ifdef DEBUG
  1377. if (cur_bd >= RX_BUF_NUM) {
  1378. printk("%s: invalid BDID.\n", dev->name);
  1379. panic_queues(dev);
  1380. }
  1381. BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
  1382. (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
  1383. if (!lp->rx_skbs[cur_bd].skb) {
  1384. printk("%s: NULL skb.\n", dev->name);
  1385. panic_queues(dev);
  1386. }
  1387. #else
  1388. BUG_ON(cur_bd >= RX_BUF_NUM);
  1389. #endif
  1390. skb = lp->rx_skbs[cur_bd].skb;
  1391. prefetch(skb->data);
  1392. lp->rx_skbs[cur_bd].skb = NULL;
  1393. lp->fbl_count--;
  1394. pci_unmap_single(lp->pci_dev,
  1395. lp->rx_skbs[cur_bd].skb_dma,
  1396. RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  1397. if (!HAVE_DMA_RXALIGN(lp))
  1398. memmove(skb->data, skb->data - 2, pkt_len);
  1399. data = skb_put(skb, pkt_len);
  1400. #endif /* TC35815_USE_PACKEDBUFFER */
  1401. if (netif_msg_pktdata(lp))
  1402. print_eth(data);
  1403. skb->protocol = eth_type_trans(skb, dev);
  1404. #ifdef TC35815_NAPI
  1405. netif_receive_skb(skb);
  1406. received++;
  1407. #else
  1408. netif_rx(skb);
  1409. #endif
  1410. dev->last_rx = jiffies;
  1411. lp->stats.rx_packets++;
  1412. lp->stats.rx_bytes += pkt_len;
  1413. } else {
  1414. lp->stats.rx_errors++;
  1415. printk(KERN_DEBUG "%s: Rx error (status %x)\n",
  1416. dev->name, status & Rx_Stat_Mask);
  1417. /* WORKAROUND: LongErr and CRCErr means Overflow. */
  1418. if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
  1419. status &= ~(Rx_LongErr|Rx_CRCErr);
  1420. status |= Rx_Over;
  1421. }
  1422. if (status & Rx_LongErr) lp->stats.rx_length_errors++;
  1423. if (status & Rx_Over) lp->stats.rx_fifo_errors++;
  1424. if (status & Rx_CRCErr) lp->stats.rx_crc_errors++;
  1425. if (status & Rx_Align) lp->stats.rx_frame_errors++;
  1426. }
  1427. if (bd_count > 0) {
  1428. /* put Free Buffer back to controller */
  1429. int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
  1430. unsigned char id =
  1431. (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
  1432. #ifdef DEBUG
  1433. if (id >= RX_BUF_NUM) {
  1434. printk("%s: invalid BDID.\n", dev->name);
  1435. panic_queues(dev);
  1436. }
  1437. #else
  1438. BUG_ON(id >= RX_BUF_NUM);
  1439. #endif
  1440. /* free old buffers */
  1441. #ifdef TC35815_USE_PACKEDBUFFER
  1442. while (lp->fbl_curid != id)
  1443. #else
  1444. while (lp->fbl_count < RX_BUF_NUM)
  1445. #endif
  1446. {
  1447. #ifdef TC35815_USE_PACKEDBUFFER
  1448. unsigned char curid = lp->fbl_curid;
  1449. #else
  1450. unsigned char curid =
  1451. (id + 1 + lp->fbl_count) % RX_BUF_NUM;
  1452. #endif
  1453. struct BDesc *bd = &lp->fbl_ptr->bd[curid];
  1454. #ifdef DEBUG
  1455. bdctl = le32_to_cpu(bd->BDCtl);
  1456. if (bdctl & BD_CownsBD) {
  1457. printk("%s: Freeing invalid BD.\n",
  1458. dev->name);
  1459. panic_queues(dev);
  1460. }
  1461. #endif
  1462. /* pass BD to controler */
  1463. #ifndef TC35815_USE_PACKEDBUFFER
  1464. if (!lp->rx_skbs[curid].skb) {
  1465. lp->rx_skbs[curid].skb =
  1466. alloc_rxbuf_skb(dev,
  1467. lp->pci_dev,
  1468. &lp->rx_skbs[curid].skb_dma);
  1469. if (!lp->rx_skbs[curid].skb)
  1470. break; /* try on next reception */
  1471. bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
  1472. }
  1473. #endif /* TC35815_USE_PACKEDBUFFER */
  1474. /* Note: BDLength was modified by chip. */
  1475. bd->BDCtl = cpu_to_le32(BD_CownsBD |
  1476. (curid << BD_RxBDID_SHIFT) |
  1477. RX_BUF_SIZE);
  1478. #ifdef TC35815_USE_PACKEDBUFFER
  1479. lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
  1480. if (netif_msg_rx_status(lp)) {
  1481. printk("%s: Entering new FBD %d\n",
  1482. dev->name, lp->fbl_curid);
  1483. dump_frfd(lp->fbl_ptr);
  1484. }
  1485. #else
  1486. lp->fbl_count++;
  1487. #endif
  1488. buf_free_count++;
  1489. }
  1490. }
  1491. /* put RxFD back to controller */
  1492. #ifdef DEBUG
  1493. next_rfd = fd_bus_to_virt(lp,
  1494. le32_to_cpu(lp->rfd_cur->fd.FDNext));
  1495. if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
  1496. printk("%s: RxFD FDNext invalid.\n", dev->name);
  1497. panic_queues(dev);
  1498. }
  1499. #endif
  1500. for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
  1501. /* pass FD to controler */
  1502. #ifdef DEBUG
  1503. lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
  1504. #else
  1505. lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
  1506. #endif
  1507. lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
  1508. lp->rfd_cur++;
  1509. fd_free_count++;
  1510. }
  1511. if (lp->rfd_cur > lp->rfd_limit)
  1512. lp->rfd_cur = lp->rfd_base;
  1513. #ifdef DEBUG
  1514. if (lp->rfd_cur != next_rfd)
  1515. printk("rfd_cur = %p, next_rfd %p\n",
  1516. lp->rfd_cur, next_rfd);
  1517. #endif
  1518. }
  1519. /* re-enable BL/FDA Exhaust interrupts. */
  1520. if (fd_free_count) {
  1521. struct tc35815_regs __iomem *tr =
  1522. (struct tc35815_regs __iomem *)dev->base_addr;
  1523. u32 en, en_old = tc_readl(&tr->Int_En);
  1524. en = en_old | Int_FDAExEn;
  1525. if (buf_free_count)
  1526. en |= Int_BLExEn;
  1527. if (en != en_old)
  1528. tc_writel(en, &tr->Int_En);
  1529. }
  1530. #ifdef TC35815_NAPI
  1531. return received;
  1532. #endif
  1533. }
  1534. #ifdef TC35815_NAPI
  1535. static int
  1536. tc35815_poll(struct net_device *dev, int *budget)
  1537. {
  1538. struct tc35815_local *lp = dev->priv;
  1539. struct tc35815_regs __iomem *tr =
  1540. (struct tc35815_regs __iomem *)dev->base_addr;
  1541. int limit = min(*budget, dev->quota);
  1542. int received = 0, handled;
  1543. u32 status;
  1544. spin_lock(&lp->lock);
  1545. status = tc_readl(&tr->Int_Src);
  1546. do {
  1547. tc_writel(status, &tr->Int_Src); /* write to clear */
  1548. handled = tc35815_do_interrupt(dev, status, limit);
  1549. if (handled >= 0) {
  1550. received += handled;
  1551. limit -= handled;
  1552. if (limit <= 0)
  1553. break;
  1554. }
  1555. status = tc_readl(&tr->Int_Src);
  1556. } while (status);
  1557. spin_unlock(&lp->lock);
  1558. dev->quota -= received;
  1559. *budget -= received;
  1560. if (limit <= 0)
  1561. return 1;
  1562. netif_rx_complete(dev);
  1563. /* enable interrupts */
  1564. tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
  1565. return 0;
  1566. }
  1567. #endif
  1568. #ifdef NO_CHECK_CARRIER
  1569. #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
  1570. #else
  1571. #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
  1572. #endif
  1573. static void
  1574. tc35815_check_tx_stat(struct net_device *dev, int status)
  1575. {
  1576. struct tc35815_local *lp = dev->priv;
  1577. const char *msg = NULL;
  1578. /* count collisions */
  1579. if (status & Tx_ExColl)
  1580. lp->stats.collisions += 16;
  1581. if (status & Tx_TxColl_MASK)
  1582. lp->stats.collisions += status & Tx_TxColl_MASK;
  1583. #ifndef NO_CHECK_CARRIER
  1584. /* TX4939 does not have NCarr */
  1585. if (lp->boardtype == TC35815_TX4939)
  1586. status &= ~Tx_NCarr;
  1587. #ifdef WORKAROUND_LOSTCAR
  1588. /* WORKAROUND: ignore LostCrS in full duplex operation */
  1589. if ((lp->timer_state != asleep && lp->timer_state != lcheck)
  1590. || lp->fullduplex)
  1591. status &= ~Tx_NCarr;
  1592. #endif
  1593. #endif
  1594. if (!(status & TX_STA_ERR)) {
  1595. /* no error. */
  1596. lp->stats.tx_packets++;
  1597. return;
  1598. }
  1599. lp->stats.tx_errors++;
  1600. if (status & Tx_ExColl) {
  1601. lp->stats.tx_aborted_errors++;
  1602. msg = "Excessive Collision.";
  1603. }
  1604. if (status & Tx_Under) {
  1605. lp->stats.tx_fifo_errors++;
  1606. msg = "Tx FIFO Underrun.";
  1607. if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
  1608. lp->lstats.tx_underrun++;
  1609. if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
  1610. struct tc35815_regs __iomem *tr =
  1611. (struct tc35815_regs __iomem *)dev->base_addr;
  1612. tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
  1613. msg = "Tx FIFO Underrun.Change Tx threshold to max.";
  1614. }
  1615. }
  1616. }
  1617. if (status & Tx_Defer) {
  1618. lp->stats.tx_fifo_errors++;
  1619. msg = "Excessive Deferral.";
  1620. }
  1621. #ifndef NO_CHECK_CARRIER
  1622. if (status & Tx_NCarr) {
  1623. lp->stats.tx_carrier_errors++;
  1624. msg = "Lost Carrier Sense.";
  1625. }
  1626. #endif
  1627. if (status & Tx_LateColl) {
  1628. lp->stats.tx_aborted_errors++;
  1629. msg = "Late Collision.";
  1630. }
  1631. if (status & Tx_TxPar) {
  1632. lp->stats.tx_fifo_errors++;
  1633. msg = "Transmit Parity Error.";
  1634. }
  1635. if (status & Tx_SQErr) {
  1636. lp->stats.tx_heartbeat_errors++;
  1637. msg = "Signal Quality Error.";
  1638. }
  1639. if (msg && netif_msg_tx_err(lp))
  1640. printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
  1641. }
  1642. /* This handles TX complete events posted by the device
  1643. * via interrupts.
  1644. */
  1645. static void
  1646. tc35815_txdone(struct net_device *dev)
  1647. {
  1648. struct tc35815_local *lp = dev->priv;
  1649. struct TxFD *txfd;
  1650. unsigned int fdctl;
  1651. txfd = &lp->tfd_base[lp->tfd_end];
  1652. while (lp->tfd_start != lp->tfd_end &&
  1653. !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
  1654. int status = le32_to_cpu(txfd->fd.FDStat);
  1655. struct sk_buff *skb;
  1656. unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
  1657. u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
  1658. if (netif_msg_tx_done(lp)) {
  1659. printk("%s: complete TxFD.\n", dev->name);
  1660. dump_txfd(txfd);
  1661. }
  1662. tc35815_check_tx_stat(dev, status);
  1663. skb = fdsystem != 0xffffffff ?
  1664. lp->tx_skbs[fdsystem].skb : NULL;
  1665. #ifdef DEBUG
  1666. if (lp->tx_skbs[lp->tfd_end].skb != skb) {
  1667. printk("%s: tx_skbs mismatch.\n", dev->name);
  1668. panic_queues(dev);
  1669. }
  1670. #else
  1671. BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
  1672. #endif
  1673. if (skb) {
  1674. lp->stats.tx_bytes += skb->len;
  1675. pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
  1676. lp->tx_skbs[lp->tfd_end].skb = NULL;
  1677. lp->tx_skbs[lp->tfd_end].skb_dma = 0;
  1678. #ifdef TC35815_NAPI
  1679. dev_kfree_skb_any(skb);
  1680. #else
  1681. dev_kfree_skb_irq(skb);
  1682. #endif
  1683. }
  1684. txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
  1685. lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
  1686. txfd = &lp->tfd_base[lp->tfd_end];
  1687. #ifdef DEBUG
  1688. if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
  1689. printk("%s: TxFD FDNext invalid.\n", dev->name);
  1690. panic_queues(dev);
  1691. }
  1692. #endif
  1693. if (fdnext & FD_Next_EOL) {
  1694. /* DMA Transmitter has been stopping... */
  1695. if (lp->tfd_end != lp->tfd_start) {
  1696. struct tc35815_regs __iomem *tr =
  1697. (struct tc35815_regs __iomem *)dev->base_addr;
  1698. int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
  1699. struct TxFD* txhead = &lp->tfd_base[head];
  1700. int qlen = (lp->tfd_start + TX_FD_NUM
  1701. - lp->tfd_end) % TX_FD_NUM;
  1702. #ifdef DEBUG
  1703. if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
  1704. printk("%s: TxFD FDCtl invalid.\n", dev->name);
  1705. panic_queues(dev);
  1706. }
  1707. #endif
  1708. /* log max queue length */
  1709. if (lp->lstats.max_tx_qlen < qlen)
  1710. lp->lstats.max_tx_qlen = qlen;
  1711. /* start DMA Transmitter again */
  1712. txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
  1713. #ifdef GATHER_TXINT
  1714. txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
  1715. #endif
  1716. if (netif_msg_tx_queued(lp)) {
  1717. printk("%s: start TxFD on queue.\n",
  1718. dev->name);
  1719. dump_txfd(txfd);
  1720. }
  1721. tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
  1722. }
  1723. break;
  1724. }
  1725. }
  1726. /* If we had stopped the queue due to a "tx full"
  1727. * condition, and space has now been made available,
  1728. * wake up the queue.
  1729. */
  1730. if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev))
  1731. netif_wake_queue(dev);
  1732. }
  1733. /* The inverse routine to tc35815_open(). */
  1734. static int
  1735. tc35815_close(struct net_device *dev)
  1736. {
  1737. struct tc35815_local *lp = dev->priv;
  1738. netif_stop_queue(dev);
  1739. /* Flush the Tx and disable Rx here. */
  1740. del_timer(&lp->timer); /* Kill if running */
  1741. tc35815_chip_reset(dev);
  1742. free_irq(dev->irq, dev);
  1743. tc35815_free_queues(dev);
  1744. return 0;
  1745. }
  1746. /*
  1747. * Get the current statistics.
  1748. * This may be called with the card open or closed.
  1749. */
  1750. static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
  1751. {
  1752. struct tc35815_local *lp = dev->priv;
  1753. struct tc35815_regs __iomem *tr =
  1754. (struct tc35815_regs __iomem *)dev->base_addr;
  1755. if (netif_running(dev)) {
  1756. /* Update the statistics from the device registers. */
  1757. lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
  1758. }
  1759. return &lp->stats;
  1760. }
  1761. static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
  1762. {
  1763. struct tc35815_local *lp = dev->priv;
  1764. struct tc35815_regs __iomem *tr =
  1765. (struct tc35815_regs __iomem *)dev->base_addr;
  1766. int cam_index = index * 6;
  1767. u32 cam_data;
  1768. u32 saved_addr;
  1769. saved_addr = tc_readl(&tr->CAM_Adr);
  1770. if (netif_msg_hw(lp)) {
  1771. int i;
  1772. printk(KERN_DEBUG "%s: CAM %d:", dev->name, index);
  1773. for (i = 0; i < 6; i++)
  1774. printk(" %02x", addr[i]);
  1775. printk("\n");
  1776. }
  1777. if (index & 1) {
  1778. /* read modify write */
  1779. tc_writel(cam_index - 2, &tr->CAM_Adr);
  1780. cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
  1781. cam_data |= addr[0] << 8 | addr[1];
  1782. tc_writel(cam_data, &tr->CAM_Data);
  1783. /* write whole word */
  1784. tc_writel(cam_index + 2, &tr->CAM_Adr);
  1785. cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
  1786. tc_writel(cam_data, &tr->CAM_Data);
  1787. } else {
  1788. /* write whole word */
  1789. tc_writel(cam_index, &tr->CAM_Adr);
  1790. cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
  1791. tc_writel(cam_data, &tr->CAM_Data);
  1792. /* read modify write */
  1793. tc_writel(cam_index + 4, &tr->CAM_Adr);
  1794. cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
  1795. cam_data |= addr[4] << 24 | (addr[5] << 16);
  1796. tc_writel(cam_data, &tr->CAM_Data);
  1797. }
  1798. tc_writel(saved_addr, &tr->CAM_Adr);
  1799. }
  1800. /*
  1801. * Set or clear the multicast filter for this adaptor.
  1802. * num_addrs == -1 Promiscuous mode, receive all packets
  1803. * num_addrs == 0 Normal mode, clear multicast list
  1804. * num_addrs > 0 Multicast mode, receive normal and MC packets,
  1805. * and do best-effort filtering.
  1806. */
  1807. static void
  1808. tc35815_set_multicast_list(struct net_device *dev)
  1809. {
  1810. struct tc35815_regs __iomem *tr =
  1811. (struct tc35815_regs __iomem *)dev->base_addr;
  1812. if (dev->flags&IFF_PROMISC)
  1813. {
  1814. #ifdef WORKAROUND_100HALF_PROMISC
  1815. /* With some (all?) 100MHalf HUB, controller will hang
  1816. * if we enabled promiscuous mode before linkup... */
  1817. struct tc35815_local *lp = dev->priv;
  1818. int pid = lp->phy_addr;
  1819. if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS))
  1820. return;
  1821. #endif
  1822. /* Enable promiscuous mode */
  1823. tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
  1824. }
  1825. else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
  1826. {
  1827. /* CAM 0, 1, 20 are reserved. */
  1828. /* Disable promiscuous mode, use normal mode. */
  1829. tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
  1830. }
  1831. else if(dev->mc_count)
  1832. {
  1833. struct dev_mc_list* cur_addr = dev->mc_list;
  1834. int i;
  1835. int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
  1836. tc_writel(0, &tr->CAM_Ctl);
  1837. /* Walk the address list, and load the filter */
  1838. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1839. if (!cur_addr)
  1840. break;
  1841. /* entry 0,1 is reserved. */
  1842. tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
  1843. ena_bits |= CAM_Ena_Bit(i + 2);
  1844. }
  1845. tc_writel(ena_bits, &tr->CAM_Ena);
  1846. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  1847. }
  1848. else {
  1849. tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
  1850. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  1851. }
  1852. }
  1853. static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1854. {
  1855. struct tc35815_local *lp = dev->priv;
  1856. strcpy(info->driver, MODNAME);
  1857. strcpy(info->version, DRV_VERSION);
  1858. strcpy(info->bus_info, pci_name(lp->pci_dev));
  1859. }
  1860. static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1861. {
  1862. struct tc35815_local *lp = dev->priv;
  1863. spin_lock_irq(&lp->lock);
  1864. mii_ethtool_gset(&lp->mii, cmd);
  1865. spin_unlock_irq(&lp->lock);
  1866. return 0;
  1867. }
  1868. static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1869. {
  1870. struct tc35815_local *lp = dev->priv;
  1871. int rc;
  1872. #if 1 /* use our negotiation method... */
  1873. /* Verify the settings we care about. */
  1874. if (cmd->autoneg != AUTONEG_ENABLE &&
  1875. cmd->autoneg != AUTONEG_DISABLE)
  1876. return -EINVAL;
  1877. if (cmd->autoneg == AUTONEG_DISABLE &&
  1878. ((cmd->speed != SPEED_100 &&
  1879. cmd->speed != SPEED_10) ||
  1880. (cmd->duplex != DUPLEX_HALF &&
  1881. cmd->duplex != DUPLEX_FULL)))
  1882. return -EINVAL;
  1883. /* Ok, do it to it. */
  1884. spin_lock_irq(&lp->lock);
  1885. del_timer(&lp->timer);
  1886. tc35815_start_auto_negotiation(dev, cmd);
  1887. spin_unlock_irq(&lp->lock);
  1888. rc = 0;
  1889. #else
  1890. spin_lock_irq(&lp->lock);
  1891. rc = mii_ethtool_sset(&lp->mii, cmd);
  1892. spin_unlock_irq(&lp->lock);
  1893. #endif
  1894. return rc;
  1895. }
  1896. static int tc35815_nway_reset(struct net_device *dev)
  1897. {
  1898. struct tc35815_local *lp = dev->priv;
  1899. int rc;
  1900. spin_lock_irq(&lp->lock);
  1901. rc = mii_nway_restart(&lp->mii);
  1902. spin_unlock_irq(&lp->lock);
  1903. return rc;
  1904. }
  1905. static u32 tc35815_get_link(struct net_device *dev)
  1906. {
  1907. struct tc35815_local *lp = dev->priv;
  1908. int rc;
  1909. spin_lock_irq(&lp->lock);
  1910. rc = mii_link_ok(&lp->mii);
  1911. spin_unlock_irq(&lp->lock);
  1912. return rc;
  1913. }
  1914. static u32 tc35815_get_msglevel(struct net_device *dev)
  1915. {
  1916. struct tc35815_local *lp = dev->priv;
  1917. return lp->msg_enable;
  1918. }
  1919. static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
  1920. {
  1921. struct tc35815_local *lp = dev->priv;
  1922. lp->msg_enable = datum;
  1923. }
  1924. static int tc35815_get_stats_count(struct net_device *dev)
  1925. {
  1926. struct tc35815_local *lp = dev->priv;
  1927. return sizeof(lp->lstats) / sizeof(int);
  1928. }
  1929. static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
  1930. {
  1931. struct tc35815_local *lp = dev->priv;
  1932. data[0] = lp->lstats.max_tx_qlen;
  1933. data[1] = lp->lstats.tx_ints;
  1934. data[2] = lp->lstats.rx_ints;
  1935. data[3] = lp->lstats.tx_underrun;
  1936. }
  1937. static struct {
  1938. const char str[ETH_GSTRING_LEN];
  1939. } ethtool_stats_keys[] = {
  1940. { "max_tx_qlen" },
  1941. { "tx_ints" },
  1942. { "rx_ints" },
  1943. { "tx_underrun" },
  1944. };
  1945. static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  1946. {
  1947. memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
  1948. }
  1949. static const struct ethtool_ops tc35815_ethtool_ops = {
  1950. .get_drvinfo = tc35815_get_drvinfo,
  1951. .get_settings = tc35815_get_settings,
  1952. .set_settings = tc35815_set_settings,
  1953. .nway_reset = tc35815_nway_reset,
  1954. .get_link = tc35815_get_link,
  1955. .get_msglevel = tc35815_get_msglevel,
  1956. .set_msglevel = tc35815_set_msglevel,
  1957. .get_strings = tc35815_get_strings,
  1958. .get_stats_count = tc35815_get_stats_count,
  1959. .get_ethtool_stats = tc35815_get_ethtool_stats,
  1960. .get_perm_addr = ethtool_op_get_perm_addr,
  1961. };
  1962. static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1963. {
  1964. struct tc35815_local *lp = dev->priv;
  1965. int rc;
  1966. if (!netif_running(dev))
  1967. return -EINVAL;
  1968. spin_lock_irq(&lp->lock);
  1969. rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
  1970. spin_unlock_irq(&lp->lock);
  1971. return rc;
  1972. }
  1973. static int tc_mdio_read(struct net_device *dev, int phy_id, int location)
  1974. {
  1975. struct tc35815_regs __iomem *tr =
  1976. (struct tc35815_regs __iomem *)dev->base_addr;
  1977. u32 data;
  1978. tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA);
  1979. while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
  1980. ;
  1981. data = tc_readl(&tr->MD_Data);
  1982. return data & 0xffff;
  1983. }
  1984. static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
  1985. int val)
  1986. {
  1987. struct tc35815_regs __iomem *tr =
  1988. (struct tc35815_regs __iomem *)dev->base_addr;
  1989. tc_writel(val, &tr->MD_Data);
  1990. tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA);
  1991. while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
  1992. ;
  1993. }
  1994. /* Auto negotiation. The scheme is very simple. We have a timer routine
  1995. * that keeps watching the auto negotiation process as it progresses.
  1996. * The DP83840 is first told to start doing it's thing, we set up the time
  1997. * and place the timer state machine in it's initial state.
  1998. *
  1999. * Here the timer peeks at the DP83840 status registers at each click to see
  2000. * if the auto negotiation has completed, we assume here that the DP83840 PHY
  2001. * will time out at some point and just tell us what (didn't) happen. For
  2002. * complete coverage we only allow so many of the ticks at this level to run,
  2003. * when this has expired we print a warning message and try another strategy.
  2004. * This "other" strategy is to force the interface into various speed/duplex
  2005. * configurations and we stop when we see a link-up condition before the
  2006. * maximum number of "peek" ticks have occurred.
  2007. *
  2008. * Once a valid link status has been detected we configure the BigMAC and
  2009. * the rest of the Happy Meal to speak the most efficient protocol we could
  2010. * get a clean link for. The priority for link configurations, highest first
  2011. * is:
  2012. * 100 Base-T Full Duplex
  2013. * 100 Base-T Half Duplex
  2014. * 10 Base-T Full Duplex
  2015. * 10 Base-T Half Duplex
  2016. *
  2017. * We start a new timer now, after a successful auto negotiation status has
  2018. * been detected. This timer just waits for the link-up bit to get set in
  2019. * the BMCR of the DP83840. When this occurs we print a kernel log message
  2020. * describing the link type in use and the fact that it is up.
  2021. *
  2022. * If a fatal error of some sort is signalled and detected in the interrupt
  2023. * service routine, and the chip is reset, or the link is ifconfig'd down
  2024. * and then back up, this entire process repeats itself all over again.
  2025. */
  2026. /* Note: Above comments are come from sunhme driver. */
  2027. static int tc35815_try_next_permutation(struct net_device *dev)
  2028. {
  2029. struct tc35815_local *lp = dev->priv;
  2030. int pid = lp->phy_addr;
  2031. unsigned short bmcr;
  2032. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2033. /* Downgrade from full to half duplex. Only possible via ethtool. */
  2034. if (bmcr & BMCR_FULLDPLX) {
  2035. bmcr &= ~BMCR_FULLDPLX;
  2036. printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
  2037. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2038. return 0;
  2039. }
  2040. /* Downgrade from 100 to 10. */
  2041. if (bmcr & BMCR_SPEED100) {
  2042. bmcr &= ~BMCR_SPEED100;
  2043. printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
  2044. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2045. return 0;
  2046. }
  2047. /* We've tried everything. */
  2048. return -1;
  2049. }
  2050. static void
  2051. tc35815_display_link_mode(struct net_device *dev)
  2052. {
  2053. struct tc35815_local *lp = dev->priv;
  2054. int pid = lp->phy_addr;
  2055. unsigned short lpa, bmcr;
  2056. char *speed = "", *duplex = "";
  2057. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2058. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2059. if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
  2060. speed = "100Mb/s";
  2061. else
  2062. speed = "10Mb/s";
  2063. if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
  2064. duplex = "Full Duplex";
  2065. else
  2066. duplex = "Half Duplex";
  2067. if (netif_msg_link(lp))
  2068. printk(KERN_INFO "%s: Link is up at %s, %s.\n",
  2069. dev->name, speed, duplex);
  2070. printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
  2071. dev->name,
  2072. bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
  2073. }
  2074. static void tc35815_display_forced_link_mode(struct net_device *dev)
  2075. {
  2076. struct tc35815_local *lp = dev->priv;
  2077. int pid = lp->phy_addr;
  2078. unsigned short bmcr;
  2079. char *speed = "", *duplex = "";
  2080. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2081. if (bmcr & BMCR_SPEED100)
  2082. speed = "100Mb/s";
  2083. else
  2084. speed = "10Mb/s";
  2085. if (bmcr & BMCR_FULLDPLX)
  2086. duplex = "Full Duplex.\n";
  2087. else
  2088. duplex = "Half Duplex.\n";
  2089. if (netif_msg_link(lp))
  2090. printk(KERN_INFO "%s: Link has been forced up at %s, %s",
  2091. dev->name, speed, duplex);
  2092. }
  2093. static void tc35815_set_link_modes(struct net_device *dev)
  2094. {
  2095. struct tc35815_local *lp = dev->priv;
  2096. struct tc35815_regs __iomem *tr =
  2097. (struct tc35815_regs __iomem *)dev->base_addr;
  2098. int pid = lp->phy_addr;
  2099. unsigned short bmcr, lpa;
  2100. int speed;
  2101. if (lp->timer_state == arbwait) {
  2102. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2103. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2104. printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
  2105. dev->name,
  2106. bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
  2107. if (!(lpa & (LPA_10HALF | LPA_10FULL |
  2108. LPA_100HALF | LPA_100FULL))) {
  2109. /* fall back to 10HALF */
  2110. printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n",
  2111. dev->name, lpa);
  2112. lpa = LPA_10HALF;
  2113. }
  2114. if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
  2115. lp->fullduplex = 1;
  2116. else
  2117. lp->fullduplex = 0;
  2118. if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
  2119. speed = 100;
  2120. else
  2121. speed = 10;
  2122. } else {
  2123. /* Forcing a link mode. */
  2124. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2125. if (bmcr & BMCR_FULLDPLX)
  2126. lp->fullduplex = 1;
  2127. else
  2128. lp->fullduplex = 0;
  2129. if (bmcr & BMCR_SPEED100)
  2130. speed = 100;
  2131. else
  2132. speed = 10;
  2133. }
  2134. tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl);
  2135. if (lp->fullduplex) {
  2136. tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
  2137. } else {
  2138. tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl);
  2139. }
  2140. tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl);
  2141. /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */
  2142. #ifndef NO_CHECK_CARRIER
  2143. /* TX4939 does not have EnLCarr */
  2144. if (lp->boardtype != TC35815_TX4939) {
  2145. #ifdef WORKAROUND_LOSTCAR
  2146. /* WORKAROUND: enable LostCrS only if half duplex operation */
  2147. if (!lp->fullduplex && lp->boardtype != TC35815_TX4939)
  2148. tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl);
  2149. #endif
  2150. }
  2151. #endif
  2152. lp->mii.full_duplex = lp->fullduplex;
  2153. }
  2154. static void tc35815_timer(unsigned long data)
  2155. {
  2156. struct net_device *dev = (struct net_device *)data;
  2157. struct tc35815_local *lp = dev->priv;
  2158. int pid = lp->phy_addr;
  2159. unsigned short bmsr, bmcr, lpa;
  2160. int restart_timer = 0;
  2161. spin_lock_irq(&lp->lock);
  2162. lp->timer_ticks++;
  2163. switch (lp->timer_state) {
  2164. case arbwait:
  2165. /*
  2166. * Only allow for 5 ticks, thats 10 seconds and much too
  2167. * long to wait for arbitration to complete.
  2168. */
  2169. /* TC35815 need more times... */
  2170. if (lp->timer_ticks >= 10) {
  2171. /* Enter force mode. */
  2172. if (!options.doforce) {
  2173. printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
  2174. " cable probblem?\n", dev->name);
  2175. /* Try to restart the adaptor. */
  2176. tc35815_restart(dev);
  2177. goto out;
  2178. }
  2179. printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
  2180. " trying force link mode\n", dev->name);
  2181. printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name,
  2182. tc_mdio_read(dev, pid, MII_BMCR),
  2183. tc_mdio_read(dev, pid, MII_BMSR));
  2184. bmcr = BMCR_SPEED100;
  2185. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2186. /*
  2187. * OK, seems we need do disable the transceiver
  2188. * for the first tick to make sure we get an
  2189. * accurate link state at the second tick.
  2190. */
  2191. lp->timer_state = ltrywait;
  2192. lp->timer_ticks = 0;
  2193. restart_timer = 1;
  2194. } else {
  2195. /* Anything interesting happen? */
  2196. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2197. if (bmsr & BMSR_ANEGCOMPLETE) {
  2198. /* Just what we've been waiting for... */
  2199. tc35815_set_link_modes(dev);
  2200. /*
  2201. * Success, at least so far, advance our state
  2202. * engine.
  2203. */
  2204. lp->timer_state = lupwait;
  2205. restart_timer = 1;
  2206. } else {
  2207. restart_timer = 1;
  2208. }
  2209. }
  2210. break;
  2211. case lupwait:
  2212. /*
  2213. * Auto negotiation was successful and we are awaiting a
  2214. * link up status. I have decided to let this timer run
  2215. * forever until some sort of error is signalled, reporting
  2216. * a message to the user at 10 second intervals.
  2217. */
  2218. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2219. if (bmsr & BMSR_LSTATUS) {
  2220. /*
  2221. * Wheee, it's up, display the link mode in use and put
  2222. * the timer to sleep.
  2223. */
  2224. tc35815_display_link_mode(dev);
  2225. netif_carrier_on(dev);
  2226. #ifdef WORKAROUND_100HALF_PROMISC
  2227. /* delayed promiscuous enabling */
  2228. if (dev->flags & IFF_PROMISC)
  2229. tc35815_set_multicast_list(dev);
  2230. #endif
  2231. #if 1
  2232. lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
  2233. lp->timer_state = lcheck;
  2234. restart_timer = 1;
  2235. #else
  2236. lp->timer_state = asleep;
  2237. restart_timer = 0;
  2238. #endif
  2239. } else {
  2240. if (lp->timer_ticks >= 10) {
  2241. printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
  2242. "not completely up.\n", dev->name);
  2243. lp->timer_ticks = 0;
  2244. restart_timer = 1;
  2245. } else {
  2246. restart_timer = 1;
  2247. }
  2248. }
  2249. break;
  2250. case ltrywait:
  2251. /*
  2252. * Making the timeout here too long can make it take
  2253. * annoyingly long to attempt all of the link mode
  2254. * permutations, but then again this is essentially
  2255. * error recovery code for the most part.
  2256. */
  2257. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2258. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2259. if (lp->timer_ticks == 1) {
  2260. /*
  2261. * Re-enable transceiver, we'll re-enable the
  2262. * transceiver next tick, then check link state
  2263. * on the following tick.
  2264. */
  2265. restart_timer = 1;
  2266. break;
  2267. }
  2268. if (lp->timer_ticks == 2) {
  2269. restart_timer = 1;
  2270. break;
  2271. }
  2272. if (bmsr & BMSR_LSTATUS) {
  2273. /* Force mode selection success. */
  2274. tc35815_display_forced_link_mode(dev);
  2275. netif_carrier_on(dev);
  2276. tc35815_set_link_modes(dev);
  2277. #ifdef WORKAROUND_100HALF_PROMISC
  2278. /* delayed promiscuous enabling */
  2279. if (dev->flags & IFF_PROMISC)
  2280. tc35815_set_multicast_list(dev);
  2281. #endif
  2282. #if 1
  2283. lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
  2284. lp->timer_state = lcheck;
  2285. restart_timer = 1;
  2286. #else
  2287. lp->timer_state = asleep;
  2288. restart_timer = 0;
  2289. #endif
  2290. } else {
  2291. if (lp->timer_ticks >= 4) { /* 6 seconds or so... */
  2292. int ret;
  2293. ret = tc35815_try_next_permutation(dev);
  2294. if (ret == -1) {
  2295. /*
  2296. * Aieee, tried them all, reset the
  2297. * chip and try all over again.
  2298. */
  2299. printk(KERN_NOTICE "%s: Link down, "
  2300. "cable problem?\n",
  2301. dev->name);
  2302. /* Try to restart the adaptor. */
  2303. tc35815_restart(dev);
  2304. goto out;
  2305. }
  2306. lp->timer_ticks = 0;
  2307. restart_timer = 1;
  2308. } else {
  2309. restart_timer = 1;
  2310. }
  2311. }
  2312. break;
  2313. case lcheck:
  2314. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2315. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2316. if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) {
  2317. printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name,
  2318. bmcr);
  2319. } else if ((lp->saved_lpa ^ lpa) &
  2320. (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) {
  2321. printk(KERN_NOTICE "%s: link status changed"
  2322. " (BMCR %x LPA %x->%x)\n", dev->name,
  2323. bmcr, lp->saved_lpa, lpa);
  2324. } else {
  2325. /* go on */
  2326. restart_timer = 1;
  2327. break;
  2328. }
  2329. /* Try to restart the adaptor. */
  2330. tc35815_restart(dev);
  2331. goto out;
  2332. case asleep:
  2333. default:
  2334. /* Can't happens.... */
  2335. printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
  2336. "one anyways!\n", dev->name);
  2337. restart_timer = 0;
  2338. lp->timer_ticks = 0;
  2339. lp->timer_state = asleep; /* foo on you */
  2340. break;
  2341. }
  2342. if (restart_timer) {
  2343. lp->timer.expires = jiffies + msecs_to_jiffies(1200);
  2344. add_timer(&lp->timer);
  2345. }
  2346. out:
  2347. spin_unlock_irq(&lp->lock);
  2348. }
  2349. static void tc35815_start_auto_negotiation(struct net_device *dev,
  2350. struct ethtool_cmd *ep)
  2351. {
  2352. struct tc35815_local *lp = dev->priv;
  2353. int pid = lp->phy_addr;
  2354. unsigned short bmsr, bmcr, advertize;
  2355. int timeout;
  2356. netif_carrier_off(dev);
  2357. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2358. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2359. advertize = tc_mdio_read(dev, pid, MII_ADVERTISE);
  2360. if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
  2361. if (options.speed || options.duplex) {
  2362. /* Advertise only specified configuration. */
  2363. advertize &= ~(ADVERTISE_10HALF |
  2364. ADVERTISE_10FULL |
  2365. ADVERTISE_100HALF |
  2366. ADVERTISE_100FULL);
  2367. if (options.speed != 10) {
  2368. if (options.duplex != 1)
  2369. advertize |= ADVERTISE_100FULL;
  2370. if (options.duplex != 2)
  2371. advertize |= ADVERTISE_100HALF;
  2372. }
  2373. if (options.speed != 100) {
  2374. if (options.duplex != 1)
  2375. advertize |= ADVERTISE_10FULL;
  2376. if (options.duplex != 2)
  2377. advertize |= ADVERTISE_10HALF;
  2378. }
  2379. if (options.speed == 100)
  2380. bmcr |= BMCR_SPEED100;
  2381. else if (options.speed == 10)
  2382. bmcr &= ~BMCR_SPEED100;
  2383. if (options.duplex == 2)
  2384. bmcr |= BMCR_FULLDPLX;
  2385. else if (options.duplex == 1)
  2386. bmcr &= ~BMCR_FULLDPLX;
  2387. } else {
  2388. /* Advertise everything we can support. */
  2389. if (bmsr & BMSR_10HALF)
  2390. advertize |= ADVERTISE_10HALF;
  2391. else
  2392. advertize &= ~ADVERTISE_10HALF;
  2393. if (bmsr & BMSR_10FULL)
  2394. advertize |= ADVERTISE_10FULL;
  2395. else
  2396. advertize &= ~ADVERTISE_10FULL;
  2397. if (bmsr & BMSR_100HALF)
  2398. advertize |= ADVERTISE_100HALF;
  2399. else
  2400. advertize &= ~ADVERTISE_100HALF;
  2401. if (bmsr & BMSR_100FULL)
  2402. advertize |= ADVERTISE_100FULL;
  2403. else
  2404. advertize &= ~ADVERTISE_100FULL;
  2405. }
  2406. tc_mdio_write(dev, pid, MII_ADVERTISE, advertize);
  2407. /* Enable Auto-Negotiation, this is usually on already... */
  2408. bmcr |= BMCR_ANENABLE;
  2409. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2410. /* Restart it to make sure it is going. */
  2411. bmcr |= BMCR_ANRESTART;
  2412. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2413. printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr);
  2414. /* BMCR_ANRESTART self clears when the process has begun. */
  2415. timeout = 64; /* More than enough. */
  2416. while (--timeout) {
  2417. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2418. if (!(bmcr & BMCR_ANRESTART))
  2419. break; /* got it. */
  2420. udelay(10);
  2421. }
  2422. if (!timeout) {
  2423. printk(KERN_ERR "%s: TC35815 would not start auto "
  2424. "negotiation BMCR=0x%04x\n",
  2425. dev->name, bmcr);
  2426. printk(KERN_NOTICE "%s: Performing force link "
  2427. "detection.\n", dev->name);
  2428. goto force_link;
  2429. } else {
  2430. printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name);
  2431. lp->timer_state = arbwait;
  2432. }
  2433. } else {
  2434. force_link:
  2435. /* Force the link up, trying first a particular mode.
  2436. * Either we are here at the request of ethtool or
  2437. * because the Happy Meal would not start to autoneg.
  2438. */
  2439. /* Disable auto-negotiation in BMCR, enable the duplex and
  2440. * speed setting, init the timer state machine, and fire it off.
  2441. */
  2442. if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
  2443. bmcr = BMCR_SPEED100;
  2444. } else {
  2445. if (ep->speed == SPEED_100)
  2446. bmcr = BMCR_SPEED100;
  2447. else
  2448. bmcr = 0;
  2449. if (ep->duplex == DUPLEX_FULL)
  2450. bmcr |= BMCR_FULLDPLX;
  2451. }
  2452. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2453. /* OK, seems we need do disable the transceiver for the first
  2454. * tick to make sure we get an accurate link state at the
  2455. * second tick.
  2456. */
  2457. lp->timer_state = ltrywait;
  2458. }
  2459. del_timer(&lp->timer);
  2460. lp->timer_ticks = 0;
  2461. lp->timer.expires = jiffies + msecs_to_jiffies(1200);
  2462. add_timer(&lp->timer);
  2463. }
  2464. static void tc35815_find_phy(struct net_device *dev)
  2465. {
  2466. struct tc35815_local *lp = dev->priv;
  2467. int pid = lp->phy_addr;
  2468. unsigned short id0;
  2469. /* find MII phy */
  2470. for (pid = 31; pid >= 0; pid--) {
  2471. id0 = tc_mdio_read(dev, pid, MII_BMSR);
  2472. if (id0 != 0xffff && id0 != 0x0000 &&
  2473. (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */
  2474. ) {
  2475. lp->phy_addr = pid;
  2476. break;
  2477. }
  2478. }
  2479. if (pid < 0) {
  2480. printk(KERN_ERR "%s: No MII Phy found.\n",
  2481. dev->name);
  2482. lp->phy_addr = pid = 0;
  2483. }
  2484. lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1);
  2485. lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2);
  2486. if (netif_msg_hw(lp))
  2487. printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name,
  2488. pid, lp->mii_id[0], lp->mii_id[1]);
  2489. }
  2490. static void tc35815_phy_chip_init(struct net_device *dev)
  2491. {
  2492. struct tc35815_local *lp = dev->priv;
  2493. int pid = lp->phy_addr;
  2494. unsigned short bmcr;
  2495. struct ethtool_cmd ecmd, *ep;
  2496. /* dis-isolate if needed. */
  2497. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2498. if (bmcr & BMCR_ISOLATE) {
  2499. int count = 32;
  2500. printk(KERN_DEBUG "%s: unisolating...", dev->name);
  2501. tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE);
  2502. while (--count) {
  2503. if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE))
  2504. break;
  2505. udelay(20);
  2506. }
  2507. printk(" %s.\n", count ? "done" : "failed");
  2508. }
  2509. if (options.speed && options.duplex) {
  2510. ecmd.autoneg = AUTONEG_DISABLE;
  2511. ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100;
  2512. ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL;
  2513. ep = &ecmd;
  2514. } else {
  2515. ep = NULL;
  2516. }
  2517. tc35815_start_auto_negotiation(dev, ep);
  2518. }
  2519. static void tc35815_chip_reset(struct net_device *dev)
  2520. {
  2521. struct tc35815_regs __iomem *tr =
  2522. (struct tc35815_regs __iomem *)dev->base_addr;
  2523. int i;
  2524. /* reset the controller */
  2525. tc_writel(MAC_Reset, &tr->MAC_Ctl);
  2526. udelay(4); /* 3200ns */
  2527. i = 0;
  2528. while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
  2529. if (i++ > 100) {
  2530. printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
  2531. break;
  2532. }
  2533. mdelay(1);
  2534. }
  2535. tc_writel(0, &tr->MAC_Ctl);
  2536. /* initialize registers to default value */
  2537. tc_writel(0, &tr->DMA_Ctl);
  2538. tc_writel(0, &tr->TxThrsh);
  2539. tc_writel(0, &tr->TxPollCtr);
  2540. tc_writel(0, &tr->RxFragSize);
  2541. tc_writel(0, &tr->Int_En);
  2542. tc_writel(0, &tr->FDA_Bas);
  2543. tc_writel(0, &tr->FDA_Lim);
  2544. tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */
  2545. tc_writel(0, &tr->CAM_Ctl);
  2546. tc_writel(0, &tr->Tx_Ctl);
  2547. tc_writel(0, &tr->Rx_Ctl);
  2548. tc_writel(0, &tr->CAM_Ena);
  2549. (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */
  2550. /* initialize internal SRAM */
  2551. tc_writel(DMA_TestMode, &tr->DMA_Ctl);
  2552. for (i = 0; i < 0x1000; i += 4) {
  2553. tc_writel(i, &tr->CAM_Adr);
  2554. tc_writel(0, &tr->CAM_Data);
  2555. }
  2556. tc_writel(0, &tr->DMA_Ctl);
  2557. }
  2558. static void tc35815_chip_init(struct net_device *dev)
  2559. {
  2560. struct tc35815_local *lp = dev->priv;
  2561. struct tc35815_regs __iomem *tr =
  2562. (struct tc35815_regs __iomem *)dev->base_addr;
  2563. unsigned long txctl = TX_CTL_CMD;
  2564. tc35815_phy_chip_init(dev);
  2565. /* load station address to CAM */
  2566. tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
  2567. /* Enable CAM (broadcast and unicast) */
  2568. tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
  2569. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  2570. /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
  2571. if (HAVE_DMA_RXALIGN(lp))
  2572. tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
  2573. else
  2574. tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
  2575. #ifdef TC35815_USE_PACKEDBUFFER
  2576. tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize); /* Packing */
  2577. #else
  2578. tc_writel(ETH_ZLEN, &tr->RxFragSize);
  2579. #endif
  2580. tc_writel(0, &tr->TxPollCtr); /* Batch mode */
  2581. tc_writel(TX_THRESHOLD, &tr->TxThrsh);
  2582. tc_writel(INT_EN_CMD, &tr->Int_En);
  2583. /* set queues */
  2584. tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
  2585. tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
  2586. &tr->FDA_Lim);
  2587. /*
  2588. * Activation method:
  2589. * First, enable the MAC Transmitter and the DMA Receive circuits.
  2590. * Then enable the DMA Transmitter and the MAC Receive circuits.
  2591. */
  2592. tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */
  2593. tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */
  2594. /* start MAC transmitter */
  2595. #ifndef NO_CHECK_CARRIER
  2596. /* TX4939 does not have EnLCarr */
  2597. if (lp->boardtype == TC35815_TX4939)
  2598. txctl &= ~Tx_EnLCarr;
  2599. #ifdef WORKAROUND_LOSTCAR
  2600. /* WORKAROUND: ignore LostCrS in full duplex operation */
  2601. if ((lp->timer_state != asleep && lp->timer_state != lcheck) ||
  2602. lp->fullduplex)
  2603. txctl &= ~Tx_EnLCarr;
  2604. #endif
  2605. #endif /* !NO_CHECK_CARRIER */
  2606. #ifdef GATHER_TXINT
  2607. txctl &= ~Tx_EnComp; /* disable global tx completion int. */
  2608. #endif
  2609. tc_writel(txctl, &tr->Tx_Ctl);
  2610. }
  2611. #ifdef CONFIG_PM
  2612. static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
  2613. {
  2614. struct net_device *dev = pci_get_drvdata(pdev);
  2615. struct tc35815_local *lp = dev->priv;
  2616. unsigned long flags;
  2617. pci_save_state(pdev);
  2618. if (!netif_running(dev))
  2619. return 0;
  2620. netif_device_detach(dev);
  2621. spin_lock_irqsave(&lp->lock, flags);
  2622. del_timer(&lp->timer); /* Kill if running */
  2623. tc35815_chip_reset(dev);
  2624. spin_unlock_irqrestore(&lp->lock, flags);
  2625. pci_set_power_state(pdev, PCI_D3hot);
  2626. return 0;
  2627. }
  2628. static int tc35815_resume(struct pci_dev *pdev)
  2629. {
  2630. struct net_device *dev = pci_get_drvdata(pdev);
  2631. struct tc35815_local *lp = dev->priv;
  2632. unsigned long flags;
  2633. pci_restore_state(pdev);
  2634. if (!netif_running(dev))
  2635. return 0;
  2636. pci_set_power_state(pdev, PCI_D0);
  2637. spin_lock_irqsave(&lp->lock, flags);
  2638. tc35815_restart(dev);
  2639. spin_unlock_irqrestore(&lp->lock, flags);
  2640. netif_device_attach(dev);
  2641. return 0;
  2642. }
  2643. #endif /* CONFIG_PM */
  2644. static struct pci_driver tc35815_pci_driver = {
  2645. .name = MODNAME,
  2646. .id_table = tc35815_pci_tbl,
  2647. .probe = tc35815_init_one,
  2648. .remove = __devexit_p(tc35815_remove_one),
  2649. #ifdef CONFIG_PM
  2650. .suspend = tc35815_suspend,
  2651. .resume = tc35815_resume,
  2652. #endif
  2653. };
  2654. module_param_named(speed, options.speed, int, 0);
  2655. MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
  2656. module_param_named(duplex, options.duplex, int, 0);
  2657. MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
  2658. module_param_named(doforce, options.doforce, int, 0);
  2659. MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed");
  2660. static int __init tc35815_init_module(void)
  2661. {
  2662. return pci_register_driver(&tc35815_pci_driver);
  2663. }
  2664. static void __exit tc35815_cleanup_module(void)
  2665. {
  2666. pci_unregister_driver(&tc35815_pci_driver);
  2667. }
  2668. module_init(tc35815_init_module);
  2669. module_exit(tc35815_cleanup_module);
  2670. MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
  2671. MODULE_LICENSE("GPL");