smc911x.c 60 KB

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  1. /*
  2. * smc911x.c
  3. * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 2005 Sensoria Corp
  6. * Derived from the unified SMC91x driver by Nicolas Pitre
  7. * and the smsc911x.c reference driver by SMSC
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. * Arguments:
  24. * watchdog = TX watchdog timeout
  25. * tx_fifo_kb = Size of TX FIFO in KB
  26. *
  27. * History:
  28. * 04/16/05 Dustin McIntire Initial version
  29. */
  30. static const char version[] =
  31. "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
  32. /* Debugging options */
  33. #define ENABLE_SMC_DEBUG_RX 0
  34. #define ENABLE_SMC_DEBUG_TX 0
  35. #define ENABLE_SMC_DEBUG_DMA 0
  36. #define ENABLE_SMC_DEBUG_PKTS 0
  37. #define ENABLE_SMC_DEBUG_MISC 0
  38. #define ENABLE_SMC_DEBUG_FUNC 0
  39. #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
  40. #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
  41. #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
  42. #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
  43. #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
  44. #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
  45. #ifndef SMC_DEBUG
  46. #define SMC_DEBUG ( SMC_DEBUG_RX | \
  47. SMC_DEBUG_TX | \
  48. SMC_DEBUG_DMA | \
  49. SMC_DEBUG_PKTS | \
  50. SMC_DEBUG_MISC | \
  51. SMC_DEBUG_FUNC \
  52. )
  53. #endif
  54. #include <linux/init.h>
  55. #include <linux/module.h>
  56. #include <linux/kernel.h>
  57. #include <linux/sched.h>
  58. #include <linux/slab.h>
  59. #include <linux/delay.h>
  60. #include <linux/interrupt.h>
  61. #include <linux/errno.h>
  62. #include <linux/ioport.h>
  63. #include <linux/crc32.h>
  64. #include <linux/device.h>
  65. #include <linux/platform_device.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/ethtool.h>
  68. #include <linux/mii.h>
  69. #include <linux/workqueue.h>
  70. #include <linux/netdevice.h>
  71. #include <linux/etherdevice.h>
  72. #include <linux/skbuff.h>
  73. #include <asm/io.h>
  74. #include "smc911x.h"
  75. /*
  76. * Transmit timeout, default 5 seconds.
  77. */
  78. static int watchdog = 5000;
  79. module_param(watchdog, int, 0400);
  80. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  81. static int tx_fifo_kb=8;
  82. module_param(tx_fifo_kb, int, 0400);
  83. MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
  84. MODULE_LICENSE("GPL");
  85. /*
  86. * The internal workings of the driver. If you are changing anything
  87. * here with the SMC stuff, you should have the datasheet and know
  88. * what you are doing.
  89. */
  90. #define CARDNAME "smc911x"
  91. /*
  92. * Use power-down feature of the chip
  93. */
  94. #define POWER_DOWN 1
  95. /* store this information for the driver.. */
  96. struct smc911x_local {
  97. /*
  98. * If I have to wait until the DMA is finished and ready to reload a
  99. * packet, I will store the skbuff here. Then, the DMA will send it
  100. * out and free it.
  101. */
  102. struct sk_buff *pending_tx_skb;
  103. /*
  104. * these are things that the kernel wants me to keep, so users
  105. * can find out semi-useless statistics of how well the card is
  106. * performing
  107. */
  108. struct net_device_stats stats;
  109. /* version/revision of the SMC911x chip */
  110. u16 version;
  111. u16 revision;
  112. /* FIFO sizes */
  113. int tx_fifo_kb;
  114. int tx_fifo_size;
  115. int rx_fifo_size;
  116. int afc_cfg;
  117. /* Contains the current active receive/phy mode */
  118. int ctl_rfduplx;
  119. int ctl_rspeed;
  120. u32 msg_enable;
  121. u32 phy_type;
  122. struct mii_if_info mii;
  123. /* work queue */
  124. struct work_struct phy_configure;
  125. int work_pending;
  126. int tx_throttle;
  127. spinlock_t lock;
  128. struct net_device *netdev;
  129. #ifdef SMC_USE_DMA
  130. /* DMA needs the physical address of the chip */
  131. u_long physaddr;
  132. int rxdma;
  133. int txdma;
  134. int rxdma_active;
  135. int txdma_active;
  136. struct sk_buff *current_rx_skb;
  137. struct sk_buff *current_tx_skb;
  138. struct device *dev;
  139. #endif
  140. };
  141. #if SMC_DEBUG > 0
  142. #define DBG(n, args...) \
  143. do { \
  144. if (SMC_DEBUG & (n)) \
  145. printk(args); \
  146. } while (0)
  147. #define PRINTK(args...) printk(args)
  148. #else
  149. #define DBG(n, args...) do { } while (0)
  150. #define PRINTK(args...) printk(KERN_DEBUG args)
  151. #endif
  152. #if SMC_DEBUG_PKTS > 0
  153. static void PRINT_PKT(u_char *buf, int length)
  154. {
  155. int i;
  156. int remainder;
  157. int lines;
  158. lines = length / 16;
  159. remainder = length % 16;
  160. for (i = 0; i < lines ; i ++) {
  161. int cur;
  162. for (cur = 0; cur < 8; cur++) {
  163. u_char a, b;
  164. a = *buf++;
  165. b = *buf++;
  166. printk("%02x%02x ", a, b);
  167. }
  168. printk("\n");
  169. }
  170. for (i = 0; i < remainder/2 ; i++) {
  171. u_char a, b;
  172. a = *buf++;
  173. b = *buf++;
  174. printk("%02x%02x ", a, b);
  175. }
  176. printk("\n");
  177. }
  178. #else
  179. #define PRINT_PKT(x...) do { } while (0)
  180. #endif
  181. /* this enables an interrupt in the interrupt mask register */
  182. #define SMC_ENABLE_INT(x) do { \
  183. unsigned int __mask; \
  184. unsigned long __flags; \
  185. spin_lock_irqsave(&lp->lock, __flags); \
  186. __mask = SMC_GET_INT_EN(); \
  187. __mask |= (x); \
  188. SMC_SET_INT_EN(__mask); \
  189. spin_unlock_irqrestore(&lp->lock, __flags); \
  190. } while (0)
  191. /* this disables an interrupt from the interrupt mask register */
  192. #define SMC_DISABLE_INT(x) do { \
  193. unsigned int __mask; \
  194. unsigned long __flags; \
  195. spin_lock_irqsave(&lp->lock, __flags); \
  196. __mask = SMC_GET_INT_EN(); \
  197. __mask &= ~(x); \
  198. SMC_SET_INT_EN(__mask); \
  199. spin_unlock_irqrestore(&lp->lock, __flags); \
  200. } while (0)
  201. /*
  202. * this does a soft reset on the device
  203. */
  204. static void smc911x_reset(struct net_device *dev)
  205. {
  206. unsigned long ioaddr = dev->base_addr;
  207. struct smc911x_local *lp = netdev_priv(dev);
  208. unsigned int reg, timeout=0, resets=1;
  209. unsigned long flags;
  210. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  211. /* Take out of PM setting first */
  212. if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
  213. /* Write to the bytetest will take out of powerdown */
  214. SMC_SET_BYTE_TEST(0);
  215. timeout=10;
  216. do {
  217. udelay(10);
  218. reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
  219. } while ( timeout-- && !reg);
  220. if (timeout == 0) {
  221. PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
  222. return;
  223. }
  224. }
  225. /* Disable all interrupts */
  226. spin_lock_irqsave(&lp->lock, flags);
  227. SMC_SET_INT_EN(0);
  228. spin_unlock_irqrestore(&lp->lock, flags);
  229. while (resets--) {
  230. SMC_SET_HW_CFG(HW_CFG_SRST_);
  231. timeout=10;
  232. do {
  233. udelay(10);
  234. reg = SMC_GET_HW_CFG();
  235. /* If chip indicates reset timeout then try again */
  236. if (reg & HW_CFG_SRST_TO_) {
  237. PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
  238. resets++;
  239. break;
  240. }
  241. } while ( timeout-- && (reg & HW_CFG_SRST_));
  242. }
  243. if (timeout == 0) {
  244. PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
  245. return;
  246. }
  247. /* make sure EEPROM has finished loading before setting GPIO_CFG */
  248. timeout=1000;
  249. while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
  250. udelay(10);
  251. }
  252. if (timeout == 0){
  253. PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
  254. return;
  255. }
  256. /* Initialize interrupts */
  257. SMC_SET_INT_EN(0);
  258. SMC_ACK_INT(-1);
  259. /* Reset the FIFO level and flow control settings */
  260. SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
  261. //TODO: Figure out what appropriate pause time is
  262. SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
  263. SMC_SET_AFC_CFG(lp->afc_cfg);
  264. /* Set to LED outputs */
  265. SMC_SET_GPIO_CFG(0x70070000);
  266. /*
  267. * Deassert IRQ for 1*10us for edge type interrupts
  268. * and drive IRQ pin push-pull
  269. */
  270. SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
  271. /* clear anything saved */
  272. if (lp->pending_tx_skb != NULL) {
  273. dev_kfree_skb (lp->pending_tx_skb);
  274. lp->pending_tx_skb = NULL;
  275. lp->stats.tx_errors++;
  276. lp->stats.tx_aborted_errors++;
  277. }
  278. }
  279. /*
  280. * Enable Interrupts, Receive, and Transmit
  281. */
  282. static void smc911x_enable(struct net_device *dev)
  283. {
  284. unsigned long ioaddr = dev->base_addr;
  285. struct smc911x_local *lp = netdev_priv(dev);
  286. unsigned mask, cfg, cr;
  287. unsigned long flags;
  288. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  289. SMC_SET_MAC_ADDR(dev->dev_addr);
  290. /* Enable TX */
  291. cfg = SMC_GET_HW_CFG();
  292. cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
  293. cfg |= HW_CFG_SF_;
  294. SMC_SET_HW_CFG(cfg);
  295. SMC_SET_FIFO_TDA(0xFF);
  296. /* Update TX stats on every 64 packets received or every 1 sec */
  297. SMC_SET_FIFO_TSL(64);
  298. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  299. spin_lock_irqsave(&lp->lock, flags);
  300. SMC_GET_MAC_CR(cr);
  301. cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
  302. SMC_SET_MAC_CR(cr);
  303. SMC_SET_TX_CFG(TX_CFG_TX_ON_);
  304. spin_unlock_irqrestore(&lp->lock, flags);
  305. /* Add 2 byte padding to start of packets */
  306. SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
  307. /* Turn on receiver and enable RX */
  308. if (cr & MAC_CR_RXEN_)
  309. DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
  310. spin_lock_irqsave(&lp->lock, flags);
  311. SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
  312. spin_unlock_irqrestore(&lp->lock, flags);
  313. /* Interrupt on every received packet */
  314. SMC_SET_FIFO_RSA(0x01);
  315. SMC_SET_FIFO_RSL(0x00);
  316. /* now, enable interrupts */
  317. mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
  318. INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
  319. INT_EN_PHY_INT_EN_;
  320. if (IS_REV_A(lp->revision))
  321. mask|=INT_EN_RDFL_EN_;
  322. else {
  323. mask|=INT_EN_RDFO_EN_;
  324. }
  325. SMC_ENABLE_INT(mask);
  326. }
  327. /*
  328. * this puts the device in an inactive state
  329. */
  330. static void smc911x_shutdown(struct net_device *dev)
  331. {
  332. unsigned long ioaddr = dev->base_addr;
  333. struct smc911x_local *lp = netdev_priv(dev);
  334. unsigned cr;
  335. unsigned long flags;
  336. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
  337. /* Disable IRQ's */
  338. SMC_SET_INT_EN(0);
  339. /* Turn of Rx and TX */
  340. spin_lock_irqsave(&lp->lock, flags);
  341. SMC_GET_MAC_CR(cr);
  342. cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  343. SMC_SET_MAC_CR(cr);
  344. SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
  345. spin_unlock_irqrestore(&lp->lock, flags);
  346. }
  347. static inline void smc911x_drop_pkt(struct net_device *dev)
  348. {
  349. unsigned long ioaddr = dev->base_addr;
  350. unsigned int fifo_count, timeout, reg;
  351. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
  352. fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
  353. if (fifo_count <= 4) {
  354. /* Manually dump the packet data */
  355. while (fifo_count--)
  356. SMC_GET_RX_FIFO();
  357. } else {
  358. /* Fast forward through the bad packet */
  359. SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
  360. timeout=50;
  361. do {
  362. udelay(10);
  363. reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
  364. } while ( timeout-- && reg);
  365. if (timeout == 0) {
  366. PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
  367. }
  368. }
  369. }
  370. /*
  371. * This is the procedure to handle the receipt of a packet.
  372. * It should be called after checking for packet presence in
  373. * the RX status FIFO. It must be called with the spin lock
  374. * already held.
  375. */
  376. static inline void smc911x_rcv(struct net_device *dev)
  377. {
  378. struct smc911x_local *lp = netdev_priv(dev);
  379. unsigned long ioaddr = dev->base_addr;
  380. unsigned int pkt_len, status;
  381. struct sk_buff *skb;
  382. unsigned char *data;
  383. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
  384. dev->name, __FUNCTION__);
  385. status = SMC_GET_RX_STS_FIFO();
  386. DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
  387. dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
  388. pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
  389. if (status & RX_STS_ES_) {
  390. /* Deal with a bad packet */
  391. lp->stats.rx_errors++;
  392. if (status & RX_STS_CRC_ERR_)
  393. lp->stats.rx_crc_errors++;
  394. else {
  395. if (status & RX_STS_LEN_ERR_)
  396. lp->stats.rx_length_errors++;
  397. if (status & RX_STS_MCAST_)
  398. lp->stats.multicast++;
  399. }
  400. /* Remove the bad packet data from the RX FIFO */
  401. smc911x_drop_pkt(dev);
  402. } else {
  403. /* Receive a valid packet */
  404. /* Alloc a buffer with extra room for DMA alignment */
  405. skb=dev_alloc_skb(pkt_len+32);
  406. if (unlikely(skb == NULL)) {
  407. PRINTK( "%s: Low memory, rcvd packet dropped.\n",
  408. dev->name);
  409. lp->stats.rx_dropped++;
  410. smc911x_drop_pkt(dev);
  411. return;
  412. }
  413. /* Align IP header to 32 bits
  414. * Note that the device is configured to add a 2
  415. * byte padding to the packet start, so we really
  416. * want to write to the orignal data pointer */
  417. data = skb->data;
  418. skb_reserve(skb, 2);
  419. skb_put(skb,pkt_len-4);
  420. #ifdef SMC_USE_DMA
  421. {
  422. unsigned int fifo;
  423. /* Lower the FIFO threshold if possible */
  424. fifo = SMC_GET_FIFO_INT();
  425. if (fifo & 0xFF) fifo--;
  426. DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
  427. dev->name, fifo & 0xff);
  428. SMC_SET_FIFO_INT(fifo);
  429. /* Setup RX DMA */
  430. SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
  431. lp->rxdma_active = 1;
  432. lp->current_rx_skb = skb;
  433. SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
  434. /* Packet processing deferred to DMA RX interrupt */
  435. }
  436. #else
  437. SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
  438. SMC_PULL_DATA(data, pkt_len+2+3);
  439. DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
  440. PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
  441. dev->last_rx = jiffies;
  442. skb->protocol = eth_type_trans(skb, dev);
  443. netif_rx(skb);
  444. lp->stats.rx_packets++;
  445. lp->stats.rx_bytes += pkt_len-4;
  446. #endif
  447. }
  448. }
  449. /*
  450. * This is called to actually send a packet to the chip.
  451. */
  452. static void smc911x_hardware_send_pkt(struct net_device *dev)
  453. {
  454. struct smc911x_local *lp = netdev_priv(dev);
  455. unsigned long ioaddr = dev->base_addr;
  456. struct sk_buff *skb;
  457. unsigned int cmdA, cmdB, len;
  458. unsigned char *buf;
  459. unsigned long flags;
  460. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
  461. BUG_ON(lp->pending_tx_skb == NULL);
  462. skb = lp->pending_tx_skb;
  463. lp->pending_tx_skb = NULL;
  464. /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
  465. /* cmdB {31:16] pkt tag [10:0] length */
  466. #ifdef SMC_USE_DMA
  467. /* 16 byte buffer alignment mode */
  468. buf = (char*)((u32)(skb->data) & ~0xF);
  469. len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
  470. cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
  471. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  472. skb->len;
  473. #else
  474. buf = (char*)((u32)skb->data & ~0x3);
  475. len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
  476. cmdA = (((u32)skb->data & 0x3) << 16) |
  477. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  478. skb->len;
  479. #endif
  480. /* tag is packet length so we can use this in stats update later */
  481. cmdB = (skb->len << 16) | (skb->len & 0x7FF);
  482. DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
  483. dev->name, len, len, buf, cmdA, cmdB);
  484. SMC_SET_TX_FIFO(cmdA);
  485. SMC_SET_TX_FIFO(cmdB);
  486. DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
  487. PRINT_PKT(buf, len <= 64 ? len : 64);
  488. /* Send pkt via PIO or DMA */
  489. #ifdef SMC_USE_DMA
  490. lp->current_tx_skb = skb;
  491. SMC_PUSH_DATA(buf, len);
  492. /* DMA complete IRQ will free buffer and set jiffies */
  493. #else
  494. SMC_PUSH_DATA(buf, len);
  495. dev->trans_start = jiffies;
  496. dev_kfree_skb(skb);
  497. #endif
  498. spin_lock_irqsave(&lp->lock, flags);
  499. if (!lp->tx_throttle) {
  500. netif_wake_queue(dev);
  501. }
  502. spin_unlock_irqrestore(&lp->lock, flags);
  503. SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
  504. }
  505. /*
  506. * Since I am not sure if I will have enough room in the chip's ram
  507. * to store the packet, I call this routine which either sends it
  508. * now, or set the card to generates an interrupt when ready
  509. * for the packet.
  510. */
  511. static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  512. {
  513. struct smc911x_local *lp = netdev_priv(dev);
  514. unsigned long ioaddr = dev->base_addr;
  515. unsigned int free;
  516. unsigned long flags;
  517. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  518. dev->name, __FUNCTION__);
  519. BUG_ON(lp->pending_tx_skb != NULL);
  520. free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
  521. DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
  522. /* Turn off the flow when running out of space in FIFO */
  523. if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
  524. DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
  525. dev->name, free);
  526. spin_lock_irqsave(&lp->lock, flags);
  527. /* Reenable when at least 1 packet of size MTU present */
  528. SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
  529. lp->tx_throttle = 1;
  530. netif_stop_queue(dev);
  531. spin_unlock_irqrestore(&lp->lock, flags);
  532. }
  533. /* Drop packets when we run out of space in TX FIFO
  534. * Account for overhead required for:
  535. *
  536. * Tx command words 8 bytes
  537. * Start offset 15 bytes
  538. * End padding 15 bytes
  539. */
  540. if (unlikely(free < (skb->len + 8 + 15 + 15))) {
  541. printk("%s: No Tx free space %d < %d\n",
  542. dev->name, free, skb->len);
  543. lp->pending_tx_skb = NULL;
  544. lp->stats.tx_errors++;
  545. lp->stats.tx_dropped++;
  546. dev_kfree_skb(skb);
  547. return 0;
  548. }
  549. #ifdef SMC_USE_DMA
  550. {
  551. /* If the DMA is already running then defer this packet Tx until
  552. * the DMA IRQ starts it
  553. */
  554. spin_lock_irqsave(&lp->lock, flags);
  555. if (lp->txdma_active) {
  556. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
  557. lp->pending_tx_skb = skb;
  558. netif_stop_queue(dev);
  559. spin_unlock_irqrestore(&lp->lock, flags);
  560. return 0;
  561. } else {
  562. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
  563. lp->txdma_active = 1;
  564. }
  565. spin_unlock_irqrestore(&lp->lock, flags);
  566. }
  567. #endif
  568. lp->pending_tx_skb = skb;
  569. smc911x_hardware_send_pkt(dev);
  570. return 0;
  571. }
  572. /*
  573. * This handles a TX status interrupt, which is only called when:
  574. * - a TX error occurred, or
  575. * - TX of a packet completed.
  576. */
  577. static void smc911x_tx(struct net_device *dev)
  578. {
  579. unsigned long ioaddr = dev->base_addr;
  580. struct smc911x_local *lp = netdev_priv(dev);
  581. unsigned int tx_status;
  582. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  583. dev->name, __FUNCTION__);
  584. /* Collect the TX status */
  585. while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
  586. DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
  587. dev->name,
  588. (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
  589. tx_status = SMC_GET_TX_STS_FIFO();
  590. lp->stats.tx_packets++;
  591. lp->stats.tx_bytes+=tx_status>>16;
  592. DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
  593. dev->name, (tx_status & 0xffff0000) >> 16,
  594. tx_status & 0x0000ffff);
  595. /* count Tx errors, but ignore lost carrier errors when in
  596. * full-duplex mode */
  597. if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
  598. !(tx_status & 0x00000306))) {
  599. lp->stats.tx_errors++;
  600. }
  601. if (tx_status & TX_STS_MANY_COLL_) {
  602. lp->stats.collisions+=16;
  603. lp->stats.tx_aborted_errors++;
  604. } else {
  605. lp->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
  606. }
  607. /* carrier error only has meaning for half-duplex communication */
  608. if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
  609. !lp->ctl_rfduplx) {
  610. lp->stats.tx_carrier_errors++;
  611. }
  612. if (tx_status & TX_STS_LATE_COLL_) {
  613. lp->stats.collisions++;
  614. lp->stats.tx_aborted_errors++;
  615. }
  616. }
  617. }
  618. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  619. /*
  620. * Reads a register from the MII Management serial interface
  621. */
  622. static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  623. {
  624. unsigned long ioaddr = dev->base_addr;
  625. unsigned int phydata;
  626. SMC_GET_MII(phyreg, phyaddr, phydata);
  627. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
  628. __FUNCTION__, phyaddr, phyreg, phydata);
  629. return phydata;
  630. }
  631. /*
  632. * Writes a register to the MII Management serial interface
  633. */
  634. static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  635. int phydata)
  636. {
  637. unsigned long ioaddr = dev->base_addr;
  638. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  639. __FUNCTION__, phyaddr, phyreg, phydata);
  640. SMC_SET_MII(phyreg, phyaddr, phydata);
  641. }
  642. /*
  643. * Finds and reports the PHY address (115 and 117 have external
  644. * PHY interface 118 has internal only
  645. */
  646. static void smc911x_phy_detect(struct net_device *dev)
  647. {
  648. unsigned long ioaddr = dev->base_addr;
  649. struct smc911x_local *lp = netdev_priv(dev);
  650. int phyaddr;
  651. unsigned int cfg, id1, id2;
  652. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  653. lp->phy_type = 0;
  654. /*
  655. * Scan all 32 PHY addresses if necessary, starting at
  656. * PHY#1 to PHY#31, and then PHY#0 last.
  657. */
  658. switch(lp->version) {
  659. case 0x115:
  660. case 0x117:
  661. cfg = SMC_GET_HW_CFG();
  662. if (cfg & HW_CFG_EXT_PHY_DET_) {
  663. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  664. cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  665. SMC_SET_HW_CFG(cfg);
  666. udelay(10); /* Wait for clocks to stop */
  667. cfg |= HW_CFG_EXT_PHY_EN_;
  668. SMC_SET_HW_CFG(cfg);
  669. udelay(10); /* Wait for clocks to stop */
  670. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  671. cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  672. SMC_SET_HW_CFG(cfg);
  673. udelay(10); /* Wait for clocks to stop */
  674. cfg |= HW_CFG_SMI_SEL_;
  675. SMC_SET_HW_CFG(cfg);
  676. for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
  677. /* Read the PHY identifiers */
  678. SMC_GET_PHY_ID1(phyaddr & 31, id1);
  679. SMC_GET_PHY_ID2(phyaddr & 31, id2);
  680. /* Make sure it is a valid identifier */
  681. if (id1 != 0x0000 && id1 != 0xffff &&
  682. id1 != 0x8000 && id2 != 0x0000 &&
  683. id2 != 0xffff && id2 != 0x8000) {
  684. /* Save the PHY's address */
  685. lp->mii.phy_id = phyaddr & 31;
  686. lp->phy_type = id1 << 16 | id2;
  687. break;
  688. }
  689. }
  690. }
  691. default:
  692. /* Internal media only */
  693. SMC_GET_PHY_ID1(1, id1);
  694. SMC_GET_PHY_ID2(1, id2);
  695. /* Save the PHY's address */
  696. lp->mii.phy_id = 1;
  697. lp->phy_type = id1 << 16 | id2;
  698. }
  699. DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
  700. dev->name, id1, id2, lp->mii.phy_id);
  701. }
  702. /*
  703. * Sets the PHY to a configuration as determined by the user.
  704. * Called with spin_lock held.
  705. */
  706. static int smc911x_phy_fixed(struct net_device *dev)
  707. {
  708. struct smc911x_local *lp = netdev_priv(dev);
  709. unsigned long ioaddr = dev->base_addr;
  710. int phyaddr = lp->mii.phy_id;
  711. int bmcr;
  712. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  713. /* Enter Link Disable state */
  714. SMC_GET_PHY_BMCR(phyaddr, bmcr);
  715. bmcr |= BMCR_PDOWN;
  716. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  717. /*
  718. * Set our fixed capabilities
  719. * Disable auto-negotiation
  720. */
  721. bmcr &= ~BMCR_ANENABLE;
  722. if (lp->ctl_rfduplx)
  723. bmcr |= BMCR_FULLDPLX;
  724. if (lp->ctl_rspeed == 100)
  725. bmcr |= BMCR_SPEED100;
  726. /* Write our capabilities to the phy control register */
  727. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  728. /* Re-Configure the Receive/Phy Control register */
  729. bmcr &= ~BMCR_PDOWN;
  730. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  731. return 1;
  732. }
  733. /*
  734. * smc911x_phy_reset - reset the phy
  735. * @dev: net device
  736. * @phy: phy address
  737. *
  738. * Issue a software reset for the specified PHY and
  739. * wait up to 100ms for the reset to complete. We should
  740. * not access the PHY for 50ms after issuing the reset.
  741. *
  742. * The time to wait appears to be dependent on the PHY.
  743. *
  744. */
  745. static int smc911x_phy_reset(struct net_device *dev, int phy)
  746. {
  747. struct smc911x_local *lp = netdev_priv(dev);
  748. unsigned long ioaddr = dev->base_addr;
  749. int timeout;
  750. unsigned long flags;
  751. unsigned int reg;
  752. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
  753. spin_lock_irqsave(&lp->lock, flags);
  754. reg = SMC_GET_PMT_CTRL();
  755. reg &= ~0xfffff030;
  756. reg |= PMT_CTRL_PHY_RST_;
  757. SMC_SET_PMT_CTRL(reg);
  758. spin_unlock_irqrestore(&lp->lock, flags);
  759. for (timeout = 2; timeout; timeout--) {
  760. msleep(50);
  761. spin_lock_irqsave(&lp->lock, flags);
  762. reg = SMC_GET_PMT_CTRL();
  763. spin_unlock_irqrestore(&lp->lock, flags);
  764. if (!(reg & PMT_CTRL_PHY_RST_)) {
  765. /* extra delay required because the phy may
  766. * not be completed with its reset
  767. * when PHY_BCR_RESET_ is cleared. 256us
  768. * should suffice, but use 500us to be safe
  769. */
  770. udelay(500);
  771. break;
  772. }
  773. }
  774. return reg & PMT_CTRL_PHY_RST_;
  775. }
  776. /*
  777. * smc911x_phy_powerdown - powerdown phy
  778. * @dev: net device
  779. * @phy: phy address
  780. *
  781. * Power down the specified PHY
  782. */
  783. static void smc911x_phy_powerdown(struct net_device *dev, int phy)
  784. {
  785. unsigned long ioaddr = dev->base_addr;
  786. unsigned int bmcr;
  787. /* Enter Link Disable state */
  788. SMC_GET_PHY_BMCR(phy, bmcr);
  789. bmcr |= BMCR_PDOWN;
  790. SMC_SET_PHY_BMCR(phy, bmcr);
  791. }
  792. /*
  793. * smc911x_phy_check_media - check the media status and adjust BMCR
  794. * @dev: net device
  795. * @init: set true for initialisation
  796. *
  797. * Select duplex mode depending on negotiation state. This
  798. * also updates our carrier state.
  799. */
  800. static void smc911x_phy_check_media(struct net_device *dev, int init)
  801. {
  802. struct smc911x_local *lp = netdev_priv(dev);
  803. unsigned long ioaddr = dev->base_addr;
  804. int phyaddr = lp->mii.phy_id;
  805. unsigned int bmcr, cr;
  806. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  807. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  808. /* duplex state has changed */
  809. SMC_GET_PHY_BMCR(phyaddr, bmcr);
  810. SMC_GET_MAC_CR(cr);
  811. if (lp->mii.full_duplex) {
  812. DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
  813. bmcr |= BMCR_FULLDPLX;
  814. cr |= MAC_CR_RCVOWN_;
  815. } else {
  816. DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
  817. bmcr &= ~BMCR_FULLDPLX;
  818. cr &= ~MAC_CR_RCVOWN_;
  819. }
  820. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  821. SMC_SET_MAC_CR(cr);
  822. }
  823. }
  824. /*
  825. * Configures the specified PHY through the MII management interface
  826. * using Autonegotiation.
  827. * Calls smc911x_phy_fixed() if the user has requested a certain config.
  828. * If RPC ANEG bit is set, the media selection is dependent purely on
  829. * the selection by the MII (either in the MII BMCR reg or the result
  830. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  831. * is controlled by the RPC SPEED and RPC DPLX bits.
  832. */
  833. static void smc911x_phy_configure(struct work_struct *work)
  834. {
  835. struct smc911x_local *lp = container_of(work, struct smc911x_local,
  836. phy_configure);
  837. struct net_device *dev = lp->netdev;
  838. unsigned long ioaddr = dev->base_addr;
  839. int phyaddr = lp->mii.phy_id;
  840. int my_phy_caps; /* My PHY capabilities */
  841. int my_ad_caps; /* My Advertised capabilities */
  842. int status;
  843. unsigned long flags;
  844. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
  845. /*
  846. * We should not be called if phy_type is zero.
  847. */
  848. if (lp->phy_type == 0)
  849. goto smc911x_phy_configure_exit_nolock;
  850. if (smc911x_phy_reset(dev, phyaddr)) {
  851. printk("%s: PHY reset timed out\n", dev->name);
  852. goto smc911x_phy_configure_exit_nolock;
  853. }
  854. spin_lock_irqsave(&lp->lock, flags);
  855. /*
  856. * Enable PHY Interrupts (for register 18)
  857. * Interrupts listed here are enabled
  858. */
  859. SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
  860. PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
  861. PHY_INT_MASK_LINK_DOWN_);
  862. /* If the user requested no auto neg, then go set his request */
  863. if (lp->mii.force_media) {
  864. smc911x_phy_fixed(dev);
  865. goto smc911x_phy_configure_exit;
  866. }
  867. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  868. SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
  869. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  870. printk(KERN_INFO "Auto negotiation NOT supported\n");
  871. smc911x_phy_fixed(dev);
  872. goto smc911x_phy_configure_exit;
  873. }
  874. /* CSMA capable w/ both pauses */
  875. my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
  876. if (my_phy_caps & BMSR_100BASE4)
  877. my_ad_caps |= ADVERTISE_100BASE4;
  878. if (my_phy_caps & BMSR_100FULL)
  879. my_ad_caps |= ADVERTISE_100FULL;
  880. if (my_phy_caps & BMSR_100HALF)
  881. my_ad_caps |= ADVERTISE_100HALF;
  882. if (my_phy_caps & BMSR_10FULL)
  883. my_ad_caps |= ADVERTISE_10FULL;
  884. if (my_phy_caps & BMSR_10HALF)
  885. my_ad_caps |= ADVERTISE_10HALF;
  886. /* Disable capabilities not selected by our user */
  887. if (lp->ctl_rspeed != 100)
  888. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  889. if (!lp->ctl_rfduplx)
  890. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  891. /* Update our Auto-Neg Advertisement Register */
  892. SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
  893. lp->mii.advertising = my_ad_caps;
  894. /*
  895. * Read the register back. Without this, it appears that when
  896. * auto-negotiation is restarted, sometimes it isn't ready and
  897. * the link does not come up.
  898. */
  899. udelay(10);
  900. SMC_GET_PHY_MII_ADV(phyaddr, status);
  901. DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
  902. DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
  903. /* Restart auto-negotiation process in order to advertise my caps */
  904. SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
  905. smc911x_phy_check_media(dev, 1);
  906. smc911x_phy_configure_exit:
  907. spin_unlock_irqrestore(&lp->lock, flags);
  908. smc911x_phy_configure_exit_nolock:
  909. lp->work_pending = 0;
  910. }
  911. /*
  912. * smc911x_phy_interrupt
  913. *
  914. * Purpose: Handle interrupts relating to PHY register 18. This is
  915. * called from the "hard" interrupt handler under our private spinlock.
  916. */
  917. static void smc911x_phy_interrupt(struct net_device *dev)
  918. {
  919. struct smc911x_local *lp = netdev_priv(dev);
  920. unsigned long ioaddr = dev->base_addr;
  921. int phyaddr = lp->mii.phy_id;
  922. int status;
  923. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  924. if (lp->phy_type == 0)
  925. return;
  926. smc911x_phy_check_media(dev, 0);
  927. /* read to clear status bits */
  928. SMC_GET_PHY_INT_SRC(phyaddr,status);
  929. DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
  930. dev->name, status & 0xffff);
  931. DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
  932. dev->name, SMC_GET_AFC_CFG());
  933. }
  934. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  935. /*
  936. * This is the main routine of the driver, to handle the device when
  937. * it needs some attention.
  938. */
  939. static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
  940. {
  941. struct net_device *dev = dev_id;
  942. unsigned long ioaddr = dev->base_addr;
  943. struct smc911x_local *lp = netdev_priv(dev);
  944. unsigned int status, mask, timeout;
  945. unsigned int rx_overrun=0, cr, pkts;
  946. unsigned long flags;
  947. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  948. spin_lock_irqsave(&lp->lock, flags);
  949. /* Spurious interrupt check */
  950. if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
  951. (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
  952. spin_unlock_irqrestore(&lp->lock, flags);
  953. return IRQ_NONE;
  954. }
  955. mask = SMC_GET_INT_EN();
  956. SMC_SET_INT_EN(0);
  957. /* set a timeout value, so I don't stay here forever */
  958. timeout = 8;
  959. do {
  960. status = SMC_GET_INT();
  961. DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
  962. dev->name, status, mask, status & ~mask);
  963. status &= mask;
  964. if (!status)
  965. break;
  966. /* Handle SW interrupt condition */
  967. if (status & INT_STS_SW_INT_) {
  968. SMC_ACK_INT(INT_STS_SW_INT_);
  969. mask &= ~INT_EN_SW_INT_EN_;
  970. }
  971. /* Handle various error conditions */
  972. if (status & INT_STS_RXE_) {
  973. SMC_ACK_INT(INT_STS_RXE_);
  974. lp->stats.rx_errors++;
  975. }
  976. if (status & INT_STS_RXDFH_INT_) {
  977. SMC_ACK_INT(INT_STS_RXDFH_INT_);
  978. lp->stats.rx_dropped+=SMC_GET_RX_DROP();
  979. }
  980. /* Undocumented interrupt-what is the right thing to do here? */
  981. if (status & INT_STS_RXDF_INT_) {
  982. SMC_ACK_INT(INT_STS_RXDF_INT_);
  983. }
  984. /* Rx Data FIFO exceeds set level */
  985. if (status & INT_STS_RDFL_) {
  986. if (IS_REV_A(lp->revision)) {
  987. rx_overrun=1;
  988. SMC_GET_MAC_CR(cr);
  989. cr &= ~MAC_CR_RXEN_;
  990. SMC_SET_MAC_CR(cr);
  991. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  992. lp->stats.rx_errors++;
  993. lp->stats.rx_fifo_errors++;
  994. }
  995. SMC_ACK_INT(INT_STS_RDFL_);
  996. }
  997. if (status & INT_STS_RDFO_) {
  998. if (!IS_REV_A(lp->revision)) {
  999. SMC_GET_MAC_CR(cr);
  1000. cr &= ~MAC_CR_RXEN_;
  1001. SMC_SET_MAC_CR(cr);
  1002. rx_overrun=1;
  1003. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  1004. lp->stats.rx_errors++;
  1005. lp->stats.rx_fifo_errors++;
  1006. }
  1007. SMC_ACK_INT(INT_STS_RDFO_);
  1008. }
  1009. /* Handle receive condition */
  1010. if ((status & INT_STS_RSFL_) || rx_overrun) {
  1011. unsigned int fifo;
  1012. DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
  1013. fifo = SMC_GET_RX_FIFO_INF();
  1014. pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
  1015. DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
  1016. dev->name, pkts, fifo & 0xFFFF );
  1017. if (pkts != 0) {
  1018. #ifdef SMC_USE_DMA
  1019. unsigned int fifo;
  1020. if (lp->rxdma_active){
  1021. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1022. "%s: RX DMA active\n", dev->name);
  1023. /* The DMA is already running so up the IRQ threshold */
  1024. fifo = SMC_GET_FIFO_INT() & ~0xFF;
  1025. fifo |= pkts & 0xFF;
  1026. DBG(SMC_DEBUG_RX,
  1027. "%s: Setting RX stat FIFO threshold to %d\n",
  1028. dev->name, fifo & 0xff);
  1029. SMC_SET_FIFO_INT(fifo);
  1030. } else
  1031. #endif
  1032. smc911x_rcv(dev);
  1033. }
  1034. SMC_ACK_INT(INT_STS_RSFL_);
  1035. }
  1036. /* Handle transmit FIFO available */
  1037. if (status & INT_STS_TDFA_) {
  1038. DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
  1039. SMC_SET_FIFO_TDA(0xFF);
  1040. lp->tx_throttle = 0;
  1041. #ifdef SMC_USE_DMA
  1042. if (!lp->txdma_active)
  1043. #endif
  1044. netif_wake_queue(dev);
  1045. SMC_ACK_INT(INT_STS_TDFA_);
  1046. }
  1047. /* Handle transmit done condition */
  1048. #if 1
  1049. if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
  1050. DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
  1051. "%s: Tx stat FIFO limit (%d) /GPT irq\n",
  1052. dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
  1053. smc911x_tx(dev);
  1054. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  1055. SMC_ACK_INT(INT_STS_TSFL_);
  1056. SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
  1057. }
  1058. #else
  1059. if (status & INT_STS_TSFL_) {
  1060. DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
  1061. smc911x_tx(dev);
  1062. SMC_ACK_INT(INT_STS_TSFL_);
  1063. }
  1064. if (status & INT_STS_GPT_INT_) {
  1065. DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
  1066. dev->name,
  1067. SMC_GET_IRQ_CFG(),
  1068. SMC_GET_FIFO_INT(),
  1069. SMC_GET_RX_CFG());
  1070. DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
  1071. "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
  1072. dev->name,
  1073. (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
  1074. SMC_GET_RX_FIFO_INF() & 0xffff,
  1075. SMC_GET_RX_STS_FIFO_PEEK());
  1076. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  1077. SMC_ACK_INT(INT_STS_GPT_INT_);
  1078. }
  1079. #endif
  1080. /* Handle PHY interupt condition */
  1081. if (status & INT_STS_PHY_INT_) {
  1082. DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
  1083. smc911x_phy_interrupt(dev);
  1084. SMC_ACK_INT(INT_STS_PHY_INT_);
  1085. }
  1086. } while (--timeout);
  1087. /* restore mask state */
  1088. SMC_SET_INT_EN(mask);
  1089. DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
  1090. dev->name, 8-timeout);
  1091. spin_unlock_irqrestore(&lp->lock, flags);
  1092. DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
  1093. return IRQ_HANDLED;
  1094. }
  1095. #ifdef SMC_USE_DMA
  1096. static void
  1097. smc911x_tx_dma_irq(int dma, void *data)
  1098. {
  1099. struct net_device *dev = (struct net_device *)data;
  1100. struct smc911x_local *lp = netdev_priv(dev);
  1101. struct sk_buff *skb = lp->current_tx_skb;
  1102. unsigned long flags;
  1103. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1104. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
  1105. /* Clear the DMA interrupt sources */
  1106. SMC_DMA_ACK_IRQ(dev, dma);
  1107. BUG_ON(skb == NULL);
  1108. dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
  1109. dev->trans_start = jiffies;
  1110. dev_kfree_skb_irq(skb);
  1111. lp->current_tx_skb = NULL;
  1112. if (lp->pending_tx_skb != NULL)
  1113. smc911x_hardware_send_pkt(dev);
  1114. else {
  1115. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1116. "%s: No pending Tx packets. DMA disabled\n", dev->name);
  1117. spin_lock_irqsave(&lp->lock, flags);
  1118. lp->txdma_active = 0;
  1119. if (!lp->tx_throttle) {
  1120. netif_wake_queue(dev);
  1121. }
  1122. spin_unlock_irqrestore(&lp->lock, flags);
  1123. }
  1124. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1125. "%s: TX DMA irq completed\n", dev->name);
  1126. }
  1127. static void
  1128. smc911x_rx_dma_irq(int dma, void *data)
  1129. {
  1130. struct net_device *dev = (struct net_device *)data;
  1131. unsigned long ioaddr = dev->base_addr;
  1132. struct smc911x_local *lp = netdev_priv(dev);
  1133. struct sk_buff *skb = lp->current_rx_skb;
  1134. unsigned long flags;
  1135. unsigned int pkts;
  1136. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1137. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
  1138. /* Clear the DMA interrupt sources */
  1139. SMC_DMA_ACK_IRQ(dev, dma);
  1140. dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
  1141. BUG_ON(skb == NULL);
  1142. lp->current_rx_skb = NULL;
  1143. PRINT_PKT(skb->data, skb->len);
  1144. dev->last_rx = jiffies;
  1145. skb->protocol = eth_type_trans(skb, dev);
  1146. netif_rx(skb);
  1147. lp->stats.rx_packets++;
  1148. lp->stats.rx_bytes += skb->len;
  1149. spin_lock_irqsave(&lp->lock, flags);
  1150. pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
  1151. if (pkts != 0) {
  1152. smc911x_rcv(dev);
  1153. }else {
  1154. lp->rxdma_active = 0;
  1155. }
  1156. spin_unlock_irqrestore(&lp->lock, flags);
  1157. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1158. "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
  1159. dev->name, pkts);
  1160. }
  1161. #endif /* SMC_USE_DMA */
  1162. #ifdef CONFIG_NET_POLL_CONTROLLER
  1163. /*
  1164. * Polling receive - used by netconsole and other diagnostic tools
  1165. * to allow network i/o with interrupts disabled.
  1166. */
  1167. static void smc911x_poll_controller(struct net_device *dev)
  1168. {
  1169. disable_irq(dev->irq);
  1170. smc911x_interrupt(dev->irq, dev);
  1171. enable_irq(dev->irq);
  1172. }
  1173. #endif
  1174. /* Our watchdog timed out. Called by the networking layer */
  1175. static void smc911x_timeout(struct net_device *dev)
  1176. {
  1177. struct smc911x_local *lp = netdev_priv(dev);
  1178. unsigned long ioaddr = dev->base_addr;
  1179. int status, mask;
  1180. unsigned long flags;
  1181. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1182. spin_lock_irqsave(&lp->lock, flags);
  1183. status = SMC_GET_INT();
  1184. mask = SMC_GET_INT_EN();
  1185. spin_unlock_irqrestore(&lp->lock, flags);
  1186. DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
  1187. dev->name, status, mask);
  1188. /* Dump the current TX FIFO contents and restart */
  1189. mask = SMC_GET_TX_CFG();
  1190. SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
  1191. /*
  1192. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1193. * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
  1194. * which calls schedule(). Hence we use a work queue.
  1195. */
  1196. if (lp->phy_type != 0) {
  1197. if (schedule_work(&lp->phy_configure)) {
  1198. lp->work_pending = 1;
  1199. }
  1200. }
  1201. /* We can accept TX packets again */
  1202. dev->trans_start = jiffies;
  1203. netif_wake_queue(dev);
  1204. }
  1205. /*
  1206. * This routine will, depending on the values passed to it,
  1207. * either make it accept multicast packets, go into
  1208. * promiscuous mode (for TCPDUMP and cousins) or accept
  1209. * a select set of multicast packets
  1210. */
  1211. static void smc911x_set_multicast_list(struct net_device *dev)
  1212. {
  1213. struct smc911x_local *lp = netdev_priv(dev);
  1214. unsigned long ioaddr = dev->base_addr;
  1215. unsigned int multicast_table[2];
  1216. unsigned int mcr, update_multicast = 0;
  1217. unsigned long flags;
  1218. /* table for flipping the order of 5 bits */
  1219. static const unsigned char invert5[] =
  1220. {0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C,
  1221. 0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E,
  1222. 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D,
  1223. 0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F};
  1224. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1225. spin_lock_irqsave(&lp->lock, flags);
  1226. SMC_GET_MAC_CR(mcr);
  1227. spin_unlock_irqrestore(&lp->lock, flags);
  1228. if (dev->flags & IFF_PROMISC) {
  1229. DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
  1230. mcr |= MAC_CR_PRMS_;
  1231. }
  1232. /*
  1233. * Here, I am setting this to accept all multicast packets.
  1234. * I don't need to zero the multicast table, because the flag is
  1235. * checked before the table is
  1236. */
  1237. else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
  1238. DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
  1239. mcr |= MAC_CR_MCPAS_;
  1240. }
  1241. /*
  1242. * This sets the internal hardware table to filter out unwanted
  1243. * multicast packets before they take up memory.
  1244. *
  1245. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1246. * address are the offset into the table. If that bit is 1, then the
  1247. * multicast packet is accepted. Otherwise, it's dropped silently.
  1248. *
  1249. * To use the 6 bits as an offset into the table, the high 1 bit is
  1250. * the number of the 32 bit register, while the low 5 bits are the bit
  1251. * within that register.
  1252. */
  1253. else if (dev->mc_count) {
  1254. int i;
  1255. struct dev_mc_list *cur_addr;
  1256. /* Set the Hash perfec mode */
  1257. mcr |= MAC_CR_HPFILT_;
  1258. /* start with a table of all zeros: reject all */
  1259. memset(multicast_table, 0, sizeof(multicast_table));
  1260. cur_addr = dev->mc_list;
  1261. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1262. int position;
  1263. /* do we have a pointer here? */
  1264. if (!cur_addr)
  1265. break;
  1266. /* make sure this is a multicast address -
  1267. shouldn't this be a given if we have it here ? */
  1268. if (!(*cur_addr->dmi_addr & 1))
  1269. continue;
  1270. /* only use the low order bits */
  1271. position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
  1272. /* do some messy swapping to put the bit in the right spot */
  1273. multicast_table[invert5[position&0x1F]&0x1] |=
  1274. (1<<invert5[(position>>1)&0x1F]);
  1275. }
  1276. /* be sure I get rid of flags I might have set */
  1277. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1278. /* now, the table can be loaded into the chipset */
  1279. update_multicast = 1;
  1280. } else {
  1281. DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
  1282. dev->name);
  1283. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1284. /*
  1285. * since I'm disabling all multicast entirely, I need to
  1286. * clear the multicast list
  1287. */
  1288. memset(multicast_table, 0, sizeof(multicast_table));
  1289. update_multicast = 1;
  1290. }
  1291. spin_lock_irqsave(&lp->lock, flags);
  1292. SMC_SET_MAC_CR(mcr);
  1293. if (update_multicast) {
  1294. DBG(SMC_DEBUG_MISC,
  1295. "%s: update mcast hash table 0x%08x 0x%08x\n",
  1296. dev->name, multicast_table[0], multicast_table[1]);
  1297. SMC_SET_HASHL(multicast_table[0]);
  1298. SMC_SET_HASHH(multicast_table[1]);
  1299. }
  1300. spin_unlock_irqrestore(&lp->lock, flags);
  1301. }
  1302. /*
  1303. * Open and Initialize the board
  1304. *
  1305. * Set up everything, reset the card, etc..
  1306. */
  1307. static int
  1308. smc911x_open(struct net_device *dev)
  1309. {
  1310. struct smc911x_local *lp = netdev_priv(dev);
  1311. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1312. /*
  1313. * Check that the address is valid. If its not, refuse
  1314. * to bring the device up. The user must specify an
  1315. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1316. */
  1317. if (!is_valid_ether_addr(dev->dev_addr)) {
  1318. PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
  1319. return -EINVAL;
  1320. }
  1321. /* reset the hardware */
  1322. smc911x_reset(dev);
  1323. /* Configure the PHY, initialize the link state */
  1324. smc911x_phy_configure(&lp->phy_configure);
  1325. /* Turn on Tx + Rx */
  1326. smc911x_enable(dev);
  1327. netif_start_queue(dev);
  1328. return 0;
  1329. }
  1330. /*
  1331. * smc911x_close
  1332. *
  1333. * this makes the board clean up everything that it can
  1334. * and not talk to the outside world. Caused by
  1335. * an 'ifconfig ethX down'
  1336. */
  1337. static int smc911x_close(struct net_device *dev)
  1338. {
  1339. struct smc911x_local *lp = netdev_priv(dev);
  1340. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1341. netif_stop_queue(dev);
  1342. netif_carrier_off(dev);
  1343. /* clear everything */
  1344. smc911x_shutdown(dev);
  1345. if (lp->phy_type != 0) {
  1346. /* We need to ensure that no calls to
  1347. * smc911x_phy_configure are pending.
  1348. * flush_scheduled_work() cannot be called because we
  1349. * are running with the netlink semaphore held (from
  1350. * devinet_ioctl()) and the pending work queue
  1351. * contains linkwatch_event() (scheduled by
  1352. * netif_carrier_off() above). linkwatch_event() also
  1353. * wants the netlink semaphore.
  1354. */
  1355. while (lp->work_pending)
  1356. schedule();
  1357. smc911x_phy_powerdown(dev, lp->mii.phy_id);
  1358. }
  1359. if (lp->pending_tx_skb) {
  1360. dev_kfree_skb(lp->pending_tx_skb);
  1361. lp->pending_tx_skb = NULL;
  1362. }
  1363. return 0;
  1364. }
  1365. /*
  1366. * Get the current statistics.
  1367. * This may be called with the card open or closed.
  1368. */
  1369. static struct net_device_stats *smc911x_query_statistics(struct net_device *dev)
  1370. {
  1371. struct smc911x_local *lp = netdev_priv(dev);
  1372. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1373. return &lp->stats;
  1374. }
  1375. /*
  1376. * Ethtool support
  1377. */
  1378. static int
  1379. smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1380. {
  1381. struct smc911x_local *lp = netdev_priv(dev);
  1382. unsigned long ioaddr = dev->base_addr;
  1383. int ret, status;
  1384. unsigned long flags;
  1385. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1386. cmd->maxtxpkt = 1;
  1387. cmd->maxrxpkt = 1;
  1388. if (lp->phy_type != 0) {
  1389. spin_lock_irqsave(&lp->lock, flags);
  1390. ret = mii_ethtool_gset(&lp->mii, cmd);
  1391. spin_unlock_irqrestore(&lp->lock, flags);
  1392. } else {
  1393. cmd->supported = SUPPORTED_10baseT_Half |
  1394. SUPPORTED_10baseT_Full |
  1395. SUPPORTED_TP | SUPPORTED_AUI;
  1396. if (lp->ctl_rspeed == 10)
  1397. cmd->speed = SPEED_10;
  1398. else if (lp->ctl_rspeed == 100)
  1399. cmd->speed = SPEED_100;
  1400. cmd->autoneg = AUTONEG_DISABLE;
  1401. if (lp->mii.phy_id==1)
  1402. cmd->transceiver = XCVR_INTERNAL;
  1403. else
  1404. cmd->transceiver = XCVR_EXTERNAL;
  1405. cmd->port = 0;
  1406. SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
  1407. cmd->duplex =
  1408. (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
  1409. DUPLEX_FULL : DUPLEX_HALF;
  1410. ret = 0;
  1411. }
  1412. return ret;
  1413. }
  1414. static int
  1415. smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1416. {
  1417. struct smc911x_local *lp = netdev_priv(dev);
  1418. int ret;
  1419. unsigned long flags;
  1420. if (lp->phy_type != 0) {
  1421. spin_lock_irqsave(&lp->lock, flags);
  1422. ret = mii_ethtool_sset(&lp->mii, cmd);
  1423. spin_unlock_irqrestore(&lp->lock, flags);
  1424. } else {
  1425. if (cmd->autoneg != AUTONEG_DISABLE ||
  1426. cmd->speed != SPEED_10 ||
  1427. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1428. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1429. return -EINVAL;
  1430. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1431. ret = 0;
  1432. }
  1433. return ret;
  1434. }
  1435. static void
  1436. smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1437. {
  1438. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1439. strncpy(info->version, version, sizeof(info->version));
  1440. strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
  1441. }
  1442. static int smc911x_ethtool_nwayreset(struct net_device *dev)
  1443. {
  1444. struct smc911x_local *lp = netdev_priv(dev);
  1445. int ret = -EINVAL;
  1446. unsigned long flags;
  1447. if (lp->phy_type != 0) {
  1448. spin_lock_irqsave(&lp->lock, flags);
  1449. ret = mii_nway_restart(&lp->mii);
  1450. spin_unlock_irqrestore(&lp->lock, flags);
  1451. }
  1452. return ret;
  1453. }
  1454. static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
  1455. {
  1456. struct smc911x_local *lp = netdev_priv(dev);
  1457. return lp->msg_enable;
  1458. }
  1459. static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1460. {
  1461. struct smc911x_local *lp = netdev_priv(dev);
  1462. lp->msg_enable = level;
  1463. }
  1464. static int smc911x_ethtool_getregslen(struct net_device *dev)
  1465. {
  1466. /* System regs + MAC regs + PHY regs */
  1467. return (((E2P_CMD - ID_REV)/4 + 1) +
  1468. (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
  1469. }
  1470. static void smc911x_ethtool_getregs(struct net_device *dev,
  1471. struct ethtool_regs* regs, void *buf)
  1472. {
  1473. unsigned long ioaddr = dev->base_addr;
  1474. struct smc911x_local *lp = netdev_priv(dev);
  1475. unsigned long flags;
  1476. u32 reg,i,j=0;
  1477. u32 *data = (u32*)buf;
  1478. regs->version = lp->version;
  1479. for(i=ID_REV;i<=E2P_CMD;i+=4) {
  1480. data[j++] = SMC_inl(ioaddr,i);
  1481. }
  1482. for(i=MAC_CR;i<=WUCSR;i++) {
  1483. spin_lock_irqsave(&lp->lock, flags);
  1484. SMC_GET_MAC_CSR(i, reg);
  1485. spin_unlock_irqrestore(&lp->lock, flags);
  1486. data[j++] = reg;
  1487. }
  1488. for(i=0;i<=31;i++) {
  1489. spin_lock_irqsave(&lp->lock, flags);
  1490. SMC_GET_MII(i, lp->mii.phy_id, reg);
  1491. spin_unlock_irqrestore(&lp->lock, flags);
  1492. data[j++] = reg & 0xFFFF;
  1493. }
  1494. }
  1495. static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
  1496. {
  1497. unsigned long ioaddr = dev->base_addr;
  1498. unsigned int timeout;
  1499. int e2p_cmd;
  1500. e2p_cmd = SMC_GET_E2P_CMD();
  1501. for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
  1502. if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
  1503. PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
  1504. dev->name, __FUNCTION__);
  1505. return -EFAULT;
  1506. }
  1507. mdelay(1);
  1508. e2p_cmd = SMC_GET_E2P_CMD();
  1509. }
  1510. if (timeout == 0) {
  1511. PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
  1512. dev->name, __FUNCTION__);
  1513. return -ETIMEDOUT;
  1514. }
  1515. return 0;
  1516. }
  1517. static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
  1518. int cmd, int addr)
  1519. {
  1520. unsigned long ioaddr = dev->base_addr;
  1521. int ret;
  1522. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1523. return ret;
  1524. SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
  1525. ((cmd) & (0x7<<28)) |
  1526. ((addr) & 0xFF));
  1527. return 0;
  1528. }
  1529. static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
  1530. u8 *data)
  1531. {
  1532. unsigned long ioaddr = dev->base_addr;
  1533. int ret;
  1534. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1535. return ret;
  1536. *data = SMC_GET_E2P_DATA();
  1537. return 0;
  1538. }
  1539. static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
  1540. u8 data)
  1541. {
  1542. unsigned long ioaddr = dev->base_addr;
  1543. int ret;
  1544. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1545. return ret;
  1546. SMC_SET_E2P_DATA(data);
  1547. return 0;
  1548. }
  1549. static int smc911x_ethtool_geteeprom(struct net_device *dev,
  1550. struct ethtool_eeprom *eeprom, u8 *data)
  1551. {
  1552. u8 eebuf[SMC911X_EEPROM_LEN];
  1553. int i, ret;
  1554. for(i=0;i<SMC911X_EEPROM_LEN;i++) {
  1555. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
  1556. return ret;
  1557. if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
  1558. return ret;
  1559. }
  1560. memcpy(data, eebuf+eeprom->offset, eeprom->len);
  1561. return 0;
  1562. }
  1563. static int smc911x_ethtool_seteeprom(struct net_device *dev,
  1564. struct ethtool_eeprom *eeprom, u8 *data)
  1565. {
  1566. int i, ret;
  1567. /* Enable erase */
  1568. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
  1569. return ret;
  1570. for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
  1571. /* erase byte */
  1572. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
  1573. return ret;
  1574. /* write byte */
  1575. if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
  1576. return ret;
  1577. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
  1578. return ret;
  1579. }
  1580. return 0;
  1581. }
  1582. static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
  1583. {
  1584. return SMC911X_EEPROM_LEN;
  1585. }
  1586. static const struct ethtool_ops smc911x_ethtool_ops = {
  1587. .get_settings = smc911x_ethtool_getsettings,
  1588. .set_settings = smc911x_ethtool_setsettings,
  1589. .get_drvinfo = smc911x_ethtool_getdrvinfo,
  1590. .get_msglevel = smc911x_ethtool_getmsglevel,
  1591. .set_msglevel = smc911x_ethtool_setmsglevel,
  1592. .nway_reset = smc911x_ethtool_nwayreset,
  1593. .get_link = ethtool_op_get_link,
  1594. .get_regs_len = smc911x_ethtool_getregslen,
  1595. .get_regs = smc911x_ethtool_getregs,
  1596. .get_eeprom_len = smc911x_ethtool_geteeprom_len,
  1597. .get_eeprom = smc911x_ethtool_geteeprom,
  1598. .set_eeprom = smc911x_ethtool_seteeprom,
  1599. };
  1600. /*
  1601. * smc911x_findirq
  1602. *
  1603. * This routine has a simple purpose -- make the SMC chip generate an
  1604. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1605. */
  1606. static int __init smc911x_findirq(unsigned long ioaddr)
  1607. {
  1608. int timeout = 20;
  1609. unsigned long cookie;
  1610. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1611. cookie = probe_irq_on();
  1612. /*
  1613. * Force a SW interrupt
  1614. */
  1615. SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
  1616. /*
  1617. * Wait until positive that the interrupt has been generated
  1618. */
  1619. do {
  1620. int int_status;
  1621. udelay(10);
  1622. int_status = SMC_GET_INT_EN();
  1623. if (int_status & INT_EN_SW_INT_EN_)
  1624. break; /* got the interrupt */
  1625. } while (--timeout);
  1626. /*
  1627. * there is really nothing that I can do here if timeout fails,
  1628. * as autoirq_report will return a 0 anyway, which is what I
  1629. * want in this case. Plus, the clean up is needed in both
  1630. * cases.
  1631. */
  1632. /* and disable all interrupts again */
  1633. SMC_SET_INT_EN(0);
  1634. /* and return what I found */
  1635. return probe_irq_off(cookie);
  1636. }
  1637. /*
  1638. * Function: smc911x_probe(unsigned long ioaddr)
  1639. *
  1640. * Purpose:
  1641. * Tests to see if a given ioaddr points to an SMC911x chip.
  1642. * Returns a 0 on success
  1643. *
  1644. * Algorithm:
  1645. * (1) see if the endian word is OK
  1646. * (1) see if I recognize the chip ID in the appropriate register
  1647. *
  1648. * Here I do typical initialization tasks.
  1649. *
  1650. * o Initialize the structure if needed
  1651. * o print out my vanity message if not done so already
  1652. * o print out what type of hardware is detected
  1653. * o print out the ethernet address
  1654. * o find the IRQ
  1655. * o set up my private data
  1656. * o configure the dev structure with my subroutines
  1657. * o actually GRAB the irq.
  1658. * o GRAB the region
  1659. */
  1660. static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
  1661. {
  1662. struct smc911x_local *lp = netdev_priv(dev);
  1663. int i, retval;
  1664. unsigned int val, chip_id, revision;
  1665. const char *version_string;
  1666. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1667. /* First, see if the endian word is recognized */
  1668. val = SMC_GET_BYTE_TEST();
  1669. DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
  1670. if (val != 0x87654321) {
  1671. printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
  1672. retval = -ENODEV;
  1673. goto err_out;
  1674. }
  1675. /*
  1676. * check if the revision register is something that I
  1677. * recognize. These might need to be added to later,
  1678. * as future revisions could be added.
  1679. */
  1680. chip_id = SMC_GET_PN();
  1681. DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
  1682. for(i=0;chip_ids[i].id != 0; i++) {
  1683. if (chip_ids[i].id == chip_id) break;
  1684. }
  1685. if (!chip_ids[i].id) {
  1686. printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
  1687. retval = -ENODEV;
  1688. goto err_out;
  1689. }
  1690. version_string = chip_ids[i].name;
  1691. revision = SMC_GET_REV();
  1692. DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
  1693. /* At this point I'll assume that the chip is an SMC911x. */
  1694. DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
  1695. /* Validate the TX FIFO size requested */
  1696. if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
  1697. printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
  1698. retval = -EINVAL;
  1699. goto err_out;
  1700. }
  1701. /* fill in some of the fields */
  1702. dev->base_addr = ioaddr;
  1703. lp->version = chip_ids[i].id;
  1704. lp->revision = revision;
  1705. lp->tx_fifo_kb = tx_fifo_kb;
  1706. /* Reverse calculate the RX FIFO size from the TX */
  1707. lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
  1708. lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
  1709. /* Set the automatic flow control values */
  1710. switch(lp->tx_fifo_kb) {
  1711. /*
  1712. * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
  1713. * AFC_LO is AFC_HI/2
  1714. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1715. */
  1716. case 2:/* 13440 Rx Data Fifo Size */
  1717. lp->afc_cfg=0x008C46AF;break;
  1718. case 3:/* 12480 Rx Data Fifo Size */
  1719. lp->afc_cfg=0x0082419F;break;
  1720. case 4:/* 11520 Rx Data Fifo Size */
  1721. lp->afc_cfg=0x00783C9F;break;
  1722. case 5:/* 10560 Rx Data Fifo Size */
  1723. lp->afc_cfg=0x006E374F;break;
  1724. case 6:/* 9600 Rx Data Fifo Size */
  1725. lp->afc_cfg=0x0064328F;break;
  1726. case 7:/* 8640 Rx Data Fifo Size */
  1727. lp->afc_cfg=0x005A2D7F;break;
  1728. case 8:/* 7680 Rx Data Fifo Size */
  1729. lp->afc_cfg=0x0050287F;break;
  1730. case 9:/* 6720 Rx Data Fifo Size */
  1731. lp->afc_cfg=0x0046236F;break;
  1732. case 10:/* 5760 Rx Data Fifo Size */
  1733. lp->afc_cfg=0x003C1E6F;break;
  1734. case 11:/* 4800 Rx Data Fifo Size */
  1735. lp->afc_cfg=0x0032195F;break;
  1736. /*
  1737. * AFC_HI is ~1520 bytes less than RX Data Fifo Size
  1738. * AFC_LO is AFC_HI/2
  1739. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1740. */
  1741. case 12:/* 3840 Rx Data Fifo Size */
  1742. lp->afc_cfg=0x0024124F;break;
  1743. case 13:/* 2880 Rx Data Fifo Size */
  1744. lp->afc_cfg=0x0015073F;break;
  1745. case 14:/* 1920 Rx Data Fifo Size */
  1746. lp->afc_cfg=0x0006032F;break;
  1747. default:
  1748. PRINTK("%s: ERROR -- no AFC_CFG setting found",
  1749. dev->name);
  1750. break;
  1751. }
  1752. DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
  1753. "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
  1754. lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
  1755. spin_lock_init(&lp->lock);
  1756. /* Get the MAC address */
  1757. SMC_GET_MAC_ADDR(dev->dev_addr);
  1758. /* now, reset the chip, and put it into a known state */
  1759. smc911x_reset(dev);
  1760. /*
  1761. * If dev->irq is 0, then the device has to be banged on to see
  1762. * what the IRQ is.
  1763. *
  1764. * Specifying an IRQ is done with the assumption that the user knows
  1765. * what (s)he is doing. No checking is done!!!!
  1766. */
  1767. if (dev->irq < 1) {
  1768. int trials;
  1769. trials = 3;
  1770. while (trials--) {
  1771. dev->irq = smc911x_findirq(ioaddr);
  1772. if (dev->irq)
  1773. break;
  1774. /* kick the card and try again */
  1775. smc911x_reset(dev);
  1776. }
  1777. }
  1778. if (dev->irq == 0) {
  1779. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1780. dev->name);
  1781. retval = -ENODEV;
  1782. goto err_out;
  1783. }
  1784. dev->irq = irq_canonicalize(dev->irq);
  1785. /* Fill in the fields of the device structure with ethernet values. */
  1786. ether_setup(dev);
  1787. dev->open = smc911x_open;
  1788. dev->stop = smc911x_close;
  1789. dev->hard_start_xmit = smc911x_hard_start_xmit;
  1790. dev->tx_timeout = smc911x_timeout;
  1791. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1792. dev->get_stats = smc911x_query_statistics;
  1793. dev->set_multicast_list = smc911x_set_multicast_list;
  1794. dev->ethtool_ops = &smc911x_ethtool_ops;
  1795. #ifdef CONFIG_NET_POLL_CONTROLLER
  1796. dev->poll_controller = smc911x_poll_controller;
  1797. #endif
  1798. INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
  1799. lp->mii.phy_id_mask = 0x1f;
  1800. lp->mii.reg_num_mask = 0x1f;
  1801. lp->mii.force_media = 0;
  1802. lp->mii.full_duplex = 0;
  1803. lp->mii.dev = dev;
  1804. lp->mii.mdio_read = smc911x_phy_read;
  1805. lp->mii.mdio_write = smc911x_phy_write;
  1806. /*
  1807. * Locate the phy, if any.
  1808. */
  1809. smc911x_phy_detect(dev);
  1810. /* Set default parameters */
  1811. lp->msg_enable = NETIF_MSG_LINK;
  1812. lp->ctl_rfduplx = 1;
  1813. lp->ctl_rspeed = 100;
  1814. /* Grab the IRQ */
  1815. retval = request_irq(dev->irq, &smc911x_interrupt,
  1816. IRQF_SHARED | IRQF_TRIGGER_FALLING, dev->name, dev);
  1817. if (retval)
  1818. goto err_out;
  1819. #ifdef SMC_USE_DMA
  1820. lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
  1821. lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
  1822. lp->rxdma_active = 0;
  1823. lp->txdma_active = 0;
  1824. dev->dma = lp->rxdma;
  1825. #endif
  1826. retval = register_netdev(dev);
  1827. if (retval == 0) {
  1828. /* now, print out the card info, in a short format.. */
  1829. printk("%s: %s (rev %d) at %#lx IRQ %d",
  1830. dev->name, version_string, lp->revision,
  1831. dev->base_addr, dev->irq);
  1832. #ifdef SMC_USE_DMA
  1833. if (lp->rxdma != -1)
  1834. printk(" RXDMA %d ", lp->rxdma);
  1835. if (lp->txdma != -1)
  1836. printk("TXDMA %d", lp->txdma);
  1837. #endif
  1838. printk("\n");
  1839. if (!is_valid_ether_addr(dev->dev_addr)) {
  1840. printk("%s: Invalid ethernet MAC address. Please "
  1841. "set using ifconfig\n", dev->name);
  1842. } else {
  1843. /* Print the Ethernet address */
  1844. printk("%s: Ethernet addr: ", dev->name);
  1845. for (i = 0; i < 5; i++)
  1846. printk("%2.2x:", dev->dev_addr[i]);
  1847. printk("%2.2x\n", dev->dev_addr[5]);
  1848. }
  1849. if (lp->phy_type == 0) {
  1850. PRINTK("%s: No PHY found\n", dev->name);
  1851. } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
  1852. PRINTK("%s: LAN911x Internal PHY\n", dev->name);
  1853. } else {
  1854. PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
  1855. }
  1856. }
  1857. err_out:
  1858. #ifdef SMC_USE_DMA
  1859. if (retval) {
  1860. if (lp->rxdma != -1) {
  1861. SMC_DMA_FREE(dev, lp->rxdma);
  1862. }
  1863. if (lp->txdma != -1) {
  1864. SMC_DMA_FREE(dev, lp->txdma);
  1865. }
  1866. }
  1867. #endif
  1868. return retval;
  1869. }
  1870. /*
  1871. * smc911x_init(void)
  1872. *
  1873. * Output:
  1874. * 0 --> there is a device
  1875. * anything else, error
  1876. */
  1877. static int smc911x_drv_probe(struct platform_device *pdev)
  1878. {
  1879. struct net_device *ndev;
  1880. struct resource *res;
  1881. struct smc911x_local *lp;
  1882. unsigned int *addr;
  1883. int ret;
  1884. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1885. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1886. if (!res) {
  1887. ret = -ENODEV;
  1888. goto out;
  1889. }
  1890. /*
  1891. * Request the regions.
  1892. */
  1893. if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
  1894. ret = -EBUSY;
  1895. goto out;
  1896. }
  1897. ndev = alloc_etherdev(sizeof(struct smc911x_local));
  1898. if (!ndev) {
  1899. printk("%s: could not allocate device.\n", CARDNAME);
  1900. ret = -ENOMEM;
  1901. goto release_1;
  1902. }
  1903. SET_MODULE_OWNER(ndev);
  1904. SET_NETDEV_DEV(ndev, &pdev->dev);
  1905. ndev->dma = (unsigned char)-1;
  1906. ndev->irq = platform_get_irq(pdev, 0);
  1907. lp = netdev_priv(ndev);
  1908. lp->netdev = ndev;
  1909. addr = ioremap(res->start, SMC911X_IO_EXTENT);
  1910. if (!addr) {
  1911. ret = -ENOMEM;
  1912. goto release_both;
  1913. }
  1914. platform_set_drvdata(pdev, ndev);
  1915. ret = smc911x_probe(ndev, (unsigned long)addr);
  1916. if (ret != 0) {
  1917. platform_set_drvdata(pdev, NULL);
  1918. iounmap(addr);
  1919. release_both:
  1920. free_netdev(ndev);
  1921. release_1:
  1922. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1923. out:
  1924. printk("%s: not found (%d).\n", CARDNAME, ret);
  1925. }
  1926. #ifdef SMC_USE_DMA
  1927. else {
  1928. lp->physaddr = res->start;
  1929. lp->dev = &pdev->dev;
  1930. }
  1931. #endif
  1932. return ret;
  1933. }
  1934. static int smc911x_drv_remove(struct platform_device *pdev)
  1935. {
  1936. struct net_device *ndev = platform_get_drvdata(pdev);
  1937. struct resource *res;
  1938. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1939. platform_set_drvdata(pdev, NULL);
  1940. unregister_netdev(ndev);
  1941. free_irq(ndev->irq, ndev);
  1942. #ifdef SMC_USE_DMA
  1943. {
  1944. struct smc911x_local *lp = netdev_priv(ndev);
  1945. if (lp->rxdma != -1) {
  1946. SMC_DMA_FREE(dev, lp->rxdma);
  1947. }
  1948. if (lp->txdma != -1) {
  1949. SMC_DMA_FREE(dev, lp->txdma);
  1950. }
  1951. }
  1952. #endif
  1953. iounmap((void *)ndev->base_addr);
  1954. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1955. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1956. free_netdev(ndev);
  1957. return 0;
  1958. }
  1959. static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
  1960. {
  1961. struct net_device *ndev = platform_get_drvdata(dev);
  1962. unsigned long ioaddr = ndev->base_addr;
  1963. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1964. if (ndev) {
  1965. if (netif_running(ndev)) {
  1966. netif_device_detach(ndev);
  1967. smc911x_shutdown(ndev);
  1968. #if POWER_DOWN
  1969. /* Set D2 - Energy detect only setting */
  1970. SMC_SET_PMT_CTRL(2<<12);
  1971. #endif
  1972. }
  1973. }
  1974. return 0;
  1975. }
  1976. static int smc911x_drv_resume(struct platform_device *dev)
  1977. {
  1978. struct net_device *ndev = platform_get_drvdata(dev);
  1979. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1980. if (ndev) {
  1981. struct smc911x_local *lp = netdev_priv(ndev);
  1982. if (netif_running(ndev)) {
  1983. smc911x_reset(ndev);
  1984. smc911x_enable(ndev);
  1985. if (lp->phy_type != 0)
  1986. smc911x_phy_configure(&lp->phy_configure);
  1987. netif_device_attach(ndev);
  1988. }
  1989. }
  1990. return 0;
  1991. }
  1992. static struct platform_driver smc911x_driver = {
  1993. .probe = smc911x_drv_probe,
  1994. .remove = smc911x_drv_remove,
  1995. .suspend = smc911x_drv_suspend,
  1996. .resume = smc911x_drv_resume,
  1997. .driver = {
  1998. .name = CARDNAME,
  1999. },
  2000. };
  2001. static int __init smc911x_init(void)
  2002. {
  2003. return platform_driver_register(&smc911x_driver);
  2004. }
  2005. static void __exit smc911x_cleanup(void)
  2006. {
  2007. platform_driver_unregister(&smc911x_driver);
  2008. }
  2009. module_init(smc911x_init);
  2010. module_exit(smc911x_cleanup);