marvell.c 5.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269
  1. /*
  2. * drivers/net/phy/marvell.c
  3. *
  4. * Driver for Marvell PHYs
  5. *
  6. * Author: Andy Fleming
  7. *
  8. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/string.h>
  18. #include <linux/errno.h>
  19. #include <linux/unistd.h>
  20. #include <linux/slab.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/init.h>
  23. #include <linux/delay.h>
  24. #include <linux/netdevice.h>
  25. #include <linux/etherdevice.h>
  26. #include <linux/skbuff.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/mm.h>
  29. #include <linux/module.h>
  30. #include <linux/mii.h>
  31. #include <linux/ethtool.h>
  32. #include <linux/phy.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/uaccess.h>
  36. #define MII_M1011_IEVENT 0x13
  37. #define MII_M1011_IEVENT_CLEAR 0x0000
  38. #define MII_M1011_IMASK 0x12
  39. #define MII_M1011_IMASK_INIT 0x6400
  40. #define MII_M1011_IMASK_CLEAR 0x0000
  41. #define MII_M1011_PHY_SCR 0x10
  42. #define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
  43. #define MII_M1145_PHY_EXT_CR 0x14
  44. #define MII_M1145_RGMII_RX_DELAY 0x0080
  45. #define MII_M1145_RGMII_TX_DELAY 0x0002
  46. #define M1145_DEV_FLAGS_RESISTANCE 0x00000001
  47. #define MII_M1111_PHY_LED_CONTROL 0x18
  48. #define MII_M1111_PHY_LED_DIRECT 0x4100
  49. #define MII_M1111_PHY_LED_COMBINE 0x411c
  50. MODULE_DESCRIPTION("Marvell PHY driver");
  51. MODULE_AUTHOR("Andy Fleming");
  52. MODULE_LICENSE("GPL");
  53. static int marvell_ack_interrupt(struct phy_device *phydev)
  54. {
  55. int err;
  56. /* Clear the interrupts by reading the reg */
  57. err = phy_read(phydev, MII_M1011_IEVENT);
  58. if (err < 0)
  59. return err;
  60. return 0;
  61. }
  62. static int marvell_config_intr(struct phy_device *phydev)
  63. {
  64. int err;
  65. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  66. err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
  67. else
  68. err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
  69. return err;
  70. }
  71. static int marvell_config_aneg(struct phy_device *phydev)
  72. {
  73. int err;
  74. /* The Marvell PHY has an errata which requires
  75. * that certain registers get written in order
  76. * to restart autonegotiation */
  77. err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  78. if (err < 0)
  79. return err;
  80. err = phy_write(phydev, 0x1d, 0x1f);
  81. if (err < 0)
  82. return err;
  83. err = phy_write(phydev, 0x1e, 0x200c);
  84. if (err < 0)
  85. return err;
  86. err = phy_write(phydev, 0x1d, 0x5);
  87. if (err < 0)
  88. return err;
  89. err = phy_write(phydev, 0x1e, 0);
  90. if (err < 0)
  91. return err;
  92. err = phy_write(phydev, 0x1e, 0x100);
  93. if (err < 0)
  94. return err;
  95. err = phy_write(phydev, MII_M1011_PHY_SCR,
  96. MII_M1011_PHY_SCR_AUTO_CROSS);
  97. if (err < 0)
  98. return err;
  99. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  100. MII_M1111_PHY_LED_DIRECT);
  101. if (err < 0)
  102. return err;
  103. err = genphy_config_aneg(phydev);
  104. return err;
  105. }
  106. static int m88e1145_config_init(struct phy_device *phydev)
  107. {
  108. int err;
  109. /* Take care of errata E0 & E1 */
  110. err = phy_write(phydev, 0x1d, 0x001b);
  111. if (err < 0)
  112. return err;
  113. err = phy_write(phydev, 0x1e, 0x418f);
  114. if (err < 0)
  115. return err;
  116. err = phy_write(phydev, 0x1d, 0x0016);
  117. if (err < 0)
  118. return err;
  119. err = phy_write(phydev, 0x1e, 0xa2da);
  120. if (err < 0)
  121. return err;
  122. if (phydev->interface == PHY_INTERFACE_MODE_RGMII) {
  123. int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
  124. if (temp < 0)
  125. return temp;
  126. temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
  127. err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
  128. if (err < 0)
  129. return err;
  130. if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) {
  131. err = phy_write(phydev, 0x1d, 0x0012);
  132. if (err < 0)
  133. return err;
  134. temp = phy_read(phydev, 0x1e);
  135. if (temp < 0)
  136. return temp;
  137. temp &= 0xf03f;
  138. temp |= 2 << 9; /* 36 ohm */
  139. temp |= 2 << 6; /* 39 ohm */
  140. err = phy_write(phydev, 0x1e, temp);
  141. if (err < 0)
  142. return err;
  143. err = phy_write(phydev, 0x1d, 0x3);
  144. if (err < 0)
  145. return err;
  146. err = phy_write(phydev, 0x1e, 0x8000);
  147. if (err < 0)
  148. return err;
  149. }
  150. }
  151. return 0;
  152. }
  153. static struct phy_driver m88e1101_driver = {
  154. .phy_id = 0x01410c60,
  155. .phy_id_mask = 0xfffffff0,
  156. .name = "Marvell 88E1101",
  157. .features = PHY_GBIT_FEATURES,
  158. .flags = PHY_HAS_INTERRUPT,
  159. .config_aneg = &marvell_config_aneg,
  160. .read_status = &genphy_read_status,
  161. .ack_interrupt = &marvell_ack_interrupt,
  162. .config_intr = &marvell_config_intr,
  163. .driver = {.owner = THIS_MODULE,},
  164. };
  165. static struct phy_driver m88e1111s_driver = {
  166. .phy_id = 0x01410cc0,
  167. .phy_id_mask = 0xfffffff0,
  168. .name = "Marvell 88E1111",
  169. .features = PHY_GBIT_FEATURES,
  170. .flags = PHY_HAS_INTERRUPT,
  171. .config_aneg = &marvell_config_aneg,
  172. .read_status = &genphy_read_status,
  173. .ack_interrupt = &marvell_ack_interrupt,
  174. .config_intr = &marvell_config_intr,
  175. .driver = {.owner = THIS_MODULE,},
  176. };
  177. static struct phy_driver m88e1145_driver = {
  178. .phy_id = 0x01410cd0,
  179. .phy_id_mask = 0xfffffff0,
  180. .name = "Marvell 88E1145",
  181. .features = PHY_GBIT_FEATURES,
  182. .flags = PHY_HAS_INTERRUPT,
  183. .config_init = &m88e1145_config_init,
  184. .config_aneg = &marvell_config_aneg,
  185. .read_status = &genphy_read_status,
  186. .ack_interrupt = &marvell_ack_interrupt,
  187. .config_intr = &marvell_config_intr,
  188. .driver = {.owner = THIS_MODULE,},
  189. };
  190. static int __init marvell_init(void)
  191. {
  192. int ret;
  193. ret = phy_driver_register(&m88e1101_driver);
  194. if (ret)
  195. return ret;
  196. ret = phy_driver_register(&m88e1111s_driver);
  197. if (ret)
  198. goto err1111s;
  199. ret = phy_driver_register(&m88e1145_driver);
  200. if (ret)
  201. goto err1145;
  202. return 0;
  203. err1145:
  204. phy_driver_unregister(&m88e1111s_driver);
  205. err1111s:
  206. phy_driver_unregister(&m88e1101_driver);
  207. return ret;
  208. }
  209. static void __exit marvell_exit(void)
  210. {
  211. phy_driver_unregister(&m88e1101_driver);
  212. phy_driver_unregister(&m88e1111s_driver);
  213. phy_driver_unregister(&m88e1145_driver);
  214. }
  215. module_init(marvell_init);
  216. module_exit(marvell_exit);