qp.c 8.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280
  1. /*
  2. * Copyright (c) 2004 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  5. * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
  6. *
  7. * This software is available to you under a choice of one of two
  8. * licenses. You may choose to be licensed under the terms of the GNU
  9. * General Public License (GPL) Version 2, available from the file
  10. * COPYING in the main directory of this source tree, or the
  11. * OpenIB.org BSD license below:
  12. *
  13. * Redistribution and use in source and binary forms, with or
  14. * without modification, are permitted provided that the following
  15. * conditions are met:
  16. *
  17. * - Redistributions of source code must retain the above
  18. * copyright notice, this list of conditions and the following
  19. * disclaimer.
  20. *
  21. * - Redistributions in binary form must reproduce the above
  22. * copyright notice, this list of conditions and the following
  23. * disclaimer in the documentation and/or other materials
  24. * provided with the distribution.
  25. *
  26. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33. * SOFTWARE.
  34. */
  35. #include <linux/init.h>
  36. #include <linux/mlx4/cmd.h>
  37. #include <linux/mlx4/qp.h>
  38. #include "mlx4.h"
  39. #include "icm.h"
  40. void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type)
  41. {
  42. struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table;
  43. struct mlx4_qp *qp;
  44. spin_lock(&qp_table->lock);
  45. qp = __mlx4_qp_lookup(dev, qpn);
  46. if (qp)
  47. atomic_inc(&qp->refcount);
  48. spin_unlock(&qp_table->lock);
  49. if (!qp) {
  50. mlx4_warn(dev, "Async event for bogus QP %08x\n", qpn);
  51. return;
  52. }
  53. qp->event(qp, event_type);
  54. if (atomic_dec_and_test(&qp->refcount))
  55. complete(&qp->free);
  56. }
  57. int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
  58. enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state,
  59. struct mlx4_qp_context *context, enum mlx4_qp_optpar optpar,
  60. int sqd_event, struct mlx4_qp *qp)
  61. {
  62. static const u16 op[MLX4_QP_NUM_STATE][MLX4_QP_NUM_STATE] = {
  63. [MLX4_QP_STATE_RST] = {
  64. [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP,
  65. [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP,
  66. [MLX4_QP_STATE_INIT] = MLX4_CMD_RST2INIT_QP,
  67. },
  68. [MLX4_QP_STATE_INIT] = {
  69. [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP,
  70. [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP,
  71. [MLX4_QP_STATE_INIT] = MLX4_CMD_INIT2INIT_QP,
  72. [MLX4_QP_STATE_RTR] = MLX4_CMD_INIT2RTR_QP,
  73. },
  74. [MLX4_QP_STATE_RTR] = {
  75. [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP,
  76. [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP,
  77. [MLX4_QP_STATE_RTS] = MLX4_CMD_RTR2RTS_QP,
  78. },
  79. [MLX4_QP_STATE_RTS] = {
  80. [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP,
  81. [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP,
  82. [MLX4_QP_STATE_RTS] = MLX4_CMD_RTS2RTS_QP,
  83. [MLX4_QP_STATE_SQD] = MLX4_CMD_RTS2SQD_QP,
  84. },
  85. [MLX4_QP_STATE_SQD] = {
  86. [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP,
  87. [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP,
  88. [MLX4_QP_STATE_RTS] = MLX4_CMD_SQD2RTS_QP,
  89. [MLX4_QP_STATE_SQD] = MLX4_CMD_SQD2SQD_QP,
  90. },
  91. [MLX4_QP_STATE_SQER] = {
  92. [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP,
  93. [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP,
  94. [MLX4_QP_STATE_RTS] = MLX4_CMD_SQERR2RTS_QP,
  95. },
  96. [MLX4_QP_STATE_ERR] = {
  97. [MLX4_QP_STATE_RST] = MLX4_CMD_2RST_QP,
  98. [MLX4_QP_STATE_ERR] = MLX4_CMD_2ERR_QP,
  99. }
  100. };
  101. struct mlx4_cmd_mailbox *mailbox;
  102. int ret = 0;
  103. if (cur_state < 0 || cur_state >= MLX4_QP_NUM_STATE ||
  104. new_state < 0 || cur_state >= MLX4_QP_NUM_STATE ||
  105. !op[cur_state][new_state])
  106. return -EINVAL;
  107. if (op[cur_state][new_state] == MLX4_CMD_2RST_QP)
  108. return mlx4_cmd(dev, 0, qp->qpn, 2,
  109. MLX4_CMD_2RST_QP, MLX4_CMD_TIME_CLASS_A);
  110. mailbox = mlx4_alloc_cmd_mailbox(dev);
  111. if (IS_ERR(mailbox))
  112. return PTR_ERR(mailbox);
  113. if (cur_state == MLX4_QP_STATE_RST && new_state == MLX4_QP_STATE_INIT) {
  114. u64 mtt_addr = mlx4_mtt_addr(dev, mtt);
  115. context->mtt_base_addr_h = mtt_addr >> 32;
  116. context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff);
  117. context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT;
  118. }
  119. *(__be32 *) mailbox->buf = cpu_to_be32(optpar);
  120. memcpy(mailbox->buf + 8, context, sizeof *context);
  121. ((struct mlx4_qp_context *) (mailbox->buf + 8))->local_qpn =
  122. cpu_to_be32(qp->qpn);
  123. ret = mlx4_cmd(dev, mailbox->dma, qp->qpn | (!!sqd_event << 31),
  124. new_state == MLX4_QP_STATE_RST ? 2 : 0,
  125. op[cur_state][new_state], MLX4_CMD_TIME_CLASS_C);
  126. mlx4_free_cmd_mailbox(dev, mailbox);
  127. return ret;
  128. }
  129. EXPORT_SYMBOL_GPL(mlx4_qp_modify);
  130. int mlx4_qp_alloc(struct mlx4_dev *dev, int sqpn, struct mlx4_qp *qp)
  131. {
  132. struct mlx4_priv *priv = mlx4_priv(dev);
  133. struct mlx4_qp_table *qp_table = &priv->qp_table;
  134. int err;
  135. if (sqpn)
  136. qp->qpn = sqpn;
  137. else {
  138. qp->qpn = mlx4_bitmap_alloc(&qp_table->bitmap);
  139. if (qp->qpn == -1)
  140. return -ENOMEM;
  141. }
  142. err = mlx4_table_get(dev, &qp_table->qp_table, qp->qpn);
  143. if (err)
  144. goto err_out;
  145. err = mlx4_table_get(dev, &qp_table->auxc_table, qp->qpn);
  146. if (err)
  147. goto err_put_qp;
  148. err = mlx4_table_get(dev, &qp_table->altc_table, qp->qpn);
  149. if (err)
  150. goto err_put_auxc;
  151. err = mlx4_table_get(dev, &qp_table->rdmarc_table, qp->qpn);
  152. if (err)
  153. goto err_put_altc;
  154. err = mlx4_table_get(dev, &qp_table->cmpt_table, qp->qpn);
  155. if (err)
  156. goto err_put_rdmarc;
  157. spin_lock_irq(&qp_table->lock);
  158. err = radix_tree_insert(&dev->qp_table_tree, qp->qpn & (dev->caps.num_qps - 1), qp);
  159. spin_unlock_irq(&qp_table->lock);
  160. if (err)
  161. goto err_put_cmpt;
  162. atomic_set(&qp->refcount, 1);
  163. init_completion(&qp->free);
  164. return 0;
  165. err_put_cmpt:
  166. mlx4_table_put(dev, &qp_table->cmpt_table, qp->qpn);
  167. err_put_rdmarc:
  168. mlx4_table_put(dev, &qp_table->rdmarc_table, qp->qpn);
  169. err_put_altc:
  170. mlx4_table_put(dev, &qp_table->altc_table, qp->qpn);
  171. err_put_auxc:
  172. mlx4_table_put(dev, &qp_table->auxc_table, qp->qpn);
  173. err_put_qp:
  174. mlx4_table_put(dev, &qp_table->qp_table, qp->qpn);
  175. err_out:
  176. if (!sqpn)
  177. mlx4_bitmap_free(&qp_table->bitmap, qp->qpn);
  178. return err;
  179. }
  180. EXPORT_SYMBOL_GPL(mlx4_qp_alloc);
  181. void mlx4_qp_remove(struct mlx4_dev *dev, struct mlx4_qp *qp)
  182. {
  183. struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table;
  184. unsigned long flags;
  185. spin_lock_irqsave(&qp_table->lock, flags);
  186. radix_tree_delete(&dev->qp_table_tree, qp->qpn & (dev->caps.num_qps - 1));
  187. spin_unlock_irqrestore(&qp_table->lock, flags);
  188. }
  189. EXPORT_SYMBOL_GPL(mlx4_qp_remove);
  190. void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp)
  191. {
  192. struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table;
  193. if (atomic_dec_and_test(&qp->refcount))
  194. complete(&qp->free);
  195. wait_for_completion(&qp->free);
  196. mlx4_table_put(dev, &qp_table->cmpt_table, qp->qpn);
  197. mlx4_table_put(dev, &qp_table->rdmarc_table, qp->qpn);
  198. mlx4_table_put(dev, &qp_table->altc_table, qp->qpn);
  199. mlx4_table_put(dev, &qp_table->auxc_table, qp->qpn);
  200. mlx4_table_put(dev, &qp_table->qp_table, qp->qpn);
  201. mlx4_bitmap_free(&qp_table->bitmap, qp->qpn);
  202. }
  203. EXPORT_SYMBOL_GPL(mlx4_qp_free);
  204. static int mlx4_CONF_SPECIAL_QP(struct mlx4_dev *dev, u32 base_qpn)
  205. {
  206. return mlx4_cmd(dev, 0, base_qpn, 0, MLX4_CMD_CONF_SPECIAL_QP,
  207. MLX4_CMD_TIME_CLASS_B);
  208. }
  209. int __devinit mlx4_init_qp_table(struct mlx4_dev *dev)
  210. {
  211. struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table;
  212. int err;
  213. spin_lock_init(&qp_table->lock);
  214. INIT_RADIX_TREE(&dev->qp_table_tree, GFP_ATOMIC);
  215. /*
  216. * We reserve 2 extra QPs per port for the special QPs. The
  217. * block of special QPs must be aligned to a multiple of 8, so
  218. * round up.
  219. */
  220. dev->caps.sqp_start = ALIGN(dev->caps.reserved_qps, 8);
  221. err = mlx4_bitmap_init(&qp_table->bitmap, dev->caps.num_qps,
  222. (1 << 24) - 1, dev->caps.sqp_start + 8);
  223. if (err)
  224. return err;
  225. return mlx4_CONF_SPECIAL_QP(dev, dev->caps.sqp_start);
  226. }
  227. void mlx4_cleanup_qp_table(struct mlx4_dev *dev)
  228. {
  229. mlx4_CONF_SPECIAL_QP(dev, 0);
  230. mlx4_bitmap_cleanup(&mlx4_priv(dev)->qp_table.bitmap);
  231. }