fw.h 4.2 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  4. * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #ifndef MLX4_FW_H
  35. #define MLX4_FW_H
  36. #include "mlx4.h"
  37. #include "icm.h"
  38. struct mlx4_dev_cap {
  39. int max_srq_sz;
  40. int max_qp_sz;
  41. int reserved_qps;
  42. int max_qps;
  43. int reserved_srqs;
  44. int max_srqs;
  45. int max_cq_sz;
  46. int reserved_cqs;
  47. int max_cqs;
  48. int max_mpts;
  49. int reserved_eqs;
  50. int max_eqs;
  51. int reserved_mtts;
  52. int max_mrw_sz;
  53. int reserved_mrws;
  54. int max_mtt_seg;
  55. int max_requester_per_qp;
  56. int max_responder_per_qp;
  57. int max_rdma_global;
  58. int local_ca_ack_delay;
  59. int max_mtu;
  60. int max_port_width;
  61. int max_vl;
  62. int num_ports;
  63. int max_gids;
  64. u16 stat_rate_support;
  65. int max_pkeys;
  66. u32 flags;
  67. int reserved_uars;
  68. int uar_size;
  69. int min_page_sz;
  70. int bf_reg_size;
  71. int bf_regs_per_page;
  72. int max_sq_sg;
  73. int max_sq_desc_sz;
  74. int max_rq_sg;
  75. int max_rq_desc_sz;
  76. int max_qp_per_mcg;
  77. int reserved_mgms;
  78. int max_mcgs;
  79. int reserved_pds;
  80. int max_pds;
  81. int qpc_entry_sz;
  82. int rdmarc_entry_sz;
  83. int altc_entry_sz;
  84. int aux_entry_sz;
  85. int srq_entry_sz;
  86. int cqc_entry_sz;
  87. int eqc_entry_sz;
  88. int dmpt_entry_sz;
  89. int cmpt_entry_sz;
  90. int mtt_entry_sz;
  91. int resize_srq;
  92. u8 bmme_flags;
  93. u32 reserved_lkey;
  94. u64 max_icm_sz;
  95. };
  96. struct mlx4_adapter {
  97. u32 vendor_id;
  98. u32 device_id;
  99. u32 revision_id;
  100. char board_id[MLX4_BOARD_ID_LEN];
  101. u8 inta_pin;
  102. };
  103. struct mlx4_init_hca_param {
  104. u64 qpc_base;
  105. u64 rdmarc_base;
  106. u64 auxc_base;
  107. u64 altc_base;
  108. u64 srqc_base;
  109. u64 cqc_base;
  110. u64 eqc_base;
  111. u64 mc_base;
  112. u64 dmpt_base;
  113. u64 cmpt_base;
  114. u64 mtt_base;
  115. u16 log_mc_entry_sz;
  116. u16 log_mc_hash_sz;
  117. u8 log_num_qps;
  118. u8 log_num_srqs;
  119. u8 log_num_cqs;
  120. u8 log_num_eqs;
  121. u8 log_rd_per_qp;
  122. u8 log_mc_table_sz;
  123. u8 log_mpt_sz;
  124. u8 log_uar_sz;
  125. };
  126. struct mlx4_init_ib_param {
  127. int port_width;
  128. int vl_cap;
  129. int mtu_cap;
  130. u16 gid_cap;
  131. u16 pkey_cap;
  132. int set_guid0;
  133. u64 guid0;
  134. int set_node_guid;
  135. u64 node_guid;
  136. int set_si_guid;
  137. u64 si_guid;
  138. };
  139. struct mlx4_set_ib_param {
  140. int set_si_guid;
  141. int reset_qkey_viol;
  142. u64 si_guid;
  143. u32 cap_mask;
  144. };
  145. int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap);
  146. int mlx4_MAP_FA(struct mlx4_dev *dev, struct mlx4_icm *icm);
  147. int mlx4_UNMAP_FA(struct mlx4_dev *dev);
  148. int mlx4_RUN_FW(struct mlx4_dev *dev);
  149. int mlx4_QUERY_FW(struct mlx4_dev *dev);
  150. int mlx4_QUERY_ADAPTER(struct mlx4_dev *dev, struct mlx4_adapter *adapter);
  151. int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param);
  152. int mlx4_CLOSE_HCA(struct mlx4_dev *dev, int panic);
  153. int mlx4_map_cmd(struct mlx4_dev *dev, u16 op, struct mlx4_icm *icm, u64 virt);
  154. int mlx4_SET_ICM_SIZE(struct mlx4_dev *dev, u64 icm_size, u64 *aux_pages);
  155. int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm);
  156. int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev);
  157. int mlx4_NOP(struct mlx4_dev *dev);
  158. #endif /* MLX4_FW_H */