ixgb_main.c 63 KB

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  1. /*******************************************************************************
  2. Intel PRO/10GbE Linux driver
  3. Copyright(c) 1999 - 2006 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "ixgb.h"
  22. char ixgb_driver_name[] = "ixgb";
  23. static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
  24. #ifndef CONFIG_IXGB_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "1.0.126-k2"DRIVERNAPI
  30. char ixgb_driver_version[] = DRV_VERSION;
  31. static char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* ixgb_pci_tbl - PCI Device ID Table
  33. *
  34. * Wildcard entries (PCI_ANY_ID) should come last
  35. * Last entry must be all 0s
  36. *
  37. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  38. * Class, Class Mask, private data (not used) }
  39. */
  40. static struct pci_device_id ixgb_pci_tbl[] = {
  41. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
  42. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  43. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
  44. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  45. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
  46. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  47. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
  48. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  49. /* required last entry */
  50. {0,}
  51. };
  52. MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
  53. /* Local Function Prototypes */
  54. int ixgb_up(struct ixgb_adapter *adapter);
  55. void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
  56. void ixgb_reset(struct ixgb_adapter *adapter);
  57. int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
  58. int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
  59. void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
  60. void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
  61. void ixgb_update_stats(struct ixgb_adapter *adapter);
  62. static int ixgb_init_module(void);
  63. static void ixgb_exit_module(void);
  64. static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  65. static void __devexit ixgb_remove(struct pci_dev *pdev);
  66. static int ixgb_sw_init(struct ixgb_adapter *adapter);
  67. static int ixgb_open(struct net_device *netdev);
  68. static int ixgb_close(struct net_device *netdev);
  69. static void ixgb_configure_tx(struct ixgb_adapter *adapter);
  70. static void ixgb_configure_rx(struct ixgb_adapter *adapter);
  71. static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
  72. static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
  73. static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
  74. static void ixgb_set_multi(struct net_device *netdev);
  75. static void ixgb_watchdog(unsigned long data);
  76. static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  77. static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
  78. static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
  79. static int ixgb_set_mac(struct net_device *netdev, void *p);
  80. static irqreturn_t ixgb_intr(int irq, void *data);
  81. static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
  82. #ifdef CONFIG_IXGB_NAPI
  83. static int ixgb_clean(struct net_device *netdev, int *budget);
  84. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
  85. int *work_done, int work_to_do);
  86. #else
  87. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
  88. #endif
  89. static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
  90. void ixgb_set_ethtool_ops(struct net_device *netdev);
  91. static void ixgb_tx_timeout(struct net_device *dev);
  92. static void ixgb_tx_timeout_task(struct work_struct *work);
  93. static void ixgb_vlan_rx_register(struct net_device *netdev,
  94. struct vlan_group *grp);
  95. static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  96. static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  97. static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
  98. #ifdef CONFIG_NET_POLL_CONTROLLER
  99. /* for netdump / net console */
  100. static void ixgb_netpoll(struct net_device *dev);
  101. #endif
  102. static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
  103. enum pci_channel_state state);
  104. static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
  105. static void ixgb_io_resume (struct pci_dev *pdev);
  106. /* Exported from other modules */
  107. extern void ixgb_check_options(struct ixgb_adapter *adapter);
  108. static struct pci_error_handlers ixgb_err_handler = {
  109. .error_detected = ixgb_io_error_detected,
  110. .slot_reset = ixgb_io_slot_reset,
  111. .resume = ixgb_io_resume,
  112. };
  113. static struct pci_driver ixgb_driver = {
  114. .name = ixgb_driver_name,
  115. .id_table = ixgb_pci_tbl,
  116. .probe = ixgb_probe,
  117. .remove = __devexit_p(ixgb_remove),
  118. .err_handler = &ixgb_err_handler
  119. };
  120. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  121. MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
  122. MODULE_LICENSE("GPL");
  123. MODULE_VERSION(DRV_VERSION);
  124. #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  125. static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
  126. module_param(debug, int, 0);
  127. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  128. /* some defines for controlling descriptor fetches in h/w */
  129. #define RXDCTL_WTHRESH_DEFAULT 15 /* chip writes back at this many or RXT0 */
  130. #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
  131. * this */
  132. #define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
  133. * is pushed this many descriptors
  134. * from head */
  135. /**
  136. * ixgb_init_module - Driver Registration Routine
  137. *
  138. * ixgb_init_module is the first routine called when the driver is
  139. * loaded. All it does is register with the PCI subsystem.
  140. **/
  141. static int __init
  142. ixgb_init_module(void)
  143. {
  144. printk(KERN_INFO "%s - version %s\n",
  145. ixgb_driver_string, ixgb_driver_version);
  146. printk(KERN_INFO "%s\n", ixgb_copyright);
  147. return pci_register_driver(&ixgb_driver);
  148. }
  149. module_init(ixgb_init_module);
  150. /**
  151. * ixgb_exit_module - Driver Exit Cleanup Routine
  152. *
  153. * ixgb_exit_module is called just before the driver is removed
  154. * from memory.
  155. **/
  156. static void __exit
  157. ixgb_exit_module(void)
  158. {
  159. pci_unregister_driver(&ixgb_driver);
  160. }
  161. module_exit(ixgb_exit_module);
  162. /**
  163. * ixgb_irq_disable - Mask off interrupt generation on the NIC
  164. * @adapter: board private structure
  165. **/
  166. static void
  167. ixgb_irq_disable(struct ixgb_adapter *adapter)
  168. {
  169. atomic_inc(&adapter->irq_sem);
  170. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  171. IXGB_WRITE_FLUSH(&adapter->hw);
  172. synchronize_irq(adapter->pdev->irq);
  173. }
  174. /**
  175. * ixgb_irq_enable - Enable default interrupt generation settings
  176. * @adapter: board private structure
  177. **/
  178. static void
  179. ixgb_irq_enable(struct ixgb_adapter *adapter)
  180. {
  181. if(atomic_dec_and_test(&adapter->irq_sem)) {
  182. IXGB_WRITE_REG(&adapter->hw, IMS,
  183. IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
  184. IXGB_INT_LSC);
  185. IXGB_WRITE_FLUSH(&adapter->hw);
  186. }
  187. }
  188. int
  189. ixgb_up(struct ixgb_adapter *adapter)
  190. {
  191. struct net_device *netdev = adapter->netdev;
  192. int err;
  193. int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  194. struct ixgb_hw *hw = &adapter->hw;
  195. /* hardware has been reset, we need to reload some things */
  196. ixgb_rar_set(hw, netdev->dev_addr, 0);
  197. ixgb_set_multi(netdev);
  198. ixgb_restore_vlan(adapter);
  199. ixgb_configure_tx(adapter);
  200. ixgb_setup_rctl(adapter);
  201. ixgb_configure_rx(adapter);
  202. ixgb_alloc_rx_buffers(adapter);
  203. /* disable interrupts and get the hardware into a known state */
  204. IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
  205. #ifdef CONFIG_PCI_MSI
  206. {
  207. boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
  208. IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
  209. adapter->have_msi = TRUE;
  210. if (!pcix)
  211. adapter->have_msi = FALSE;
  212. else if((err = pci_enable_msi(adapter->pdev))) {
  213. DPRINTK(PROBE, ERR,
  214. "Unable to allocate MSI interrupt Error: %d\n", err);
  215. adapter->have_msi = FALSE;
  216. /* proceed to try to request regular interrupt */
  217. }
  218. }
  219. #endif
  220. if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
  221. IRQF_SHARED | IRQF_SAMPLE_RANDOM,
  222. netdev->name, netdev))) {
  223. DPRINTK(PROBE, ERR,
  224. "Unable to allocate interrupt Error: %d\n", err);
  225. return err;
  226. }
  227. if((hw->max_frame_size != max_frame) ||
  228. (hw->max_frame_size !=
  229. (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
  230. hw->max_frame_size = max_frame;
  231. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  232. if(hw->max_frame_size >
  233. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  234. uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
  235. if(!(ctrl0 & IXGB_CTRL0_JFE)) {
  236. ctrl0 |= IXGB_CTRL0_JFE;
  237. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  238. }
  239. }
  240. }
  241. mod_timer(&adapter->watchdog_timer, jiffies);
  242. #ifdef CONFIG_IXGB_NAPI
  243. netif_poll_enable(netdev);
  244. #endif
  245. ixgb_irq_enable(adapter);
  246. return 0;
  247. }
  248. void
  249. ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
  250. {
  251. struct net_device *netdev = adapter->netdev;
  252. ixgb_irq_disable(adapter);
  253. free_irq(adapter->pdev->irq, netdev);
  254. #ifdef CONFIG_PCI_MSI
  255. if(adapter->have_msi == TRUE)
  256. pci_disable_msi(adapter->pdev);
  257. #endif
  258. if(kill_watchdog)
  259. del_timer_sync(&adapter->watchdog_timer);
  260. #ifdef CONFIG_IXGB_NAPI
  261. netif_poll_disable(netdev);
  262. #endif
  263. adapter->link_speed = 0;
  264. adapter->link_duplex = 0;
  265. netif_carrier_off(netdev);
  266. netif_stop_queue(netdev);
  267. ixgb_reset(adapter);
  268. ixgb_clean_tx_ring(adapter);
  269. ixgb_clean_rx_ring(adapter);
  270. }
  271. void
  272. ixgb_reset(struct ixgb_adapter *adapter)
  273. {
  274. ixgb_adapter_stop(&adapter->hw);
  275. if(!ixgb_init_hw(&adapter->hw))
  276. DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
  277. }
  278. /**
  279. * ixgb_probe - Device Initialization Routine
  280. * @pdev: PCI device information struct
  281. * @ent: entry in ixgb_pci_tbl
  282. *
  283. * Returns 0 on success, negative on failure
  284. *
  285. * ixgb_probe initializes an adapter identified by a pci_dev structure.
  286. * The OS initialization, configuring of the adapter private structure,
  287. * and a hardware reset occur.
  288. **/
  289. static int __devinit
  290. ixgb_probe(struct pci_dev *pdev,
  291. const struct pci_device_id *ent)
  292. {
  293. struct net_device *netdev = NULL;
  294. struct ixgb_adapter *adapter;
  295. static int cards_found = 0;
  296. unsigned long mmio_start;
  297. int mmio_len;
  298. int pci_using_dac;
  299. int i;
  300. int err;
  301. if((err = pci_enable_device(pdev)))
  302. return err;
  303. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  304. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  305. pci_using_dac = 1;
  306. } else {
  307. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
  308. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  309. printk(KERN_ERR
  310. "ixgb: No usable DMA configuration, aborting\n");
  311. goto err_dma_mask;
  312. }
  313. pci_using_dac = 0;
  314. }
  315. if((err = pci_request_regions(pdev, ixgb_driver_name)))
  316. goto err_request_regions;
  317. pci_set_master(pdev);
  318. netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
  319. if(!netdev) {
  320. err = -ENOMEM;
  321. goto err_alloc_etherdev;
  322. }
  323. SET_MODULE_OWNER(netdev);
  324. SET_NETDEV_DEV(netdev, &pdev->dev);
  325. pci_set_drvdata(pdev, netdev);
  326. adapter = netdev_priv(netdev);
  327. adapter->netdev = netdev;
  328. adapter->pdev = pdev;
  329. adapter->hw.back = adapter;
  330. adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
  331. mmio_start = pci_resource_start(pdev, BAR_0);
  332. mmio_len = pci_resource_len(pdev, BAR_0);
  333. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  334. if(!adapter->hw.hw_addr) {
  335. err = -EIO;
  336. goto err_ioremap;
  337. }
  338. for(i = BAR_1; i <= BAR_5; i++) {
  339. if(pci_resource_len(pdev, i) == 0)
  340. continue;
  341. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  342. adapter->hw.io_base = pci_resource_start(pdev, i);
  343. break;
  344. }
  345. }
  346. netdev->open = &ixgb_open;
  347. netdev->stop = &ixgb_close;
  348. netdev->hard_start_xmit = &ixgb_xmit_frame;
  349. netdev->get_stats = &ixgb_get_stats;
  350. netdev->set_multicast_list = &ixgb_set_multi;
  351. netdev->set_mac_address = &ixgb_set_mac;
  352. netdev->change_mtu = &ixgb_change_mtu;
  353. ixgb_set_ethtool_ops(netdev);
  354. netdev->tx_timeout = &ixgb_tx_timeout;
  355. netdev->watchdog_timeo = 5 * HZ;
  356. #ifdef CONFIG_IXGB_NAPI
  357. netdev->poll = &ixgb_clean;
  358. netdev->weight = 64;
  359. #endif
  360. netdev->vlan_rx_register = ixgb_vlan_rx_register;
  361. netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
  362. netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
  363. #ifdef CONFIG_NET_POLL_CONTROLLER
  364. netdev->poll_controller = ixgb_netpoll;
  365. #endif
  366. strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
  367. netdev->mem_start = mmio_start;
  368. netdev->mem_end = mmio_start + mmio_len;
  369. netdev->base_addr = adapter->hw.io_base;
  370. adapter->bd_number = cards_found;
  371. adapter->link_speed = 0;
  372. adapter->link_duplex = 0;
  373. /* setup the private structure */
  374. if((err = ixgb_sw_init(adapter)))
  375. goto err_sw_init;
  376. netdev->features = NETIF_F_SG |
  377. NETIF_F_HW_CSUM |
  378. NETIF_F_HW_VLAN_TX |
  379. NETIF_F_HW_VLAN_RX |
  380. NETIF_F_HW_VLAN_FILTER;
  381. netdev->features |= NETIF_F_TSO;
  382. #ifdef NETIF_F_LLTX
  383. netdev->features |= NETIF_F_LLTX;
  384. #endif
  385. if(pci_using_dac)
  386. netdev->features |= NETIF_F_HIGHDMA;
  387. /* make sure the EEPROM is good */
  388. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  389. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  390. err = -EIO;
  391. goto err_eeprom;
  392. }
  393. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  394. memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
  395. if(!is_valid_ether_addr(netdev->perm_addr)) {
  396. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  397. err = -EIO;
  398. goto err_eeprom;
  399. }
  400. adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
  401. init_timer(&adapter->watchdog_timer);
  402. adapter->watchdog_timer.function = &ixgb_watchdog;
  403. adapter->watchdog_timer.data = (unsigned long)adapter;
  404. INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
  405. strcpy(netdev->name, "eth%d");
  406. if((err = register_netdev(netdev)))
  407. goto err_register;
  408. /* we're going to reset, so assume we have no link for now */
  409. netif_carrier_off(netdev);
  410. netif_stop_queue(netdev);
  411. DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
  412. ixgb_check_options(adapter);
  413. /* reset the hardware with the new settings */
  414. ixgb_reset(adapter);
  415. cards_found++;
  416. return 0;
  417. err_register:
  418. err_sw_init:
  419. err_eeprom:
  420. iounmap(adapter->hw.hw_addr);
  421. err_ioremap:
  422. free_netdev(netdev);
  423. err_alloc_etherdev:
  424. pci_release_regions(pdev);
  425. err_request_regions:
  426. err_dma_mask:
  427. pci_disable_device(pdev);
  428. return err;
  429. }
  430. /**
  431. * ixgb_remove - Device Removal Routine
  432. * @pdev: PCI device information struct
  433. *
  434. * ixgb_remove is called by the PCI subsystem to alert the driver
  435. * that it should release a PCI device. The could be caused by a
  436. * Hot-Plug event, or because the driver is going to be removed from
  437. * memory.
  438. **/
  439. static void __devexit
  440. ixgb_remove(struct pci_dev *pdev)
  441. {
  442. struct net_device *netdev = pci_get_drvdata(pdev);
  443. struct ixgb_adapter *adapter = netdev_priv(netdev);
  444. unregister_netdev(netdev);
  445. iounmap(adapter->hw.hw_addr);
  446. pci_release_regions(pdev);
  447. free_netdev(netdev);
  448. }
  449. /**
  450. * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
  451. * @adapter: board private structure to initialize
  452. *
  453. * ixgb_sw_init initializes the Adapter private data structure.
  454. * Fields are initialized based on PCI device information and
  455. * OS network device settings (MTU size).
  456. **/
  457. static int __devinit
  458. ixgb_sw_init(struct ixgb_adapter *adapter)
  459. {
  460. struct ixgb_hw *hw = &adapter->hw;
  461. struct net_device *netdev = adapter->netdev;
  462. struct pci_dev *pdev = adapter->pdev;
  463. /* PCI config space info */
  464. hw->vendor_id = pdev->vendor;
  465. hw->device_id = pdev->device;
  466. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  467. hw->subsystem_id = pdev->subsystem_device;
  468. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  469. adapter->rx_buffer_len = hw->max_frame_size;
  470. if((hw->device_id == IXGB_DEVICE_ID_82597EX)
  471. || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
  472. || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
  473. || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
  474. hw->mac_type = ixgb_82597;
  475. else {
  476. /* should never have loaded on this device */
  477. DPRINTK(PROBE, ERR, "unsupported device id\n");
  478. }
  479. /* enable flow control to be programmed */
  480. hw->fc.send_xon = 1;
  481. atomic_set(&adapter->irq_sem, 1);
  482. spin_lock_init(&adapter->tx_lock);
  483. return 0;
  484. }
  485. /**
  486. * ixgb_open - Called when a network interface is made active
  487. * @netdev: network interface device structure
  488. *
  489. * Returns 0 on success, negative value on failure
  490. *
  491. * The open entry point is called when a network interface is made
  492. * active by the system (IFF_UP). At this point all resources needed
  493. * for transmit and receive operations are allocated, the interrupt
  494. * handler is registered with the OS, the watchdog timer is started,
  495. * and the stack is notified that the interface is ready.
  496. **/
  497. static int
  498. ixgb_open(struct net_device *netdev)
  499. {
  500. struct ixgb_adapter *adapter = netdev_priv(netdev);
  501. int err;
  502. /* allocate transmit descriptors */
  503. if((err = ixgb_setup_tx_resources(adapter)))
  504. goto err_setup_tx;
  505. /* allocate receive descriptors */
  506. if((err = ixgb_setup_rx_resources(adapter)))
  507. goto err_setup_rx;
  508. if((err = ixgb_up(adapter)))
  509. goto err_up;
  510. return 0;
  511. err_up:
  512. ixgb_free_rx_resources(adapter);
  513. err_setup_rx:
  514. ixgb_free_tx_resources(adapter);
  515. err_setup_tx:
  516. ixgb_reset(adapter);
  517. return err;
  518. }
  519. /**
  520. * ixgb_close - Disables a network interface
  521. * @netdev: network interface device structure
  522. *
  523. * Returns 0, this is not allowed to fail
  524. *
  525. * The close entry point is called when an interface is de-activated
  526. * by the OS. The hardware is still under the drivers control, but
  527. * needs to be disabled. A global MAC reset is issued to stop the
  528. * hardware, and all transmit and receive resources are freed.
  529. **/
  530. static int
  531. ixgb_close(struct net_device *netdev)
  532. {
  533. struct ixgb_adapter *adapter = netdev_priv(netdev);
  534. ixgb_down(adapter, TRUE);
  535. ixgb_free_tx_resources(adapter);
  536. ixgb_free_rx_resources(adapter);
  537. return 0;
  538. }
  539. /**
  540. * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
  541. * @adapter: board private structure
  542. *
  543. * Return 0 on success, negative on failure
  544. **/
  545. int
  546. ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
  547. {
  548. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  549. struct pci_dev *pdev = adapter->pdev;
  550. int size;
  551. size = sizeof(struct ixgb_buffer) * txdr->count;
  552. txdr->buffer_info = vmalloc(size);
  553. if(!txdr->buffer_info) {
  554. DPRINTK(PROBE, ERR,
  555. "Unable to allocate transmit descriptor ring memory\n");
  556. return -ENOMEM;
  557. }
  558. memset(txdr->buffer_info, 0, size);
  559. /* round up to nearest 4K */
  560. txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
  561. txdr->size = ALIGN(txdr->size, 4096);
  562. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  563. if(!txdr->desc) {
  564. vfree(txdr->buffer_info);
  565. DPRINTK(PROBE, ERR,
  566. "Unable to allocate transmit descriptor memory\n");
  567. return -ENOMEM;
  568. }
  569. memset(txdr->desc, 0, txdr->size);
  570. txdr->next_to_use = 0;
  571. txdr->next_to_clean = 0;
  572. return 0;
  573. }
  574. /**
  575. * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
  576. * @adapter: board private structure
  577. *
  578. * Configure the Tx unit of the MAC after a reset.
  579. **/
  580. static void
  581. ixgb_configure_tx(struct ixgb_adapter *adapter)
  582. {
  583. uint64_t tdba = adapter->tx_ring.dma;
  584. uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
  585. uint32_t tctl;
  586. struct ixgb_hw *hw = &adapter->hw;
  587. /* Setup the Base and Length of the Tx Descriptor Ring
  588. * tx_ring.dma can be either a 32 or 64 bit value
  589. */
  590. IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  591. IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
  592. IXGB_WRITE_REG(hw, TDLEN, tdlen);
  593. /* Setup the HW Tx Head and Tail descriptor pointers */
  594. IXGB_WRITE_REG(hw, TDH, 0);
  595. IXGB_WRITE_REG(hw, TDT, 0);
  596. /* don't set up txdctl, it induces performance problems if configured
  597. * incorrectly */
  598. /* Set the Tx Interrupt Delay register */
  599. IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  600. /* Program the Transmit Control Register */
  601. tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
  602. IXGB_WRITE_REG(hw, TCTL, tctl);
  603. /* Setup Transmit Descriptor Settings for this adapter */
  604. adapter->tx_cmd_type =
  605. IXGB_TX_DESC_TYPE
  606. | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
  607. }
  608. /**
  609. * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
  610. * @adapter: board private structure
  611. *
  612. * Returns 0 on success, negative on failure
  613. **/
  614. int
  615. ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
  616. {
  617. struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
  618. struct pci_dev *pdev = adapter->pdev;
  619. int size;
  620. size = sizeof(struct ixgb_buffer) * rxdr->count;
  621. rxdr->buffer_info = vmalloc(size);
  622. if(!rxdr->buffer_info) {
  623. DPRINTK(PROBE, ERR,
  624. "Unable to allocate receive descriptor ring\n");
  625. return -ENOMEM;
  626. }
  627. memset(rxdr->buffer_info, 0, size);
  628. /* Round up to nearest 4K */
  629. rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
  630. rxdr->size = ALIGN(rxdr->size, 4096);
  631. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  632. if(!rxdr->desc) {
  633. vfree(rxdr->buffer_info);
  634. DPRINTK(PROBE, ERR,
  635. "Unable to allocate receive descriptors\n");
  636. return -ENOMEM;
  637. }
  638. memset(rxdr->desc, 0, rxdr->size);
  639. rxdr->next_to_clean = 0;
  640. rxdr->next_to_use = 0;
  641. return 0;
  642. }
  643. /**
  644. * ixgb_setup_rctl - configure the receive control register
  645. * @adapter: Board private structure
  646. **/
  647. static void
  648. ixgb_setup_rctl(struct ixgb_adapter *adapter)
  649. {
  650. uint32_t rctl;
  651. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  652. rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
  653. rctl |=
  654. IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
  655. IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
  656. (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
  657. rctl |= IXGB_RCTL_SECRC;
  658. if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
  659. rctl |= IXGB_RCTL_BSIZE_2048;
  660. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
  661. rctl |= IXGB_RCTL_BSIZE_4096;
  662. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
  663. rctl |= IXGB_RCTL_BSIZE_8192;
  664. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
  665. rctl |= IXGB_RCTL_BSIZE_16384;
  666. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  667. }
  668. /**
  669. * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
  670. * @adapter: board private structure
  671. *
  672. * Configure the Rx unit of the MAC after a reset.
  673. **/
  674. static void
  675. ixgb_configure_rx(struct ixgb_adapter *adapter)
  676. {
  677. uint64_t rdba = adapter->rx_ring.dma;
  678. uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
  679. struct ixgb_hw *hw = &adapter->hw;
  680. uint32_t rctl;
  681. uint32_t rxcsum;
  682. uint32_t rxdctl;
  683. /* make sure receives are disabled while setting up the descriptors */
  684. rctl = IXGB_READ_REG(hw, RCTL);
  685. IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
  686. /* set the Receive Delay Timer Register */
  687. IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  688. /* Setup the Base and Length of the Rx Descriptor Ring */
  689. IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  690. IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
  691. IXGB_WRITE_REG(hw, RDLEN, rdlen);
  692. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  693. IXGB_WRITE_REG(hw, RDH, 0);
  694. IXGB_WRITE_REG(hw, RDT, 0);
  695. /* set up pre-fetching of receive buffers so we get some before we
  696. * run out (default hardware behavior is to run out before fetching
  697. * more). This sets up to fetch if HTHRESH rx descriptors are avail
  698. * and the descriptors in hw cache are below PTHRESH. This avoids
  699. * the hardware behavior of fetching <=512 descriptors in a single
  700. * burst that pre-empts all other activity, usually causing fifo
  701. * overflows. */
  702. /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
  703. rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
  704. RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
  705. RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
  706. IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
  707. /* Enable Receive Checksum Offload for TCP and UDP */
  708. if(adapter->rx_csum == TRUE) {
  709. rxcsum = IXGB_READ_REG(hw, RXCSUM);
  710. rxcsum |= IXGB_RXCSUM_TUOFL;
  711. IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
  712. }
  713. /* Enable Receives */
  714. IXGB_WRITE_REG(hw, RCTL, rctl);
  715. }
  716. /**
  717. * ixgb_free_tx_resources - Free Tx Resources
  718. * @adapter: board private structure
  719. *
  720. * Free all transmit software resources
  721. **/
  722. void
  723. ixgb_free_tx_resources(struct ixgb_adapter *adapter)
  724. {
  725. struct pci_dev *pdev = adapter->pdev;
  726. ixgb_clean_tx_ring(adapter);
  727. vfree(adapter->tx_ring.buffer_info);
  728. adapter->tx_ring.buffer_info = NULL;
  729. pci_free_consistent(pdev, adapter->tx_ring.size,
  730. adapter->tx_ring.desc, adapter->tx_ring.dma);
  731. adapter->tx_ring.desc = NULL;
  732. }
  733. static void
  734. ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
  735. struct ixgb_buffer *buffer_info)
  736. {
  737. struct pci_dev *pdev = adapter->pdev;
  738. if (buffer_info->dma)
  739. pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
  740. PCI_DMA_TODEVICE);
  741. if (buffer_info->skb)
  742. dev_kfree_skb_any(buffer_info->skb);
  743. buffer_info->skb = NULL;
  744. buffer_info->dma = 0;
  745. buffer_info->time_stamp = 0;
  746. /* these fields must always be initialized in tx
  747. * buffer_info->length = 0;
  748. * buffer_info->next_to_watch = 0; */
  749. }
  750. /**
  751. * ixgb_clean_tx_ring - Free Tx Buffers
  752. * @adapter: board private structure
  753. **/
  754. static void
  755. ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
  756. {
  757. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  758. struct ixgb_buffer *buffer_info;
  759. unsigned long size;
  760. unsigned int i;
  761. /* Free all the Tx ring sk_buffs */
  762. for(i = 0; i < tx_ring->count; i++) {
  763. buffer_info = &tx_ring->buffer_info[i];
  764. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  765. }
  766. size = sizeof(struct ixgb_buffer) * tx_ring->count;
  767. memset(tx_ring->buffer_info, 0, size);
  768. /* Zero out the descriptor ring */
  769. memset(tx_ring->desc, 0, tx_ring->size);
  770. tx_ring->next_to_use = 0;
  771. tx_ring->next_to_clean = 0;
  772. IXGB_WRITE_REG(&adapter->hw, TDH, 0);
  773. IXGB_WRITE_REG(&adapter->hw, TDT, 0);
  774. }
  775. /**
  776. * ixgb_free_rx_resources - Free Rx Resources
  777. * @adapter: board private structure
  778. *
  779. * Free all receive software resources
  780. **/
  781. void
  782. ixgb_free_rx_resources(struct ixgb_adapter *adapter)
  783. {
  784. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  785. struct pci_dev *pdev = adapter->pdev;
  786. ixgb_clean_rx_ring(adapter);
  787. vfree(rx_ring->buffer_info);
  788. rx_ring->buffer_info = NULL;
  789. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  790. rx_ring->desc = NULL;
  791. }
  792. /**
  793. * ixgb_clean_rx_ring - Free Rx Buffers
  794. * @adapter: board private structure
  795. **/
  796. static void
  797. ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
  798. {
  799. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  800. struct ixgb_buffer *buffer_info;
  801. struct pci_dev *pdev = adapter->pdev;
  802. unsigned long size;
  803. unsigned int i;
  804. /* Free all the Rx ring sk_buffs */
  805. for(i = 0; i < rx_ring->count; i++) {
  806. buffer_info = &rx_ring->buffer_info[i];
  807. if(buffer_info->skb) {
  808. pci_unmap_single(pdev,
  809. buffer_info->dma,
  810. buffer_info->length,
  811. PCI_DMA_FROMDEVICE);
  812. dev_kfree_skb(buffer_info->skb);
  813. buffer_info->skb = NULL;
  814. }
  815. }
  816. size = sizeof(struct ixgb_buffer) * rx_ring->count;
  817. memset(rx_ring->buffer_info, 0, size);
  818. /* Zero out the descriptor ring */
  819. memset(rx_ring->desc, 0, rx_ring->size);
  820. rx_ring->next_to_clean = 0;
  821. rx_ring->next_to_use = 0;
  822. IXGB_WRITE_REG(&adapter->hw, RDH, 0);
  823. IXGB_WRITE_REG(&adapter->hw, RDT, 0);
  824. }
  825. /**
  826. * ixgb_set_mac - Change the Ethernet Address of the NIC
  827. * @netdev: network interface device structure
  828. * @p: pointer to an address structure
  829. *
  830. * Returns 0 on success, negative on failure
  831. **/
  832. static int
  833. ixgb_set_mac(struct net_device *netdev, void *p)
  834. {
  835. struct ixgb_adapter *adapter = netdev_priv(netdev);
  836. struct sockaddr *addr = p;
  837. if(!is_valid_ether_addr(addr->sa_data))
  838. return -EADDRNOTAVAIL;
  839. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  840. ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
  841. return 0;
  842. }
  843. /**
  844. * ixgb_set_multi - Multicast and Promiscuous mode set
  845. * @netdev: network interface device structure
  846. *
  847. * The set_multi entry point is called whenever the multicast address
  848. * list or the network interface flags are updated. This routine is
  849. * responsible for configuring the hardware for proper multicast,
  850. * promiscuous mode, and all-multi behavior.
  851. **/
  852. static void
  853. ixgb_set_multi(struct net_device *netdev)
  854. {
  855. struct ixgb_adapter *adapter = netdev_priv(netdev);
  856. struct ixgb_hw *hw = &adapter->hw;
  857. struct dev_mc_list *mc_ptr;
  858. uint32_t rctl;
  859. int i;
  860. /* Check for Promiscuous and All Multicast modes */
  861. rctl = IXGB_READ_REG(hw, RCTL);
  862. if(netdev->flags & IFF_PROMISC) {
  863. rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  864. } else if(netdev->flags & IFF_ALLMULTI) {
  865. rctl |= IXGB_RCTL_MPE;
  866. rctl &= ~IXGB_RCTL_UPE;
  867. } else {
  868. rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  869. }
  870. if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
  871. rctl |= IXGB_RCTL_MPE;
  872. IXGB_WRITE_REG(hw, RCTL, rctl);
  873. } else {
  874. uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
  875. IXGB_WRITE_REG(hw, RCTL, rctl);
  876. for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
  877. i++, mc_ptr = mc_ptr->next)
  878. memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
  879. mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
  880. ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
  881. }
  882. }
  883. /**
  884. * ixgb_watchdog - Timer Call-back
  885. * @data: pointer to netdev cast into an unsigned long
  886. **/
  887. static void
  888. ixgb_watchdog(unsigned long data)
  889. {
  890. struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
  891. struct net_device *netdev = adapter->netdev;
  892. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  893. ixgb_check_for_link(&adapter->hw);
  894. if (ixgb_check_for_bad_link(&adapter->hw)) {
  895. /* force the reset path */
  896. netif_stop_queue(netdev);
  897. }
  898. if(adapter->hw.link_up) {
  899. if(!netif_carrier_ok(netdev)) {
  900. DPRINTK(LINK, INFO,
  901. "NIC Link is Up 10000 Mbps Full Duplex\n");
  902. adapter->link_speed = 10000;
  903. adapter->link_duplex = FULL_DUPLEX;
  904. netif_carrier_on(netdev);
  905. netif_wake_queue(netdev);
  906. }
  907. } else {
  908. if(netif_carrier_ok(netdev)) {
  909. adapter->link_speed = 0;
  910. adapter->link_duplex = 0;
  911. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  912. netif_carrier_off(netdev);
  913. netif_stop_queue(netdev);
  914. }
  915. }
  916. ixgb_update_stats(adapter);
  917. if(!netif_carrier_ok(netdev)) {
  918. if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
  919. /* We've lost link, so the controller stops DMA,
  920. * but we've got queued Tx work that's never going
  921. * to get done, so reset controller to flush Tx.
  922. * (Do the reset outside of interrupt context). */
  923. schedule_work(&adapter->tx_timeout_task);
  924. }
  925. }
  926. /* Force detection of hung controller every watchdog period */
  927. adapter->detect_tx_hung = TRUE;
  928. /* generate an interrupt to force clean up of any stragglers */
  929. IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
  930. /* Reset the timer */
  931. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  932. }
  933. #define IXGB_TX_FLAGS_CSUM 0x00000001
  934. #define IXGB_TX_FLAGS_VLAN 0x00000002
  935. #define IXGB_TX_FLAGS_TSO 0x00000004
  936. static int
  937. ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
  938. {
  939. struct ixgb_context_desc *context_desc;
  940. unsigned int i;
  941. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  942. uint16_t ipcse, tucse, mss;
  943. int err;
  944. if (likely(skb_is_gso(skb))) {
  945. struct ixgb_buffer *buffer_info;
  946. struct iphdr *iph;
  947. if (skb_header_cloned(skb)) {
  948. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  949. if (err)
  950. return err;
  951. }
  952. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  953. mss = skb_shinfo(skb)->gso_size;
  954. iph = ip_hdr(skb);
  955. iph->tot_len = 0;
  956. iph->check = 0;
  957. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  958. iph->daddr, 0,
  959. IPPROTO_TCP, 0);
  960. ipcss = skb_network_offset(skb);
  961. ipcso = (void *)&(iph->check) - (void *)skb->data;
  962. ipcse = skb_transport_offset(skb) - 1;
  963. tucss = skb_transport_offset(skb);
  964. tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
  965. tucse = 0;
  966. i = adapter->tx_ring.next_to_use;
  967. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  968. buffer_info = &adapter->tx_ring.buffer_info[i];
  969. WARN_ON(buffer_info->dma != 0);
  970. context_desc->ipcss = ipcss;
  971. context_desc->ipcso = ipcso;
  972. context_desc->ipcse = cpu_to_le16(ipcse);
  973. context_desc->tucss = tucss;
  974. context_desc->tucso = tucso;
  975. context_desc->tucse = cpu_to_le16(tucse);
  976. context_desc->mss = cpu_to_le16(mss);
  977. context_desc->hdr_len = hdr_len;
  978. context_desc->status = 0;
  979. context_desc->cmd_type_len = cpu_to_le32(
  980. IXGB_CONTEXT_DESC_TYPE
  981. | IXGB_CONTEXT_DESC_CMD_TSE
  982. | IXGB_CONTEXT_DESC_CMD_IP
  983. | IXGB_CONTEXT_DESC_CMD_TCP
  984. | IXGB_CONTEXT_DESC_CMD_IDE
  985. | (skb->len - (hdr_len)));
  986. if(++i == adapter->tx_ring.count) i = 0;
  987. adapter->tx_ring.next_to_use = i;
  988. return 1;
  989. }
  990. return 0;
  991. }
  992. static boolean_t
  993. ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
  994. {
  995. struct ixgb_context_desc *context_desc;
  996. unsigned int i;
  997. uint8_t css, cso;
  998. if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  999. struct ixgb_buffer *buffer_info;
  1000. css = skb_transport_offset(skb);
  1001. cso = css + skb->csum_offset;
  1002. i = adapter->tx_ring.next_to_use;
  1003. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  1004. buffer_info = &adapter->tx_ring.buffer_info[i];
  1005. WARN_ON(buffer_info->dma != 0);
  1006. context_desc->tucss = css;
  1007. context_desc->tucso = cso;
  1008. context_desc->tucse = 0;
  1009. /* zero out any previously existing data in one instruction */
  1010. *(uint32_t *)&(context_desc->ipcss) = 0;
  1011. context_desc->status = 0;
  1012. context_desc->hdr_len = 0;
  1013. context_desc->mss = 0;
  1014. context_desc->cmd_type_len =
  1015. cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
  1016. | IXGB_TX_DESC_CMD_IDE);
  1017. if(++i == adapter->tx_ring.count) i = 0;
  1018. adapter->tx_ring.next_to_use = i;
  1019. return TRUE;
  1020. }
  1021. return FALSE;
  1022. }
  1023. #define IXGB_MAX_TXD_PWR 14
  1024. #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
  1025. static int
  1026. ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
  1027. unsigned int first)
  1028. {
  1029. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1030. struct ixgb_buffer *buffer_info;
  1031. int len = skb->len;
  1032. unsigned int offset = 0, size, count = 0, i;
  1033. unsigned int mss = skb_shinfo(skb)->gso_size;
  1034. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1035. unsigned int f;
  1036. len -= skb->data_len;
  1037. i = tx_ring->next_to_use;
  1038. while(len) {
  1039. buffer_info = &tx_ring->buffer_info[i];
  1040. size = min(len, IXGB_MAX_DATA_PER_TXD);
  1041. /* Workaround for premature desc write-backs
  1042. * in TSO mode. Append 4-byte sentinel desc */
  1043. if (unlikely(mss && !nr_frags && size == len && size > 8))
  1044. size -= 4;
  1045. buffer_info->length = size;
  1046. WARN_ON(buffer_info->dma != 0);
  1047. buffer_info->dma =
  1048. pci_map_single(adapter->pdev,
  1049. skb->data + offset,
  1050. size,
  1051. PCI_DMA_TODEVICE);
  1052. buffer_info->time_stamp = jiffies;
  1053. buffer_info->next_to_watch = 0;
  1054. len -= size;
  1055. offset += size;
  1056. count++;
  1057. if(++i == tx_ring->count) i = 0;
  1058. }
  1059. for(f = 0; f < nr_frags; f++) {
  1060. struct skb_frag_struct *frag;
  1061. frag = &skb_shinfo(skb)->frags[f];
  1062. len = frag->size;
  1063. offset = 0;
  1064. while(len) {
  1065. buffer_info = &tx_ring->buffer_info[i];
  1066. size = min(len, IXGB_MAX_DATA_PER_TXD);
  1067. /* Workaround for premature desc write-backs
  1068. * in TSO mode. Append 4-byte sentinel desc */
  1069. if (unlikely(mss && !nr_frags && size == len
  1070. && size > 8))
  1071. size -= 4;
  1072. buffer_info->length = size;
  1073. buffer_info->dma =
  1074. pci_map_page(adapter->pdev,
  1075. frag->page,
  1076. frag->page_offset + offset,
  1077. size,
  1078. PCI_DMA_TODEVICE);
  1079. buffer_info->time_stamp = jiffies;
  1080. buffer_info->next_to_watch = 0;
  1081. len -= size;
  1082. offset += size;
  1083. count++;
  1084. if(++i == tx_ring->count) i = 0;
  1085. }
  1086. }
  1087. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1088. tx_ring->buffer_info[i].skb = skb;
  1089. tx_ring->buffer_info[first].next_to_watch = i;
  1090. return count;
  1091. }
  1092. static void
  1093. ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
  1094. {
  1095. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1096. struct ixgb_tx_desc *tx_desc = NULL;
  1097. struct ixgb_buffer *buffer_info;
  1098. uint32_t cmd_type_len = adapter->tx_cmd_type;
  1099. uint8_t status = 0;
  1100. uint8_t popts = 0;
  1101. unsigned int i;
  1102. if(tx_flags & IXGB_TX_FLAGS_TSO) {
  1103. cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
  1104. popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
  1105. }
  1106. if(tx_flags & IXGB_TX_FLAGS_CSUM)
  1107. popts |= IXGB_TX_DESC_POPTS_TXSM;
  1108. if(tx_flags & IXGB_TX_FLAGS_VLAN) {
  1109. cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
  1110. }
  1111. i = tx_ring->next_to_use;
  1112. while(count--) {
  1113. buffer_info = &tx_ring->buffer_info[i];
  1114. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1115. tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1116. tx_desc->cmd_type_len =
  1117. cpu_to_le32(cmd_type_len | buffer_info->length);
  1118. tx_desc->status = status;
  1119. tx_desc->popts = popts;
  1120. tx_desc->vlan = cpu_to_le16(vlan_id);
  1121. if(++i == tx_ring->count) i = 0;
  1122. }
  1123. tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
  1124. | IXGB_TX_DESC_CMD_RS );
  1125. /* Force memory writes to complete before letting h/w
  1126. * know there are new descriptors to fetch. (Only
  1127. * applicable for weak-ordered memory model archs,
  1128. * such as IA-64). */
  1129. wmb();
  1130. tx_ring->next_to_use = i;
  1131. IXGB_WRITE_REG(&adapter->hw, TDT, i);
  1132. }
  1133. static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
  1134. {
  1135. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1136. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1137. netif_stop_queue(netdev);
  1138. /* Herbert's original patch had:
  1139. * smp_mb__after_netif_stop_queue();
  1140. * but since that doesn't exist yet, just open code it. */
  1141. smp_mb();
  1142. /* We need to check again in a case another CPU has just
  1143. * made room available. */
  1144. if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
  1145. return -EBUSY;
  1146. /* A reprieve! */
  1147. netif_start_queue(netdev);
  1148. ++adapter->restart_queue;
  1149. return 0;
  1150. }
  1151. static int ixgb_maybe_stop_tx(struct net_device *netdev,
  1152. struct ixgb_desc_ring *tx_ring, int size)
  1153. {
  1154. if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
  1155. return 0;
  1156. return __ixgb_maybe_stop_tx(netdev, size);
  1157. }
  1158. /* Tx Descriptors needed, worst case */
  1159. #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
  1160. (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
  1161. #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
  1162. MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
  1163. + 1 /* one more needed for sentinel TSO workaround */
  1164. static int
  1165. ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1166. {
  1167. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1168. unsigned int first;
  1169. unsigned int tx_flags = 0;
  1170. unsigned long flags;
  1171. int vlan_id = 0;
  1172. int tso;
  1173. if(skb->len <= 0) {
  1174. dev_kfree_skb_any(skb);
  1175. return 0;
  1176. }
  1177. #ifdef NETIF_F_LLTX
  1178. local_irq_save(flags);
  1179. if (!spin_trylock(&adapter->tx_lock)) {
  1180. /* Collision - tell upper layer to requeue */
  1181. local_irq_restore(flags);
  1182. return NETDEV_TX_LOCKED;
  1183. }
  1184. #else
  1185. spin_lock_irqsave(&adapter->tx_lock, flags);
  1186. #endif
  1187. if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
  1188. DESC_NEEDED))) {
  1189. netif_stop_queue(netdev);
  1190. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1191. return NETDEV_TX_BUSY;
  1192. }
  1193. #ifndef NETIF_F_LLTX
  1194. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1195. #endif
  1196. if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1197. tx_flags |= IXGB_TX_FLAGS_VLAN;
  1198. vlan_id = vlan_tx_tag_get(skb);
  1199. }
  1200. first = adapter->tx_ring.next_to_use;
  1201. tso = ixgb_tso(adapter, skb);
  1202. if (tso < 0) {
  1203. dev_kfree_skb_any(skb);
  1204. #ifdef NETIF_F_LLTX
  1205. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1206. #endif
  1207. return NETDEV_TX_OK;
  1208. }
  1209. if (likely(tso))
  1210. tx_flags |= IXGB_TX_FLAGS_TSO;
  1211. else if(ixgb_tx_csum(adapter, skb))
  1212. tx_flags |= IXGB_TX_FLAGS_CSUM;
  1213. ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
  1214. tx_flags);
  1215. netdev->trans_start = jiffies;
  1216. #ifdef NETIF_F_LLTX
  1217. /* Make sure there is space in the ring for the next send. */
  1218. ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
  1219. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1220. #endif
  1221. return NETDEV_TX_OK;
  1222. }
  1223. /**
  1224. * ixgb_tx_timeout - Respond to a Tx Hang
  1225. * @netdev: network interface device structure
  1226. **/
  1227. static void
  1228. ixgb_tx_timeout(struct net_device *netdev)
  1229. {
  1230. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1231. /* Do the reset outside of interrupt context */
  1232. schedule_work(&adapter->tx_timeout_task);
  1233. }
  1234. static void
  1235. ixgb_tx_timeout_task(struct work_struct *work)
  1236. {
  1237. struct ixgb_adapter *adapter =
  1238. container_of(work, struct ixgb_adapter, tx_timeout_task);
  1239. adapter->tx_timeout_count++;
  1240. ixgb_down(adapter, TRUE);
  1241. ixgb_up(adapter);
  1242. }
  1243. /**
  1244. * ixgb_get_stats - Get System Network Statistics
  1245. * @netdev: network interface device structure
  1246. *
  1247. * Returns the address of the device statistics structure.
  1248. * The statistics are actually updated from the timer callback.
  1249. **/
  1250. static struct net_device_stats *
  1251. ixgb_get_stats(struct net_device *netdev)
  1252. {
  1253. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1254. return &adapter->net_stats;
  1255. }
  1256. /**
  1257. * ixgb_change_mtu - Change the Maximum Transfer Unit
  1258. * @netdev: network interface device structure
  1259. * @new_mtu: new value for maximum frame size
  1260. *
  1261. * Returns 0 on success, negative on failure
  1262. **/
  1263. static int
  1264. ixgb_change_mtu(struct net_device *netdev, int new_mtu)
  1265. {
  1266. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1267. int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1268. int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1269. if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1270. || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
  1271. DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
  1272. return -EINVAL;
  1273. }
  1274. adapter->rx_buffer_len = max_frame;
  1275. netdev->mtu = new_mtu;
  1276. if ((old_max_frame != max_frame) && netif_running(netdev)) {
  1277. ixgb_down(adapter, TRUE);
  1278. ixgb_up(adapter);
  1279. }
  1280. return 0;
  1281. }
  1282. /**
  1283. * ixgb_update_stats - Update the board statistics counters.
  1284. * @adapter: board private structure
  1285. **/
  1286. void
  1287. ixgb_update_stats(struct ixgb_adapter *adapter)
  1288. {
  1289. struct net_device *netdev = adapter->netdev;
  1290. struct pci_dev *pdev = adapter->pdev;
  1291. /* Prevent stats update while adapter is being reset */
  1292. if (pci_channel_offline(pdev))
  1293. return;
  1294. if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
  1295. (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
  1296. u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
  1297. u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
  1298. u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
  1299. u64 bcast = ((u64)bcast_h << 32) | bcast_l;
  1300. multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
  1301. /* fix up multicast stats by removing broadcasts */
  1302. if(multi >= bcast)
  1303. multi -= bcast;
  1304. adapter->stats.mprcl += (multi & 0xFFFFFFFF);
  1305. adapter->stats.mprch += (multi >> 32);
  1306. adapter->stats.bprcl += bcast_l;
  1307. adapter->stats.bprch += bcast_h;
  1308. } else {
  1309. adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
  1310. adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
  1311. adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
  1312. adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
  1313. }
  1314. adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
  1315. adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
  1316. adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
  1317. adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
  1318. adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
  1319. adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
  1320. adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
  1321. adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
  1322. adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
  1323. adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
  1324. adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
  1325. adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
  1326. adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
  1327. adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
  1328. adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
  1329. adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
  1330. adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
  1331. adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
  1332. adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
  1333. adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
  1334. adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
  1335. adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
  1336. adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
  1337. adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
  1338. adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
  1339. adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
  1340. adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
  1341. adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
  1342. adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
  1343. adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
  1344. adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
  1345. adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
  1346. adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
  1347. adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
  1348. adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
  1349. adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
  1350. adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
  1351. adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
  1352. adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
  1353. adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
  1354. adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
  1355. adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
  1356. adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
  1357. adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
  1358. adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
  1359. adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
  1360. adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
  1361. adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
  1362. adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
  1363. adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
  1364. adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
  1365. adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
  1366. adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
  1367. adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
  1368. adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
  1369. adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
  1370. /* Fill out the OS statistics structure */
  1371. adapter->net_stats.rx_packets = adapter->stats.gprcl;
  1372. adapter->net_stats.tx_packets = adapter->stats.gptcl;
  1373. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  1374. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  1375. adapter->net_stats.multicast = adapter->stats.mprcl;
  1376. adapter->net_stats.collisions = 0;
  1377. /* ignore RLEC as it reports errors for padded (<64bytes) frames
  1378. * with a length in the type/len field */
  1379. adapter->net_stats.rx_errors =
  1380. /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
  1381. adapter->stats.ruc +
  1382. adapter->stats.roc /*+ adapter->stats.rlec */ +
  1383. adapter->stats.icbc +
  1384. adapter->stats.ecbc + adapter->stats.mpc;
  1385. /* see above
  1386. * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  1387. */
  1388. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  1389. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  1390. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  1391. adapter->net_stats.rx_over_errors = adapter->stats.mpc;
  1392. adapter->net_stats.tx_errors = 0;
  1393. adapter->net_stats.rx_frame_errors = 0;
  1394. adapter->net_stats.tx_aborted_errors = 0;
  1395. adapter->net_stats.tx_carrier_errors = 0;
  1396. adapter->net_stats.tx_fifo_errors = 0;
  1397. adapter->net_stats.tx_heartbeat_errors = 0;
  1398. adapter->net_stats.tx_window_errors = 0;
  1399. }
  1400. #define IXGB_MAX_INTR 10
  1401. /**
  1402. * ixgb_intr - Interrupt Handler
  1403. * @irq: interrupt number
  1404. * @data: pointer to a network interface device structure
  1405. **/
  1406. static irqreturn_t
  1407. ixgb_intr(int irq, void *data)
  1408. {
  1409. struct net_device *netdev = data;
  1410. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1411. struct ixgb_hw *hw = &adapter->hw;
  1412. uint32_t icr = IXGB_READ_REG(hw, ICR);
  1413. #ifndef CONFIG_IXGB_NAPI
  1414. unsigned int i;
  1415. #endif
  1416. if(unlikely(!icr))
  1417. return IRQ_NONE; /* Not our interrupt */
  1418. if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
  1419. mod_timer(&adapter->watchdog_timer, jiffies);
  1420. }
  1421. #ifdef CONFIG_IXGB_NAPI
  1422. if(netif_rx_schedule_prep(netdev)) {
  1423. /* Disable interrupts and register for poll. The flush
  1424. of the posted write is intentionally left out.
  1425. */
  1426. atomic_inc(&adapter->irq_sem);
  1427. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  1428. __netif_rx_schedule(netdev);
  1429. }
  1430. #else
  1431. /* yes, that is actually a & and it is meant to make sure that
  1432. * every pass through this for loop checks both receive and
  1433. * transmit queues for completed descriptors, intended to
  1434. * avoid starvation issues and assist tx/rx fairness. */
  1435. for(i = 0; i < IXGB_MAX_INTR; i++)
  1436. if(!ixgb_clean_rx_irq(adapter) &
  1437. !ixgb_clean_tx_irq(adapter))
  1438. break;
  1439. #endif
  1440. return IRQ_HANDLED;
  1441. }
  1442. #ifdef CONFIG_IXGB_NAPI
  1443. /**
  1444. * ixgb_clean - NAPI Rx polling callback
  1445. * @adapter: board private structure
  1446. **/
  1447. static int
  1448. ixgb_clean(struct net_device *netdev, int *budget)
  1449. {
  1450. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1451. int work_to_do = min(*budget, netdev->quota);
  1452. int tx_cleaned;
  1453. int work_done = 0;
  1454. tx_cleaned = ixgb_clean_tx_irq(adapter);
  1455. ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
  1456. *budget -= work_done;
  1457. netdev->quota -= work_done;
  1458. /* if no Tx and not enough Rx work done, exit the polling mode */
  1459. if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
  1460. netif_rx_complete(netdev);
  1461. ixgb_irq_enable(adapter);
  1462. return 0;
  1463. }
  1464. return 1;
  1465. }
  1466. #endif
  1467. /**
  1468. * ixgb_clean_tx_irq - Reclaim resources after transmit completes
  1469. * @adapter: board private structure
  1470. **/
  1471. static boolean_t
  1472. ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
  1473. {
  1474. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1475. struct net_device *netdev = adapter->netdev;
  1476. struct ixgb_tx_desc *tx_desc, *eop_desc;
  1477. struct ixgb_buffer *buffer_info;
  1478. unsigned int i, eop;
  1479. boolean_t cleaned = FALSE;
  1480. i = tx_ring->next_to_clean;
  1481. eop = tx_ring->buffer_info[i].next_to_watch;
  1482. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1483. while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
  1484. for(cleaned = FALSE; !cleaned; ) {
  1485. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1486. buffer_info = &tx_ring->buffer_info[i];
  1487. if (tx_desc->popts
  1488. & (IXGB_TX_DESC_POPTS_TXSM |
  1489. IXGB_TX_DESC_POPTS_IXSM))
  1490. adapter->hw_csum_tx_good++;
  1491. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1492. *(uint32_t *)&(tx_desc->status) = 0;
  1493. cleaned = (i == eop);
  1494. if(++i == tx_ring->count) i = 0;
  1495. }
  1496. eop = tx_ring->buffer_info[i].next_to_watch;
  1497. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1498. }
  1499. tx_ring->next_to_clean = i;
  1500. if (unlikely(netif_queue_stopped(netdev))) {
  1501. spin_lock(&adapter->tx_lock);
  1502. if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
  1503. (IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED))
  1504. netif_wake_queue(netdev);
  1505. spin_unlock(&adapter->tx_lock);
  1506. }
  1507. if(adapter->detect_tx_hung) {
  1508. /* detect a transmit hang in hardware, this serializes the
  1509. * check with the clearing of time_stamp and movement of i */
  1510. adapter->detect_tx_hung = FALSE;
  1511. if (tx_ring->buffer_info[eop].dma &&
  1512. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
  1513. && !(IXGB_READ_REG(&adapter->hw, STATUS) &
  1514. IXGB_STATUS_TXOFF)) {
  1515. /* detected Tx unit hang */
  1516. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  1517. " TDH <%x>\n"
  1518. " TDT <%x>\n"
  1519. " next_to_use <%x>\n"
  1520. " next_to_clean <%x>\n"
  1521. "buffer_info[next_to_clean]\n"
  1522. " time_stamp <%lx>\n"
  1523. " next_to_watch <%x>\n"
  1524. " jiffies <%lx>\n"
  1525. " next_to_watch.status <%x>\n",
  1526. IXGB_READ_REG(&adapter->hw, TDH),
  1527. IXGB_READ_REG(&adapter->hw, TDT),
  1528. tx_ring->next_to_use,
  1529. tx_ring->next_to_clean,
  1530. tx_ring->buffer_info[eop].time_stamp,
  1531. eop,
  1532. jiffies,
  1533. eop_desc->status);
  1534. netif_stop_queue(netdev);
  1535. }
  1536. }
  1537. return cleaned;
  1538. }
  1539. /**
  1540. * ixgb_rx_checksum - Receive Checksum Offload for 82597.
  1541. * @adapter: board private structure
  1542. * @rx_desc: receive descriptor
  1543. * @sk_buff: socket buffer with received data
  1544. **/
  1545. static void
  1546. ixgb_rx_checksum(struct ixgb_adapter *adapter,
  1547. struct ixgb_rx_desc *rx_desc,
  1548. struct sk_buff *skb)
  1549. {
  1550. /* Ignore Checksum bit is set OR
  1551. * TCP Checksum has not been calculated
  1552. */
  1553. if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
  1554. (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
  1555. skb->ip_summed = CHECKSUM_NONE;
  1556. return;
  1557. }
  1558. /* At this point we know the hardware did the TCP checksum */
  1559. /* now look at the TCP checksum error bit */
  1560. if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
  1561. /* let the stack verify checksum errors */
  1562. skb->ip_summed = CHECKSUM_NONE;
  1563. adapter->hw_csum_rx_error++;
  1564. } else {
  1565. /* TCP checksum is good */
  1566. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1567. adapter->hw_csum_rx_good++;
  1568. }
  1569. }
  1570. /**
  1571. * ixgb_clean_rx_irq - Send received data up the network stack,
  1572. * @adapter: board private structure
  1573. **/
  1574. static boolean_t
  1575. #ifdef CONFIG_IXGB_NAPI
  1576. ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
  1577. #else
  1578. ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
  1579. #endif
  1580. {
  1581. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1582. struct net_device *netdev = adapter->netdev;
  1583. struct pci_dev *pdev = adapter->pdev;
  1584. struct ixgb_rx_desc *rx_desc, *next_rxd;
  1585. struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
  1586. uint32_t length;
  1587. unsigned int i, j;
  1588. boolean_t cleaned = FALSE;
  1589. i = rx_ring->next_to_clean;
  1590. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1591. buffer_info = &rx_ring->buffer_info[i];
  1592. while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
  1593. struct sk_buff *skb, *next_skb;
  1594. u8 status;
  1595. #ifdef CONFIG_IXGB_NAPI
  1596. if(*work_done >= work_to_do)
  1597. break;
  1598. (*work_done)++;
  1599. #endif
  1600. status = rx_desc->status;
  1601. skb = buffer_info->skb;
  1602. buffer_info->skb = NULL;
  1603. prefetch(skb->data);
  1604. if(++i == rx_ring->count) i = 0;
  1605. next_rxd = IXGB_RX_DESC(*rx_ring, i);
  1606. prefetch(next_rxd);
  1607. if((j = i + 1) == rx_ring->count) j = 0;
  1608. next2_buffer = &rx_ring->buffer_info[j];
  1609. prefetch(next2_buffer);
  1610. next_buffer = &rx_ring->buffer_info[i];
  1611. next_skb = next_buffer->skb;
  1612. prefetch(next_skb);
  1613. cleaned = TRUE;
  1614. pci_unmap_single(pdev,
  1615. buffer_info->dma,
  1616. buffer_info->length,
  1617. PCI_DMA_FROMDEVICE);
  1618. length = le16_to_cpu(rx_desc->length);
  1619. if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
  1620. /* All receives must fit into a single buffer */
  1621. IXGB_DBG("Receive packet consumed multiple buffers "
  1622. "length<%x>\n", length);
  1623. dev_kfree_skb_irq(skb);
  1624. goto rxdesc_done;
  1625. }
  1626. if (unlikely(rx_desc->errors
  1627. & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
  1628. | IXGB_RX_DESC_ERRORS_P |
  1629. IXGB_RX_DESC_ERRORS_RXE))) {
  1630. dev_kfree_skb_irq(skb);
  1631. goto rxdesc_done;
  1632. }
  1633. /* code added for copybreak, this should improve
  1634. * performance for small packets with large amounts
  1635. * of reassembly being done in the stack */
  1636. #define IXGB_CB_LENGTH 256
  1637. if (length < IXGB_CB_LENGTH) {
  1638. struct sk_buff *new_skb =
  1639. netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
  1640. if (new_skb) {
  1641. skb_reserve(new_skb, NET_IP_ALIGN);
  1642. skb_copy_to_linear_data_offset(new_skb,
  1643. -NET_IP_ALIGN,
  1644. (skb->data -
  1645. NET_IP_ALIGN),
  1646. (length +
  1647. NET_IP_ALIGN));
  1648. /* save the skb in buffer_info as good */
  1649. buffer_info->skb = skb;
  1650. skb = new_skb;
  1651. }
  1652. }
  1653. /* end copybreak code */
  1654. /* Good Receive */
  1655. skb_put(skb, length);
  1656. /* Receive Checksum Offload */
  1657. ixgb_rx_checksum(adapter, rx_desc, skb);
  1658. skb->protocol = eth_type_trans(skb, netdev);
  1659. #ifdef CONFIG_IXGB_NAPI
  1660. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1661. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  1662. le16_to_cpu(rx_desc->special) &
  1663. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1664. } else {
  1665. netif_receive_skb(skb);
  1666. }
  1667. #else /* CONFIG_IXGB_NAPI */
  1668. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1669. vlan_hwaccel_rx(skb, adapter->vlgrp,
  1670. le16_to_cpu(rx_desc->special) &
  1671. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1672. } else {
  1673. netif_rx(skb);
  1674. }
  1675. #endif /* CONFIG_IXGB_NAPI */
  1676. netdev->last_rx = jiffies;
  1677. rxdesc_done:
  1678. /* clean up descriptor, might be written over by hw */
  1679. rx_desc->status = 0;
  1680. /* use prefetched values */
  1681. rx_desc = next_rxd;
  1682. buffer_info = next_buffer;
  1683. }
  1684. rx_ring->next_to_clean = i;
  1685. ixgb_alloc_rx_buffers(adapter);
  1686. return cleaned;
  1687. }
  1688. /**
  1689. * ixgb_alloc_rx_buffers - Replace used receive buffers
  1690. * @adapter: address of board private structure
  1691. **/
  1692. static void
  1693. ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
  1694. {
  1695. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1696. struct net_device *netdev = adapter->netdev;
  1697. struct pci_dev *pdev = adapter->pdev;
  1698. struct ixgb_rx_desc *rx_desc;
  1699. struct ixgb_buffer *buffer_info;
  1700. struct sk_buff *skb;
  1701. unsigned int i;
  1702. int num_group_tail_writes;
  1703. long cleancount;
  1704. i = rx_ring->next_to_use;
  1705. buffer_info = &rx_ring->buffer_info[i];
  1706. cleancount = IXGB_DESC_UNUSED(rx_ring);
  1707. num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
  1708. /* leave three descriptors unused */
  1709. while(--cleancount > 2) {
  1710. /* recycle! its good for you */
  1711. skb = buffer_info->skb;
  1712. if (skb) {
  1713. skb_trim(skb, 0);
  1714. goto map_skb;
  1715. }
  1716. skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
  1717. + NET_IP_ALIGN);
  1718. if (unlikely(!skb)) {
  1719. /* Better luck next round */
  1720. adapter->alloc_rx_buff_failed++;
  1721. break;
  1722. }
  1723. /* Make buffer alignment 2 beyond a 16 byte boundary
  1724. * this will result in a 16 byte aligned IP header after
  1725. * the 14 byte MAC header is removed
  1726. */
  1727. skb_reserve(skb, NET_IP_ALIGN);
  1728. buffer_info->skb = skb;
  1729. buffer_info->length = adapter->rx_buffer_len;
  1730. map_skb:
  1731. buffer_info->dma = pci_map_single(pdev,
  1732. skb->data,
  1733. adapter->rx_buffer_len,
  1734. PCI_DMA_FROMDEVICE);
  1735. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1736. rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1737. /* guarantee DD bit not set now before h/w gets descriptor
  1738. * this is the rest of the workaround for h/w double
  1739. * writeback. */
  1740. rx_desc->status = 0;
  1741. if(++i == rx_ring->count) i = 0;
  1742. buffer_info = &rx_ring->buffer_info[i];
  1743. }
  1744. if (likely(rx_ring->next_to_use != i)) {
  1745. rx_ring->next_to_use = i;
  1746. if (unlikely(i-- == 0))
  1747. i = (rx_ring->count - 1);
  1748. /* Force memory writes to complete before letting h/w
  1749. * know there are new descriptors to fetch. (Only
  1750. * applicable for weak-ordered memory model archs, such
  1751. * as IA-64). */
  1752. wmb();
  1753. IXGB_WRITE_REG(&adapter->hw, RDT, i);
  1754. }
  1755. }
  1756. /**
  1757. * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
  1758. *
  1759. * @param netdev network interface device structure
  1760. * @param grp indicates to enable or disable tagging/stripping
  1761. **/
  1762. static void
  1763. ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  1764. {
  1765. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1766. uint32_t ctrl, rctl;
  1767. ixgb_irq_disable(adapter);
  1768. adapter->vlgrp = grp;
  1769. if(grp) {
  1770. /* enable VLAN tag insert/strip */
  1771. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1772. ctrl |= IXGB_CTRL0_VME;
  1773. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1774. /* enable VLAN receive filtering */
  1775. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1776. rctl |= IXGB_RCTL_VFE;
  1777. rctl &= ~IXGB_RCTL_CFIEN;
  1778. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1779. } else {
  1780. /* disable VLAN tag insert/strip */
  1781. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1782. ctrl &= ~IXGB_CTRL0_VME;
  1783. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1784. /* disable VLAN filtering */
  1785. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1786. rctl &= ~IXGB_RCTL_VFE;
  1787. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1788. }
  1789. ixgb_irq_enable(adapter);
  1790. }
  1791. static void
  1792. ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  1793. {
  1794. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1795. uint32_t vfta, index;
  1796. /* add VID to filter table */
  1797. index = (vid >> 5) & 0x7F;
  1798. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1799. vfta |= (1 << (vid & 0x1F));
  1800. ixgb_write_vfta(&adapter->hw, index, vfta);
  1801. }
  1802. static void
  1803. ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  1804. {
  1805. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1806. uint32_t vfta, index;
  1807. ixgb_irq_disable(adapter);
  1808. vlan_group_set_device(adapter->vlgrp, vid, NULL);
  1809. ixgb_irq_enable(adapter);
  1810. /* remove VID from filter table*/
  1811. index = (vid >> 5) & 0x7F;
  1812. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1813. vfta &= ~(1 << (vid & 0x1F));
  1814. ixgb_write_vfta(&adapter->hw, index, vfta);
  1815. }
  1816. static void
  1817. ixgb_restore_vlan(struct ixgb_adapter *adapter)
  1818. {
  1819. ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1820. if(adapter->vlgrp) {
  1821. uint16_t vid;
  1822. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1823. if(!vlan_group_get_device(adapter->vlgrp, vid))
  1824. continue;
  1825. ixgb_vlan_rx_add_vid(adapter->netdev, vid);
  1826. }
  1827. }
  1828. }
  1829. #ifdef CONFIG_NET_POLL_CONTROLLER
  1830. /*
  1831. * Polling 'interrupt' - used by things like netconsole to send skbs
  1832. * without having to re-enable interrupts. It's not called while
  1833. * the interrupt routine is executing.
  1834. */
  1835. static void ixgb_netpoll(struct net_device *dev)
  1836. {
  1837. struct ixgb_adapter *adapter = netdev_priv(dev);
  1838. disable_irq(adapter->pdev->irq);
  1839. ixgb_intr(adapter->pdev->irq, dev);
  1840. enable_irq(adapter->pdev->irq);
  1841. }
  1842. #endif
  1843. /**
  1844. * ixgb_io_error_detected() - called when PCI error is detected
  1845. * @pdev pointer to pci device with error
  1846. * @state pci channel state after error
  1847. *
  1848. * This callback is called by the PCI subsystem whenever
  1849. * a PCI bus error is detected.
  1850. */
  1851. static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
  1852. enum pci_channel_state state)
  1853. {
  1854. struct net_device *netdev = pci_get_drvdata(pdev);
  1855. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1856. if(netif_running(netdev))
  1857. ixgb_down(adapter, TRUE);
  1858. pci_disable_device(pdev);
  1859. /* Request a slot reset. */
  1860. return PCI_ERS_RESULT_NEED_RESET;
  1861. }
  1862. /**
  1863. * ixgb_io_slot_reset - called after the pci bus has been reset.
  1864. * @pdev pointer to pci device with error
  1865. *
  1866. * This callback is called after the PCI buss has been reset.
  1867. * Basically, this tries to restart the card from scratch.
  1868. * This is a shortened version of the device probe/discovery code,
  1869. * it resembles the first-half of the ixgb_probe() routine.
  1870. */
  1871. static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
  1872. {
  1873. struct net_device *netdev = pci_get_drvdata(pdev);
  1874. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1875. if(pci_enable_device(pdev)) {
  1876. DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
  1877. return PCI_ERS_RESULT_DISCONNECT;
  1878. }
  1879. /* Perform card reset only on one instance of the card */
  1880. if (0 != PCI_FUNC (pdev->devfn))
  1881. return PCI_ERS_RESULT_RECOVERED;
  1882. pci_set_master(pdev);
  1883. netif_carrier_off(netdev);
  1884. netif_stop_queue(netdev);
  1885. ixgb_reset(adapter);
  1886. /* Make sure the EEPROM is good */
  1887. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  1888. DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
  1889. return PCI_ERS_RESULT_DISCONNECT;
  1890. }
  1891. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  1892. memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
  1893. if(!is_valid_ether_addr(netdev->perm_addr)) {
  1894. DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
  1895. return PCI_ERS_RESULT_DISCONNECT;
  1896. }
  1897. return PCI_ERS_RESULT_RECOVERED;
  1898. }
  1899. /**
  1900. * ixgb_io_resume - called when its OK to resume normal operations
  1901. * @pdev pointer to pci device with error
  1902. *
  1903. * The error recovery driver tells us that its OK to resume
  1904. * normal operation. Implementation resembles the second-half
  1905. * of the ixgb_probe() routine.
  1906. */
  1907. static void ixgb_io_resume (struct pci_dev *pdev)
  1908. {
  1909. struct net_device *netdev = pci_get_drvdata(pdev);
  1910. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1911. pci_set_master(pdev);
  1912. if(netif_running(netdev)) {
  1913. if(ixgb_up(adapter)) {
  1914. printk ("ixgb: can't bring device back up after reset\n");
  1915. return;
  1916. }
  1917. }
  1918. netif_device_attach(netdev);
  1919. mod_timer(&adapter->watchdog_timer, jiffies);
  1920. }
  1921. /* ixgb_main.c */