pxaficp_ir.c 20 KB

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  1. /*
  2. * linux/drivers/net/irda/pxaficp_ir.c
  3. *
  4. * Based on sa1100_ir.c by Russell King
  5. *
  6. * Changes copyright (C) 2003-2005 MontaVista Software, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Infra-red driver (SIR/FIR) for the PXA2xx embedded microprocessor
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/types.h>
  17. #include <linux/init.h>
  18. #include <linux/errno.h>
  19. #include <linux/netdevice.h>
  20. #include <linux/slab.h>
  21. #include <linux/rtnetlink.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/pm.h>
  26. #include <net/irda/irda.h>
  27. #include <net/irda/irmod.h>
  28. #include <net/irda/wrapper.h>
  29. #include <net/irda/irda_device.h>
  30. #include <asm/irq.h>
  31. #include <asm/dma.h>
  32. #include <asm/delay.h>
  33. #include <asm/hardware.h>
  34. #include <asm/arch/irda.h>
  35. #include <asm/arch/pxa-regs.h>
  36. #ifdef CONFIG_MACH_MAINSTONE
  37. #include <asm/arch/mainstone.h>
  38. #endif
  39. #define IrSR_RXPL_NEG_IS_ZERO (1<<4)
  40. #define IrSR_RXPL_POS_IS_ZERO 0x0
  41. #define IrSR_TXPL_NEG_IS_ZERO (1<<3)
  42. #define IrSR_TXPL_POS_IS_ZERO 0x0
  43. #define IrSR_XMODE_PULSE_1_6 (1<<2)
  44. #define IrSR_XMODE_PULSE_3_16 0x0
  45. #define IrSR_RCVEIR_IR_MODE (1<<1)
  46. #define IrSR_RCVEIR_UART_MODE 0x0
  47. #define IrSR_XMITIR_IR_MODE (1<<0)
  48. #define IrSR_XMITIR_UART_MODE 0x0
  49. #define IrSR_IR_RECEIVE_ON (\
  50. IrSR_RXPL_NEG_IS_ZERO | \
  51. IrSR_TXPL_POS_IS_ZERO | \
  52. IrSR_XMODE_PULSE_3_16 | \
  53. IrSR_RCVEIR_IR_MODE | \
  54. IrSR_XMITIR_UART_MODE)
  55. #define IrSR_IR_TRANSMIT_ON (\
  56. IrSR_RXPL_NEG_IS_ZERO | \
  57. IrSR_TXPL_POS_IS_ZERO | \
  58. IrSR_XMODE_PULSE_3_16 | \
  59. IrSR_RCVEIR_UART_MODE | \
  60. IrSR_XMITIR_IR_MODE)
  61. struct pxa_irda {
  62. int speed;
  63. int newspeed;
  64. unsigned long last_oscr;
  65. unsigned char *dma_rx_buff;
  66. unsigned char *dma_tx_buff;
  67. dma_addr_t dma_rx_buff_phy;
  68. dma_addr_t dma_tx_buff_phy;
  69. unsigned int dma_tx_buff_len;
  70. int txdma;
  71. int rxdma;
  72. struct net_device_stats stats;
  73. struct irlap_cb *irlap;
  74. struct qos_info qos;
  75. iobuff_t tx_buff;
  76. iobuff_t rx_buff;
  77. struct device *dev;
  78. struct pxaficp_platform_data *pdata;
  79. };
  80. #define IS_FIR(si) ((si)->speed >= 4000000)
  81. #define IRDA_FRAME_SIZE_LIMIT 2047
  82. inline static void pxa_irda_fir_dma_rx_start(struct pxa_irda *si)
  83. {
  84. DCSR(si->rxdma) = DCSR_NODESC;
  85. DSADR(si->rxdma) = __PREG(ICDR);
  86. DTADR(si->rxdma) = si->dma_rx_buff_phy;
  87. DCMD(si->rxdma) = DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_WIDTH1 | DCMD_BURST32 | IRDA_FRAME_SIZE_LIMIT;
  88. DCSR(si->rxdma) |= DCSR_RUN;
  89. }
  90. inline static void pxa_irda_fir_dma_tx_start(struct pxa_irda *si)
  91. {
  92. DCSR(si->txdma) = DCSR_NODESC;
  93. DSADR(si->txdma) = si->dma_tx_buff_phy;
  94. DTADR(si->txdma) = __PREG(ICDR);
  95. DCMD(si->txdma) = DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_ENDIRQEN | DCMD_WIDTH1 | DCMD_BURST32 | si->dma_tx_buff_len;
  96. DCSR(si->txdma) |= DCSR_RUN;
  97. }
  98. /*
  99. * Set the IrDA communications speed.
  100. */
  101. static int pxa_irda_set_speed(struct pxa_irda *si, int speed)
  102. {
  103. unsigned long flags;
  104. unsigned int divisor;
  105. switch (speed) {
  106. case 9600: case 19200: case 38400:
  107. case 57600: case 115200:
  108. /* refer to PXA250/210 Developer's Manual 10-7 */
  109. /* BaudRate = 14.7456 MHz / (16*Divisor) */
  110. divisor = 14745600 / (16 * speed);
  111. local_irq_save(flags);
  112. if (IS_FIR(si)) {
  113. /* stop RX DMA */
  114. DCSR(si->rxdma) &= ~DCSR_RUN;
  115. /* disable FICP */
  116. ICCR0 = 0;
  117. pxa_set_cken(CKEN_FICP, 0);
  118. /* set board transceiver to SIR mode */
  119. si->pdata->transceiver_mode(si->dev, IR_SIRMODE);
  120. /* configure GPIO46/47 */
  121. pxa_gpio_mode(GPIO46_STRXD_MD);
  122. pxa_gpio_mode(GPIO47_STTXD_MD);
  123. /* enable the STUART clock */
  124. pxa_set_cken(CKEN_STUART, 1);
  125. }
  126. /* disable STUART first */
  127. STIER = 0;
  128. /* access DLL & DLH */
  129. STLCR |= LCR_DLAB;
  130. STDLL = divisor & 0xff;
  131. STDLH = divisor >> 8;
  132. STLCR &= ~LCR_DLAB;
  133. si->speed = speed;
  134. STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6;
  135. STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE;
  136. local_irq_restore(flags);
  137. break;
  138. case 4000000:
  139. local_irq_save(flags);
  140. /* disable STUART */
  141. STIER = 0;
  142. STISR = 0;
  143. pxa_set_cken(CKEN_STUART, 0);
  144. /* disable FICP first */
  145. ICCR0 = 0;
  146. /* set board transceiver to FIR mode */
  147. si->pdata->transceiver_mode(si->dev, IR_FIRMODE);
  148. /* configure GPIO46/47 */
  149. pxa_gpio_mode(GPIO46_ICPRXD_MD);
  150. pxa_gpio_mode(GPIO47_ICPTXD_MD);
  151. /* enable the FICP clock */
  152. pxa_set_cken(CKEN_FICP, 1);
  153. si->speed = speed;
  154. pxa_irda_fir_dma_rx_start(si);
  155. ICCR0 = ICCR0_ITR | ICCR0_RXE;
  156. local_irq_restore(flags);
  157. break;
  158. default:
  159. return -EINVAL;
  160. }
  161. return 0;
  162. }
  163. /* SIR interrupt service routine. */
  164. static irqreturn_t pxa_irda_sir_irq(int irq, void *dev_id)
  165. {
  166. struct net_device *dev = dev_id;
  167. struct pxa_irda *si = netdev_priv(dev);
  168. int iir, lsr, data;
  169. iir = STIIR;
  170. switch (iir & 0x0F) {
  171. case 0x06: /* Receiver Line Status */
  172. lsr = STLSR;
  173. while (lsr & LSR_FIFOE) {
  174. data = STRBR;
  175. if (lsr & (LSR_OE | LSR_PE | LSR_FE | LSR_BI)) {
  176. printk(KERN_DEBUG "pxa_ir: sir receiving error\n");
  177. si->stats.rx_errors++;
  178. if (lsr & LSR_FE)
  179. si->stats.rx_frame_errors++;
  180. if (lsr & LSR_OE)
  181. si->stats.rx_fifo_errors++;
  182. } else {
  183. si->stats.rx_bytes++;
  184. async_unwrap_char(dev, &si->stats, &si->rx_buff, data);
  185. }
  186. lsr = STLSR;
  187. }
  188. dev->last_rx = jiffies;
  189. si->last_oscr = OSCR;
  190. break;
  191. case 0x04: /* Received Data Available */
  192. /* forth through */
  193. case 0x0C: /* Character Timeout Indication */
  194. do {
  195. si->stats.rx_bytes++;
  196. async_unwrap_char(dev, &si->stats, &si->rx_buff, STRBR);
  197. } while (STLSR & LSR_DR);
  198. dev->last_rx = jiffies;
  199. si->last_oscr = OSCR;
  200. break;
  201. case 0x02: /* Transmit FIFO Data Request */
  202. while ((si->tx_buff.len) && (STLSR & LSR_TDRQ)) {
  203. STTHR = *si->tx_buff.data++;
  204. si->tx_buff.len -= 1;
  205. }
  206. if (si->tx_buff.len == 0) {
  207. si->stats.tx_packets++;
  208. si->stats.tx_bytes += si->tx_buff.data -
  209. si->tx_buff.head;
  210. /* We need to ensure that the transmitter has finished. */
  211. while ((STLSR & LSR_TEMT) == 0)
  212. cpu_relax();
  213. si->last_oscr = OSCR;
  214. /*
  215. * Ok, we've finished transmitting. Now enable
  216. * the receiver. Sometimes we get a receive IRQ
  217. * immediately after a transmit...
  218. */
  219. if (si->newspeed) {
  220. pxa_irda_set_speed(si, si->newspeed);
  221. si->newspeed = 0;
  222. } else {
  223. /* enable IR Receiver, disable IR Transmitter */
  224. STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6;
  225. /* enable STUART and receive interrupts */
  226. STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE;
  227. }
  228. /* I'm hungry! */
  229. netif_wake_queue(dev);
  230. }
  231. break;
  232. }
  233. return IRQ_HANDLED;
  234. }
  235. /* FIR Receive DMA interrupt handler */
  236. static void pxa_irda_fir_dma_rx_irq(int channel, void *data)
  237. {
  238. int dcsr = DCSR(channel);
  239. DCSR(channel) = dcsr & ~DCSR_RUN;
  240. printk(KERN_DEBUG "pxa_ir: fir rx dma bus error %#x\n", dcsr);
  241. }
  242. /* FIR Transmit DMA interrupt handler */
  243. static void pxa_irda_fir_dma_tx_irq(int channel, void *data)
  244. {
  245. struct net_device *dev = data;
  246. struct pxa_irda *si = netdev_priv(dev);
  247. int dcsr;
  248. dcsr = DCSR(channel);
  249. DCSR(channel) = dcsr & ~DCSR_RUN;
  250. if (dcsr & DCSR_ENDINTR) {
  251. si->stats.tx_packets++;
  252. si->stats.tx_bytes += si->dma_tx_buff_len;
  253. } else {
  254. si->stats.tx_errors++;
  255. }
  256. while (ICSR1 & ICSR1_TBY)
  257. cpu_relax();
  258. si->last_oscr = OSCR;
  259. /*
  260. * HACK: It looks like the TBY bit is dropped too soon.
  261. * Without this delay things break.
  262. */
  263. udelay(120);
  264. if (si->newspeed) {
  265. pxa_irda_set_speed(si, si->newspeed);
  266. si->newspeed = 0;
  267. } else {
  268. int i = 64;
  269. ICCR0 = 0;
  270. pxa_irda_fir_dma_rx_start(si);
  271. while ((ICSR1 & ICSR1_RNE) && i--)
  272. (void)ICDR;
  273. ICCR0 = ICCR0_ITR | ICCR0_RXE;
  274. if (i < 0)
  275. printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n");
  276. }
  277. netif_wake_queue(dev);
  278. }
  279. /* EIF(Error in FIFO/End in Frame) handler for FIR */
  280. static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev, int icsr0)
  281. {
  282. unsigned int len, stat, data;
  283. /* Get the current data position. */
  284. len = DTADR(si->rxdma) - si->dma_rx_buff_phy;
  285. do {
  286. /* Read Status, and then Data. */
  287. stat = ICSR1;
  288. rmb();
  289. data = ICDR;
  290. if (stat & (ICSR1_CRE | ICSR1_ROR)) {
  291. si->stats.rx_errors++;
  292. if (stat & ICSR1_CRE) {
  293. printk(KERN_DEBUG "pxa_ir: fir receive CRC error\n");
  294. si->stats.rx_crc_errors++;
  295. }
  296. if (stat & ICSR1_ROR) {
  297. printk(KERN_DEBUG "pxa_ir: fir receive overrun\n");
  298. si->stats.rx_over_errors++;
  299. }
  300. } else {
  301. si->dma_rx_buff[len++] = data;
  302. }
  303. /* If we hit the end of frame, there's no point in continuing. */
  304. if (stat & ICSR1_EOF)
  305. break;
  306. } while (ICSR0 & ICSR0_EIF);
  307. if (stat & ICSR1_EOF) {
  308. /* end of frame. */
  309. struct sk_buff *skb;
  310. if (icsr0 & ICSR0_FRE) {
  311. printk(KERN_ERR "pxa_ir: dropping erroneous frame\n");
  312. si->stats.rx_dropped++;
  313. return;
  314. }
  315. skb = alloc_skb(len+1,GFP_ATOMIC);
  316. if (!skb) {
  317. printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n");
  318. si->stats.rx_dropped++;
  319. return;
  320. }
  321. /* Align IP header to 20 bytes */
  322. skb_reserve(skb, 1);
  323. skb_copy_to_linear_data(skb, si->dma_rx_buff, len);
  324. skb_put(skb, len);
  325. /* Feed it to IrLAP */
  326. skb->dev = dev;
  327. skb_reset_mac_header(skb);
  328. skb->protocol = htons(ETH_P_IRDA);
  329. netif_rx(skb);
  330. si->stats.rx_packets++;
  331. si->stats.rx_bytes += len;
  332. dev->last_rx = jiffies;
  333. }
  334. }
  335. /* FIR interrupt handler */
  336. static irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id)
  337. {
  338. struct net_device *dev = dev_id;
  339. struct pxa_irda *si = netdev_priv(dev);
  340. int icsr0, i = 64;
  341. /* stop RX DMA */
  342. DCSR(si->rxdma) &= ~DCSR_RUN;
  343. si->last_oscr = OSCR;
  344. icsr0 = ICSR0;
  345. if (icsr0 & (ICSR0_FRE | ICSR0_RAB)) {
  346. if (icsr0 & ICSR0_FRE) {
  347. printk(KERN_DEBUG "pxa_ir: fir receive frame error\n");
  348. si->stats.rx_frame_errors++;
  349. } else {
  350. printk(KERN_DEBUG "pxa_ir: fir receive abort\n");
  351. si->stats.rx_errors++;
  352. }
  353. ICSR0 = icsr0 & (ICSR0_FRE | ICSR0_RAB);
  354. }
  355. if (icsr0 & ICSR0_EIF) {
  356. /* An error in FIFO occured, or there is a end of frame */
  357. pxa_irda_fir_irq_eif(si, dev, icsr0);
  358. }
  359. ICCR0 = 0;
  360. pxa_irda_fir_dma_rx_start(si);
  361. while ((ICSR1 & ICSR1_RNE) && i--)
  362. (void)ICDR;
  363. ICCR0 = ICCR0_ITR | ICCR0_RXE;
  364. if (i < 0)
  365. printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n");
  366. return IRQ_HANDLED;
  367. }
  368. /* hard_xmit interface of irda device */
  369. static int pxa_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev)
  370. {
  371. struct pxa_irda *si = netdev_priv(dev);
  372. int speed = irda_get_next_speed(skb);
  373. /*
  374. * Does this packet contain a request to change the interface
  375. * speed? If so, remember it until we complete the transmission
  376. * of this frame.
  377. */
  378. if (speed != si->speed && speed != -1)
  379. si->newspeed = speed;
  380. /*
  381. * If this is an empty frame, we can bypass a lot.
  382. */
  383. if (skb->len == 0) {
  384. if (si->newspeed) {
  385. si->newspeed = 0;
  386. pxa_irda_set_speed(si, speed);
  387. }
  388. dev_kfree_skb(skb);
  389. return 0;
  390. }
  391. netif_stop_queue(dev);
  392. if (!IS_FIR(si)) {
  393. si->tx_buff.data = si->tx_buff.head;
  394. si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, si->tx_buff.truesize);
  395. /* Disable STUART interrupts and switch to transmit mode. */
  396. STIER = 0;
  397. STISR = IrSR_IR_TRANSMIT_ON | IrSR_XMODE_PULSE_1_6;
  398. /* enable STUART and transmit interrupts */
  399. STIER = IER_UUE | IER_TIE;
  400. } else {
  401. unsigned long mtt = irda_get_mtt(skb);
  402. si->dma_tx_buff_len = skb->len;
  403. skb_copy_from_linear_data(skb, si->dma_tx_buff, skb->len);
  404. if (mtt)
  405. while ((unsigned)(OSCR - si->last_oscr)/4 < mtt)
  406. cpu_relax();
  407. /* stop RX DMA, disable FICP */
  408. DCSR(si->rxdma) &= ~DCSR_RUN;
  409. ICCR0 = 0;
  410. pxa_irda_fir_dma_tx_start(si);
  411. ICCR0 = ICCR0_ITR | ICCR0_TXE;
  412. }
  413. dev_kfree_skb(skb);
  414. dev->trans_start = jiffies;
  415. return 0;
  416. }
  417. static int pxa_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd)
  418. {
  419. struct if_irda_req *rq = (struct if_irda_req *)ifreq;
  420. struct pxa_irda *si = netdev_priv(dev);
  421. int ret;
  422. switch (cmd) {
  423. case SIOCSBANDWIDTH:
  424. ret = -EPERM;
  425. if (capable(CAP_NET_ADMIN)) {
  426. /*
  427. * We are unable to set the speed if the
  428. * device is not running.
  429. */
  430. if (netif_running(dev)) {
  431. ret = pxa_irda_set_speed(si,
  432. rq->ifr_baudrate);
  433. } else {
  434. printk(KERN_INFO "pxa_ir: SIOCSBANDWIDTH: !netif_running\n");
  435. ret = 0;
  436. }
  437. }
  438. break;
  439. case SIOCSMEDIABUSY:
  440. ret = -EPERM;
  441. if (capable(CAP_NET_ADMIN)) {
  442. irda_device_set_media_busy(dev, TRUE);
  443. ret = 0;
  444. }
  445. break;
  446. case SIOCGRECEIVING:
  447. ret = 0;
  448. rq->ifr_receiving = IS_FIR(si) ? 0
  449. : si->rx_buff.state != OUTSIDE_FRAME;
  450. break;
  451. default:
  452. ret = -EOPNOTSUPP;
  453. break;
  454. }
  455. return ret;
  456. }
  457. static struct net_device_stats *pxa_irda_stats(struct net_device *dev)
  458. {
  459. struct pxa_irda *si = netdev_priv(dev);
  460. return &si->stats;
  461. }
  462. static void pxa_irda_startup(struct pxa_irda *si)
  463. {
  464. /* Disable STUART interrupts */
  465. STIER = 0;
  466. /* enable STUART interrupt to the processor */
  467. STMCR = MCR_OUT2;
  468. /* configure SIR frame format: StartBit - Data 7 ... Data 0 - Stop Bit */
  469. STLCR = LCR_WLS0 | LCR_WLS1;
  470. /* enable FIFO, we use FIFO to improve performance */
  471. STFCR = FCR_TRFIFOE | FCR_ITL_32;
  472. /* disable FICP */
  473. ICCR0 = 0;
  474. /* configure FICP ICCR2 */
  475. ICCR2 = ICCR2_TXP | ICCR2_TRIG_32;
  476. /* configure DMAC */
  477. DRCMR17 = si->rxdma | DRCMR_MAPVLD;
  478. DRCMR18 = si->txdma | DRCMR_MAPVLD;
  479. /* force SIR reinitialization */
  480. si->speed = 4000000;
  481. pxa_irda_set_speed(si, 9600);
  482. printk(KERN_DEBUG "pxa_ir: irda startup\n");
  483. }
  484. static void pxa_irda_shutdown(struct pxa_irda *si)
  485. {
  486. unsigned long flags;
  487. local_irq_save(flags);
  488. /* disable STUART and interrupt */
  489. STIER = 0;
  490. /* disable STUART SIR mode */
  491. STISR = 0;
  492. /* disable the STUART clock */
  493. pxa_set_cken(CKEN_STUART, 0);
  494. /* disable DMA */
  495. DCSR(si->txdma) &= ~DCSR_RUN;
  496. DCSR(si->rxdma) &= ~DCSR_RUN;
  497. /* disable FICP */
  498. ICCR0 = 0;
  499. /* disable the FICP clock */
  500. pxa_set_cken(CKEN_FICP, 0);
  501. DRCMR17 = 0;
  502. DRCMR18 = 0;
  503. local_irq_restore(flags);
  504. /* power off board transceiver */
  505. si->pdata->transceiver_mode(si->dev, IR_OFF);
  506. printk(KERN_DEBUG "pxa_ir: irda shutdown\n");
  507. }
  508. static int pxa_irda_start(struct net_device *dev)
  509. {
  510. struct pxa_irda *si = netdev_priv(dev);
  511. int err;
  512. si->speed = 9600;
  513. err = request_irq(IRQ_STUART, pxa_irda_sir_irq, 0, dev->name, dev);
  514. if (err)
  515. goto err_irq1;
  516. err = request_irq(IRQ_ICP, pxa_irda_fir_irq, 0, dev->name, dev);
  517. if (err)
  518. goto err_irq2;
  519. /*
  520. * The interrupt must remain disabled for now.
  521. */
  522. disable_irq(IRQ_STUART);
  523. disable_irq(IRQ_ICP);
  524. err = -EBUSY;
  525. si->rxdma = pxa_request_dma("FICP_RX",DMA_PRIO_LOW, pxa_irda_fir_dma_rx_irq, dev);
  526. if (si->rxdma < 0)
  527. goto err_rx_dma;
  528. si->txdma = pxa_request_dma("FICP_TX",DMA_PRIO_LOW, pxa_irda_fir_dma_tx_irq, dev);
  529. if (si->txdma < 0)
  530. goto err_tx_dma;
  531. err = -ENOMEM;
  532. si->dma_rx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT,
  533. &si->dma_rx_buff_phy, GFP_KERNEL );
  534. if (!si->dma_rx_buff)
  535. goto err_dma_rx_buff;
  536. si->dma_tx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT,
  537. &si->dma_tx_buff_phy, GFP_KERNEL );
  538. if (!si->dma_tx_buff)
  539. goto err_dma_tx_buff;
  540. /* Setup the serial port for the initial speed. */
  541. pxa_irda_startup(si);
  542. /*
  543. * Open a new IrLAP layer instance.
  544. */
  545. si->irlap = irlap_open(dev, &si->qos, "pxa");
  546. err = -ENOMEM;
  547. if (!si->irlap)
  548. goto err_irlap;
  549. /*
  550. * Now enable the interrupt and start the queue
  551. */
  552. enable_irq(IRQ_STUART);
  553. enable_irq(IRQ_ICP);
  554. netif_start_queue(dev);
  555. printk(KERN_DEBUG "pxa_ir: irda driver opened\n");
  556. return 0;
  557. err_irlap:
  558. pxa_irda_shutdown(si);
  559. dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy);
  560. err_dma_tx_buff:
  561. dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy);
  562. err_dma_rx_buff:
  563. pxa_free_dma(si->txdma);
  564. err_tx_dma:
  565. pxa_free_dma(si->rxdma);
  566. err_rx_dma:
  567. free_irq(IRQ_ICP, dev);
  568. err_irq2:
  569. free_irq(IRQ_STUART, dev);
  570. err_irq1:
  571. return err;
  572. }
  573. static int pxa_irda_stop(struct net_device *dev)
  574. {
  575. struct pxa_irda *si = netdev_priv(dev);
  576. netif_stop_queue(dev);
  577. pxa_irda_shutdown(si);
  578. /* Stop IrLAP */
  579. if (si->irlap) {
  580. irlap_close(si->irlap);
  581. si->irlap = NULL;
  582. }
  583. free_irq(IRQ_STUART, dev);
  584. free_irq(IRQ_ICP, dev);
  585. pxa_free_dma(si->rxdma);
  586. pxa_free_dma(si->txdma);
  587. if (si->dma_rx_buff)
  588. dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy);
  589. if (si->dma_tx_buff)
  590. dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy);
  591. printk(KERN_DEBUG "pxa_ir: irda driver closed\n");
  592. return 0;
  593. }
  594. static int pxa_irda_suspend(struct platform_device *_dev, pm_message_t state)
  595. {
  596. struct net_device *dev = platform_get_drvdata(_dev);
  597. struct pxa_irda *si;
  598. if (dev && netif_running(dev)) {
  599. si = netdev_priv(dev);
  600. netif_device_detach(dev);
  601. pxa_irda_shutdown(si);
  602. }
  603. return 0;
  604. }
  605. static int pxa_irda_resume(struct platform_device *_dev)
  606. {
  607. struct net_device *dev = platform_get_drvdata(_dev);
  608. struct pxa_irda *si;
  609. if (dev && netif_running(dev)) {
  610. si = netdev_priv(dev);
  611. pxa_irda_startup(si);
  612. netif_device_attach(dev);
  613. netif_wake_queue(dev);
  614. }
  615. return 0;
  616. }
  617. static int pxa_irda_init_iobuf(iobuff_t *io, int size)
  618. {
  619. io->head = kmalloc(size, GFP_KERNEL | GFP_DMA);
  620. if (io->head != NULL) {
  621. io->truesize = size;
  622. io->in_frame = FALSE;
  623. io->state = OUTSIDE_FRAME;
  624. io->data = io->head;
  625. }
  626. return io->head ? 0 : -ENOMEM;
  627. }
  628. static int pxa_irda_probe(struct platform_device *pdev)
  629. {
  630. struct net_device *dev;
  631. struct pxa_irda *si;
  632. unsigned int baudrate_mask;
  633. int err;
  634. if (!pdev->dev.platform_data)
  635. return -ENODEV;
  636. err = request_mem_region(__PREG(STUART), 0x24, "IrDA") ? 0 : -EBUSY;
  637. if (err)
  638. goto err_mem_1;
  639. err = request_mem_region(__PREG(FICP), 0x1c, "IrDA") ? 0 : -EBUSY;
  640. if (err)
  641. goto err_mem_2;
  642. dev = alloc_irdadev(sizeof(struct pxa_irda));
  643. if (!dev)
  644. goto err_mem_3;
  645. si = netdev_priv(dev);
  646. si->dev = &pdev->dev;
  647. si->pdata = pdev->dev.platform_data;
  648. /*
  649. * Initialise the SIR buffers
  650. */
  651. err = pxa_irda_init_iobuf(&si->rx_buff, 14384);
  652. if (err)
  653. goto err_mem_4;
  654. err = pxa_irda_init_iobuf(&si->tx_buff, 4000);
  655. if (err)
  656. goto err_mem_5;
  657. dev->hard_start_xmit = pxa_irda_hard_xmit;
  658. dev->open = pxa_irda_start;
  659. dev->stop = pxa_irda_stop;
  660. dev->do_ioctl = pxa_irda_ioctl;
  661. dev->get_stats = pxa_irda_stats;
  662. irda_init_max_qos_capabilies(&si->qos);
  663. baudrate_mask = 0;
  664. if (si->pdata->transceiver_cap & IR_SIRMODE)
  665. baudrate_mask |= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200;
  666. if (si->pdata->transceiver_cap & IR_FIRMODE)
  667. baudrate_mask |= IR_4000000 << 8;
  668. si->qos.baud_rate.bits &= baudrate_mask;
  669. si->qos.min_turn_time.bits = 7; /* 1ms or more */
  670. irda_qos_bits_to_value(&si->qos);
  671. err = register_netdev(dev);
  672. if (err == 0)
  673. dev_set_drvdata(&pdev->dev, dev);
  674. if (err) {
  675. kfree(si->tx_buff.head);
  676. err_mem_5:
  677. kfree(si->rx_buff.head);
  678. err_mem_4:
  679. free_netdev(dev);
  680. err_mem_3:
  681. release_mem_region(__PREG(FICP), 0x1c);
  682. err_mem_2:
  683. release_mem_region(__PREG(STUART), 0x24);
  684. }
  685. err_mem_1:
  686. return err;
  687. }
  688. static int pxa_irda_remove(struct platform_device *_dev)
  689. {
  690. struct net_device *dev = platform_get_drvdata(_dev);
  691. if (dev) {
  692. struct pxa_irda *si = netdev_priv(dev);
  693. unregister_netdev(dev);
  694. kfree(si->tx_buff.head);
  695. kfree(si->rx_buff.head);
  696. free_netdev(dev);
  697. }
  698. release_mem_region(__PREG(STUART), 0x24);
  699. release_mem_region(__PREG(FICP), 0x1c);
  700. return 0;
  701. }
  702. static struct platform_driver pxa_ir_driver = {
  703. .driver = {
  704. .name = "pxa2xx-ir",
  705. },
  706. .probe = pxa_irda_probe,
  707. .remove = pxa_irda_remove,
  708. .suspend = pxa_irda_suspend,
  709. .resume = pxa_irda_resume,
  710. };
  711. static int __init pxa_irda_init(void)
  712. {
  713. return platform_driver_register(&pxa_ir_driver);
  714. }
  715. static void __exit pxa_irda_exit(void)
  716. {
  717. platform_driver_unregister(&pxa_ir_driver);
  718. }
  719. module_init(pxa_irda_init);
  720. module_exit(pxa_irda_exit);
  721. MODULE_LICENSE("GPL");