e1000_main.c 152 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328
  1. /*******************************************************************************
  2. Intel PRO/1000 Linux driver
  3. Copyright(c) 1999 - 2006 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. #include <net/ip6_checksum.h>
  23. char e1000_driver_name[] = "e1000";
  24. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  25. #ifndef CONFIG_E1000_NAPI
  26. #define DRIVERNAPI
  27. #else
  28. #define DRIVERNAPI "-NAPI"
  29. #endif
  30. #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
  31. char e1000_driver_version[] = DRV_VERSION;
  32. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  33. /* e1000_pci_tbl - PCI Device ID Table
  34. *
  35. * Last entry must be all 0s
  36. *
  37. * Macro expands to...
  38. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  39. */
  40. static struct pci_device_id e1000_pci_tbl[] = {
  41. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  44. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  45. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  48. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  49. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  59. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  61. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  62. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  65. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  66. INTEL_E1000_ETHERNET_DEVICE(0x1049),
  67. INTEL_E1000_ETHERNET_DEVICE(0x104A),
  68. INTEL_E1000_ETHERNET_DEVICE(0x104B),
  69. INTEL_E1000_ETHERNET_DEVICE(0x104C),
  70. INTEL_E1000_ETHERNET_DEVICE(0x104D),
  71. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  72. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  77. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  78. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  83. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  84. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  86. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  87. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  89. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  90. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  91. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  92. INTEL_E1000_ETHERNET_DEVICE(0x10A4),
  93. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  94. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  95. INTEL_E1000_ETHERNET_DEVICE(0x10BA),
  96. INTEL_E1000_ETHERNET_DEVICE(0x10BB),
  97. INTEL_E1000_ETHERNET_DEVICE(0x10BC),
  98. INTEL_E1000_ETHERNET_DEVICE(0x10C4),
  99. INTEL_E1000_ETHERNET_DEVICE(0x10C5),
  100. /* required last entry */
  101. {0,}
  102. };
  103. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  104. int e1000_up(struct e1000_adapter *adapter);
  105. void e1000_down(struct e1000_adapter *adapter);
  106. void e1000_reinit_locked(struct e1000_adapter *adapter);
  107. void e1000_reset(struct e1000_adapter *adapter);
  108. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  109. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  110. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  111. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  112. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  113. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  114. struct e1000_tx_ring *txdr);
  115. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  116. struct e1000_rx_ring *rxdr);
  117. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  118. struct e1000_tx_ring *tx_ring);
  119. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  120. struct e1000_rx_ring *rx_ring);
  121. void e1000_update_stats(struct e1000_adapter *adapter);
  122. static int e1000_init_module(void);
  123. static void e1000_exit_module(void);
  124. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  125. static void __devexit e1000_remove(struct pci_dev *pdev);
  126. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  127. static int e1000_sw_init(struct e1000_adapter *adapter);
  128. static int e1000_open(struct net_device *netdev);
  129. static int e1000_close(struct net_device *netdev);
  130. static void e1000_configure_tx(struct e1000_adapter *adapter);
  131. static void e1000_configure_rx(struct e1000_adapter *adapter);
  132. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  133. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  134. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  135. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  136. struct e1000_tx_ring *tx_ring);
  137. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  138. struct e1000_rx_ring *rx_ring);
  139. static void e1000_set_multi(struct net_device *netdev);
  140. static void e1000_update_phy_info(unsigned long data);
  141. static void e1000_watchdog(unsigned long data);
  142. static void e1000_82547_tx_fifo_stall(unsigned long data);
  143. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  144. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  145. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  146. static int e1000_set_mac(struct net_device *netdev, void *p);
  147. static irqreturn_t e1000_intr(int irq, void *data);
  148. #ifdef CONFIG_PCI_MSI
  149. static irqreturn_t e1000_intr_msi(int irq, void *data);
  150. #endif
  151. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  152. struct e1000_tx_ring *tx_ring);
  153. #ifdef CONFIG_E1000_NAPI
  154. static int e1000_clean(struct net_device *poll_dev, int *budget);
  155. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  156. struct e1000_rx_ring *rx_ring,
  157. int *work_done, int work_to_do);
  158. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  159. struct e1000_rx_ring *rx_ring,
  160. int *work_done, int work_to_do);
  161. #else
  162. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  163. struct e1000_rx_ring *rx_ring);
  164. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  165. struct e1000_rx_ring *rx_ring);
  166. #endif
  167. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  168. struct e1000_rx_ring *rx_ring,
  169. int cleaned_count);
  170. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  171. struct e1000_rx_ring *rx_ring,
  172. int cleaned_count);
  173. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  174. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  175. int cmd);
  176. void e1000_set_ethtool_ops(struct net_device *netdev);
  177. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  178. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  179. static void e1000_tx_timeout(struct net_device *dev);
  180. static void e1000_reset_task(struct work_struct *work);
  181. static void e1000_smartspeed(struct e1000_adapter *adapter);
  182. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  183. struct sk_buff *skb);
  184. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  185. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  186. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  187. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  188. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  189. #ifdef CONFIG_PM
  190. static int e1000_resume(struct pci_dev *pdev);
  191. #endif
  192. static void e1000_shutdown(struct pci_dev *pdev);
  193. #ifdef CONFIG_NET_POLL_CONTROLLER
  194. /* for netdump / net console */
  195. static void e1000_netpoll (struct net_device *netdev);
  196. #endif
  197. extern void e1000_check_options(struct e1000_adapter *adapter);
  198. #define COPYBREAK_DEFAULT 256
  199. static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
  200. module_param(copybreak, uint, 0644);
  201. MODULE_PARM_DESC(copybreak,
  202. "Maximum size of packet that is copied to a new buffer on receive");
  203. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  204. pci_channel_state_t state);
  205. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  206. static void e1000_io_resume(struct pci_dev *pdev);
  207. static struct pci_error_handlers e1000_err_handler = {
  208. .error_detected = e1000_io_error_detected,
  209. .slot_reset = e1000_io_slot_reset,
  210. .resume = e1000_io_resume,
  211. };
  212. static struct pci_driver e1000_driver = {
  213. .name = e1000_driver_name,
  214. .id_table = e1000_pci_tbl,
  215. .probe = e1000_probe,
  216. .remove = __devexit_p(e1000_remove),
  217. #ifdef CONFIG_PM
  218. /* Power Managment Hooks */
  219. .suspend = e1000_suspend,
  220. .resume = e1000_resume,
  221. #endif
  222. .shutdown = e1000_shutdown,
  223. .err_handler = &e1000_err_handler
  224. };
  225. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  226. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  227. MODULE_LICENSE("GPL");
  228. MODULE_VERSION(DRV_VERSION);
  229. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  230. module_param(debug, int, 0);
  231. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  232. /**
  233. * e1000_init_module - Driver Registration Routine
  234. *
  235. * e1000_init_module is the first routine called when the driver is
  236. * loaded. All it does is register with the PCI subsystem.
  237. **/
  238. static int __init
  239. e1000_init_module(void)
  240. {
  241. int ret;
  242. printk(KERN_INFO "%s - version %s\n",
  243. e1000_driver_string, e1000_driver_version);
  244. printk(KERN_INFO "%s\n", e1000_copyright);
  245. ret = pci_register_driver(&e1000_driver);
  246. if (copybreak != COPYBREAK_DEFAULT) {
  247. if (copybreak == 0)
  248. printk(KERN_INFO "e1000: copybreak disabled\n");
  249. else
  250. printk(KERN_INFO "e1000: copybreak enabled for "
  251. "packets <= %u bytes\n", copybreak);
  252. }
  253. return ret;
  254. }
  255. module_init(e1000_init_module);
  256. /**
  257. * e1000_exit_module - Driver Exit Cleanup Routine
  258. *
  259. * e1000_exit_module is called just before the driver is removed
  260. * from memory.
  261. **/
  262. static void __exit
  263. e1000_exit_module(void)
  264. {
  265. pci_unregister_driver(&e1000_driver);
  266. }
  267. module_exit(e1000_exit_module);
  268. static int e1000_request_irq(struct e1000_adapter *adapter)
  269. {
  270. struct net_device *netdev = adapter->netdev;
  271. int flags, err = 0;
  272. flags = IRQF_SHARED;
  273. #ifdef CONFIG_PCI_MSI
  274. if (adapter->hw.mac_type >= e1000_82571) {
  275. adapter->have_msi = TRUE;
  276. if ((err = pci_enable_msi(adapter->pdev))) {
  277. DPRINTK(PROBE, ERR,
  278. "Unable to allocate MSI interrupt Error: %d\n", err);
  279. adapter->have_msi = FALSE;
  280. }
  281. }
  282. if (adapter->have_msi) {
  283. flags &= ~IRQF_SHARED;
  284. err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags,
  285. netdev->name, netdev);
  286. if (err)
  287. DPRINTK(PROBE, ERR,
  288. "Unable to allocate interrupt Error: %d\n", err);
  289. } else
  290. #endif
  291. if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
  292. netdev->name, netdev)))
  293. DPRINTK(PROBE, ERR,
  294. "Unable to allocate interrupt Error: %d\n", err);
  295. return err;
  296. }
  297. static void e1000_free_irq(struct e1000_adapter *adapter)
  298. {
  299. struct net_device *netdev = adapter->netdev;
  300. free_irq(adapter->pdev->irq, netdev);
  301. #ifdef CONFIG_PCI_MSI
  302. if (adapter->have_msi)
  303. pci_disable_msi(adapter->pdev);
  304. #endif
  305. }
  306. /**
  307. * e1000_irq_disable - Mask off interrupt generation on the NIC
  308. * @adapter: board private structure
  309. **/
  310. static void
  311. e1000_irq_disable(struct e1000_adapter *adapter)
  312. {
  313. atomic_inc(&adapter->irq_sem);
  314. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  315. E1000_WRITE_FLUSH(&adapter->hw);
  316. synchronize_irq(adapter->pdev->irq);
  317. }
  318. /**
  319. * e1000_irq_enable - Enable default interrupt generation settings
  320. * @adapter: board private structure
  321. **/
  322. static void
  323. e1000_irq_enable(struct e1000_adapter *adapter)
  324. {
  325. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  326. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  327. E1000_WRITE_FLUSH(&adapter->hw);
  328. }
  329. }
  330. static void
  331. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  332. {
  333. struct net_device *netdev = adapter->netdev;
  334. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  335. uint16_t old_vid = adapter->mng_vlan_id;
  336. if (adapter->vlgrp) {
  337. if (!vlan_group_get_device(adapter->vlgrp, vid)) {
  338. if (adapter->hw.mng_cookie.status &
  339. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  340. e1000_vlan_rx_add_vid(netdev, vid);
  341. adapter->mng_vlan_id = vid;
  342. } else
  343. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  344. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  345. (vid != old_vid) &&
  346. !vlan_group_get_device(adapter->vlgrp, old_vid))
  347. e1000_vlan_rx_kill_vid(netdev, old_vid);
  348. } else
  349. adapter->mng_vlan_id = vid;
  350. }
  351. }
  352. /**
  353. * e1000_release_hw_control - release control of the h/w to f/w
  354. * @adapter: address of board private structure
  355. *
  356. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  357. * For ASF and Pass Through versions of f/w this means that the
  358. * driver is no longer loaded. For AMT version (only with 82573) i
  359. * of the f/w this means that the network i/f is closed.
  360. *
  361. **/
  362. static void
  363. e1000_release_hw_control(struct e1000_adapter *adapter)
  364. {
  365. uint32_t ctrl_ext;
  366. uint32_t swsm;
  367. /* Let firmware taken over control of h/w */
  368. switch (adapter->hw.mac_type) {
  369. case e1000_82573:
  370. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  371. E1000_WRITE_REG(&adapter->hw, SWSM,
  372. swsm & ~E1000_SWSM_DRV_LOAD);
  373. break;
  374. case e1000_82571:
  375. case e1000_82572:
  376. case e1000_80003es2lan:
  377. case e1000_ich8lan:
  378. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  379. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  380. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  381. break;
  382. default:
  383. break;
  384. }
  385. }
  386. /**
  387. * e1000_get_hw_control - get control of the h/w from f/w
  388. * @adapter: address of board private structure
  389. *
  390. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  391. * For ASF and Pass Through versions of f/w this means that
  392. * the driver is loaded. For AMT version (only with 82573)
  393. * of the f/w this means that the network i/f is open.
  394. *
  395. **/
  396. static void
  397. e1000_get_hw_control(struct e1000_adapter *adapter)
  398. {
  399. uint32_t ctrl_ext;
  400. uint32_t swsm;
  401. /* Let firmware know the driver has taken over */
  402. switch (adapter->hw.mac_type) {
  403. case e1000_82573:
  404. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  405. E1000_WRITE_REG(&adapter->hw, SWSM,
  406. swsm | E1000_SWSM_DRV_LOAD);
  407. break;
  408. case e1000_82571:
  409. case e1000_82572:
  410. case e1000_80003es2lan:
  411. case e1000_ich8lan:
  412. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  413. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  414. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  415. break;
  416. default:
  417. break;
  418. }
  419. }
  420. static void
  421. e1000_init_manageability(struct e1000_adapter *adapter)
  422. {
  423. if (adapter->en_mng_pt) {
  424. uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
  425. /* disable hardware interception of ARP */
  426. manc &= ~(E1000_MANC_ARP_EN);
  427. /* enable receiving management packets to the host */
  428. /* this will probably generate destination unreachable messages
  429. * from the host OS, but the packets will be handled on SMBUS */
  430. if (adapter->hw.has_manc2h) {
  431. uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
  432. manc |= E1000_MANC_EN_MNG2HOST;
  433. #define E1000_MNG2HOST_PORT_623 (1 << 5)
  434. #define E1000_MNG2HOST_PORT_664 (1 << 6)
  435. manc2h |= E1000_MNG2HOST_PORT_623;
  436. manc2h |= E1000_MNG2HOST_PORT_664;
  437. E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
  438. }
  439. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  440. }
  441. }
  442. static void
  443. e1000_release_manageability(struct e1000_adapter *adapter)
  444. {
  445. if (adapter->en_mng_pt) {
  446. uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
  447. /* re-enable hardware interception of ARP */
  448. manc |= E1000_MANC_ARP_EN;
  449. if (adapter->hw.has_manc2h)
  450. manc &= ~E1000_MANC_EN_MNG2HOST;
  451. /* don't explicitly have to mess with MANC2H since
  452. * MANC has an enable disable that gates MANC2H */
  453. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  454. }
  455. }
  456. /**
  457. * e1000_configure - configure the hardware for RX and TX
  458. * @adapter = private board structure
  459. **/
  460. static void e1000_configure(struct e1000_adapter *adapter)
  461. {
  462. struct net_device *netdev = adapter->netdev;
  463. int i;
  464. e1000_set_multi(netdev);
  465. e1000_restore_vlan(adapter);
  466. e1000_init_manageability(adapter);
  467. e1000_configure_tx(adapter);
  468. e1000_setup_rctl(adapter);
  469. e1000_configure_rx(adapter);
  470. /* call E1000_DESC_UNUSED which always leaves
  471. * at least 1 descriptor unused to make sure
  472. * next_to_use != next_to_clean */
  473. for (i = 0; i < adapter->num_rx_queues; i++) {
  474. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  475. adapter->alloc_rx_buf(adapter, ring,
  476. E1000_DESC_UNUSED(ring));
  477. }
  478. adapter->tx_queue_len = netdev->tx_queue_len;
  479. }
  480. int e1000_up(struct e1000_adapter *adapter)
  481. {
  482. /* hardware has been reset, we need to reload some things */
  483. e1000_configure(adapter);
  484. clear_bit(__E1000_DOWN, &adapter->flags);
  485. #ifdef CONFIG_E1000_NAPI
  486. netif_poll_enable(adapter->netdev);
  487. #endif
  488. e1000_irq_enable(adapter);
  489. /* fire a link change interrupt to start the watchdog */
  490. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
  491. return 0;
  492. }
  493. /**
  494. * e1000_power_up_phy - restore link in case the phy was powered down
  495. * @adapter: address of board private structure
  496. *
  497. * The phy may be powered down to save power and turn off link when the
  498. * driver is unloaded and wake on lan is not enabled (among others)
  499. * *** this routine MUST be followed by a call to e1000_reset ***
  500. *
  501. **/
  502. void e1000_power_up_phy(struct e1000_adapter *adapter)
  503. {
  504. uint16_t mii_reg = 0;
  505. /* Just clear the power down bit to wake the phy back up */
  506. if (adapter->hw.media_type == e1000_media_type_copper) {
  507. /* according to the manual, the phy will retain its
  508. * settings across a power-down/up cycle */
  509. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  510. mii_reg &= ~MII_CR_POWER_DOWN;
  511. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  512. }
  513. }
  514. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  515. {
  516. /* Power down the PHY so no link is implied when interface is down *
  517. * The PHY cannot be powered down if any of the following is TRUE *
  518. * (a) WoL is enabled
  519. * (b) AMT is active
  520. * (c) SoL/IDER session is active */
  521. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  522. adapter->hw.media_type == e1000_media_type_copper) {
  523. uint16_t mii_reg = 0;
  524. switch (adapter->hw.mac_type) {
  525. case e1000_82540:
  526. case e1000_82545:
  527. case e1000_82545_rev_3:
  528. case e1000_82546:
  529. case e1000_82546_rev_3:
  530. case e1000_82541:
  531. case e1000_82541_rev_2:
  532. case e1000_82547:
  533. case e1000_82547_rev_2:
  534. if (E1000_READ_REG(&adapter->hw, MANC) &
  535. E1000_MANC_SMBUS_EN)
  536. goto out;
  537. break;
  538. case e1000_82571:
  539. case e1000_82572:
  540. case e1000_82573:
  541. case e1000_80003es2lan:
  542. case e1000_ich8lan:
  543. if (e1000_check_mng_mode(&adapter->hw) ||
  544. e1000_check_phy_reset_block(&adapter->hw))
  545. goto out;
  546. break;
  547. default:
  548. goto out;
  549. }
  550. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  551. mii_reg |= MII_CR_POWER_DOWN;
  552. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  553. mdelay(1);
  554. }
  555. out:
  556. return;
  557. }
  558. void
  559. e1000_down(struct e1000_adapter *adapter)
  560. {
  561. struct net_device *netdev = adapter->netdev;
  562. /* signal that we're down so the interrupt handler does not
  563. * reschedule our watchdog timer */
  564. set_bit(__E1000_DOWN, &adapter->flags);
  565. #ifdef CONFIG_E1000_NAPI
  566. netif_poll_disable(netdev);
  567. #endif
  568. e1000_irq_disable(adapter);
  569. del_timer_sync(&adapter->tx_fifo_stall_timer);
  570. del_timer_sync(&adapter->watchdog_timer);
  571. del_timer_sync(&adapter->phy_info_timer);
  572. netdev->tx_queue_len = adapter->tx_queue_len;
  573. adapter->link_speed = 0;
  574. adapter->link_duplex = 0;
  575. netif_carrier_off(netdev);
  576. netif_stop_queue(netdev);
  577. e1000_reset(adapter);
  578. e1000_clean_all_tx_rings(adapter);
  579. e1000_clean_all_rx_rings(adapter);
  580. }
  581. void
  582. e1000_reinit_locked(struct e1000_adapter *adapter)
  583. {
  584. WARN_ON(in_interrupt());
  585. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  586. msleep(1);
  587. e1000_down(adapter);
  588. e1000_up(adapter);
  589. clear_bit(__E1000_RESETTING, &adapter->flags);
  590. }
  591. void
  592. e1000_reset(struct e1000_adapter *adapter)
  593. {
  594. uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
  595. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  596. boolean_t legacy_pba_adjust = FALSE;
  597. /* Repartition Pba for greater than 9k mtu
  598. * To take effect CTRL.RST is required.
  599. */
  600. switch (adapter->hw.mac_type) {
  601. case e1000_82542_rev2_0:
  602. case e1000_82542_rev2_1:
  603. case e1000_82543:
  604. case e1000_82544:
  605. case e1000_82540:
  606. case e1000_82541:
  607. case e1000_82541_rev_2:
  608. legacy_pba_adjust = TRUE;
  609. pba = E1000_PBA_48K;
  610. break;
  611. case e1000_82545:
  612. case e1000_82545_rev_3:
  613. case e1000_82546:
  614. case e1000_82546_rev_3:
  615. pba = E1000_PBA_48K;
  616. break;
  617. case e1000_82547:
  618. case e1000_82547_rev_2:
  619. legacy_pba_adjust = TRUE;
  620. pba = E1000_PBA_30K;
  621. break;
  622. case e1000_82571:
  623. case e1000_82572:
  624. case e1000_80003es2lan:
  625. pba = E1000_PBA_38K;
  626. break;
  627. case e1000_82573:
  628. pba = E1000_PBA_20K;
  629. break;
  630. case e1000_ich8lan:
  631. pba = E1000_PBA_8K;
  632. case e1000_undefined:
  633. case e1000_num_macs:
  634. break;
  635. }
  636. if (legacy_pba_adjust == TRUE) {
  637. if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
  638. pba -= 8; /* allocate more FIFO for Tx */
  639. if (adapter->hw.mac_type == e1000_82547) {
  640. adapter->tx_fifo_head = 0;
  641. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  642. adapter->tx_fifo_size =
  643. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  644. atomic_set(&adapter->tx_fifo_stall, 0);
  645. }
  646. } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
  647. /* adjust PBA for jumbo frames */
  648. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  649. /* To maintain wire speed transmits, the Tx FIFO should be
  650. * large enough to accomodate two full transmit packets,
  651. * rounded up to the next 1KB and expressed in KB. Likewise,
  652. * the Rx FIFO should be large enough to accomodate at least
  653. * one full receive packet and is similarly rounded up and
  654. * expressed in KB. */
  655. pba = E1000_READ_REG(&adapter->hw, PBA);
  656. /* upper 16 bits has Tx packet buffer allocation size in KB */
  657. tx_space = pba >> 16;
  658. /* lower 16 bits has Rx packet buffer allocation size in KB */
  659. pba &= 0xffff;
  660. /* don't include ethernet FCS because hardware appends/strips */
  661. min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
  662. VLAN_TAG_SIZE;
  663. min_tx_space = min_rx_space;
  664. min_tx_space *= 2;
  665. min_tx_space = ALIGN(min_tx_space, 1024);
  666. min_tx_space >>= 10;
  667. min_rx_space = ALIGN(min_rx_space, 1024);
  668. min_rx_space >>= 10;
  669. /* If current Tx allocation is less than the min Tx FIFO size,
  670. * and the min Tx FIFO size is less than the current Rx FIFO
  671. * allocation, take space away from current Rx allocation */
  672. if (tx_space < min_tx_space &&
  673. ((min_tx_space - tx_space) < pba)) {
  674. pba = pba - (min_tx_space - tx_space);
  675. /* PCI/PCIx hardware has PBA alignment constraints */
  676. switch (adapter->hw.mac_type) {
  677. case e1000_82545 ... e1000_82546_rev_3:
  678. pba &= ~(E1000_PBA_8K - 1);
  679. break;
  680. default:
  681. break;
  682. }
  683. /* if short on rx space, rx wins and must trump tx
  684. * adjustment or use Early Receive if available */
  685. if (pba < min_rx_space) {
  686. switch (adapter->hw.mac_type) {
  687. case e1000_82573:
  688. /* ERT enabled in e1000_configure_rx */
  689. break;
  690. default:
  691. pba = min_rx_space;
  692. break;
  693. }
  694. }
  695. }
  696. }
  697. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  698. /* flow control settings */
  699. /* Set the FC high water mark to 90% of the FIFO size.
  700. * Required to clear last 3 LSB */
  701. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  702. /* We can't use 90% on small FIFOs because the remainder
  703. * would be less than 1 full frame. In this case, we size
  704. * it to allow at least a full frame above the high water
  705. * mark. */
  706. if (pba < E1000_PBA_16K)
  707. fc_high_water_mark = (pba * 1024) - 1600;
  708. adapter->hw.fc_high_water = fc_high_water_mark;
  709. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  710. if (adapter->hw.mac_type == e1000_80003es2lan)
  711. adapter->hw.fc_pause_time = 0xFFFF;
  712. else
  713. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  714. adapter->hw.fc_send_xon = 1;
  715. adapter->hw.fc = adapter->hw.original_fc;
  716. /* Allow time for pending master requests to run */
  717. e1000_reset_hw(&adapter->hw);
  718. if (adapter->hw.mac_type >= e1000_82544)
  719. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  720. if (e1000_init_hw(&adapter->hw))
  721. DPRINTK(PROBE, ERR, "Hardware Error\n");
  722. e1000_update_mng_vlan(adapter);
  723. /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
  724. if (adapter->hw.mac_type >= e1000_82544 &&
  725. adapter->hw.mac_type <= e1000_82547_rev_2 &&
  726. adapter->hw.autoneg == 1 &&
  727. adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
  728. uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  729. /* clear phy power management bit if we are in gig only mode,
  730. * which if enabled will attempt negotiation to 100Mb, which
  731. * can cause a loss of link at power off or driver unload */
  732. ctrl &= ~E1000_CTRL_SWDPIN3;
  733. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  734. }
  735. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  736. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  737. e1000_reset_adaptive(&adapter->hw);
  738. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  739. if (!adapter->smart_power_down &&
  740. (adapter->hw.mac_type == e1000_82571 ||
  741. adapter->hw.mac_type == e1000_82572)) {
  742. uint16_t phy_data = 0;
  743. /* speed up time to link by disabling smart power down, ignore
  744. * the return value of this function because there is nothing
  745. * different we would do if it failed */
  746. e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  747. &phy_data);
  748. phy_data &= ~IGP02E1000_PM_SPD;
  749. e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  750. phy_data);
  751. }
  752. e1000_release_manageability(adapter);
  753. }
  754. /**
  755. * e1000_probe - Device Initialization Routine
  756. * @pdev: PCI device information struct
  757. * @ent: entry in e1000_pci_tbl
  758. *
  759. * Returns 0 on success, negative on failure
  760. *
  761. * e1000_probe initializes an adapter identified by a pci_dev structure.
  762. * The OS initialization, configuring of the adapter private structure,
  763. * and a hardware reset occur.
  764. **/
  765. static int __devinit
  766. e1000_probe(struct pci_dev *pdev,
  767. const struct pci_device_id *ent)
  768. {
  769. struct net_device *netdev;
  770. struct e1000_adapter *adapter;
  771. unsigned long mmio_start, mmio_len;
  772. unsigned long flash_start, flash_len;
  773. static int cards_found = 0;
  774. static int global_quad_port_a = 0; /* global ksp3 port a indication */
  775. int i, err, pci_using_dac;
  776. uint16_t eeprom_data = 0;
  777. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  778. if ((err = pci_enable_device(pdev)))
  779. return err;
  780. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  781. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  782. pci_using_dac = 1;
  783. } else {
  784. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
  785. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  786. E1000_ERR("No usable DMA configuration, aborting\n");
  787. goto err_dma;
  788. }
  789. pci_using_dac = 0;
  790. }
  791. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  792. goto err_pci_reg;
  793. pci_set_master(pdev);
  794. err = -ENOMEM;
  795. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  796. if (!netdev)
  797. goto err_alloc_etherdev;
  798. SET_MODULE_OWNER(netdev);
  799. SET_NETDEV_DEV(netdev, &pdev->dev);
  800. pci_set_drvdata(pdev, netdev);
  801. adapter = netdev_priv(netdev);
  802. adapter->netdev = netdev;
  803. adapter->pdev = pdev;
  804. adapter->hw.back = adapter;
  805. adapter->msg_enable = (1 << debug) - 1;
  806. mmio_start = pci_resource_start(pdev, BAR_0);
  807. mmio_len = pci_resource_len(pdev, BAR_0);
  808. err = -EIO;
  809. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  810. if (!adapter->hw.hw_addr)
  811. goto err_ioremap;
  812. for (i = BAR_1; i <= BAR_5; i++) {
  813. if (pci_resource_len(pdev, i) == 0)
  814. continue;
  815. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  816. adapter->hw.io_base = pci_resource_start(pdev, i);
  817. break;
  818. }
  819. }
  820. netdev->open = &e1000_open;
  821. netdev->stop = &e1000_close;
  822. netdev->hard_start_xmit = &e1000_xmit_frame;
  823. netdev->get_stats = &e1000_get_stats;
  824. netdev->set_multicast_list = &e1000_set_multi;
  825. netdev->set_mac_address = &e1000_set_mac;
  826. netdev->change_mtu = &e1000_change_mtu;
  827. netdev->do_ioctl = &e1000_ioctl;
  828. e1000_set_ethtool_ops(netdev);
  829. netdev->tx_timeout = &e1000_tx_timeout;
  830. netdev->watchdog_timeo = 5 * HZ;
  831. #ifdef CONFIG_E1000_NAPI
  832. netdev->poll = &e1000_clean;
  833. netdev->weight = 64;
  834. #endif
  835. netdev->vlan_rx_register = e1000_vlan_rx_register;
  836. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  837. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  838. #ifdef CONFIG_NET_POLL_CONTROLLER
  839. netdev->poll_controller = e1000_netpoll;
  840. #endif
  841. strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
  842. netdev->mem_start = mmio_start;
  843. netdev->mem_end = mmio_start + mmio_len;
  844. netdev->base_addr = adapter->hw.io_base;
  845. adapter->bd_number = cards_found;
  846. /* setup the private structure */
  847. if ((err = e1000_sw_init(adapter)))
  848. goto err_sw_init;
  849. err = -EIO;
  850. /* Flash BAR mapping must happen after e1000_sw_init
  851. * because it depends on mac_type */
  852. if ((adapter->hw.mac_type == e1000_ich8lan) &&
  853. (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
  854. flash_start = pci_resource_start(pdev, 1);
  855. flash_len = pci_resource_len(pdev, 1);
  856. adapter->hw.flash_address = ioremap(flash_start, flash_len);
  857. if (!adapter->hw.flash_address)
  858. goto err_flashmap;
  859. }
  860. if (e1000_check_phy_reset_block(&adapter->hw))
  861. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  862. if (adapter->hw.mac_type >= e1000_82543) {
  863. netdev->features = NETIF_F_SG |
  864. NETIF_F_HW_CSUM |
  865. NETIF_F_HW_VLAN_TX |
  866. NETIF_F_HW_VLAN_RX |
  867. NETIF_F_HW_VLAN_FILTER;
  868. if (adapter->hw.mac_type == e1000_ich8lan)
  869. netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
  870. }
  871. if ((adapter->hw.mac_type >= e1000_82544) &&
  872. (adapter->hw.mac_type != e1000_82547))
  873. netdev->features |= NETIF_F_TSO;
  874. if (adapter->hw.mac_type > e1000_82547_rev_2)
  875. netdev->features |= NETIF_F_TSO6;
  876. if (pci_using_dac)
  877. netdev->features |= NETIF_F_HIGHDMA;
  878. netdev->features |= NETIF_F_LLTX;
  879. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  880. /* initialize eeprom parameters */
  881. if (e1000_init_eeprom_params(&adapter->hw)) {
  882. E1000_ERR("EEPROM initialization failed\n");
  883. goto err_eeprom;
  884. }
  885. /* before reading the EEPROM, reset the controller to
  886. * put the device in a known good starting state */
  887. e1000_reset_hw(&adapter->hw);
  888. /* make sure the EEPROM is good */
  889. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  890. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  891. goto err_eeprom;
  892. }
  893. /* copy the MAC address out of the EEPROM */
  894. if (e1000_read_mac_addr(&adapter->hw))
  895. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  896. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  897. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  898. if (!is_valid_ether_addr(netdev->perm_addr)) {
  899. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  900. goto err_eeprom;
  901. }
  902. e1000_get_bus_info(&adapter->hw);
  903. init_timer(&adapter->tx_fifo_stall_timer);
  904. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  905. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  906. init_timer(&adapter->watchdog_timer);
  907. adapter->watchdog_timer.function = &e1000_watchdog;
  908. adapter->watchdog_timer.data = (unsigned long) adapter;
  909. init_timer(&adapter->phy_info_timer);
  910. adapter->phy_info_timer.function = &e1000_update_phy_info;
  911. adapter->phy_info_timer.data = (unsigned long) adapter;
  912. INIT_WORK(&adapter->reset_task, e1000_reset_task);
  913. e1000_check_options(adapter);
  914. /* Initial Wake on LAN setting
  915. * If APM wake is enabled in the EEPROM,
  916. * enable the ACPI Magic Packet filter
  917. */
  918. switch (adapter->hw.mac_type) {
  919. case e1000_82542_rev2_0:
  920. case e1000_82542_rev2_1:
  921. case e1000_82543:
  922. break;
  923. case e1000_82544:
  924. e1000_read_eeprom(&adapter->hw,
  925. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  926. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  927. break;
  928. case e1000_ich8lan:
  929. e1000_read_eeprom(&adapter->hw,
  930. EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
  931. eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
  932. break;
  933. case e1000_82546:
  934. case e1000_82546_rev_3:
  935. case e1000_82571:
  936. case e1000_80003es2lan:
  937. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  938. e1000_read_eeprom(&adapter->hw,
  939. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  940. break;
  941. }
  942. /* Fall Through */
  943. default:
  944. e1000_read_eeprom(&adapter->hw,
  945. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  946. break;
  947. }
  948. if (eeprom_data & eeprom_apme_mask)
  949. adapter->eeprom_wol |= E1000_WUFC_MAG;
  950. /* now that we have the eeprom settings, apply the special cases
  951. * where the eeprom may be wrong or the board simply won't support
  952. * wake on lan on a particular port */
  953. switch (pdev->device) {
  954. case E1000_DEV_ID_82546GB_PCIE:
  955. adapter->eeprom_wol = 0;
  956. break;
  957. case E1000_DEV_ID_82546EB_FIBER:
  958. case E1000_DEV_ID_82546GB_FIBER:
  959. case E1000_DEV_ID_82571EB_FIBER:
  960. /* Wake events only supported on port A for dual fiber
  961. * regardless of eeprom setting */
  962. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
  963. adapter->eeprom_wol = 0;
  964. break;
  965. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  966. case E1000_DEV_ID_82571EB_QUAD_COPPER:
  967. case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
  968. /* if quad port adapter, disable WoL on all but port A */
  969. if (global_quad_port_a != 0)
  970. adapter->eeprom_wol = 0;
  971. else
  972. adapter->quad_port_a = 1;
  973. /* Reset for multiple quad port adapters */
  974. if (++global_quad_port_a == 4)
  975. global_quad_port_a = 0;
  976. break;
  977. }
  978. /* initialize the wol settings based on the eeprom settings */
  979. adapter->wol = adapter->eeprom_wol;
  980. /* print bus type/speed/width info */
  981. {
  982. struct e1000_hw *hw = &adapter->hw;
  983. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  984. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  985. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  986. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  987. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  988. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  989. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  990. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  991. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  992. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  993. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  994. "32-bit"));
  995. }
  996. for (i = 0; i < 6; i++)
  997. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  998. /* reset the hardware with the new settings */
  999. e1000_reset(adapter);
  1000. /* If the controller is 82573 and f/w is AMT, do not set
  1001. * DRV_LOAD until the interface is up. For all other cases,
  1002. * let the f/w know that the h/w is now under the control
  1003. * of the driver. */
  1004. if (adapter->hw.mac_type != e1000_82573 ||
  1005. !e1000_check_mng_mode(&adapter->hw))
  1006. e1000_get_hw_control(adapter);
  1007. strcpy(netdev->name, "eth%d");
  1008. if ((err = register_netdev(netdev)))
  1009. goto err_register;
  1010. /* tell the stack to leave us alone until e1000_open() is called */
  1011. netif_carrier_off(netdev);
  1012. netif_stop_queue(netdev);
  1013. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  1014. cards_found++;
  1015. return 0;
  1016. err_register:
  1017. e1000_release_hw_control(adapter);
  1018. err_eeprom:
  1019. if (!e1000_check_phy_reset_block(&adapter->hw))
  1020. e1000_phy_hw_reset(&adapter->hw);
  1021. if (adapter->hw.flash_address)
  1022. iounmap(adapter->hw.flash_address);
  1023. err_flashmap:
  1024. #ifdef CONFIG_E1000_NAPI
  1025. for (i = 0; i < adapter->num_rx_queues; i++)
  1026. dev_put(&adapter->polling_netdev[i]);
  1027. #endif
  1028. kfree(adapter->tx_ring);
  1029. kfree(adapter->rx_ring);
  1030. #ifdef CONFIG_E1000_NAPI
  1031. kfree(adapter->polling_netdev);
  1032. #endif
  1033. err_sw_init:
  1034. iounmap(adapter->hw.hw_addr);
  1035. err_ioremap:
  1036. free_netdev(netdev);
  1037. err_alloc_etherdev:
  1038. pci_release_regions(pdev);
  1039. err_pci_reg:
  1040. err_dma:
  1041. pci_disable_device(pdev);
  1042. return err;
  1043. }
  1044. /**
  1045. * e1000_remove - Device Removal Routine
  1046. * @pdev: PCI device information struct
  1047. *
  1048. * e1000_remove is called by the PCI subsystem to alert the driver
  1049. * that it should release a PCI device. The could be caused by a
  1050. * Hot-Plug event, or because the driver is going to be removed from
  1051. * memory.
  1052. **/
  1053. static void __devexit
  1054. e1000_remove(struct pci_dev *pdev)
  1055. {
  1056. struct net_device *netdev = pci_get_drvdata(pdev);
  1057. struct e1000_adapter *adapter = netdev_priv(netdev);
  1058. #ifdef CONFIG_E1000_NAPI
  1059. int i;
  1060. #endif
  1061. cancel_work_sync(&adapter->reset_task);
  1062. e1000_release_manageability(adapter);
  1063. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  1064. * would have already happened in close and is redundant. */
  1065. e1000_release_hw_control(adapter);
  1066. unregister_netdev(netdev);
  1067. #ifdef CONFIG_E1000_NAPI
  1068. for (i = 0; i < adapter->num_rx_queues; i++)
  1069. dev_put(&adapter->polling_netdev[i]);
  1070. #endif
  1071. if (!e1000_check_phy_reset_block(&adapter->hw))
  1072. e1000_phy_hw_reset(&adapter->hw);
  1073. kfree(adapter->tx_ring);
  1074. kfree(adapter->rx_ring);
  1075. #ifdef CONFIG_E1000_NAPI
  1076. kfree(adapter->polling_netdev);
  1077. #endif
  1078. iounmap(adapter->hw.hw_addr);
  1079. if (adapter->hw.flash_address)
  1080. iounmap(adapter->hw.flash_address);
  1081. pci_release_regions(pdev);
  1082. free_netdev(netdev);
  1083. pci_disable_device(pdev);
  1084. }
  1085. /**
  1086. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  1087. * @adapter: board private structure to initialize
  1088. *
  1089. * e1000_sw_init initializes the Adapter private data structure.
  1090. * Fields are initialized based on PCI device information and
  1091. * OS network device settings (MTU size).
  1092. **/
  1093. static int __devinit
  1094. e1000_sw_init(struct e1000_adapter *adapter)
  1095. {
  1096. struct e1000_hw *hw = &adapter->hw;
  1097. struct net_device *netdev = adapter->netdev;
  1098. struct pci_dev *pdev = adapter->pdev;
  1099. #ifdef CONFIG_E1000_NAPI
  1100. int i;
  1101. #endif
  1102. /* PCI config space info */
  1103. hw->vendor_id = pdev->vendor;
  1104. hw->device_id = pdev->device;
  1105. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  1106. hw->subsystem_id = pdev->subsystem_device;
  1107. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  1108. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  1109. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  1110. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  1111. hw->max_frame_size = netdev->mtu +
  1112. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  1113. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  1114. /* identify the MAC */
  1115. if (e1000_set_mac_type(hw)) {
  1116. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  1117. return -EIO;
  1118. }
  1119. switch (hw->mac_type) {
  1120. default:
  1121. break;
  1122. case e1000_82541:
  1123. case e1000_82547:
  1124. case e1000_82541_rev_2:
  1125. case e1000_82547_rev_2:
  1126. hw->phy_init_script = 1;
  1127. break;
  1128. }
  1129. e1000_set_media_type(hw);
  1130. hw->wait_autoneg_complete = FALSE;
  1131. hw->tbi_compatibility_en = TRUE;
  1132. hw->adaptive_ifs = TRUE;
  1133. /* Copper options */
  1134. if (hw->media_type == e1000_media_type_copper) {
  1135. hw->mdix = AUTO_ALL_MODES;
  1136. hw->disable_polarity_correction = FALSE;
  1137. hw->master_slave = E1000_MASTER_SLAVE;
  1138. }
  1139. adapter->num_tx_queues = 1;
  1140. adapter->num_rx_queues = 1;
  1141. if (e1000_alloc_queues(adapter)) {
  1142. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  1143. return -ENOMEM;
  1144. }
  1145. #ifdef CONFIG_E1000_NAPI
  1146. for (i = 0; i < adapter->num_rx_queues; i++) {
  1147. adapter->polling_netdev[i].priv = adapter;
  1148. adapter->polling_netdev[i].poll = &e1000_clean;
  1149. adapter->polling_netdev[i].weight = 64;
  1150. dev_hold(&adapter->polling_netdev[i]);
  1151. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  1152. }
  1153. spin_lock_init(&adapter->tx_queue_lock);
  1154. #endif
  1155. atomic_set(&adapter->irq_sem, 1);
  1156. spin_lock_init(&adapter->stats_lock);
  1157. set_bit(__E1000_DOWN, &adapter->flags);
  1158. return 0;
  1159. }
  1160. /**
  1161. * e1000_alloc_queues - Allocate memory for all rings
  1162. * @adapter: board private structure to initialize
  1163. *
  1164. * We allocate one ring per queue at run-time since we don't know the
  1165. * number of queues at compile-time. The polling_netdev array is
  1166. * intended for Multiqueue, but should work fine with a single queue.
  1167. **/
  1168. static int __devinit
  1169. e1000_alloc_queues(struct e1000_adapter *adapter)
  1170. {
  1171. adapter->tx_ring = kcalloc(adapter->num_tx_queues,
  1172. sizeof(struct e1000_tx_ring), GFP_KERNEL);
  1173. if (!adapter->tx_ring)
  1174. return -ENOMEM;
  1175. adapter->rx_ring = kcalloc(adapter->num_rx_queues,
  1176. sizeof(struct e1000_rx_ring), GFP_KERNEL);
  1177. if (!adapter->rx_ring) {
  1178. kfree(adapter->tx_ring);
  1179. return -ENOMEM;
  1180. }
  1181. #ifdef CONFIG_E1000_NAPI
  1182. adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
  1183. sizeof(struct net_device),
  1184. GFP_KERNEL);
  1185. if (!adapter->polling_netdev) {
  1186. kfree(adapter->tx_ring);
  1187. kfree(adapter->rx_ring);
  1188. return -ENOMEM;
  1189. }
  1190. #endif
  1191. return E1000_SUCCESS;
  1192. }
  1193. /**
  1194. * e1000_open - Called when a network interface is made active
  1195. * @netdev: network interface device structure
  1196. *
  1197. * Returns 0 on success, negative value on failure
  1198. *
  1199. * The open entry point is called when a network interface is made
  1200. * active by the system (IFF_UP). At this point all resources needed
  1201. * for transmit and receive operations are allocated, the interrupt
  1202. * handler is registered with the OS, the watchdog timer is started,
  1203. * and the stack is notified that the interface is ready.
  1204. **/
  1205. static int
  1206. e1000_open(struct net_device *netdev)
  1207. {
  1208. struct e1000_adapter *adapter = netdev_priv(netdev);
  1209. int err;
  1210. /* disallow open during test */
  1211. if (test_bit(__E1000_TESTING, &adapter->flags))
  1212. return -EBUSY;
  1213. /* allocate transmit descriptors */
  1214. err = e1000_setup_all_tx_resources(adapter);
  1215. if (err)
  1216. goto err_setup_tx;
  1217. /* allocate receive descriptors */
  1218. err = e1000_setup_all_rx_resources(adapter);
  1219. if (err)
  1220. goto err_setup_rx;
  1221. e1000_power_up_phy(adapter);
  1222. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1223. if ((adapter->hw.mng_cookie.status &
  1224. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1225. e1000_update_mng_vlan(adapter);
  1226. }
  1227. /* If AMT is enabled, let the firmware know that the network
  1228. * interface is now open */
  1229. if (adapter->hw.mac_type == e1000_82573 &&
  1230. e1000_check_mng_mode(&adapter->hw))
  1231. e1000_get_hw_control(adapter);
  1232. /* before we allocate an interrupt, we must be ready to handle it.
  1233. * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
  1234. * as soon as we call pci_request_irq, so we have to setup our
  1235. * clean_rx handler before we do so. */
  1236. e1000_configure(adapter);
  1237. err = e1000_request_irq(adapter);
  1238. if (err)
  1239. goto err_req_irq;
  1240. /* From here on the code is the same as e1000_up() */
  1241. clear_bit(__E1000_DOWN, &adapter->flags);
  1242. #ifdef CONFIG_E1000_NAPI
  1243. netif_poll_enable(netdev);
  1244. #endif
  1245. e1000_irq_enable(adapter);
  1246. /* fire a link status change interrupt to start the watchdog */
  1247. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
  1248. return E1000_SUCCESS;
  1249. err_req_irq:
  1250. e1000_release_hw_control(adapter);
  1251. e1000_power_down_phy(adapter);
  1252. e1000_free_all_rx_resources(adapter);
  1253. err_setup_rx:
  1254. e1000_free_all_tx_resources(adapter);
  1255. err_setup_tx:
  1256. e1000_reset(adapter);
  1257. return err;
  1258. }
  1259. /**
  1260. * e1000_close - Disables a network interface
  1261. * @netdev: network interface device structure
  1262. *
  1263. * Returns 0, this is not allowed to fail
  1264. *
  1265. * The close entry point is called when an interface is de-activated
  1266. * by the OS. The hardware is still under the drivers control, but
  1267. * needs to be disabled. A global MAC reset is issued to stop the
  1268. * hardware, and all transmit and receive resources are freed.
  1269. **/
  1270. static int
  1271. e1000_close(struct net_device *netdev)
  1272. {
  1273. struct e1000_adapter *adapter = netdev_priv(netdev);
  1274. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1275. e1000_down(adapter);
  1276. e1000_power_down_phy(adapter);
  1277. e1000_free_irq(adapter);
  1278. e1000_free_all_tx_resources(adapter);
  1279. e1000_free_all_rx_resources(adapter);
  1280. /* kill manageability vlan ID if supported, but not if a vlan with
  1281. * the same ID is registered on the host OS (let 8021q kill it) */
  1282. if ((adapter->hw.mng_cookie.status &
  1283. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  1284. !(adapter->vlgrp &&
  1285. vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
  1286. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1287. }
  1288. /* If AMT is enabled, let the firmware know that the network
  1289. * interface is now closed */
  1290. if (adapter->hw.mac_type == e1000_82573 &&
  1291. e1000_check_mng_mode(&adapter->hw))
  1292. e1000_release_hw_control(adapter);
  1293. return 0;
  1294. }
  1295. /**
  1296. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1297. * @adapter: address of board private structure
  1298. * @start: address of beginning of memory
  1299. * @len: length of memory
  1300. **/
  1301. static boolean_t
  1302. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1303. void *start, unsigned long len)
  1304. {
  1305. unsigned long begin = (unsigned long) start;
  1306. unsigned long end = begin + len;
  1307. /* First rev 82545 and 82546 need to not allow any memory
  1308. * write location to cross 64k boundary due to errata 23 */
  1309. if (adapter->hw.mac_type == e1000_82545 ||
  1310. adapter->hw.mac_type == e1000_82546) {
  1311. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1312. }
  1313. return TRUE;
  1314. }
  1315. /**
  1316. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1317. * @adapter: board private structure
  1318. * @txdr: tx descriptor ring (for a specific queue) to setup
  1319. *
  1320. * Return 0 on success, negative on failure
  1321. **/
  1322. static int
  1323. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1324. struct e1000_tx_ring *txdr)
  1325. {
  1326. struct pci_dev *pdev = adapter->pdev;
  1327. int size;
  1328. size = sizeof(struct e1000_buffer) * txdr->count;
  1329. txdr->buffer_info = vmalloc(size);
  1330. if (!txdr->buffer_info) {
  1331. DPRINTK(PROBE, ERR,
  1332. "Unable to allocate memory for the transmit descriptor ring\n");
  1333. return -ENOMEM;
  1334. }
  1335. memset(txdr->buffer_info, 0, size);
  1336. /* round up to nearest 4K */
  1337. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1338. txdr->size = ALIGN(txdr->size, 4096);
  1339. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1340. if (!txdr->desc) {
  1341. setup_tx_desc_die:
  1342. vfree(txdr->buffer_info);
  1343. DPRINTK(PROBE, ERR,
  1344. "Unable to allocate memory for the transmit descriptor ring\n");
  1345. return -ENOMEM;
  1346. }
  1347. /* Fix for errata 23, can't cross 64kB boundary */
  1348. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1349. void *olddesc = txdr->desc;
  1350. dma_addr_t olddma = txdr->dma;
  1351. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1352. "at %p\n", txdr->size, txdr->desc);
  1353. /* Try again, without freeing the previous */
  1354. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1355. /* Failed allocation, critical failure */
  1356. if (!txdr->desc) {
  1357. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1358. goto setup_tx_desc_die;
  1359. }
  1360. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1361. /* give up */
  1362. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1363. txdr->dma);
  1364. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1365. DPRINTK(PROBE, ERR,
  1366. "Unable to allocate aligned memory "
  1367. "for the transmit descriptor ring\n");
  1368. vfree(txdr->buffer_info);
  1369. return -ENOMEM;
  1370. } else {
  1371. /* Free old allocation, new allocation was successful */
  1372. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1373. }
  1374. }
  1375. memset(txdr->desc, 0, txdr->size);
  1376. txdr->next_to_use = 0;
  1377. txdr->next_to_clean = 0;
  1378. spin_lock_init(&txdr->tx_lock);
  1379. return 0;
  1380. }
  1381. /**
  1382. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1383. * (Descriptors) for all queues
  1384. * @adapter: board private structure
  1385. *
  1386. * Return 0 on success, negative on failure
  1387. **/
  1388. int
  1389. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1390. {
  1391. int i, err = 0;
  1392. for (i = 0; i < adapter->num_tx_queues; i++) {
  1393. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1394. if (err) {
  1395. DPRINTK(PROBE, ERR,
  1396. "Allocation for Tx Queue %u failed\n", i);
  1397. for (i-- ; i >= 0; i--)
  1398. e1000_free_tx_resources(adapter,
  1399. &adapter->tx_ring[i]);
  1400. break;
  1401. }
  1402. }
  1403. return err;
  1404. }
  1405. /**
  1406. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1407. * @adapter: board private structure
  1408. *
  1409. * Configure the Tx unit of the MAC after a reset.
  1410. **/
  1411. static void
  1412. e1000_configure_tx(struct e1000_adapter *adapter)
  1413. {
  1414. uint64_t tdba;
  1415. struct e1000_hw *hw = &adapter->hw;
  1416. uint32_t tdlen, tctl, tipg, tarc;
  1417. uint32_t ipgr1, ipgr2;
  1418. /* Setup the HW Tx Head and Tail descriptor pointers */
  1419. switch (adapter->num_tx_queues) {
  1420. case 1:
  1421. default:
  1422. tdba = adapter->tx_ring[0].dma;
  1423. tdlen = adapter->tx_ring[0].count *
  1424. sizeof(struct e1000_tx_desc);
  1425. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1426. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1427. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1428. E1000_WRITE_REG(hw, TDT, 0);
  1429. E1000_WRITE_REG(hw, TDH, 0);
  1430. adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
  1431. adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
  1432. break;
  1433. }
  1434. /* Set the default values for the Tx Inter Packet Gap timer */
  1435. if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
  1436. (hw->media_type == e1000_media_type_fiber ||
  1437. hw->media_type == e1000_media_type_internal_serdes))
  1438. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1439. else
  1440. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1441. switch (hw->mac_type) {
  1442. case e1000_82542_rev2_0:
  1443. case e1000_82542_rev2_1:
  1444. tipg = DEFAULT_82542_TIPG_IPGT;
  1445. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1446. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1447. break;
  1448. case e1000_80003es2lan:
  1449. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1450. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1451. break;
  1452. default:
  1453. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1454. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1455. break;
  1456. }
  1457. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1458. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1459. E1000_WRITE_REG(hw, TIPG, tipg);
  1460. /* Set the Tx Interrupt Delay register */
  1461. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1462. if (hw->mac_type >= e1000_82540)
  1463. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1464. /* Program the Transmit Control Register */
  1465. tctl = E1000_READ_REG(hw, TCTL);
  1466. tctl &= ~E1000_TCTL_CT;
  1467. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1468. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1469. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1470. tarc = E1000_READ_REG(hw, TARC0);
  1471. /* set the speed mode bit, we'll clear it if we're not at
  1472. * gigabit link later */
  1473. tarc |= (1 << 21);
  1474. E1000_WRITE_REG(hw, TARC0, tarc);
  1475. } else if (hw->mac_type == e1000_80003es2lan) {
  1476. tarc = E1000_READ_REG(hw, TARC0);
  1477. tarc |= 1;
  1478. E1000_WRITE_REG(hw, TARC0, tarc);
  1479. tarc = E1000_READ_REG(hw, TARC1);
  1480. tarc |= 1;
  1481. E1000_WRITE_REG(hw, TARC1, tarc);
  1482. }
  1483. e1000_config_collision_dist(hw);
  1484. /* Setup Transmit Descriptor Settings for eop descriptor */
  1485. adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
  1486. /* only set IDE if we are delaying interrupts using the timers */
  1487. if (adapter->tx_int_delay)
  1488. adapter->txd_cmd |= E1000_TXD_CMD_IDE;
  1489. if (hw->mac_type < e1000_82543)
  1490. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1491. else
  1492. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1493. /* Cache if we're 82544 running in PCI-X because we'll
  1494. * need this to apply a workaround later in the send path. */
  1495. if (hw->mac_type == e1000_82544 &&
  1496. hw->bus_type == e1000_bus_type_pcix)
  1497. adapter->pcix_82544 = 1;
  1498. E1000_WRITE_REG(hw, TCTL, tctl);
  1499. }
  1500. /**
  1501. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1502. * @adapter: board private structure
  1503. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1504. *
  1505. * Returns 0 on success, negative on failure
  1506. **/
  1507. static int
  1508. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1509. struct e1000_rx_ring *rxdr)
  1510. {
  1511. struct pci_dev *pdev = adapter->pdev;
  1512. int size, desc_len;
  1513. size = sizeof(struct e1000_buffer) * rxdr->count;
  1514. rxdr->buffer_info = vmalloc(size);
  1515. if (!rxdr->buffer_info) {
  1516. DPRINTK(PROBE, ERR,
  1517. "Unable to allocate memory for the receive descriptor ring\n");
  1518. return -ENOMEM;
  1519. }
  1520. memset(rxdr->buffer_info, 0, size);
  1521. rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
  1522. GFP_KERNEL);
  1523. if (!rxdr->ps_page) {
  1524. vfree(rxdr->buffer_info);
  1525. DPRINTK(PROBE, ERR,
  1526. "Unable to allocate memory for the receive descriptor ring\n");
  1527. return -ENOMEM;
  1528. }
  1529. rxdr->ps_page_dma = kcalloc(rxdr->count,
  1530. sizeof(struct e1000_ps_page_dma),
  1531. GFP_KERNEL);
  1532. if (!rxdr->ps_page_dma) {
  1533. vfree(rxdr->buffer_info);
  1534. kfree(rxdr->ps_page);
  1535. DPRINTK(PROBE, ERR,
  1536. "Unable to allocate memory for the receive descriptor ring\n");
  1537. return -ENOMEM;
  1538. }
  1539. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1540. desc_len = sizeof(struct e1000_rx_desc);
  1541. else
  1542. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1543. /* Round up to nearest 4K */
  1544. rxdr->size = rxdr->count * desc_len;
  1545. rxdr->size = ALIGN(rxdr->size, 4096);
  1546. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1547. if (!rxdr->desc) {
  1548. DPRINTK(PROBE, ERR,
  1549. "Unable to allocate memory for the receive descriptor ring\n");
  1550. setup_rx_desc_die:
  1551. vfree(rxdr->buffer_info);
  1552. kfree(rxdr->ps_page);
  1553. kfree(rxdr->ps_page_dma);
  1554. return -ENOMEM;
  1555. }
  1556. /* Fix for errata 23, can't cross 64kB boundary */
  1557. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1558. void *olddesc = rxdr->desc;
  1559. dma_addr_t olddma = rxdr->dma;
  1560. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1561. "at %p\n", rxdr->size, rxdr->desc);
  1562. /* Try again, without freeing the previous */
  1563. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1564. /* Failed allocation, critical failure */
  1565. if (!rxdr->desc) {
  1566. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1567. DPRINTK(PROBE, ERR,
  1568. "Unable to allocate memory "
  1569. "for the receive descriptor ring\n");
  1570. goto setup_rx_desc_die;
  1571. }
  1572. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1573. /* give up */
  1574. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1575. rxdr->dma);
  1576. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1577. DPRINTK(PROBE, ERR,
  1578. "Unable to allocate aligned memory "
  1579. "for the receive descriptor ring\n");
  1580. goto setup_rx_desc_die;
  1581. } else {
  1582. /* Free old allocation, new allocation was successful */
  1583. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1584. }
  1585. }
  1586. memset(rxdr->desc, 0, rxdr->size);
  1587. rxdr->next_to_clean = 0;
  1588. rxdr->next_to_use = 0;
  1589. return 0;
  1590. }
  1591. /**
  1592. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1593. * (Descriptors) for all queues
  1594. * @adapter: board private structure
  1595. *
  1596. * Return 0 on success, negative on failure
  1597. **/
  1598. int
  1599. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1600. {
  1601. int i, err = 0;
  1602. for (i = 0; i < adapter->num_rx_queues; i++) {
  1603. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1604. if (err) {
  1605. DPRINTK(PROBE, ERR,
  1606. "Allocation for Rx Queue %u failed\n", i);
  1607. for (i-- ; i >= 0; i--)
  1608. e1000_free_rx_resources(adapter,
  1609. &adapter->rx_ring[i]);
  1610. break;
  1611. }
  1612. }
  1613. return err;
  1614. }
  1615. /**
  1616. * e1000_setup_rctl - configure the receive control registers
  1617. * @adapter: Board private structure
  1618. **/
  1619. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1620. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1621. static void
  1622. e1000_setup_rctl(struct e1000_adapter *adapter)
  1623. {
  1624. uint32_t rctl, rfctl;
  1625. uint32_t psrctl = 0;
  1626. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1627. uint32_t pages = 0;
  1628. #endif
  1629. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1630. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1631. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1632. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1633. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1634. if (adapter->hw.tbi_compatibility_on == 1)
  1635. rctl |= E1000_RCTL_SBP;
  1636. else
  1637. rctl &= ~E1000_RCTL_SBP;
  1638. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1639. rctl &= ~E1000_RCTL_LPE;
  1640. else
  1641. rctl |= E1000_RCTL_LPE;
  1642. /* Setup buffer sizes */
  1643. rctl &= ~E1000_RCTL_SZ_4096;
  1644. rctl |= E1000_RCTL_BSEX;
  1645. switch (adapter->rx_buffer_len) {
  1646. case E1000_RXBUFFER_256:
  1647. rctl |= E1000_RCTL_SZ_256;
  1648. rctl &= ~E1000_RCTL_BSEX;
  1649. break;
  1650. case E1000_RXBUFFER_512:
  1651. rctl |= E1000_RCTL_SZ_512;
  1652. rctl &= ~E1000_RCTL_BSEX;
  1653. break;
  1654. case E1000_RXBUFFER_1024:
  1655. rctl |= E1000_RCTL_SZ_1024;
  1656. rctl &= ~E1000_RCTL_BSEX;
  1657. break;
  1658. case E1000_RXBUFFER_2048:
  1659. default:
  1660. rctl |= E1000_RCTL_SZ_2048;
  1661. rctl &= ~E1000_RCTL_BSEX;
  1662. break;
  1663. case E1000_RXBUFFER_4096:
  1664. rctl |= E1000_RCTL_SZ_4096;
  1665. break;
  1666. case E1000_RXBUFFER_8192:
  1667. rctl |= E1000_RCTL_SZ_8192;
  1668. break;
  1669. case E1000_RXBUFFER_16384:
  1670. rctl |= E1000_RCTL_SZ_16384;
  1671. break;
  1672. }
  1673. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1674. /* 82571 and greater support packet-split where the protocol
  1675. * header is placed in skb->data and the packet data is
  1676. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1677. * In the case of a non-split, skb->data is linearly filled,
  1678. * followed by the page buffers. Therefore, skb->data is
  1679. * sized to hold the largest protocol header.
  1680. */
  1681. /* allocations using alloc_page take too long for regular MTU
  1682. * so only enable packet split for jumbo frames */
  1683. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1684. if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
  1685. PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
  1686. adapter->rx_ps_pages = pages;
  1687. else
  1688. adapter->rx_ps_pages = 0;
  1689. #endif
  1690. if (adapter->rx_ps_pages) {
  1691. /* Configure extra packet-split registers */
  1692. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1693. rfctl |= E1000_RFCTL_EXTEN;
  1694. /* disable packet split support for IPv6 extension headers,
  1695. * because some malformed IPv6 headers can hang the RX */
  1696. rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
  1697. E1000_RFCTL_NEW_IPV6_EXT_DIS);
  1698. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1699. rctl |= E1000_RCTL_DTYP_PS;
  1700. psrctl |= adapter->rx_ps_bsize0 >>
  1701. E1000_PSRCTL_BSIZE0_SHIFT;
  1702. switch (adapter->rx_ps_pages) {
  1703. case 3:
  1704. psrctl |= PAGE_SIZE <<
  1705. E1000_PSRCTL_BSIZE3_SHIFT;
  1706. case 2:
  1707. psrctl |= PAGE_SIZE <<
  1708. E1000_PSRCTL_BSIZE2_SHIFT;
  1709. case 1:
  1710. psrctl |= PAGE_SIZE >>
  1711. E1000_PSRCTL_BSIZE1_SHIFT;
  1712. break;
  1713. }
  1714. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1715. }
  1716. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1717. }
  1718. /**
  1719. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1720. * @adapter: board private structure
  1721. *
  1722. * Configure the Rx unit of the MAC after a reset.
  1723. **/
  1724. static void
  1725. e1000_configure_rx(struct e1000_adapter *adapter)
  1726. {
  1727. uint64_t rdba;
  1728. struct e1000_hw *hw = &adapter->hw;
  1729. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1730. if (adapter->rx_ps_pages) {
  1731. /* this is a 32 byte descriptor */
  1732. rdlen = adapter->rx_ring[0].count *
  1733. sizeof(union e1000_rx_desc_packet_split);
  1734. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1735. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1736. } else {
  1737. rdlen = adapter->rx_ring[0].count *
  1738. sizeof(struct e1000_rx_desc);
  1739. adapter->clean_rx = e1000_clean_rx_irq;
  1740. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1741. }
  1742. /* disable receives while setting up the descriptors */
  1743. rctl = E1000_READ_REG(hw, RCTL);
  1744. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1745. /* set the Receive Delay Timer Register */
  1746. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1747. if (hw->mac_type >= e1000_82540) {
  1748. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1749. if (adapter->itr_setting != 0)
  1750. E1000_WRITE_REG(hw, ITR,
  1751. 1000000000 / (adapter->itr * 256));
  1752. }
  1753. if (hw->mac_type >= e1000_82571) {
  1754. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1755. /* Reset delay timers after every interrupt */
  1756. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1757. #ifdef CONFIG_E1000_NAPI
  1758. /* Auto-Mask interrupts upon ICR access */
  1759. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1760. E1000_WRITE_REG(hw, IAM, 0xffffffff);
  1761. #endif
  1762. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1763. E1000_WRITE_FLUSH(hw);
  1764. }
  1765. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1766. * the Base and Length of the Rx Descriptor Ring */
  1767. switch (adapter->num_rx_queues) {
  1768. case 1:
  1769. default:
  1770. rdba = adapter->rx_ring[0].dma;
  1771. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1772. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1773. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1774. E1000_WRITE_REG(hw, RDT, 0);
  1775. E1000_WRITE_REG(hw, RDH, 0);
  1776. adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
  1777. adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
  1778. break;
  1779. }
  1780. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1781. if (hw->mac_type >= e1000_82543) {
  1782. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1783. if (adapter->rx_csum == TRUE) {
  1784. rxcsum |= E1000_RXCSUM_TUOFL;
  1785. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1786. * Must be used in conjunction with packet-split. */
  1787. if ((hw->mac_type >= e1000_82571) &&
  1788. (adapter->rx_ps_pages)) {
  1789. rxcsum |= E1000_RXCSUM_IPPCSE;
  1790. }
  1791. } else {
  1792. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1793. /* don't need to clear IPPCSE as it defaults to 0 */
  1794. }
  1795. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1796. }
  1797. /* enable early receives on 82573, only takes effect if using > 2048
  1798. * byte total frame size. for example only for jumbo frames */
  1799. #define E1000_ERT_2048 0x100
  1800. if (hw->mac_type == e1000_82573)
  1801. E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
  1802. /* Enable Receives */
  1803. E1000_WRITE_REG(hw, RCTL, rctl);
  1804. }
  1805. /**
  1806. * e1000_free_tx_resources - Free Tx Resources per Queue
  1807. * @adapter: board private structure
  1808. * @tx_ring: Tx descriptor ring for a specific queue
  1809. *
  1810. * Free all transmit software resources
  1811. **/
  1812. static void
  1813. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1814. struct e1000_tx_ring *tx_ring)
  1815. {
  1816. struct pci_dev *pdev = adapter->pdev;
  1817. e1000_clean_tx_ring(adapter, tx_ring);
  1818. vfree(tx_ring->buffer_info);
  1819. tx_ring->buffer_info = NULL;
  1820. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1821. tx_ring->desc = NULL;
  1822. }
  1823. /**
  1824. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1825. * @adapter: board private structure
  1826. *
  1827. * Free all transmit software resources
  1828. **/
  1829. void
  1830. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1831. {
  1832. int i;
  1833. for (i = 0; i < adapter->num_tx_queues; i++)
  1834. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1835. }
  1836. static void
  1837. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1838. struct e1000_buffer *buffer_info)
  1839. {
  1840. if (buffer_info->dma) {
  1841. pci_unmap_page(adapter->pdev,
  1842. buffer_info->dma,
  1843. buffer_info->length,
  1844. PCI_DMA_TODEVICE);
  1845. buffer_info->dma = 0;
  1846. }
  1847. if (buffer_info->skb) {
  1848. dev_kfree_skb_any(buffer_info->skb);
  1849. buffer_info->skb = NULL;
  1850. }
  1851. /* buffer_info must be completely set up in the transmit path */
  1852. }
  1853. /**
  1854. * e1000_clean_tx_ring - Free Tx Buffers
  1855. * @adapter: board private structure
  1856. * @tx_ring: ring to be cleaned
  1857. **/
  1858. static void
  1859. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1860. struct e1000_tx_ring *tx_ring)
  1861. {
  1862. struct e1000_buffer *buffer_info;
  1863. unsigned long size;
  1864. unsigned int i;
  1865. /* Free all the Tx ring sk_buffs */
  1866. for (i = 0; i < tx_ring->count; i++) {
  1867. buffer_info = &tx_ring->buffer_info[i];
  1868. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1869. }
  1870. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1871. memset(tx_ring->buffer_info, 0, size);
  1872. /* Zero out the descriptor ring */
  1873. memset(tx_ring->desc, 0, tx_ring->size);
  1874. tx_ring->next_to_use = 0;
  1875. tx_ring->next_to_clean = 0;
  1876. tx_ring->last_tx_tso = 0;
  1877. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1878. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1879. }
  1880. /**
  1881. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1882. * @adapter: board private structure
  1883. **/
  1884. static void
  1885. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1886. {
  1887. int i;
  1888. for (i = 0; i < adapter->num_tx_queues; i++)
  1889. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1890. }
  1891. /**
  1892. * e1000_free_rx_resources - Free Rx Resources
  1893. * @adapter: board private structure
  1894. * @rx_ring: ring to clean the resources from
  1895. *
  1896. * Free all receive software resources
  1897. **/
  1898. static void
  1899. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1900. struct e1000_rx_ring *rx_ring)
  1901. {
  1902. struct pci_dev *pdev = adapter->pdev;
  1903. e1000_clean_rx_ring(adapter, rx_ring);
  1904. vfree(rx_ring->buffer_info);
  1905. rx_ring->buffer_info = NULL;
  1906. kfree(rx_ring->ps_page);
  1907. rx_ring->ps_page = NULL;
  1908. kfree(rx_ring->ps_page_dma);
  1909. rx_ring->ps_page_dma = NULL;
  1910. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1911. rx_ring->desc = NULL;
  1912. }
  1913. /**
  1914. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1915. * @adapter: board private structure
  1916. *
  1917. * Free all receive software resources
  1918. **/
  1919. void
  1920. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1921. {
  1922. int i;
  1923. for (i = 0; i < adapter->num_rx_queues; i++)
  1924. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1925. }
  1926. /**
  1927. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1928. * @adapter: board private structure
  1929. * @rx_ring: ring to free buffers from
  1930. **/
  1931. static void
  1932. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1933. struct e1000_rx_ring *rx_ring)
  1934. {
  1935. struct e1000_buffer *buffer_info;
  1936. struct e1000_ps_page *ps_page;
  1937. struct e1000_ps_page_dma *ps_page_dma;
  1938. struct pci_dev *pdev = adapter->pdev;
  1939. unsigned long size;
  1940. unsigned int i, j;
  1941. /* Free all the Rx ring sk_buffs */
  1942. for (i = 0; i < rx_ring->count; i++) {
  1943. buffer_info = &rx_ring->buffer_info[i];
  1944. if (buffer_info->skb) {
  1945. pci_unmap_single(pdev,
  1946. buffer_info->dma,
  1947. buffer_info->length,
  1948. PCI_DMA_FROMDEVICE);
  1949. dev_kfree_skb(buffer_info->skb);
  1950. buffer_info->skb = NULL;
  1951. }
  1952. ps_page = &rx_ring->ps_page[i];
  1953. ps_page_dma = &rx_ring->ps_page_dma[i];
  1954. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1955. if (!ps_page->ps_page[j]) break;
  1956. pci_unmap_page(pdev,
  1957. ps_page_dma->ps_page_dma[j],
  1958. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1959. ps_page_dma->ps_page_dma[j] = 0;
  1960. put_page(ps_page->ps_page[j]);
  1961. ps_page->ps_page[j] = NULL;
  1962. }
  1963. }
  1964. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1965. memset(rx_ring->buffer_info, 0, size);
  1966. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1967. memset(rx_ring->ps_page, 0, size);
  1968. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1969. memset(rx_ring->ps_page_dma, 0, size);
  1970. /* Zero out the descriptor ring */
  1971. memset(rx_ring->desc, 0, rx_ring->size);
  1972. rx_ring->next_to_clean = 0;
  1973. rx_ring->next_to_use = 0;
  1974. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1975. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1976. }
  1977. /**
  1978. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1979. * @adapter: board private structure
  1980. **/
  1981. static void
  1982. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1983. {
  1984. int i;
  1985. for (i = 0; i < adapter->num_rx_queues; i++)
  1986. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1987. }
  1988. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1989. * and memory write and invalidate disabled for certain operations
  1990. */
  1991. static void
  1992. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1993. {
  1994. struct net_device *netdev = adapter->netdev;
  1995. uint32_t rctl;
  1996. e1000_pci_clear_mwi(&adapter->hw);
  1997. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1998. rctl |= E1000_RCTL_RST;
  1999. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  2000. E1000_WRITE_FLUSH(&adapter->hw);
  2001. mdelay(5);
  2002. if (netif_running(netdev))
  2003. e1000_clean_all_rx_rings(adapter);
  2004. }
  2005. static void
  2006. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  2007. {
  2008. struct net_device *netdev = adapter->netdev;
  2009. uint32_t rctl;
  2010. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  2011. rctl &= ~E1000_RCTL_RST;
  2012. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  2013. E1000_WRITE_FLUSH(&adapter->hw);
  2014. mdelay(5);
  2015. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  2016. e1000_pci_set_mwi(&adapter->hw);
  2017. if (netif_running(netdev)) {
  2018. /* No need to loop, because 82542 supports only 1 queue */
  2019. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  2020. e1000_configure_rx(adapter);
  2021. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  2022. }
  2023. }
  2024. /**
  2025. * e1000_set_mac - Change the Ethernet Address of the NIC
  2026. * @netdev: network interface device structure
  2027. * @p: pointer to an address structure
  2028. *
  2029. * Returns 0 on success, negative on failure
  2030. **/
  2031. static int
  2032. e1000_set_mac(struct net_device *netdev, void *p)
  2033. {
  2034. struct e1000_adapter *adapter = netdev_priv(netdev);
  2035. struct sockaddr *addr = p;
  2036. if (!is_valid_ether_addr(addr->sa_data))
  2037. return -EADDRNOTAVAIL;
  2038. /* 82542 2.0 needs to be in reset to write receive address registers */
  2039. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  2040. e1000_enter_82542_rst(adapter);
  2041. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  2042. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  2043. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2044. /* With 82571 controllers, LAA may be overwritten (with the default)
  2045. * due to controller reset from the other port. */
  2046. if (adapter->hw.mac_type == e1000_82571) {
  2047. /* activate the work around */
  2048. adapter->hw.laa_is_present = 1;
  2049. /* Hold a copy of the LAA in RAR[14] This is done so that
  2050. * between the time RAR[0] gets clobbered and the time it
  2051. * gets fixed (in e1000_watchdog), the actual LAA is in one
  2052. * of the RARs and no incoming packets directed to this port
  2053. * are dropped. Eventaully the LAA will be in RAR[0] and
  2054. * RAR[14] */
  2055. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  2056. E1000_RAR_ENTRIES - 1);
  2057. }
  2058. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  2059. e1000_leave_82542_rst(adapter);
  2060. return 0;
  2061. }
  2062. /**
  2063. * e1000_set_multi - Multicast and Promiscuous mode set
  2064. * @netdev: network interface device structure
  2065. *
  2066. * The set_multi entry point is called whenever the multicast address
  2067. * list or the network interface flags are updated. This routine is
  2068. * responsible for configuring the hardware for proper multicast,
  2069. * promiscuous mode, and all-multi behavior.
  2070. **/
  2071. static void
  2072. e1000_set_multi(struct net_device *netdev)
  2073. {
  2074. struct e1000_adapter *adapter = netdev_priv(netdev);
  2075. struct e1000_hw *hw = &adapter->hw;
  2076. struct dev_mc_list *mc_ptr;
  2077. uint32_t rctl;
  2078. uint32_t hash_value;
  2079. int i, rar_entries = E1000_RAR_ENTRIES;
  2080. int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
  2081. E1000_NUM_MTA_REGISTERS_ICH8LAN :
  2082. E1000_NUM_MTA_REGISTERS;
  2083. if (adapter->hw.mac_type == e1000_ich8lan)
  2084. rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
  2085. /* reserve RAR[14] for LAA over-write work-around */
  2086. if (adapter->hw.mac_type == e1000_82571)
  2087. rar_entries--;
  2088. /* Check for Promiscuous and All Multicast modes */
  2089. rctl = E1000_READ_REG(hw, RCTL);
  2090. if (netdev->flags & IFF_PROMISC) {
  2091. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  2092. } else if (netdev->flags & IFF_ALLMULTI) {
  2093. rctl |= E1000_RCTL_MPE;
  2094. rctl &= ~E1000_RCTL_UPE;
  2095. } else {
  2096. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  2097. }
  2098. E1000_WRITE_REG(hw, RCTL, rctl);
  2099. /* 82542 2.0 needs to be in reset to write receive address registers */
  2100. if (hw->mac_type == e1000_82542_rev2_0)
  2101. e1000_enter_82542_rst(adapter);
  2102. /* load the first 14 multicast address into the exact filters 1-14
  2103. * RAR 0 is used for the station MAC adddress
  2104. * if there are not 14 addresses, go ahead and clear the filters
  2105. * -- with 82571 controllers only 0-13 entries are filled here
  2106. */
  2107. mc_ptr = netdev->mc_list;
  2108. for (i = 1; i < rar_entries; i++) {
  2109. if (mc_ptr) {
  2110. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  2111. mc_ptr = mc_ptr->next;
  2112. } else {
  2113. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  2114. E1000_WRITE_FLUSH(hw);
  2115. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  2116. E1000_WRITE_FLUSH(hw);
  2117. }
  2118. }
  2119. /* clear the old settings from the multicast hash table */
  2120. for (i = 0; i < mta_reg_count; i++) {
  2121. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  2122. E1000_WRITE_FLUSH(hw);
  2123. }
  2124. /* load any remaining addresses into the hash table */
  2125. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  2126. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  2127. e1000_mta_set(hw, hash_value);
  2128. }
  2129. if (hw->mac_type == e1000_82542_rev2_0)
  2130. e1000_leave_82542_rst(adapter);
  2131. }
  2132. /* Need to wait a few seconds after link up to get diagnostic information from
  2133. * the phy */
  2134. static void
  2135. e1000_update_phy_info(unsigned long data)
  2136. {
  2137. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  2138. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  2139. }
  2140. /**
  2141. * e1000_82547_tx_fifo_stall - Timer Call-back
  2142. * @data: pointer to adapter cast into an unsigned long
  2143. **/
  2144. static void
  2145. e1000_82547_tx_fifo_stall(unsigned long data)
  2146. {
  2147. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  2148. struct net_device *netdev = adapter->netdev;
  2149. uint32_t tctl;
  2150. if (atomic_read(&adapter->tx_fifo_stall)) {
  2151. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  2152. E1000_READ_REG(&adapter->hw, TDH)) &&
  2153. (E1000_READ_REG(&adapter->hw, TDFT) ==
  2154. E1000_READ_REG(&adapter->hw, TDFH)) &&
  2155. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  2156. E1000_READ_REG(&adapter->hw, TDFHS))) {
  2157. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  2158. E1000_WRITE_REG(&adapter->hw, TCTL,
  2159. tctl & ~E1000_TCTL_EN);
  2160. E1000_WRITE_REG(&adapter->hw, TDFT,
  2161. adapter->tx_head_addr);
  2162. E1000_WRITE_REG(&adapter->hw, TDFH,
  2163. adapter->tx_head_addr);
  2164. E1000_WRITE_REG(&adapter->hw, TDFTS,
  2165. adapter->tx_head_addr);
  2166. E1000_WRITE_REG(&adapter->hw, TDFHS,
  2167. adapter->tx_head_addr);
  2168. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2169. E1000_WRITE_FLUSH(&adapter->hw);
  2170. adapter->tx_fifo_head = 0;
  2171. atomic_set(&adapter->tx_fifo_stall, 0);
  2172. netif_wake_queue(netdev);
  2173. } else {
  2174. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  2175. }
  2176. }
  2177. }
  2178. /**
  2179. * e1000_watchdog - Timer Call-back
  2180. * @data: pointer to adapter cast into an unsigned long
  2181. **/
  2182. static void
  2183. e1000_watchdog(unsigned long data)
  2184. {
  2185. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  2186. struct net_device *netdev = adapter->netdev;
  2187. struct e1000_tx_ring *txdr = adapter->tx_ring;
  2188. uint32_t link, tctl;
  2189. int32_t ret_val;
  2190. ret_val = e1000_check_for_link(&adapter->hw);
  2191. if ((ret_val == E1000_ERR_PHY) &&
  2192. (adapter->hw.phy_type == e1000_phy_igp_3) &&
  2193. (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
  2194. /* See e1000_kumeran_lock_loss_workaround() */
  2195. DPRINTK(LINK, INFO,
  2196. "Gigabit has been disabled, downgrading speed\n");
  2197. }
  2198. if (adapter->hw.mac_type == e1000_82573) {
  2199. e1000_enable_tx_pkt_filtering(&adapter->hw);
  2200. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  2201. e1000_update_mng_vlan(adapter);
  2202. }
  2203. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  2204. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  2205. link = !adapter->hw.serdes_link_down;
  2206. else
  2207. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  2208. if (link) {
  2209. if (!netif_carrier_ok(netdev)) {
  2210. uint32_t ctrl;
  2211. boolean_t txb2b = 1;
  2212. e1000_get_speed_and_duplex(&adapter->hw,
  2213. &adapter->link_speed,
  2214. &adapter->link_duplex);
  2215. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  2216. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
  2217. "Flow Control: %s\n",
  2218. adapter->link_speed,
  2219. adapter->link_duplex == FULL_DUPLEX ?
  2220. "Full Duplex" : "Half Duplex",
  2221. ((ctrl & E1000_CTRL_TFCE) && (ctrl &
  2222. E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
  2223. E1000_CTRL_RFCE) ? "RX" : ((ctrl &
  2224. E1000_CTRL_TFCE) ? "TX" : "None" )));
  2225. /* tweak tx_queue_len according to speed/duplex
  2226. * and adjust the timeout factor */
  2227. netdev->tx_queue_len = adapter->tx_queue_len;
  2228. adapter->tx_timeout_factor = 1;
  2229. switch (adapter->link_speed) {
  2230. case SPEED_10:
  2231. txb2b = 0;
  2232. netdev->tx_queue_len = 10;
  2233. adapter->tx_timeout_factor = 8;
  2234. break;
  2235. case SPEED_100:
  2236. txb2b = 0;
  2237. netdev->tx_queue_len = 100;
  2238. /* maybe add some timeout factor ? */
  2239. break;
  2240. }
  2241. if ((adapter->hw.mac_type == e1000_82571 ||
  2242. adapter->hw.mac_type == e1000_82572) &&
  2243. txb2b == 0) {
  2244. uint32_t tarc0;
  2245. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  2246. tarc0 &= ~(1 << 21);
  2247. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  2248. }
  2249. /* disable TSO for pcie and 10/100 speeds, to avoid
  2250. * some hardware issues */
  2251. if (!adapter->tso_force &&
  2252. adapter->hw.bus_type == e1000_bus_type_pci_express){
  2253. switch (adapter->link_speed) {
  2254. case SPEED_10:
  2255. case SPEED_100:
  2256. DPRINTK(PROBE,INFO,
  2257. "10/100 speed: disabling TSO\n");
  2258. netdev->features &= ~NETIF_F_TSO;
  2259. netdev->features &= ~NETIF_F_TSO6;
  2260. break;
  2261. case SPEED_1000:
  2262. netdev->features |= NETIF_F_TSO;
  2263. netdev->features |= NETIF_F_TSO6;
  2264. break;
  2265. default:
  2266. /* oops */
  2267. break;
  2268. }
  2269. }
  2270. /* enable transmits in the hardware, need to do this
  2271. * after setting TARC0 */
  2272. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  2273. tctl |= E1000_TCTL_EN;
  2274. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2275. netif_carrier_on(netdev);
  2276. netif_wake_queue(netdev);
  2277. mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
  2278. adapter->smartspeed = 0;
  2279. } else {
  2280. /* make sure the receive unit is started */
  2281. if (adapter->hw.rx_needs_kicking) {
  2282. struct e1000_hw *hw = &adapter->hw;
  2283. uint32_t rctl = E1000_READ_REG(hw, RCTL);
  2284. E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
  2285. }
  2286. }
  2287. } else {
  2288. if (netif_carrier_ok(netdev)) {
  2289. adapter->link_speed = 0;
  2290. adapter->link_duplex = 0;
  2291. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2292. netif_carrier_off(netdev);
  2293. netif_stop_queue(netdev);
  2294. mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
  2295. /* 80003ES2LAN workaround--
  2296. * For packet buffer work-around on link down event;
  2297. * disable receives in the ISR and
  2298. * reset device here in the watchdog
  2299. */
  2300. if (adapter->hw.mac_type == e1000_80003es2lan)
  2301. /* reset device */
  2302. schedule_work(&adapter->reset_task);
  2303. }
  2304. e1000_smartspeed(adapter);
  2305. }
  2306. e1000_update_stats(adapter);
  2307. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2308. adapter->tpt_old = adapter->stats.tpt;
  2309. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2310. adapter->colc_old = adapter->stats.colc;
  2311. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2312. adapter->gorcl_old = adapter->stats.gorcl;
  2313. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2314. adapter->gotcl_old = adapter->stats.gotcl;
  2315. e1000_update_adaptive(&adapter->hw);
  2316. if (!netif_carrier_ok(netdev)) {
  2317. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2318. /* We've lost link, so the controller stops DMA,
  2319. * but we've got queued Tx work that's never going
  2320. * to get done, so reset controller to flush Tx.
  2321. * (Do the reset outside of interrupt context). */
  2322. adapter->tx_timeout_count++;
  2323. schedule_work(&adapter->reset_task);
  2324. }
  2325. }
  2326. /* Cause software interrupt to ensure rx ring is cleaned */
  2327. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2328. /* Force detection of hung controller every watchdog period */
  2329. adapter->detect_tx_hung = TRUE;
  2330. /* With 82571 controllers, LAA may be overwritten due to controller
  2331. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2332. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2333. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2334. /* Reset the timer */
  2335. mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
  2336. }
  2337. enum latency_range {
  2338. lowest_latency = 0,
  2339. low_latency = 1,
  2340. bulk_latency = 2,
  2341. latency_invalid = 255
  2342. };
  2343. /**
  2344. * e1000_update_itr - update the dynamic ITR value based on statistics
  2345. * Stores a new ITR value based on packets and byte
  2346. * counts during the last interrupt. The advantage of per interrupt
  2347. * computation is faster updates and more accurate ITR for the current
  2348. * traffic pattern. Constants in this function were computed
  2349. * based on theoretical maximum wire speed and thresholds were set based
  2350. * on testing data as well as attempting to minimize response time
  2351. * while increasing bulk throughput.
  2352. * this functionality is controlled by the InterruptThrottleRate module
  2353. * parameter (see e1000_param.c)
  2354. * @adapter: pointer to adapter
  2355. * @itr_setting: current adapter->itr
  2356. * @packets: the number of packets during this measurement interval
  2357. * @bytes: the number of bytes during this measurement interval
  2358. **/
  2359. static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
  2360. uint16_t itr_setting,
  2361. int packets,
  2362. int bytes)
  2363. {
  2364. unsigned int retval = itr_setting;
  2365. struct e1000_hw *hw = &adapter->hw;
  2366. if (unlikely(hw->mac_type < e1000_82540))
  2367. goto update_itr_done;
  2368. if (packets == 0)
  2369. goto update_itr_done;
  2370. switch (itr_setting) {
  2371. case lowest_latency:
  2372. /* jumbo frames get bulk treatment*/
  2373. if (bytes/packets > 8000)
  2374. retval = bulk_latency;
  2375. else if ((packets < 5) && (bytes > 512))
  2376. retval = low_latency;
  2377. break;
  2378. case low_latency: /* 50 usec aka 20000 ints/s */
  2379. if (bytes > 10000) {
  2380. /* jumbo frames need bulk latency setting */
  2381. if (bytes/packets > 8000)
  2382. retval = bulk_latency;
  2383. else if ((packets < 10) || ((bytes/packets) > 1200))
  2384. retval = bulk_latency;
  2385. else if ((packets > 35))
  2386. retval = lowest_latency;
  2387. } else if (bytes/packets > 2000)
  2388. retval = bulk_latency;
  2389. else if (packets <= 2 && bytes < 512)
  2390. retval = lowest_latency;
  2391. break;
  2392. case bulk_latency: /* 250 usec aka 4000 ints/s */
  2393. if (bytes > 25000) {
  2394. if (packets > 35)
  2395. retval = low_latency;
  2396. } else if (bytes < 6000) {
  2397. retval = low_latency;
  2398. }
  2399. break;
  2400. }
  2401. update_itr_done:
  2402. return retval;
  2403. }
  2404. static void e1000_set_itr(struct e1000_adapter *adapter)
  2405. {
  2406. struct e1000_hw *hw = &adapter->hw;
  2407. uint16_t current_itr;
  2408. uint32_t new_itr = adapter->itr;
  2409. if (unlikely(hw->mac_type < e1000_82540))
  2410. return;
  2411. /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
  2412. if (unlikely(adapter->link_speed != SPEED_1000)) {
  2413. current_itr = 0;
  2414. new_itr = 4000;
  2415. goto set_itr_now;
  2416. }
  2417. adapter->tx_itr = e1000_update_itr(adapter,
  2418. adapter->tx_itr,
  2419. adapter->total_tx_packets,
  2420. adapter->total_tx_bytes);
  2421. /* conservative mode (itr 3) eliminates the lowest_latency setting */
  2422. if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
  2423. adapter->tx_itr = low_latency;
  2424. adapter->rx_itr = e1000_update_itr(adapter,
  2425. adapter->rx_itr,
  2426. adapter->total_rx_packets,
  2427. adapter->total_rx_bytes);
  2428. /* conservative mode (itr 3) eliminates the lowest_latency setting */
  2429. if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
  2430. adapter->rx_itr = low_latency;
  2431. current_itr = max(adapter->rx_itr, adapter->tx_itr);
  2432. switch (current_itr) {
  2433. /* counts and packets in update_itr are dependent on these numbers */
  2434. case lowest_latency:
  2435. new_itr = 70000;
  2436. break;
  2437. case low_latency:
  2438. new_itr = 20000; /* aka hwitr = ~200 */
  2439. break;
  2440. case bulk_latency:
  2441. new_itr = 4000;
  2442. break;
  2443. default:
  2444. break;
  2445. }
  2446. set_itr_now:
  2447. if (new_itr != adapter->itr) {
  2448. /* this attempts to bias the interrupt rate towards Bulk
  2449. * by adding intermediate steps when interrupt rate is
  2450. * increasing */
  2451. new_itr = new_itr > adapter->itr ?
  2452. min(adapter->itr + (new_itr >> 2), new_itr) :
  2453. new_itr;
  2454. adapter->itr = new_itr;
  2455. E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
  2456. }
  2457. return;
  2458. }
  2459. #define E1000_TX_FLAGS_CSUM 0x00000001
  2460. #define E1000_TX_FLAGS_VLAN 0x00000002
  2461. #define E1000_TX_FLAGS_TSO 0x00000004
  2462. #define E1000_TX_FLAGS_IPV4 0x00000008
  2463. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2464. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2465. static int
  2466. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2467. struct sk_buff *skb)
  2468. {
  2469. struct e1000_context_desc *context_desc;
  2470. struct e1000_buffer *buffer_info;
  2471. unsigned int i;
  2472. uint32_t cmd_length = 0;
  2473. uint16_t ipcse = 0, tucse, mss;
  2474. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2475. int err;
  2476. if (skb_is_gso(skb)) {
  2477. if (skb_header_cloned(skb)) {
  2478. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2479. if (err)
  2480. return err;
  2481. }
  2482. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  2483. mss = skb_shinfo(skb)->gso_size;
  2484. if (skb->protocol == htons(ETH_P_IP)) {
  2485. struct iphdr *iph = ip_hdr(skb);
  2486. iph->tot_len = 0;
  2487. iph->check = 0;
  2488. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  2489. iph->daddr, 0,
  2490. IPPROTO_TCP,
  2491. 0);
  2492. cmd_length = E1000_TXD_CMD_IP;
  2493. ipcse = skb_transport_offset(skb) - 1;
  2494. } else if (skb->protocol == htons(ETH_P_IPV6)) {
  2495. ipv6_hdr(skb)->payload_len = 0;
  2496. tcp_hdr(skb)->check =
  2497. ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  2498. &ipv6_hdr(skb)->daddr,
  2499. 0, IPPROTO_TCP, 0);
  2500. ipcse = 0;
  2501. }
  2502. ipcss = skb_network_offset(skb);
  2503. ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
  2504. tucss = skb_transport_offset(skb);
  2505. tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
  2506. tucse = 0;
  2507. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2508. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2509. i = tx_ring->next_to_use;
  2510. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2511. buffer_info = &tx_ring->buffer_info[i];
  2512. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2513. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2514. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2515. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2516. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2517. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2518. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2519. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2520. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2521. buffer_info->time_stamp = jiffies;
  2522. buffer_info->next_to_watch = i;
  2523. if (++i == tx_ring->count) i = 0;
  2524. tx_ring->next_to_use = i;
  2525. return TRUE;
  2526. }
  2527. return FALSE;
  2528. }
  2529. static boolean_t
  2530. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2531. struct sk_buff *skb)
  2532. {
  2533. struct e1000_context_desc *context_desc;
  2534. struct e1000_buffer *buffer_info;
  2535. unsigned int i;
  2536. uint8_t css;
  2537. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  2538. css = skb_transport_offset(skb);
  2539. i = tx_ring->next_to_use;
  2540. buffer_info = &tx_ring->buffer_info[i];
  2541. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2542. context_desc->lower_setup.ip_config = 0;
  2543. context_desc->upper_setup.tcp_fields.tucss = css;
  2544. context_desc->upper_setup.tcp_fields.tucso =
  2545. css + skb->csum_offset;
  2546. context_desc->upper_setup.tcp_fields.tucse = 0;
  2547. context_desc->tcp_seg_setup.data = 0;
  2548. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2549. buffer_info->time_stamp = jiffies;
  2550. buffer_info->next_to_watch = i;
  2551. if (unlikely(++i == tx_ring->count)) i = 0;
  2552. tx_ring->next_to_use = i;
  2553. return TRUE;
  2554. }
  2555. return FALSE;
  2556. }
  2557. #define E1000_MAX_TXD_PWR 12
  2558. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2559. static int
  2560. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2561. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2562. unsigned int nr_frags, unsigned int mss)
  2563. {
  2564. struct e1000_buffer *buffer_info;
  2565. unsigned int len = skb->len;
  2566. unsigned int offset = 0, size, count = 0, i;
  2567. unsigned int f;
  2568. len -= skb->data_len;
  2569. i = tx_ring->next_to_use;
  2570. while (len) {
  2571. buffer_info = &tx_ring->buffer_info[i];
  2572. size = min(len, max_per_txd);
  2573. /* Workaround for Controller erratum --
  2574. * descriptor for non-tso packet in a linear SKB that follows a
  2575. * tso gets written back prematurely before the data is fully
  2576. * DMA'd to the controller */
  2577. if (!skb->data_len && tx_ring->last_tx_tso &&
  2578. !skb_is_gso(skb)) {
  2579. tx_ring->last_tx_tso = 0;
  2580. size -= 4;
  2581. }
  2582. /* Workaround for premature desc write-backs
  2583. * in TSO mode. Append 4-byte sentinel desc */
  2584. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2585. size -= 4;
  2586. /* work-around for errata 10 and it applies
  2587. * to all controllers in PCI-X mode
  2588. * The fix is to make sure that the first descriptor of a
  2589. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2590. */
  2591. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2592. (size > 2015) && count == 0))
  2593. size = 2015;
  2594. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2595. * terminating buffers within evenly-aligned dwords. */
  2596. if (unlikely(adapter->pcix_82544 &&
  2597. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2598. size > 4))
  2599. size -= 4;
  2600. buffer_info->length = size;
  2601. buffer_info->dma =
  2602. pci_map_single(adapter->pdev,
  2603. skb->data + offset,
  2604. size,
  2605. PCI_DMA_TODEVICE);
  2606. buffer_info->time_stamp = jiffies;
  2607. buffer_info->next_to_watch = i;
  2608. len -= size;
  2609. offset += size;
  2610. count++;
  2611. if (unlikely(++i == tx_ring->count)) i = 0;
  2612. }
  2613. for (f = 0; f < nr_frags; f++) {
  2614. struct skb_frag_struct *frag;
  2615. frag = &skb_shinfo(skb)->frags[f];
  2616. len = frag->size;
  2617. offset = frag->page_offset;
  2618. while (len) {
  2619. buffer_info = &tx_ring->buffer_info[i];
  2620. size = min(len, max_per_txd);
  2621. /* Workaround for premature desc write-backs
  2622. * in TSO mode. Append 4-byte sentinel desc */
  2623. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2624. size -= 4;
  2625. /* Workaround for potential 82544 hang in PCI-X.
  2626. * Avoid terminating buffers within evenly-aligned
  2627. * dwords. */
  2628. if (unlikely(adapter->pcix_82544 &&
  2629. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2630. size > 4))
  2631. size -= 4;
  2632. buffer_info->length = size;
  2633. buffer_info->dma =
  2634. pci_map_page(adapter->pdev,
  2635. frag->page,
  2636. offset,
  2637. size,
  2638. PCI_DMA_TODEVICE);
  2639. buffer_info->time_stamp = jiffies;
  2640. buffer_info->next_to_watch = i;
  2641. len -= size;
  2642. offset += size;
  2643. count++;
  2644. if (unlikely(++i == tx_ring->count)) i = 0;
  2645. }
  2646. }
  2647. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2648. tx_ring->buffer_info[i].skb = skb;
  2649. tx_ring->buffer_info[first].next_to_watch = i;
  2650. return count;
  2651. }
  2652. static void
  2653. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2654. int tx_flags, int count)
  2655. {
  2656. struct e1000_tx_desc *tx_desc = NULL;
  2657. struct e1000_buffer *buffer_info;
  2658. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2659. unsigned int i;
  2660. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2661. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2662. E1000_TXD_CMD_TSE;
  2663. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2664. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2665. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2666. }
  2667. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2668. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2669. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2670. }
  2671. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2672. txd_lower |= E1000_TXD_CMD_VLE;
  2673. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2674. }
  2675. i = tx_ring->next_to_use;
  2676. while (count--) {
  2677. buffer_info = &tx_ring->buffer_info[i];
  2678. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2679. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2680. tx_desc->lower.data =
  2681. cpu_to_le32(txd_lower | buffer_info->length);
  2682. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2683. if (unlikely(++i == tx_ring->count)) i = 0;
  2684. }
  2685. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2686. /* Force memory writes to complete before letting h/w
  2687. * know there are new descriptors to fetch. (Only
  2688. * applicable for weak-ordered memory model archs,
  2689. * such as IA-64). */
  2690. wmb();
  2691. tx_ring->next_to_use = i;
  2692. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2693. /* we need this if more than one processor can write to our tail
  2694. * at a time, it syncronizes IO on IA64/Altix systems */
  2695. mmiowb();
  2696. }
  2697. /**
  2698. * 82547 workaround to avoid controller hang in half-duplex environment.
  2699. * The workaround is to avoid queuing a large packet that would span
  2700. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2701. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2702. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2703. * to the beginning of the Tx FIFO.
  2704. **/
  2705. #define E1000_FIFO_HDR 0x10
  2706. #define E1000_82547_PAD_LEN 0x3E0
  2707. static int
  2708. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2709. {
  2710. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2711. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2712. skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
  2713. if (adapter->link_duplex != HALF_DUPLEX)
  2714. goto no_fifo_stall_required;
  2715. if (atomic_read(&adapter->tx_fifo_stall))
  2716. return 1;
  2717. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2718. atomic_set(&adapter->tx_fifo_stall, 1);
  2719. return 1;
  2720. }
  2721. no_fifo_stall_required:
  2722. adapter->tx_fifo_head += skb_fifo_len;
  2723. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2724. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2725. return 0;
  2726. }
  2727. #define MINIMUM_DHCP_PACKET_SIZE 282
  2728. static int
  2729. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2730. {
  2731. struct e1000_hw *hw = &adapter->hw;
  2732. uint16_t length, offset;
  2733. if (vlan_tx_tag_present(skb)) {
  2734. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2735. ( adapter->hw.mng_cookie.status &
  2736. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2737. return 0;
  2738. }
  2739. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2740. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2741. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2742. const struct iphdr *ip =
  2743. (struct iphdr *)((uint8_t *)skb->data+14);
  2744. if (IPPROTO_UDP == ip->protocol) {
  2745. struct udphdr *udp =
  2746. (struct udphdr *)((uint8_t *)ip +
  2747. (ip->ihl << 2));
  2748. if (ntohs(udp->dest) == 67) {
  2749. offset = (uint8_t *)udp + 8 - skb->data;
  2750. length = skb->len - offset;
  2751. return e1000_mng_write_dhcp_info(hw,
  2752. (uint8_t *)udp + 8,
  2753. length);
  2754. }
  2755. }
  2756. }
  2757. }
  2758. return 0;
  2759. }
  2760. static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
  2761. {
  2762. struct e1000_adapter *adapter = netdev_priv(netdev);
  2763. struct e1000_tx_ring *tx_ring = adapter->tx_ring;
  2764. netif_stop_queue(netdev);
  2765. /* Herbert's original patch had:
  2766. * smp_mb__after_netif_stop_queue();
  2767. * but since that doesn't exist yet, just open code it. */
  2768. smp_mb();
  2769. /* We need to check again in a case another CPU has just
  2770. * made room available. */
  2771. if (likely(E1000_DESC_UNUSED(tx_ring) < size))
  2772. return -EBUSY;
  2773. /* A reprieve! */
  2774. netif_start_queue(netdev);
  2775. ++adapter->restart_queue;
  2776. return 0;
  2777. }
  2778. static int e1000_maybe_stop_tx(struct net_device *netdev,
  2779. struct e1000_tx_ring *tx_ring, int size)
  2780. {
  2781. if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
  2782. return 0;
  2783. return __e1000_maybe_stop_tx(netdev, size);
  2784. }
  2785. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2786. static int
  2787. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2788. {
  2789. struct e1000_adapter *adapter = netdev_priv(netdev);
  2790. struct e1000_tx_ring *tx_ring;
  2791. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2792. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2793. unsigned int tx_flags = 0;
  2794. unsigned int len = skb->len;
  2795. unsigned long flags;
  2796. unsigned int nr_frags = 0;
  2797. unsigned int mss = 0;
  2798. int count = 0;
  2799. int tso;
  2800. unsigned int f;
  2801. len -= skb->data_len;
  2802. /* This goes back to the question of how to logically map a tx queue
  2803. * to a flow. Right now, performance is impacted slightly negatively
  2804. * if using multiple tx queues. If the stack breaks away from a
  2805. * single qdisc implementation, we can look at this again. */
  2806. tx_ring = adapter->tx_ring;
  2807. if (unlikely(skb->len <= 0)) {
  2808. dev_kfree_skb_any(skb);
  2809. return NETDEV_TX_OK;
  2810. }
  2811. /* 82571 and newer doesn't need the workaround that limited descriptor
  2812. * length to 4kB */
  2813. if (adapter->hw.mac_type >= e1000_82571)
  2814. max_per_txd = 8192;
  2815. mss = skb_shinfo(skb)->gso_size;
  2816. /* The controller does a simple calculation to
  2817. * make sure there is enough room in the FIFO before
  2818. * initiating the DMA for each buffer. The calc is:
  2819. * 4 = ceil(buffer len/mss). To make sure we don't
  2820. * overrun the FIFO, adjust the max buffer len if mss
  2821. * drops. */
  2822. if (mss) {
  2823. uint8_t hdr_len;
  2824. max_per_txd = min(mss << 2, max_per_txd);
  2825. max_txd_pwr = fls(max_per_txd) - 1;
  2826. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2827. * points to just header, pull a few bytes of payload from
  2828. * frags into skb->data */
  2829. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  2830. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2831. switch (adapter->hw.mac_type) {
  2832. unsigned int pull_size;
  2833. case e1000_82544:
  2834. /* Make sure we have room to chop off 4 bytes,
  2835. * and that the end alignment will work out to
  2836. * this hardware's requirements
  2837. * NOTE: this is a TSO only workaround
  2838. * if end byte alignment not correct move us
  2839. * into the next dword */
  2840. if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
  2841. break;
  2842. /* fall through */
  2843. case e1000_82571:
  2844. case e1000_82572:
  2845. case e1000_82573:
  2846. case e1000_ich8lan:
  2847. pull_size = min((unsigned int)4, skb->data_len);
  2848. if (!__pskb_pull_tail(skb, pull_size)) {
  2849. DPRINTK(DRV, ERR,
  2850. "__pskb_pull_tail failed.\n");
  2851. dev_kfree_skb_any(skb);
  2852. return NETDEV_TX_OK;
  2853. }
  2854. len = skb->len - skb->data_len;
  2855. break;
  2856. default:
  2857. /* do nothing */
  2858. break;
  2859. }
  2860. }
  2861. }
  2862. /* reserve a descriptor for the offload context */
  2863. if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
  2864. count++;
  2865. count++;
  2866. /* Controller Erratum workaround */
  2867. if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  2868. count++;
  2869. count += TXD_USE_COUNT(len, max_txd_pwr);
  2870. if (adapter->pcix_82544)
  2871. count++;
  2872. /* work-around for errata 10 and it applies to all controllers
  2873. * in PCI-X mode, so add one more descriptor to the count
  2874. */
  2875. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2876. (len > 2015)))
  2877. count++;
  2878. nr_frags = skb_shinfo(skb)->nr_frags;
  2879. for (f = 0; f < nr_frags; f++)
  2880. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2881. max_txd_pwr);
  2882. if (adapter->pcix_82544)
  2883. count += nr_frags;
  2884. if (adapter->hw.tx_pkt_filtering &&
  2885. (adapter->hw.mac_type == e1000_82573))
  2886. e1000_transfer_dhcp_info(adapter, skb);
  2887. if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
  2888. /* Collision - tell upper layer to requeue */
  2889. return NETDEV_TX_LOCKED;
  2890. /* need: count + 2 desc gap to keep tail from touching
  2891. * head, otherwise try next time */
  2892. if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
  2893. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2894. return NETDEV_TX_BUSY;
  2895. }
  2896. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2897. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2898. netif_stop_queue(netdev);
  2899. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  2900. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2901. return NETDEV_TX_BUSY;
  2902. }
  2903. }
  2904. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2905. tx_flags |= E1000_TX_FLAGS_VLAN;
  2906. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2907. }
  2908. first = tx_ring->next_to_use;
  2909. tso = e1000_tso(adapter, tx_ring, skb);
  2910. if (tso < 0) {
  2911. dev_kfree_skb_any(skb);
  2912. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2913. return NETDEV_TX_OK;
  2914. }
  2915. if (likely(tso)) {
  2916. tx_ring->last_tx_tso = 1;
  2917. tx_flags |= E1000_TX_FLAGS_TSO;
  2918. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2919. tx_flags |= E1000_TX_FLAGS_CSUM;
  2920. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2921. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2922. * no longer assume, we must. */
  2923. if (likely(skb->protocol == htons(ETH_P_IP)))
  2924. tx_flags |= E1000_TX_FLAGS_IPV4;
  2925. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2926. e1000_tx_map(adapter, tx_ring, skb, first,
  2927. max_per_txd, nr_frags, mss));
  2928. netdev->trans_start = jiffies;
  2929. /* Make sure there is space in the ring for the next send. */
  2930. e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
  2931. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2932. return NETDEV_TX_OK;
  2933. }
  2934. /**
  2935. * e1000_tx_timeout - Respond to a Tx Hang
  2936. * @netdev: network interface device structure
  2937. **/
  2938. static void
  2939. e1000_tx_timeout(struct net_device *netdev)
  2940. {
  2941. struct e1000_adapter *adapter = netdev_priv(netdev);
  2942. /* Do the reset outside of interrupt context */
  2943. adapter->tx_timeout_count++;
  2944. schedule_work(&adapter->reset_task);
  2945. }
  2946. static void
  2947. e1000_reset_task(struct work_struct *work)
  2948. {
  2949. struct e1000_adapter *adapter =
  2950. container_of(work, struct e1000_adapter, reset_task);
  2951. e1000_reinit_locked(adapter);
  2952. }
  2953. /**
  2954. * e1000_get_stats - Get System Network Statistics
  2955. * @netdev: network interface device structure
  2956. *
  2957. * Returns the address of the device statistics structure.
  2958. * The statistics are actually updated from the timer callback.
  2959. **/
  2960. static struct net_device_stats *
  2961. e1000_get_stats(struct net_device *netdev)
  2962. {
  2963. struct e1000_adapter *adapter = netdev_priv(netdev);
  2964. /* only return the current stats */
  2965. return &adapter->net_stats;
  2966. }
  2967. /**
  2968. * e1000_change_mtu - Change the Maximum Transfer Unit
  2969. * @netdev: network interface device structure
  2970. * @new_mtu: new value for maximum frame size
  2971. *
  2972. * Returns 0 on success, negative on failure
  2973. **/
  2974. static int
  2975. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2976. {
  2977. struct e1000_adapter *adapter = netdev_priv(netdev);
  2978. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2979. uint16_t eeprom_data = 0;
  2980. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2981. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2982. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2983. return -EINVAL;
  2984. }
  2985. /* Adapter-specific max frame size limits. */
  2986. switch (adapter->hw.mac_type) {
  2987. case e1000_undefined ... e1000_82542_rev2_1:
  2988. case e1000_ich8lan:
  2989. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2990. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2991. return -EINVAL;
  2992. }
  2993. break;
  2994. case e1000_82573:
  2995. /* Jumbo Frames not supported if:
  2996. * - this is not an 82573L device
  2997. * - ASPM is enabled in any way (0x1A bits 3:2) */
  2998. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2999. &eeprom_data);
  3000. if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
  3001. (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
  3002. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  3003. DPRINTK(PROBE, ERR,
  3004. "Jumbo Frames not supported.\n");
  3005. return -EINVAL;
  3006. }
  3007. break;
  3008. }
  3009. /* ERT will be enabled later to enable wire speed receives */
  3010. /* fall through to get support */
  3011. case e1000_82571:
  3012. case e1000_82572:
  3013. case e1000_80003es2lan:
  3014. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  3015. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  3016. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  3017. return -EINVAL;
  3018. }
  3019. break;
  3020. default:
  3021. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  3022. break;
  3023. }
  3024. /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  3025. * means we reserve 2 more, this pushes us to allocate from the next
  3026. * larger slab size
  3027. * i.e. RXBUFFER_2048 --> size-4096 slab */
  3028. if (max_frame <= E1000_RXBUFFER_256)
  3029. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  3030. else if (max_frame <= E1000_RXBUFFER_512)
  3031. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  3032. else if (max_frame <= E1000_RXBUFFER_1024)
  3033. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  3034. else if (max_frame <= E1000_RXBUFFER_2048)
  3035. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  3036. else if (max_frame <= E1000_RXBUFFER_4096)
  3037. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  3038. else if (max_frame <= E1000_RXBUFFER_8192)
  3039. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  3040. else if (max_frame <= E1000_RXBUFFER_16384)
  3041. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  3042. /* adjust allocation if LPE protects us, and we aren't using SBP */
  3043. if (!adapter->hw.tbi_compatibility_on &&
  3044. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  3045. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  3046. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  3047. netdev->mtu = new_mtu;
  3048. adapter->hw.max_frame_size = max_frame;
  3049. if (netif_running(netdev))
  3050. e1000_reinit_locked(adapter);
  3051. return 0;
  3052. }
  3053. /**
  3054. * e1000_update_stats - Update the board statistics counters
  3055. * @adapter: board private structure
  3056. **/
  3057. void
  3058. e1000_update_stats(struct e1000_adapter *adapter)
  3059. {
  3060. struct e1000_hw *hw = &adapter->hw;
  3061. struct pci_dev *pdev = adapter->pdev;
  3062. unsigned long flags;
  3063. uint16_t phy_tmp;
  3064. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  3065. /*
  3066. * Prevent stats update while adapter is being reset, or if the pci
  3067. * connection is down.
  3068. */
  3069. if (adapter->link_speed == 0)
  3070. return;
  3071. if (pci_channel_offline(pdev))
  3072. return;
  3073. spin_lock_irqsave(&adapter->stats_lock, flags);
  3074. /* these counters are modified from e1000_adjust_tbi_stats,
  3075. * called from the interrupt context, so they must only
  3076. * be written while holding adapter->stats_lock
  3077. */
  3078. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  3079. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  3080. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  3081. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  3082. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  3083. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  3084. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  3085. if (adapter->hw.mac_type != e1000_ich8lan) {
  3086. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  3087. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  3088. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  3089. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  3090. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  3091. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  3092. }
  3093. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  3094. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  3095. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  3096. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  3097. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  3098. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  3099. adapter->stats.dc += E1000_READ_REG(hw, DC);
  3100. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  3101. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  3102. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  3103. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  3104. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  3105. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  3106. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  3107. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  3108. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  3109. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  3110. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  3111. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  3112. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  3113. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  3114. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  3115. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  3116. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  3117. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  3118. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  3119. if (adapter->hw.mac_type != e1000_ich8lan) {
  3120. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  3121. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  3122. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  3123. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  3124. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  3125. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  3126. }
  3127. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  3128. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  3129. /* used for adaptive IFS */
  3130. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  3131. adapter->stats.tpt += hw->tx_packet_delta;
  3132. hw->collision_delta = E1000_READ_REG(hw, COLC);
  3133. adapter->stats.colc += hw->collision_delta;
  3134. if (hw->mac_type >= e1000_82543) {
  3135. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  3136. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  3137. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  3138. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  3139. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  3140. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  3141. }
  3142. if (hw->mac_type > e1000_82547_rev_2) {
  3143. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  3144. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  3145. if (adapter->hw.mac_type != e1000_ich8lan) {
  3146. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  3147. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  3148. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  3149. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  3150. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  3151. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  3152. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  3153. }
  3154. }
  3155. /* Fill out the OS statistics structure */
  3156. adapter->net_stats.rx_packets = adapter->stats.gprc;
  3157. adapter->net_stats.tx_packets = adapter->stats.gptc;
  3158. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  3159. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  3160. adapter->net_stats.multicast = adapter->stats.mprc;
  3161. adapter->net_stats.collisions = adapter->stats.colc;
  3162. /* Rx Errors */
  3163. /* RLEC on some newer hardware can be incorrect so build
  3164. * our own version based on RUC and ROC */
  3165. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  3166. adapter->stats.crcerrs + adapter->stats.algnerrc +
  3167. adapter->stats.ruc + adapter->stats.roc +
  3168. adapter->stats.cexterr;
  3169. adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
  3170. adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
  3171. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  3172. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  3173. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  3174. /* Tx Errors */
  3175. adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
  3176. adapter->net_stats.tx_errors = adapter->stats.txerrc;
  3177. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  3178. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  3179. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  3180. if (adapter->hw.bad_tx_carr_stats_fd &&
  3181. adapter->link_duplex == FULL_DUPLEX) {
  3182. adapter->net_stats.tx_carrier_errors = 0;
  3183. adapter->stats.tncrs = 0;
  3184. }
  3185. /* Tx Dropped needs to be maintained elsewhere */
  3186. /* Phy Stats */
  3187. if (hw->media_type == e1000_media_type_copper) {
  3188. if ((adapter->link_speed == SPEED_1000) &&
  3189. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  3190. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  3191. adapter->phy_stats.idle_errors += phy_tmp;
  3192. }
  3193. if ((hw->mac_type <= e1000_82546) &&
  3194. (hw->phy_type == e1000_phy_m88) &&
  3195. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  3196. adapter->phy_stats.receive_errors += phy_tmp;
  3197. }
  3198. /* Management Stats */
  3199. if (adapter->hw.has_smbus) {
  3200. adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
  3201. adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
  3202. adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
  3203. }
  3204. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3205. }
  3206. #ifdef CONFIG_PCI_MSI
  3207. /**
  3208. * e1000_intr_msi - Interrupt Handler
  3209. * @irq: interrupt number
  3210. * @data: pointer to a network interface device structure
  3211. **/
  3212. static irqreturn_t
  3213. e1000_intr_msi(int irq, void *data)
  3214. {
  3215. struct net_device *netdev = data;
  3216. struct e1000_adapter *adapter = netdev_priv(netdev);
  3217. struct e1000_hw *hw = &adapter->hw;
  3218. #ifndef CONFIG_E1000_NAPI
  3219. int i;
  3220. #endif
  3221. uint32_t icr = E1000_READ_REG(hw, ICR);
  3222. #ifdef CONFIG_E1000_NAPI
  3223. /* read ICR disables interrupts using IAM, so keep up with our
  3224. * enable/disable accounting */
  3225. atomic_inc(&adapter->irq_sem);
  3226. #endif
  3227. if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
  3228. hw->get_link_status = 1;
  3229. /* 80003ES2LAN workaround-- For packet buffer work-around on
  3230. * link down event; disable receives here in the ISR and reset
  3231. * adapter in watchdog */
  3232. if (netif_carrier_ok(netdev) &&
  3233. (adapter->hw.mac_type == e1000_80003es2lan)) {
  3234. /* disable receives */
  3235. uint32_t rctl = E1000_READ_REG(hw, RCTL);
  3236. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  3237. }
  3238. /* guard against interrupt when we're going down */
  3239. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3240. mod_timer(&adapter->watchdog_timer, jiffies + 1);
  3241. }
  3242. #ifdef CONFIG_E1000_NAPI
  3243. if (likely(netif_rx_schedule_prep(netdev))) {
  3244. adapter->total_tx_bytes = 0;
  3245. adapter->total_tx_packets = 0;
  3246. adapter->total_rx_bytes = 0;
  3247. adapter->total_rx_packets = 0;
  3248. __netif_rx_schedule(netdev);
  3249. } else
  3250. e1000_irq_enable(adapter);
  3251. #else
  3252. adapter->total_tx_bytes = 0;
  3253. adapter->total_rx_bytes = 0;
  3254. adapter->total_tx_packets = 0;
  3255. adapter->total_rx_packets = 0;
  3256. for (i = 0; i < E1000_MAX_INTR; i++)
  3257. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  3258. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  3259. break;
  3260. if (likely(adapter->itr_setting & 3))
  3261. e1000_set_itr(adapter);
  3262. #endif
  3263. return IRQ_HANDLED;
  3264. }
  3265. #endif
  3266. /**
  3267. * e1000_intr - Interrupt Handler
  3268. * @irq: interrupt number
  3269. * @data: pointer to a network interface device structure
  3270. **/
  3271. static irqreturn_t
  3272. e1000_intr(int irq, void *data)
  3273. {
  3274. struct net_device *netdev = data;
  3275. struct e1000_adapter *adapter = netdev_priv(netdev);
  3276. struct e1000_hw *hw = &adapter->hw;
  3277. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  3278. #ifndef CONFIG_E1000_NAPI
  3279. int i;
  3280. #endif
  3281. if (unlikely(!icr))
  3282. return IRQ_NONE; /* Not our interrupt */
  3283. #ifdef CONFIG_E1000_NAPI
  3284. /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
  3285. * not set, then the adapter didn't send an interrupt */
  3286. if (unlikely(hw->mac_type >= e1000_82571 &&
  3287. !(icr & E1000_ICR_INT_ASSERTED)))
  3288. return IRQ_NONE;
  3289. /* Interrupt Auto-Mask...upon reading ICR,
  3290. * interrupts are masked. No need for the
  3291. * IMC write, but it does mean we should
  3292. * account for it ASAP. */
  3293. if (likely(hw->mac_type >= e1000_82571))
  3294. atomic_inc(&adapter->irq_sem);
  3295. #endif
  3296. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  3297. hw->get_link_status = 1;
  3298. /* 80003ES2LAN workaround--
  3299. * For packet buffer work-around on link down event;
  3300. * disable receives here in the ISR and
  3301. * reset adapter in watchdog
  3302. */
  3303. if (netif_carrier_ok(netdev) &&
  3304. (adapter->hw.mac_type == e1000_80003es2lan)) {
  3305. /* disable receives */
  3306. rctl = E1000_READ_REG(hw, RCTL);
  3307. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  3308. }
  3309. /* guard against interrupt when we're going down */
  3310. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3311. mod_timer(&adapter->watchdog_timer, jiffies + 1);
  3312. }
  3313. #ifdef CONFIG_E1000_NAPI
  3314. if (unlikely(hw->mac_type < e1000_82571)) {
  3315. /* disable interrupts, without the synchronize_irq bit */
  3316. atomic_inc(&adapter->irq_sem);
  3317. E1000_WRITE_REG(hw, IMC, ~0);
  3318. E1000_WRITE_FLUSH(hw);
  3319. }
  3320. if (likely(netif_rx_schedule_prep(netdev))) {
  3321. adapter->total_tx_bytes = 0;
  3322. adapter->total_tx_packets = 0;
  3323. adapter->total_rx_bytes = 0;
  3324. adapter->total_rx_packets = 0;
  3325. __netif_rx_schedule(netdev);
  3326. } else
  3327. /* this really should not happen! if it does it is basically a
  3328. * bug, but not a hard error, so enable ints and continue */
  3329. e1000_irq_enable(adapter);
  3330. #else
  3331. /* Writing IMC and IMS is needed for 82547.
  3332. * Due to Hub Link bus being occupied, an interrupt
  3333. * de-assertion message is not able to be sent.
  3334. * When an interrupt assertion message is generated later,
  3335. * two messages are re-ordered and sent out.
  3336. * That causes APIC to think 82547 is in de-assertion
  3337. * state, while 82547 is in assertion state, resulting
  3338. * in dead lock. Writing IMC forces 82547 into
  3339. * de-assertion state.
  3340. */
  3341. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  3342. atomic_inc(&adapter->irq_sem);
  3343. E1000_WRITE_REG(hw, IMC, ~0);
  3344. }
  3345. adapter->total_tx_bytes = 0;
  3346. adapter->total_rx_bytes = 0;
  3347. adapter->total_tx_packets = 0;
  3348. adapter->total_rx_packets = 0;
  3349. for (i = 0; i < E1000_MAX_INTR; i++)
  3350. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  3351. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  3352. break;
  3353. if (likely(adapter->itr_setting & 3))
  3354. e1000_set_itr(adapter);
  3355. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  3356. e1000_irq_enable(adapter);
  3357. #endif
  3358. return IRQ_HANDLED;
  3359. }
  3360. #ifdef CONFIG_E1000_NAPI
  3361. /**
  3362. * e1000_clean - NAPI Rx polling callback
  3363. * @adapter: board private structure
  3364. **/
  3365. static int
  3366. e1000_clean(struct net_device *poll_dev, int *budget)
  3367. {
  3368. struct e1000_adapter *adapter;
  3369. int work_to_do = min(*budget, poll_dev->quota);
  3370. int tx_cleaned = 0, work_done = 0;
  3371. /* Must NOT use netdev_priv macro here. */
  3372. adapter = poll_dev->priv;
  3373. /* Keep link state information with original netdev */
  3374. if (!netif_carrier_ok(poll_dev))
  3375. goto quit_polling;
  3376. /* e1000_clean is called per-cpu. This lock protects
  3377. * tx_ring[0] from being cleaned by multiple cpus
  3378. * simultaneously. A failure obtaining the lock means
  3379. * tx_ring[0] is currently being cleaned anyway. */
  3380. if (spin_trylock(&adapter->tx_queue_lock)) {
  3381. tx_cleaned = e1000_clean_tx_irq(adapter,
  3382. &adapter->tx_ring[0]);
  3383. spin_unlock(&adapter->tx_queue_lock);
  3384. }
  3385. adapter->clean_rx(adapter, &adapter->rx_ring[0],
  3386. &work_done, work_to_do);
  3387. *budget -= work_done;
  3388. poll_dev->quota -= work_done;
  3389. /* If no Tx and not enough Rx work done, exit the polling mode */
  3390. if ((!tx_cleaned && (work_done == 0)) ||
  3391. !netif_running(poll_dev)) {
  3392. quit_polling:
  3393. if (likely(adapter->itr_setting & 3))
  3394. e1000_set_itr(adapter);
  3395. netif_rx_complete(poll_dev);
  3396. e1000_irq_enable(adapter);
  3397. return 0;
  3398. }
  3399. return 1;
  3400. }
  3401. #endif
  3402. /**
  3403. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  3404. * @adapter: board private structure
  3405. **/
  3406. static boolean_t
  3407. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  3408. struct e1000_tx_ring *tx_ring)
  3409. {
  3410. struct net_device *netdev = adapter->netdev;
  3411. struct e1000_tx_desc *tx_desc, *eop_desc;
  3412. struct e1000_buffer *buffer_info;
  3413. unsigned int i, eop;
  3414. #ifdef CONFIG_E1000_NAPI
  3415. unsigned int count = 0;
  3416. #endif
  3417. boolean_t cleaned = FALSE;
  3418. unsigned int total_tx_bytes=0, total_tx_packets=0;
  3419. i = tx_ring->next_to_clean;
  3420. eop = tx_ring->buffer_info[i].next_to_watch;
  3421. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3422. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  3423. for (cleaned = FALSE; !cleaned; ) {
  3424. tx_desc = E1000_TX_DESC(*tx_ring, i);
  3425. buffer_info = &tx_ring->buffer_info[i];
  3426. cleaned = (i == eop);
  3427. if (cleaned) {
  3428. struct sk_buff *skb = buffer_info->skb;
  3429. unsigned int segs, bytecount;
  3430. segs = skb_shinfo(skb)->gso_segs ?: 1;
  3431. /* multiply data chunks by size of headers */
  3432. bytecount = ((segs - 1) * skb_headlen(skb)) +
  3433. skb->len;
  3434. total_tx_packets += segs;
  3435. total_tx_bytes += bytecount;
  3436. }
  3437. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  3438. tx_desc->upper.data = 0;
  3439. if (unlikely(++i == tx_ring->count)) i = 0;
  3440. }
  3441. eop = tx_ring->buffer_info[i].next_to_watch;
  3442. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3443. #ifdef CONFIG_E1000_NAPI
  3444. #define E1000_TX_WEIGHT 64
  3445. /* weight of a sort for tx, to avoid endless transmit cleanup */
  3446. if (count++ == E1000_TX_WEIGHT) break;
  3447. #endif
  3448. }
  3449. tx_ring->next_to_clean = i;
  3450. #define TX_WAKE_THRESHOLD 32
  3451. if (unlikely(cleaned && netif_carrier_ok(netdev) &&
  3452. E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
  3453. /* Make sure that anybody stopping the queue after this
  3454. * sees the new next_to_clean.
  3455. */
  3456. smp_mb();
  3457. if (netif_queue_stopped(netdev)) {
  3458. netif_wake_queue(netdev);
  3459. ++adapter->restart_queue;
  3460. }
  3461. }
  3462. if (adapter->detect_tx_hung) {
  3463. /* Detect a transmit hang in hardware, this serializes the
  3464. * check with the clearing of time_stamp and movement of i */
  3465. adapter->detect_tx_hung = FALSE;
  3466. if (tx_ring->buffer_info[eop].dma &&
  3467. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3468. (adapter->tx_timeout_factor * HZ))
  3469. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  3470. E1000_STATUS_TXOFF)) {
  3471. /* detected Tx unit hang */
  3472. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  3473. " Tx Queue <%lu>\n"
  3474. " TDH <%x>\n"
  3475. " TDT <%x>\n"
  3476. " next_to_use <%x>\n"
  3477. " next_to_clean <%x>\n"
  3478. "buffer_info[next_to_clean]\n"
  3479. " time_stamp <%lx>\n"
  3480. " next_to_watch <%x>\n"
  3481. " jiffies <%lx>\n"
  3482. " next_to_watch.status <%x>\n",
  3483. (unsigned long)((tx_ring - adapter->tx_ring) /
  3484. sizeof(struct e1000_tx_ring)),
  3485. readl(adapter->hw.hw_addr + tx_ring->tdh),
  3486. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3487. tx_ring->next_to_use,
  3488. tx_ring->next_to_clean,
  3489. tx_ring->buffer_info[eop].time_stamp,
  3490. eop,
  3491. jiffies,
  3492. eop_desc->upper.fields.status);
  3493. netif_stop_queue(netdev);
  3494. }
  3495. }
  3496. adapter->total_tx_bytes += total_tx_bytes;
  3497. adapter->total_tx_packets += total_tx_packets;
  3498. return cleaned;
  3499. }
  3500. /**
  3501. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3502. * @adapter: board private structure
  3503. * @status_err: receive descriptor status and error fields
  3504. * @csum: receive descriptor csum field
  3505. * @sk_buff: socket buffer with received data
  3506. **/
  3507. static void
  3508. e1000_rx_checksum(struct e1000_adapter *adapter,
  3509. uint32_t status_err, uint32_t csum,
  3510. struct sk_buff *skb)
  3511. {
  3512. uint16_t status = (uint16_t)status_err;
  3513. uint8_t errors = (uint8_t)(status_err >> 24);
  3514. skb->ip_summed = CHECKSUM_NONE;
  3515. /* 82543 or newer only */
  3516. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3517. /* Ignore Checksum bit is set */
  3518. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3519. /* TCP/UDP checksum error bit is set */
  3520. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3521. /* let the stack verify checksum errors */
  3522. adapter->hw_csum_err++;
  3523. return;
  3524. }
  3525. /* TCP/UDP Checksum has not been calculated */
  3526. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3527. if (!(status & E1000_RXD_STAT_TCPCS))
  3528. return;
  3529. } else {
  3530. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3531. return;
  3532. }
  3533. /* It must be a TCP or UDP packet with a valid checksum */
  3534. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3535. /* TCP checksum is good */
  3536. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3537. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3538. /* IP fragment with UDP payload */
  3539. /* Hardware complements the payload checksum, so we undo it
  3540. * and then put the value in host order for further stack use.
  3541. */
  3542. csum = ntohl(csum ^ 0xFFFF);
  3543. skb->csum = csum;
  3544. skb->ip_summed = CHECKSUM_COMPLETE;
  3545. }
  3546. adapter->hw_csum_good++;
  3547. }
  3548. /**
  3549. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3550. * @adapter: board private structure
  3551. **/
  3552. static boolean_t
  3553. #ifdef CONFIG_E1000_NAPI
  3554. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3555. struct e1000_rx_ring *rx_ring,
  3556. int *work_done, int work_to_do)
  3557. #else
  3558. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3559. struct e1000_rx_ring *rx_ring)
  3560. #endif
  3561. {
  3562. struct net_device *netdev = adapter->netdev;
  3563. struct pci_dev *pdev = adapter->pdev;
  3564. struct e1000_rx_desc *rx_desc, *next_rxd;
  3565. struct e1000_buffer *buffer_info, *next_buffer;
  3566. unsigned long flags;
  3567. uint32_t length;
  3568. uint8_t last_byte;
  3569. unsigned int i;
  3570. int cleaned_count = 0;
  3571. boolean_t cleaned = FALSE;
  3572. unsigned int total_rx_bytes=0, total_rx_packets=0;
  3573. i = rx_ring->next_to_clean;
  3574. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3575. buffer_info = &rx_ring->buffer_info[i];
  3576. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3577. struct sk_buff *skb;
  3578. u8 status;
  3579. #ifdef CONFIG_E1000_NAPI
  3580. if (*work_done >= work_to_do)
  3581. break;
  3582. (*work_done)++;
  3583. #endif
  3584. status = rx_desc->status;
  3585. skb = buffer_info->skb;
  3586. buffer_info->skb = NULL;
  3587. prefetch(skb->data - NET_IP_ALIGN);
  3588. if (++i == rx_ring->count) i = 0;
  3589. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3590. prefetch(next_rxd);
  3591. next_buffer = &rx_ring->buffer_info[i];
  3592. cleaned = TRUE;
  3593. cleaned_count++;
  3594. pci_unmap_single(pdev,
  3595. buffer_info->dma,
  3596. buffer_info->length,
  3597. PCI_DMA_FROMDEVICE);
  3598. length = le16_to_cpu(rx_desc->length);
  3599. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3600. /* All receives must fit into a single buffer */
  3601. E1000_DBG("%s: Receive packet consumed multiple"
  3602. " buffers\n", netdev->name);
  3603. /* recycle */
  3604. buffer_info->skb = skb;
  3605. goto next_desc;
  3606. }
  3607. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3608. last_byte = *(skb->data + length - 1);
  3609. if (TBI_ACCEPT(&adapter->hw, status,
  3610. rx_desc->errors, length, last_byte)) {
  3611. spin_lock_irqsave(&adapter->stats_lock, flags);
  3612. e1000_tbi_adjust_stats(&adapter->hw,
  3613. &adapter->stats,
  3614. length, skb->data);
  3615. spin_unlock_irqrestore(&adapter->stats_lock,
  3616. flags);
  3617. length--;
  3618. } else {
  3619. /* recycle */
  3620. buffer_info->skb = skb;
  3621. goto next_desc;
  3622. }
  3623. }
  3624. /* adjust length to remove Ethernet CRC, this must be
  3625. * done after the TBI_ACCEPT workaround above */
  3626. length -= 4;
  3627. /* probably a little skewed due to removing CRC */
  3628. total_rx_bytes += length;
  3629. total_rx_packets++;
  3630. /* code added for copybreak, this should improve
  3631. * performance for small packets with large amounts
  3632. * of reassembly being done in the stack */
  3633. if (length < copybreak) {
  3634. struct sk_buff *new_skb =
  3635. netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
  3636. if (new_skb) {
  3637. skb_reserve(new_skb, NET_IP_ALIGN);
  3638. skb_copy_to_linear_data_offset(new_skb,
  3639. -NET_IP_ALIGN,
  3640. (skb->data -
  3641. NET_IP_ALIGN),
  3642. (length +
  3643. NET_IP_ALIGN));
  3644. /* save the skb in buffer_info as good */
  3645. buffer_info->skb = skb;
  3646. skb = new_skb;
  3647. }
  3648. /* else just continue with the old one */
  3649. }
  3650. /* end copybreak code */
  3651. skb_put(skb, length);
  3652. /* Receive Checksum Offload */
  3653. e1000_rx_checksum(adapter,
  3654. (uint32_t)(status) |
  3655. ((uint32_t)(rx_desc->errors) << 24),
  3656. le16_to_cpu(rx_desc->csum), skb);
  3657. skb->protocol = eth_type_trans(skb, netdev);
  3658. #ifdef CONFIG_E1000_NAPI
  3659. if (unlikely(adapter->vlgrp &&
  3660. (status & E1000_RXD_STAT_VP))) {
  3661. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3662. le16_to_cpu(rx_desc->special) &
  3663. E1000_RXD_SPC_VLAN_MASK);
  3664. } else {
  3665. netif_receive_skb(skb);
  3666. }
  3667. #else /* CONFIG_E1000_NAPI */
  3668. if (unlikely(adapter->vlgrp &&
  3669. (status & E1000_RXD_STAT_VP))) {
  3670. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3671. le16_to_cpu(rx_desc->special) &
  3672. E1000_RXD_SPC_VLAN_MASK);
  3673. } else {
  3674. netif_rx(skb);
  3675. }
  3676. #endif /* CONFIG_E1000_NAPI */
  3677. netdev->last_rx = jiffies;
  3678. next_desc:
  3679. rx_desc->status = 0;
  3680. /* return some buffers to hardware, one at a time is too slow */
  3681. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3682. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3683. cleaned_count = 0;
  3684. }
  3685. /* use prefetched values */
  3686. rx_desc = next_rxd;
  3687. buffer_info = next_buffer;
  3688. }
  3689. rx_ring->next_to_clean = i;
  3690. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3691. if (cleaned_count)
  3692. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3693. adapter->total_rx_packets += total_rx_packets;
  3694. adapter->total_rx_bytes += total_rx_bytes;
  3695. return cleaned;
  3696. }
  3697. /**
  3698. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3699. * @adapter: board private structure
  3700. **/
  3701. static boolean_t
  3702. #ifdef CONFIG_E1000_NAPI
  3703. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3704. struct e1000_rx_ring *rx_ring,
  3705. int *work_done, int work_to_do)
  3706. #else
  3707. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3708. struct e1000_rx_ring *rx_ring)
  3709. #endif
  3710. {
  3711. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3712. struct net_device *netdev = adapter->netdev;
  3713. struct pci_dev *pdev = adapter->pdev;
  3714. struct e1000_buffer *buffer_info, *next_buffer;
  3715. struct e1000_ps_page *ps_page;
  3716. struct e1000_ps_page_dma *ps_page_dma;
  3717. struct sk_buff *skb;
  3718. unsigned int i, j;
  3719. uint32_t length, staterr;
  3720. int cleaned_count = 0;
  3721. boolean_t cleaned = FALSE;
  3722. unsigned int total_rx_bytes=0, total_rx_packets=0;
  3723. i = rx_ring->next_to_clean;
  3724. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3725. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3726. buffer_info = &rx_ring->buffer_info[i];
  3727. while (staterr & E1000_RXD_STAT_DD) {
  3728. ps_page = &rx_ring->ps_page[i];
  3729. ps_page_dma = &rx_ring->ps_page_dma[i];
  3730. #ifdef CONFIG_E1000_NAPI
  3731. if (unlikely(*work_done >= work_to_do))
  3732. break;
  3733. (*work_done)++;
  3734. #endif
  3735. skb = buffer_info->skb;
  3736. /* in the packet split case this is header only */
  3737. prefetch(skb->data - NET_IP_ALIGN);
  3738. if (++i == rx_ring->count) i = 0;
  3739. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3740. prefetch(next_rxd);
  3741. next_buffer = &rx_ring->buffer_info[i];
  3742. cleaned = TRUE;
  3743. cleaned_count++;
  3744. pci_unmap_single(pdev, buffer_info->dma,
  3745. buffer_info->length,
  3746. PCI_DMA_FROMDEVICE);
  3747. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3748. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3749. " the full packet\n", netdev->name);
  3750. dev_kfree_skb_irq(skb);
  3751. goto next_desc;
  3752. }
  3753. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3754. dev_kfree_skb_irq(skb);
  3755. goto next_desc;
  3756. }
  3757. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3758. if (unlikely(!length)) {
  3759. E1000_DBG("%s: Last part of the packet spanning"
  3760. " multiple descriptors\n", netdev->name);
  3761. dev_kfree_skb_irq(skb);
  3762. goto next_desc;
  3763. }
  3764. /* Good Receive */
  3765. skb_put(skb, length);
  3766. {
  3767. /* this looks ugly, but it seems compiler issues make it
  3768. more efficient than reusing j */
  3769. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3770. /* page alloc/put takes too long and effects small packet
  3771. * throughput, so unsplit small packets and save the alloc/put*/
  3772. if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3773. u8 *vaddr;
  3774. /* there is no documentation about how to call
  3775. * kmap_atomic, so we can't hold the mapping
  3776. * very long */
  3777. pci_dma_sync_single_for_cpu(pdev,
  3778. ps_page_dma->ps_page_dma[0],
  3779. PAGE_SIZE,
  3780. PCI_DMA_FROMDEVICE);
  3781. vaddr = kmap_atomic(ps_page->ps_page[0],
  3782. KM_SKB_DATA_SOFTIRQ);
  3783. memcpy(skb_tail_pointer(skb), vaddr, l1);
  3784. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3785. pci_dma_sync_single_for_device(pdev,
  3786. ps_page_dma->ps_page_dma[0],
  3787. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3788. /* remove the CRC */
  3789. l1 -= 4;
  3790. skb_put(skb, l1);
  3791. goto copydone;
  3792. } /* if */
  3793. }
  3794. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3795. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3796. break;
  3797. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3798. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3799. ps_page_dma->ps_page_dma[j] = 0;
  3800. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3801. length);
  3802. ps_page->ps_page[j] = NULL;
  3803. skb->len += length;
  3804. skb->data_len += length;
  3805. skb->truesize += length;
  3806. }
  3807. /* strip the ethernet crc, problem is we're using pages now so
  3808. * this whole operation can get a little cpu intensive */
  3809. pskb_trim(skb, skb->len - 4);
  3810. copydone:
  3811. total_rx_bytes += skb->len;
  3812. total_rx_packets++;
  3813. e1000_rx_checksum(adapter, staterr,
  3814. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3815. skb->protocol = eth_type_trans(skb, netdev);
  3816. if (likely(rx_desc->wb.upper.header_status &
  3817. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3818. adapter->rx_hdr_split++;
  3819. #ifdef CONFIG_E1000_NAPI
  3820. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3821. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3822. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3823. E1000_RXD_SPC_VLAN_MASK);
  3824. } else {
  3825. netif_receive_skb(skb);
  3826. }
  3827. #else /* CONFIG_E1000_NAPI */
  3828. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3829. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3830. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3831. E1000_RXD_SPC_VLAN_MASK);
  3832. } else {
  3833. netif_rx(skb);
  3834. }
  3835. #endif /* CONFIG_E1000_NAPI */
  3836. netdev->last_rx = jiffies;
  3837. next_desc:
  3838. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3839. buffer_info->skb = NULL;
  3840. /* return some buffers to hardware, one at a time is too slow */
  3841. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3842. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3843. cleaned_count = 0;
  3844. }
  3845. /* use prefetched values */
  3846. rx_desc = next_rxd;
  3847. buffer_info = next_buffer;
  3848. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3849. }
  3850. rx_ring->next_to_clean = i;
  3851. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3852. if (cleaned_count)
  3853. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3854. adapter->total_rx_packets += total_rx_packets;
  3855. adapter->total_rx_bytes += total_rx_bytes;
  3856. return cleaned;
  3857. }
  3858. /**
  3859. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3860. * @adapter: address of board private structure
  3861. **/
  3862. static void
  3863. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3864. struct e1000_rx_ring *rx_ring,
  3865. int cleaned_count)
  3866. {
  3867. struct net_device *netdev = adapter->netdev;
  3868. struct pci_dev *pdev = adapter->pdev;
  3869. struct e1000_rx_desc *rx_desc;
  3870. struct e1000_buffer *buffer_info;
  3871. struct sk_buff *skb;
  3872. unsigned int i;
  3873. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3874. i = rx_ring->next_to_use;
  3875. buffer_info = &rx_ring->buffer_info[i];
  3876. while (cleaned_count--) {
  3877. skb = buffer_info->skb;
  3878. if (skb) {
  3879. skb_trim(skb, 0);
  3880. goto map_skb;
  3881. }
  3882. skb = netdev_alloc_skb(netdev, bufsz);
  3883. if (unlikely(!skb)) {
  3884. /* Better luck next round */
  3885. adapter->alloc_rx_buff_failed++;
  3886. break;
  3887. }
  3888. /* Fix for errata 23, can't cross 64kB boundary */
  3889. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3890. struct sk_buff *oldskb = skb;
  3891. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3892. "at %p\n", bufsz, skb->data);
  3893. /* Try again, without freeing the previous */
  3894. skb = netdev_alloc_skb(netdev, bufsz);
  3895. /* Failed allocation, critical failure */
  3896. if (!skb) {
  3897. dev_kfree_skb(oldskb);
  3898. break;
  3899. }
  3900. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3901. /* give up */
  3902. dev_kfree_skb(skb);
  3903. dev_kfree_skb(oldskb);
  3904. break; /* while !buffer_info->skb */
  3905. }
  3906. /* Use new allocation */
  3907. dev_kfree_skb(oldskb);
  3908. }
  3909. /* Make buffer alignment 2 beyond a 16 byte boundary
  3910. * this will result in a 16 byte aligned IP header after
  3911. * the 14 byte MAC header is removed
  3912. */
  3913. skb_reserve(skb, NET_IP_ALIGN);
  3914. buffer_info->skb = skb;
  3915. buffer_info->length = adapter->rx_buffer_len;
  3916. map_skb:
  3917. buffer_info->dma = pci_map_single(pdev,
  3918. skb->data,
  3919. adapter->rx_buffer_len,
  3920. PCI_DMA_FROMDEVICE);
  3921. /* Fix for errata 23, can't cross 64kB boundary */
  3922. if (!e1000_check_64k_bound(adapter,
  3923. (void *)(unsigned long)buffer_info->dma,
  3924. adapter->rx_buffer_len)) {
  3925. DPRINTK(RX_ERR, ERR,
  3926. "dma align check failed: %u bytes at %p\n",
  3927. adapter->rx_buffer_len,
  3928. (void *)(unsigned long)buffer_info->dma);
  3929. dev_kfree_skb(skb);
  3930. buffer_info->skb = NULL;
  3931. pci_unmap_single(pdev, buffer_info->dma,
  3932. adapter->rx_buffer_len,
  3933. PCI_DMA_FROMDEVICE);
  3934. break; /* while !buffer_info->skb */
  3935. }
  3936. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3937. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3938. if (unlikely(++i == rx_ring->count))
  3939. i = 0;
  3940. buffer_info = &rx_ring->buffer_info[i];
  3941. }
  3942. if (likely(rx_ring->next_to_use != i)) {
  3943. rx_ring->next_to_use = i;
  3944. if (unlikely(i-- == 0))
  3945. i = (rx_ring->count - 1);
  3946. /* Force memory writes to complete before letting h/w
  3947. * know there are new descriptors to fetch. (Only
  3948. * applicable for weak-ordered memory model archs,
  3949. * such as IA-64). */
  3950. wmb();
  3951. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3952. }
  3953. }
  3954. /**
  3955. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3956. * @adapter: address of board private structure
  3957. **/
  3958. static void
  3959. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3960. struct e1000_rx_ring *rx_ring,
  3961. int cleaned_count)
  3962. {
  3963. struct net_device *netdev = adapter->netdev;
  3964. struct pci_dev *pdev = adapter->pdev;
  3965. union e1000_rx_desc_packet_split *rx_desc;
  3966. struct e1000_buffer *buffer_info;
  3967. struct e1000_ps_page *ps_page;
  3968. struct e1000_ps_page_dma *ps_page_dma;
  3969. struct sk_buff *skb;
  3970. unsigned int i, j;
  3971. i = rx_ring->next_to_use;
  3972. buffer_info = &rx_ring->buffer_info[i];
  3973. ps_page = &rx_ring->ps_page[i];
  3974. ps_page_dma = &rx_ring->ps_page_dma[i];
  3975. while (cleaned_count--) {
  3976. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3977. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3978. if (j < adapter->rx_ps_pages) {
  3979. if (likely(!ps_page->ps_page[j])) {
  3980. ps_page->ps_page[j] =
  3981. alloc_page(GFP_ATOMIC);
  3982. if (unlikely(!ps_page->ps_page[j])) {
  3983. adapter->alloc_rx_buff_failed++;
  3984. goto no_buffers;
  3985. }
  3986. ps_page_dma->ps_page_dma[j] =
  3987. pci_map_page(pdev,
  3988. ps_page->ps_page[j],
  3989. 0, PAGE_SIZE,
  3990. PCI_DMA_FROMDEVICE);
  3991. }
  3992. /* Refresh the desc even if buffer_addrs didn't
  3993. * change because each write-back erases
  3994. * this info.
  3995. */
  3996. rx_desc->read.buffer_addr[j+1] =
  3997. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3998. } else
  3999. rx_desc->read.buffer_addr[j+1] = ~0;
  4000. }
  4001. skb = netdev_alloc_skb(netdev,
  4002. adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  4003. if (unlikely(!skb)) {
  4004. adapter->alloc_rx_buff_failed++;
  4005. break;
  4006. }
  4007. /* Make buffer alignment 2 beyond a 16 byte boundary
  4008. * this will result in a 16 byte aligned IP header after
  4009. * the 14 byte MAC header is removed
  4010. */
  4011. skb_reserve(skb, NET_IP_ALIGN);
  4012. buffer_info->skb = skb;
  4013. buffer_info->length = adapter->rx_ps_bsize0;
  4014. buffer_info->dma = pci_map_single(pdev, skb->data,
  4015. adapter->rx_ps_bsize0,
  4016. PCI_DMA_FROMDEVICE);
  4017. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  4018. if (unlikely(++i == rx_ring->count)) i = 0;
  4019. buffer_info = &rx_ring->buffer_info[i];
  4020. ps_page = &rx_ring->ps_page[i];
  4021. ps_page_dma = &rx_ring->ps_page_dma[i];
  4022. }
  4023. no_buffers:
  4024. if (likely(rx_ring->next_to_use != i)) {
  4025. rx_ring->next_to_use = i;
  4026. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  4027. /* Force memory writes to complete before letting h/w
  4028. * know there are new descriptors to fetch. (Only
  4029. * applicable for weak-ordered memory model archs,
  4030. * such as IA-64). */
  4031. wmb();
  4032. /* Hardware increments by 16 bytes, but packet split
  4033. * descriptors are 32 bytes...so we increment tail
  4034. * twice as much.
  4035. */
  4036. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  4037. }
  4038. }
  4039. /**
  4040. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  4041. * @adapter:
  4042. **/
  4043. static void
  4044. e1000_smartspeed(struct e1000_adapter *adapter)
  4045. {
  4046. uint16_t phy_status;
  4047. uint16_t phy_ctrl;
  4048. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  4049. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  4050. return;
  4051. if (adapter->smartspeed == 0) {
  4052. /* If Master/Slave config fault is asserted twice,
  4053. * we assume back-to-back */
  4054. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  4055. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  4056. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  4057. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  4058. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  4059. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  4060. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  4061. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  4062. phy_ctrl);
  4063. adapter->smartspeed++;
  4064. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  4065. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  4066. &phy_ctrl)) {
  4067. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  4068. MII_CR_RESTART_AUTO_NEG);
  4069. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  4070. phy_ctrl);
  4071. }
  4072. }
  4073. return;
  4074. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  4075. /* If still no link, perhaps using 2/3 pair cable */
  4076. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  4077. phy_ctrl |= CR_1000T_MS_ENABLE;
  4078. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  4079. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  4080. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  4081. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  4082. MII_CR_RESTART_AUTO_NEG);
  4083. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  4084. }
  4085. }
  4086. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  4087. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  4088. adapter->smartspeed = 0;
  4089. }
  4090. /**
  4091. * e1000_ioctl -
  4092. * @netdev:
  4093. * @ifreq:
  4094. * @cmd:
  4095. **/
  4096. static int
  4097. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  4098. {
  4099. switch (cmd) {
  4100. case SIOCGMIIPHY:
  4101. case SIOCGMIIREG:
  4102. case SIOCSMIIREG:
  4103. return e1000_mii_ioctl(netdev, ifr, cmd);
  4104. default:
  4105. return -EOPNOTSUPP;
  4106. }
  4107. }
  4108. /**
  4109. * e1000_mii_ioctl -
  4110. * @netdev:
  4111. * @ifreq:
  4112. * @cmd:
  4113. **/
  4114. static int
  4115. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  4116. {
  4117. struct e1000_adapter *adapter = netdev_priv(netdev);
  4118. struct mii_ioctl_data *data = if_mii(ifr);
  4119. int retval;
  4120. uint16_t mii_reg;
  4121. uint16_t spddplx;
  4122. unsigned long flags;
  4123. if (adapter->hw.media_type != e1000_media_type_copper)
  4124. return -EOPNOTSUPP;
  4125. switch (cmd) {
  4126. case SIOCGMIIPHY:
  4127. data->phy_id = adapter->hw.phy_addr;
  4128. break;
  4129. case SIOCGMIIREG:
  4130. if (!capable(CAP_NET_ADMIN))
  4131. return -EPERM;
  4132. spin_lock_irqsave(&adapter->stats_lock, flags);
  4133. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  4134. &data->val_out)) {
  4135. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4136. return -EIO;
  4137. }
  4138. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4139. break;
  4140. case SIOCSMIIREG:
  4141. if (!capable(CAP_NET_ADMIN))
  4142. return -EPERM;
  4143. if (data->reg_num & ~(0x1F))
  4144. return -EFAULT;
  4145. mii_reg = data->val_in;
  4146. spin_lock_irqsave(&adapter->stats_lock, flags);
  4147. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  4148. mii_reg)) {
  4149. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4150. return -EIO;
  4151. }
  4152. if (adapter->hw.media_type == e1000_media_type_copper) {
  4153. switch (data->reg_num) {
  4154. case PHY_CTRL:
  4155. if (mii_reg & MII_CR_POWER_DOWN)
  4156. break;
  4157. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  4158. adapter->hw.autoneg = 1;
  4159. adapter->hw.autoneg_advertised = 0x2F;
  4160. } else {
  4161. if (mii_reg & 0x40)
  4162. spddplx = SPEED_1000;
  4163. else if (mii_reg & 0x2000)
  4164. spddplx = SPEED_100;
  4165. else
  4166. spddplx = SPEED_10;
  4167. spddplx += (mii_reg & 0x100)
  4168. ? DUPLEX_FULL :
  4169. DUPLEX_HALF;
  4170. retval = e1000_set_spd_dplx(adapter,
  4171. spddplx);
  4172. if (retval) {
  4173. spin_unlock_irqrestore(
  4174. &adapter->stats_lock,
  4175. flags);
  4176. return retval;
  4177. }
  4178. }
  4179. if (netif_running(adapter->netdev))
  4180. e1000_reinit_locked(adapter);
  4181. else
  4182. e1000_reset(adapter);
  4183. break;
  4184. case M88E1000_PHY_SPEC_CTRL:
  4185. case M88E1000_EXT_PHY_SPEC_CTRL:
  4186. if (e1000_phy_reset(&adapter->hw)) {
  4187. spin_unlock_irqrestore(
  4188. &adapter->stats_lock, flags);
  4189. return -EIO;
  4190. }
  4191. break;
  4192. }
  4193. } else {
  4194. switch (data->reg_num) {
  4195. case PHY_CTRL:
  4196. if (mii_reg & MII_CR_POWER_DOWN)
  4197. break;
  4198. if (netif_running(adapter->netdev))
  4199. e1000_reinit_locked(adapter);
  4200. else
  4201. e1000_reset(adapter);
  4202. break;
  4203. }
  4204. }
  4205. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4206. break;
  4207. default:
  4208. return -EOPNOTSUPP;
  4209. }
  4210. return E1000_SUCCESS;
  4211. }
  4212. void
  4213. e1000_pci_set_mwi(struct e1000_hw *hw)
  4214. {
  4215. struct e1000_adapter *adapter = hw->back;
  4216. int ret_val = pci_set_mwi(adapter->pdev);
  4217. if (ret_val)
  4218. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  4219. }
  4220. void
  4221. e1000_pci_clear_mwi(struct e1000_hw *hw)
  4222. {
  4223. struct e1000_adapter *adapter = hw->back;
  4224. pci_clear_mwi(adapter->pdev);
  4225. }
  4226. void
  4227. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  4228. {
  4229. struct e1000_adapter *adapter = hw->back;
  4230. pci_read_config_word(adapter->pdev, reg, value);
  4231. }
  4232. void
  4233. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  4234. {
  4235. struct e1000_adapter *adapter = hw->back;
  4236. pci_write_config_word(adapter->pdev, reg, *value);
  4237. }
  4238. int32_t
  4239. e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  4240. {
  4241. struct e1000_adapter *adapter = hw->back;
  4242. uint16_t cap_offset;
  4243. cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
  4244. if (!cap_offset)
  4245. return -E1000_ERR_CONFIG;
  4246. pci_read_config_word(adapter->pdev, cap_offset + reg, value);
  4247. return E1000_SUCCESS;
  4248. }
  4249. void
  4250. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  4251. {
  4252. outl(value, port);
  4253. }
  4254. static void
  4255. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  4256. {
  4257. struct e1000_adapter *adapter = netdev_priv(netdev);
  4258. uint32_t ctrl, rctl;
  4259. e1000_irq_disable(adapter);
  4260. adapter->vlgrp = grp;
  4261. if (grp) {
  4262. /* enable VLAN tag insert/strip */
  4263. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  4264. ctrl |= E1000_CTRL_VME;
  4265. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  4266. if (adapter->hw.mac_type != e1000_ich8lan) {
  4267. /* enable VLAN receive filtering */
  4268. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  4269. rctl |= E1000_RCTL_VFE;
  4270. rctl &= ~E1000_RCTL_CFIEN;
  4271. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  4272. e1000_update_mng_vlan(adapter);
  4273. }
  4274. } else {
  4275. /* disable VLAN tag insert/strip */
  4276. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  4277. ctrl &= ~E1000_CTRL_VME;
  4278. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  4279. if (adapter->hw.mac_type != e1000_ich8lan) {
  4280. /* disable VLAN filtering */
  4281. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  4282. rctl &= ~E1000_RCTL_VFE;
  4283. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  4284. if (adapter->mng_vlan_id !=
  4285. (uint16_t)E1000_MNG_VLAN_NONE) {
  4286. e1000_vlan_rx_kill_vid(netdev,
  4287. adapter->mng_vlan_id);
  4288. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  4289. }
  4290. }
  4291. }
  4292. e1000_irq_enable(adapter);
  4293. }
  4294. static void
  4295. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  4296. {
  4297. struct e1000_adapter *adapter = netdev_priv(netdev);
  4298. uint32_t vfta, index;
  4299. if ((adapter->hw.mng_cookie.status &
  4300. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  4301. (vid == adapter->mng_vlan_id))
  4302. return;
  4303. /* add VID to filter table */
  4304. index = (vid >> 5) & 0x7F;
  4305. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  4306. vfta |= (1 << (vid & 0x1F));
  4307. e1000_write_vfta(&adapter->hw, index, vfta);
  4308. }
  4309. static void
  4310. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  4311. {
  4312. struct e1000_adapter *adapter = netdev_priv(netdev);
  4313. uint32_t vfta, index;
  4314. e1000_irq_disable(adapter);
  4315. vlan_group_set_device(adapter->vlgrp, vid, NULL);
  4316. e1000_irq_enable(adapter);
  4317. if ((adapter->hw.mng_cookie.status &
  4318. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  4319. (vid == adapter->mng_vlan_id)) {
  4320. /* release control to f/w */
  4321. e1000_release_hw_control(adapter);
  4322. return;
  4323. }
  4324. /* remove VID from filter table */
  4325. index = (vid >> 5) & 0x7F;
  4326. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  4327. vfta &= ~(1 << (vid & 0x1F));
  4328. e1000_write_vfta(&adapter->hw, index, vfta);
  4329. }
  4330. static void
  4331. e1000_restore_vlan(struct e1000_adapter *adapter)
  4332. {
  4333. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  4334. if (adapter->vlgrp) {
  4335. uint16_t vid;
  4336. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  4337. if (!vlan_group_get_device(adapter->vlgrp, vid))
  4338. continue;
  4339. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  4340. }
  4341. }
  4342. }
  4343. int
  4344. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  4345. {
  4346. adapter->hw.autoneg = 0;
  4347. /* Fiber NICs only allow 1000 gbps Full duplex */
  4348. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  4349. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  4350. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  4351. return -EINVAL;
  4352. }
  4353. switch (spddplx) {
  4354. case SPEED_10 + DUPLEX_HALF:
  4355. adapter->hw.forced_speed_duplex = e1000_10_half;
  4356. break;
  4357. case SPEED_10 + DUPLEX_FULL:
  4358. adapter->hw.forced_speed_duplex = e1000_10_full;
  4359. break;
  4360. case SPEED_100 + DUPLEX_HALF:
  4361. adapter->hw.forced_speed_duplex = e1000_100_half;
  4362. break;
  4363. case SPEED_100 + DUPLEX_FULL:
  4364. adapter->hw.forced_speed_duplex = e1000_100_full;
  4365. break;
  4366. case SPEED_1000 + DUPLEX_FULL:
  4367. adapter->hw.autoneg = 1;
  4368. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  4369. break;
  4370. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  4371. default:
  4372. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  4373. return -EINVAL;
  4374. }
  4375. return 0;
  4376. }
  4377. static int
  4378. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  4379. {
  4380. struct net_device *netdev = pci_get_drvdata(pdev);
  4381. struct e1000_adapter *adapter = netdev_priv(netdev);
  4382. uint32_t ctrl, ctrl_ext, rctl, status;
  4383. uint32_t wufc = adapter->wol;
  4384. #ifdef CONFIG_PM
  4385. int retval = 0;
  4386. #endif
  4387. netif_device_detach(netdev);
  4388. if (netif_running(netdev)) {
  4389. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  4390. e1000_down(adapter);
  4391. }
  4392. #ifdef CONFIG_PM
  4393. retval = pci_save_state(pdev);
  4394. if (retval)
  4395. return retval;
  4396. #endif
  4397. status = E1000_READ_REG(&adapter->hw, STATUS);
  4398. if (status & E1000_STATUS_LU)
  4399. wufc &= ~E1000_WUFC_LNKC;
  4400. if (wufc) {
  4401. e1000_setup_rctl(adapter);
  4402. e1000_set_multi(netdev);
  4403. /* turn on all-multi mode if wake on multicast is enabled */
  4404. if (wufc & E1000_WUFC_MC) {
  4405. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  4406. rctl |= E1000_RCTL_MPE;
  4407. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  4408. }
  4409. if (adapter->hw.mac_type >= e1000_82540) {
  4410. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  4411. /* advertise wake from D3Cold */
  4412. #define E1000_CTRL_ADVD3WUC 0x00100000
  4413. /* phy power management enable */
  4414. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  4415. ctrl |= E1000_CTRL_ADVD3WUC |
  4416. E1000_CTRL_EN_PHY_PWR_MGMT;
  4417. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  4418. }
  4419. if (adapter->hw.media_type == e1000_media_type_fiber ||
  4420. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  4421. /* keep the laser running in D3 */
  4422. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  4423. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  4424. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  4425. }
  4426. /* Allow time for pending master requests to run */
  4427. e1000_disable_pciex_master(&adapter->hw);
  4428. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  4429. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  4430. pci_enable_wake(pdev, PCI_D3hot, 1);
  4431. pci_enable_wake(pdev, PCI_D3cold, 1);
  4432. } else {
  4433. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  4434. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  4435. pci_enable_wake(pdev, PCI_D3hot, 0);
  4436. pci_enable_wake(pdev, PCI_D3cold, 0);
  4437. }
  4438. e1000_release_manageability(adapter);
  4439. /* make sure adapter isn't asleep if manageability is enabled */
  4440. if (adapter->en_mng_pt) {
  4441. pci_enable_wake(pdev, PCI_D3hot, 1);
  4442. pci_enable_wake(pdev, PCI_D3cold, 1);
  4443. }
  4444. if (adapter->hw.phy_type == e1000_phy_igp_3)
  4445. e1000_phy_powerdown_workaround(&adapter->hw);
  4446. if (netif_running(netdev))
  4447. e1000_free_irq(adapter);
  4448. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  4449. * would have already happened in close and is redundant. */
  4450. e1000_release_hw_control(adapter);
  4451. pci_disable_device(pdev);
  4452. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4453. return 0;
  4454. }
  4455. #ifdef CONFIG_PM
  4456. static int
  4457. e1000_resume(struct pci_dev *pdev)
  4458. {
  4459. struct net_device *netdev = pci_get_drvdata(pdev);
  4460. struct e1000_adapter *adapter = netdev_priv(netdev);
  4461. uint32_t err;
  4462. pci_set_power_state(pdev, PCI_D0);
  4463. pci_restore_state(pdev);
  4464. if ((err = pci_enable_device(pdev))) {
  4465. printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
  4466. return err;
  4467. }
  4468. pci_set_master(pdev);
  4469. pci_enable_wake(pdev, PCI_D3hot, 0);
  4470. pci_enable_wake(pdev, PCI_D3cold, 0);
  4471. if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
  4472. return err;
  4473. e1000_power_up_phy(adapter);
  4474. e1000_reset(adapter);
  4475. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4476. e1000_init_manageability(adapter);
  4477. if (netif_running(netdev))
  4478. e1000_up(adapter);
  4479. netif_device_attach(netdev);
  4480. /* If the controller is 82573 and f/w is AMT, do not set
  4481. * DRV_LOAD until the interface is up. For all other cases,
  4482. * let the f/w know that the h/w is now under the control
  4483. * of the driver. */
  4484. if (adapter->hw.mac_type != e1000_82573 ||
  4485. !e1000_check_mng_mode(&adapter->hw))
  4486. e1000_get_hw_control(adapter);
  4487. return 0;
  4488. }
  4489. #endif
  4490. static void e1000_shutdown(struct pci_dev *pdev)
  4491. {
  4492. e1000_suspend(pdev, PMSG_SUSPEND);
  4493. }
  4494. #ifdef CONFIG_NET_POLL_CONTROLLER
  4495. /*
  4496. * Polling 'interrupt' - used by things like netconsole to send skbs
  4497. * without having to re-enable interrupts. It's not called while
  4498. * the interrupt routine is executing.
  4499. */
  4500. static void
  4501. e1000_netpoll(struct net_device *netdev)
  4502. {
  4503. struct e1000_adapter *adapter = netdev_priv(netdev);
  4504. disable_irq(adapter->pdev->irq);
  4505. e1000_intr(adapter->pdev->irq, netdev);
  4506. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4507. #ifndef CONFIG_E1000_NAPI
  4508. adapter->clean_rx(adapter, adapter->rx_ring);
  4509. #endif
  4510. enable_irq(adapter->pdev->irq);
  4511. }
  4512. #endif
  4513. /**
  4514. * e1000_io_error_detected - called when PCI error is detected
  4515. * @pdev: Pointer to PCI device
  4516. * @state: The current pci conneection state
  4517. *
  4518. * This function is called after a PCI bus error affecting
  4519. * this device has been detected.
  4520. */
  4521. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  4522. {
  4523. struct net_device *netdev = pci_get_drvdata(pdev);
  4524. struct e1000_adapter *adapter = netdev->priv;
  4525. netif_device_detach(netdev);
  4526. if (netif_running(netdev))
  4527. e1000_down(adapter);
  4528. pci_disable_device(pdev);
  4529. /* Request a slot slot reset. */
  4530. return PCI_ERS_RESULT_NEED_RESET;
  4531. }
  4532. /**
  4533. * e1000_io_slot_reset - called after the pci bus has been reset.
  4534. * @pdev: Pointer to PCI device
  4535. *
  4536. * Restart the card from scratch, as if from a cold-boot. Implementation
  4537. * resembles the first-half of the e1000_resume routine.
  4538. */
  4539. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4540. {
  4541. struct net_device *netdev = pci_get_drvdata(pdev);
  4542. struct e1000_adapter *adapter = netdev->priv;
  4543. if (pci_enable_device(pdev)) {
  4544. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  4545. return PCI_ERS_RESULT_DISCONNECT;
  4546. }
  4547. pci_set_master(pdev);
  4548. pci_enable_wake(pdev, PCI_D3hot, 0);
  4549. pci_enable_wake(pdev, PCI_D3cold, 0);
  4550. e1000_reset(adapter);
  4551. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4552. return PCI_ERS_RESULT_RECOVERED;
  4553. }
  4554. /**
  4555. * e1000_io_resume - called when traffic can start flowing again.
  4556. * @pdev: Pointer to PCI device
  4557. *
  4558. * This callback is called when the error recovery driver tells us that
  4559. * its OK to resume normal operation. Implementation resembles the
  4560. * second-half of the e1000_resume routine.
  4561. */
  4562. static void e1000_io_resume(struct pci_dev *pdev)
  4563. {
  4564. struct net_device *netdev = pci_get_drvdata(pdev);
  4565. struct e1000_adapter *adapter = netdev->priv;
  4566. e1000_init_manageability(adapter);
  4567. if (netif_running(netdev)) {
  4568. if (e1000_up(adapter)) {
  4569. printk("e1000: can't bring device back up after reset\n");
  4570. return;
  4571. }
  4572. }
  4573. netif_device_attach(netdev);
  4574. /* If the controller is 82573 and f/w is AMT, do not set
  4575. * DRV_LOAD until the interface is up. For all other cases,
  4576. * let the f/w know that the h/w is now under the control
  4577. * of the driver. */
  4578. if (adapter->hw.mac_type != e1000_82573 ||
  4579. !e1000_check_mng_mode(&adapter->hw))
  4580. e1000_get_hw_control(adapter);
  4581. }
  4582. /* e1000_main.c */