dm9000.c 28 KB

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  1. /*
  2. * dm9000.c: Version 1.2 03/18/2003
  3. *
  4. * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
  5. * Copyright (C) 1997 Sten Wang
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version 2
  10. * of the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
  18. *
  19. * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
  20. * 06/22/2001 Support DM9801 progrmming
  21. * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
  22. * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
  23. * R17 = (R17 & 0xfff0) | NF + 3
  24. * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
  25. * R17 = (R17 & 0xfff0) | NF
  26. *
  27. * v1.00 modify by simon 2001.9.5
  28. * change for kernel 2.4.x
  29. *
  30. * v1.1 11/09/2001 fix force mode bug
  31. *
  32. * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
  33. * Fixed phy reset.
  34. * Added tx/rx 32 bit mode.
  35. * Cleaned up for kernel merge.
  36. *
  37. * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
  38. * Port to 2.6 kernel
  39. *
  40. * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
  41. * Cleanup of code to remove ifdefs
  42. * Allowed platform device data to influence access width
  43. * Reformatting areas of code
  44. *
  45. * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
  46. * * removed 2.4 style module parameters
  47. * * removed removed unused stat counter and fixed
  48. * net_device_stats
  49. * * introduced tx_timeout function
  50. * * reworked locking
  51. *
  52. * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
  53. * * fixed spinlock call without pointer
  54. * * ensure spinlock is initialised
  55. */
  56. #include <linux/module.h>
  57. #include <linux/ioport.h>
  58. #include <linux/netdevice.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/init.h>
  61. #include <linux/skbuff.h>
  62. #include <linux/spinlock.h>
  63. #include <linux/crc32.h>
  64. #include <linux/mii.h>
  65. #include <linux/dm9000.h>
  66. #include <linux/delay.h>
  67. #include <linux/platform_device.h>
  68. #include <asm/delay.h>
  69. #include <asm/irq.h>
  70. #include <asm/io.h>
  71. #include "dm9000.h"
  72. /* Board/System/Debug information/definition ---------------- */
  73. #define DM9000_PHY 0x40 /* PHY address 0x01 */
  74. #define CARDNAME "dm9000"
  75. #define PFX CARDNAME ": "
  76. #define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */
  77. #define DM9000_DEBUG 0
  78. #if DM9000_DEBUG > 2
  79. #define PRINTK3(args...) printk(CARDNAME ": " args)
  80. #else
  81. #define PRINTK3(args...) do { } while(0)
  82. #endif
  83. #if DM9000_DEBUG > 1
  84. #define PRINTK2(args...) printk(CARDNAME ": " args)
  85. #else
  86. #define PRINTK2(args...) do { } while(0)
  87. #endif
  88. #if DM9000_DEBUG > 0
  89. #define PRINTK1(args...) printk(CARDNAME ": " args)
  90. #define PRINTK(args...) printk(CARDNAME ": " args)
  91. #else
  92. #define PRINTK1(args...) do { } while(0)
  93. #define PRINTK(args...) printk(KERN_DEBUG args)
  94. #endif
  95. /*
  96. * Transmit timeout, default 5 seconds.
  97. */
  98. static int watchdog = 5000;
  99. module_param(watchdog, int, 0400);
  100. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  101. /* Structure/enum declaration ------------------------------- */
  102. typedef struct board_info {
  103. void __iomem *io_addr; /* Register I/O base address */
  104. void __iomem *io_data; /* Data I/O address */
  105. u16 irq; /* IRQ */
  106. u16 tx_pkt_cnt;
  107. u16 queue_pkt_len;
  108. u16 queue_start_addr;
  109. u16 dbug_cnt;
  110. u8 io_mode; /* 0:word, 2:byte */
  111. u8 phy_addr;
  112. void (*inblk)(void __iomem *port, void *data, int length);
  113. void (*outblk)(void __iomem *port, void *data, int length);
  114. void (*dumpblk)(void __iomem *port, int length);
  115. struct resource *addr_res; /* resources found */
  116. struct resource *data_res;
  117. struct resource *addr_req; /* resources requested */
  118. struct resource *data_req;
  119. struct resource *irq_res;
  120. struct timer_list timer;
  121. struct net_device_stats stats;
  122. unsigned char srom[128];
  123. spinlock_t lock;
  124. struct mii_if_info mii;
  125. u32 msg_enable;
  126. } board_info_t;
  127. /* function declaration ------------------------------------- */
  128. static int dm9000_probe(struct platform_device *);
  129. static int dm9000_open(struct net_device *);
  130. static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
  131. static int dm9000_stop(struct net_device *);
  132. static void dm9000_timer(unsigned long);
  133. static void dm9000_init_dm9000(struct net_device *);
  134. static struct net_device_stats *dm9000_get_stats(struct net_device *);
  135. static irqreturn_t dm9000_interrupt(int, void *);
  136. static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
  137. static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
  138. int value);
  139. static u16 read_srom_word(board_info_t *, int);
  140. static void dm9000_rx(struct net_device *);
  141. static void dm9000_hash_table(struct net_device *);
  142. //#define DM9000_PROGRAM_EEPROM
  143. #ifdef DM9000_PROGRAM_EEPROM
  144. static void program_eeprom(board_info_t * db);
  145. #endif
  146. /* DM9000 network board routine ---------------------------- */
  147. static void
  148. dm9000_reset(board_info_t * db)
  149. {
  150. PRINTK1("dm9000x: resetting\n");
  151. /* RESET device */
  152. writeb(DM9000_NCR, db->io_addr);
  153. udelay(200);
  154. writeb(NCR_RST, db->io_data);
  155. udelay(200);
  156. }
  157. /*
  158. * Read a byte from I/O port
  159. */
  160. static u8
  161. ior(board_info_t * db, int reg)
  162. {
  163. writeb(reg, db->io_addr);
  164. return readb(db->io_data);
  165. }
  166. /*
  167. * Write a byte to I/O port
  168. */
  169. static void
  170. iow(board_info_t * db, int reg, int value)
  171. {
  172. writeb(reg, db->io_addr);
  173. writeb(value, db->io_data);
  174. }
  175. /* routines for sending block to chip */
  176. static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
  177. {
  178. writesb(reg, data, count);
  179. }
  180. static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
  181. {
  182. writesw(reg, data, (count+1) >> 1);
  183. }
  184. static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
  185. {
  186. writesl(reg, data, (count+3) >> 2);
  187. }
  188. /* input block from chip to memory */
  189. static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
  190. {
  191. readsb(reg, data, count);
  192. }
  193. static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
  194. {
  195. readsw(reg, data, (count+1) >> 1);
  196. }
  197. static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
  198. {
  199. readsl(reg, data, (count+3) >> 2);
  200. }
  201. /* dump block from chip to null */
  202. static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
  203. {
  204. int i;
  205. int tmp;
  206. for (i = 0; i < count; i++)
  207. tmp = readb(reg);
  208. }
  209. static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
  210. {
  211. int i;
  212. int tmp;
  213. count = (count + 1) >> 1;
  214. for (i = 0; i < count; i++)
  215. tmp = readw(reg);
  216. }
  217. static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
  218. {
  219. int i;
  220. int tmp;
  221. count = (count + 3) >> 2;
  222. for (i = 0; i < count; i++)
  223. tmp = readl(reg);
  224. }
  225. /* dm9000_set_io
  226. *
  227. * select the specified set of io routines to use with the
  228. * device
  229. */
  230. static void dm9000_set_io(struct board_info *db, int byte_width)
  231. {
  232. /* use the size of the data resource to work out what IO
  233. * routines we want to use
  234. */
  235. switch (byte_width) {
  236. case 1:
  237. db->dumpblk = dm9000_dumpblk_8bit;
  238. db->outblk = dm9000_outblk_8bit;
  239. db->inblk = dm9000_inblk_8bit;
  240. break;
  241. case 2:
  242. db->dumpblk = dm9000_dumpblk_16bit;
  243. db->outblk = dm9000_outblk_16bit;
  244. db->inblk = dm9000_inblk_16bit;
  245. break;
  246. case 3:
  247. printk(KERN_ERR PFX ": 3 byte IO, falling back to 16bit\n");
  248. db->dumpblk = dm9000_dumpblk_16bit;
  249. db->outblk = dm9000_outblk_16bit;
  250. db->inblk = dm9000_inblk_16bit;
  251. break;
  252. case 4:
  253. default:
  254. db->dumpblk = dm9000_dumpblk_32bit;
  255. db->outblk = dm9000_outblk_32bit;
  256. db->inblk = dm9000_inblk_32bit;
  257. break;
  258. }
  259. }
  260. /* Our watchdog timed out. Called by the networking layer */
  261. static void dm9000_timeout(struct net_device *dev)
  262. {
  263. board_info_t *db = (board_info_t *) dev->priv;
  264. u8 reg_save;
  265. unsigned long flags;
  266. /* Save previous register address */
  267. reg_save = readb(db->io_addr);
  268. spin_lock_irqsave(&db->lock,flags);
  269. netif_stop_queue(dev);
  270. dm9000_reset(db);
  271. dm9000_init_dm9000(dev);
  272. /* We can accept TX packets again */
  273. dev->trans_start = jiffies;
  274. netif_wake_queue(dev);
  275. /* Restore previous register address */
  276. writeb(reg_save, db->io_addr);
  277. spin_unlock_irqrestore(&db->lock,flags);
  278. }
  279. #ifdef CONFIG_NET_POLL_CONTROLLER
  280. /*
  281. *Used by netconsole
  282. */
  283. static void dm9000_poll_controller(struct net_device *dev)
  284. {
  285. disable_irq(dev->irq);
  286. dm9000_interrupt(dev->irq,dev);
  287. enable_irq(dev->irq);
  288. }
  289. #endif
  290. /* dm9000_release_board
  291. *
  292. * release a board, and any mapped resources
  293. */
  294. static void
  295. dm9000_release_board(struct platform_device *pdev, struct board_info *db)
  296. {
  297. if (db->data_res == NULL) {
  298. if (db->addr_res != NULL)
  299. release_mem_region((unsigned long)db->io_addr, 4);
  300. return;
  301. }
  302. /* unmap our resources */
  303. iounmap(db->io_addr);
  304. iounmap(db->io_data);
  305. /* release the resources */
  306. if (db->data_req != NULL) {
  307. release_resource(db->data_req);
  308. kfree(db->data_req);
  309. }
  310. if (db->addr_req != NULL) {
  311. release_resource(db->addr_req);
  312. kfree(db->addr_req);
  313. }
  314. }
  315. #define res_size(_r) (((_r)->end - (_r)->start) + 1)
  316. /*
  317. * Search DM9000 board, allocate space and register it
  318. */
  319. static int
  320. dm9000_probe(struct platform_device *pdev)
  321. {
  322. struct dm9000_plat_data *pdata = pdev->dev.platform_data;
  323. struct board_info *db; /* Point a board information structure */
  324. struct net_device *ndev;
  325. unsigned long base;
  326. int ret = 0;
  327. int iosize;
  328. int i;
  329. u32 id_val;
  330. /* Init network device */
  331. ndev = alloc_etherdev(sizeof (struct board_info));
  332. if (!ndev) {
  333. printk("%s: could not allocate device.\n", CARDNAME);
  334. return -ENOMEM;
  335. }
  336. SET_MODULE_OWNER(ndev);
  337. SET_NETDEV_DEV(ndev, &pdev->dev);
  338. PRINTK2("dm9000_probe()");
  339. /* setup board info structure */
  340. db = (struct board_info *) ndev->priv;
  341. memset(db, 0, sizeof (*db));
  342. spin_lock_init(&db->lock);
  343. if (pdev->num_resources < 2) {
  344. ret = -ENODEV;
  345. goto out;
  346. } else if (pdev->num_resources == 2) {
  347. base = pdev->resource[0].start;
  348. if (!request_mem_region(base, 4, ndev->name)) {
  349. ret = -EBUSY;
  350. goto out;
  351. }
  352. ndev->base_addr = base;
  353. ndev->irq = pdev->resource[1].start;
  354. db->io_addr = (void __iomem *)base;
  355. db->io_data = (void __iomem *)(base + 4);
  356. } else {
  357. db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  358. db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  359. db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  360. if (db->addr_res == NULL || db->data_res == NULL ||
  361. db->irq_res == NULL) {
  362. printk(KERN_ERR PFX "insufficient resources\n");
  363. ret = -ENOENT;
  364. goto out;
  365. }
  366. i = res_size(db->addr_res);
  367. db->addr_req = request_mem_region(db->addr_res->start, i,
  368. pdev->name);
  369. if (db->addr_req == NULL) {
  370. printk(KERN_ERR PFX "cannot claim address reg area\n");
  371. ret = -EIO;
  372. goto out;
  373. }
  374. db->io_addr = ioremap(db->addr_res->start, i);
  375. if (db->io_addr == NULL) {
  376. printk(KERN_ERR "failed to ioremap address reg\n");
  377. ret = -EINVAL;
  378. goto out;
  379. }
  380. iosize = res_size(db->data_res);
  381. db->data_req = request_mem_region(db->data_res->start, iosize,
  382. pdev->name);
  383. if (db->data_req == NULL) {
  384. printk(KERN_ERR PFX "cannot claim data reg area\n");
  385. ret = -EIO;
  386. goto out;
  387. }
  388. db->io_data = ioremap(db->data_res->start, iosize);
  389. if (db->io_data == NULL) {
  390. printk(KERN_ERR "failed to ioremap data reg\n");
  391. ret = -EINVAL;
  392. goto out;
  393. }
  394. /* fill in parameters for net-dev structure */
  395. ndev->base_addr = (unsigned long)db->io_addr;
  396. ndev->irq = db->irq_res->start;
  397. /* ensure at least we have a default set of IO routines */
  398. dm9000_set_io(db, iosize);
  399. }
  400. /* check to see if anything is being over-ridden */
  401. if (pdata != NULL) {
  402. /* check to see if the driver wants to over-ride the
  403. * default IO width */
  404. if (pdata->flags & DM9000_PLATF_8BITONLY)
  405. dm9000_set_io(db, 1);
  406. if (pdata->flags & DM9000_PLATF_16BITONLY)
  407. dm9000_set_io(db, 2);
  408. if (pdata->flags & DM9000_PLATF_32BITONLY)
  409. dm9000_set_io(db, 4);
  410. /* check to see if there are any IO routine
  411. * over-rides */
  412. if (pdata->inblk != NULL)
  413. db->inblk = pdata->inblk;
  414. if (pdata->outblk != NULL)
  415. db->outblk = pdata->outblk;
  416. if (pdata->dumpblk != NULL)
  417. db->dumpblk = pdata->dumpblk;
  418. }
  419. dm9000_reset(db);
  420. /* try two times, DM9000 sometimes gets the first read wrong */
  421. for (i = 0; i < 2; i++) {
  422. id_val = ior(db, DM9000_VIDL);
  423. id_val |= (u32)ior(db, DM9000_VIDH) << 8;
  424. id_val |= (u32)ior(db, DM9000_PIDL) << 16;
  425. id_val |= (u32)ior(db, DM9000_PIDH) << 24;
  426. if (id_val == DM9000_ID)
  427. break;
  428. printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val);
  429. }
  430. if (id_val != DM9000_ID) {
  431. printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val);
  432. goto release;
  433. }
  434. /* from this point we assume that we have found a DM9000 */
  435. /* driver system function */
  436. ether_setup(ndev);
  437. ndev->open = &dm9000_open;
  438. ndev->hard_start_xmit = &dm9000_start_xmit;
  439. ndev->tx_timeout = &dm9000_timeout;
  440. ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
  441. ndev->stop = &dm9000_stop;
  442. ndev->get_stats = &dm9000_get_stats;
  443. ndev->set_multicast_list = &dm9000_hash_table;
  444. #ifdef CONFIG_NET_POLL_CONTROLLER
  445. ndev->poll_controller = &dm9000_poll_controller;
  446. #endif
  447. #ifdef DM9000_PROGRAM_EEPROM
  448. program_eeprom(db);
  449. #endif
  450. db->msg_enable = NETIF_MSG_LINK;
  451. db->mii.phy_id_mask = 0x1f;
  452. db->mii.reg_num_mask = 0x1f;
  453. db->mii.force_media = 0;
  454. db->mii.full_duplex = 0;
  455. db->mii.dev = ndev;
  456. db->mii.mdio_read = dm9000_phy_read;
  457. db->mii.mdio_write = dm9000_phy_write;
  458. /* Read SROM content */
  459. for (i = 0; i < 64; i++)
  460. ((u16 *) db->srom)[i] = read_srom_word(db, i);
  461. /* Set Node Address */
  462. for (i = 0; i < 6; i++)
  463. ndev->dev_addr[i] = db->srom[i];
  464. if (!is_valid_ether_addr(ndev->dev_addr)) {
  465. /* try reading from mac */
  466. for (i = 0; i < 6; i++)
  467. ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
  468. }
  469. if (!is_valid_ether_addr(ndev->dev_addr))
  470. printk("%s: Invalid ethernet MAC address. Please "
  471. "set using ifconfig\n", ndev->name);
  472. platform_set_drvdata(pdev, ndev);
  473. ret = register_netdev(ndev);
  474. if (ret == 0) {
  475. printk("%s: dm9000 at %p,%p IRQ %d MAC: ",
  476. ndev->name, db->io_addr, db->io_data, ndev->irq);
  477. for (i = 0; i < 5; i++)
  478. printk("%02x:", ndev->dev_addr[i]);
  479. printk("%02x\n", ndev->dev_addr[5]);
  480. }
  481. return 0;
  482. release:
  483. out:
  484. printk("%s: not found (%d).\n", CARDNAME, ret);
  485. dm9000_release_board(pdev, db);
  486. free_netdev(ndev);
  487. return ret;
  488. }
  489. /*
  490. * Open the interface.
  491. * The interface is opened whenever "ifconfig" actives it.
  492. */
  493. static int
  494. dm9000_open(struct net_device *dev)
  495. {
  496. board_info_t *db = (board_info_t *) dev->priv;
  497. PRINTK2("entering dm9000_open\n");
  498. if (request_irq(dev->irq, &dm9000_interrupt, IRQF_SHARED, dev->name, dev))
  499. return -EAGAIN;
  500. /* Initialize DM9000 board */
  501. dm9000_reset(db);
  502. dm9000_init_dm9000(dev);
  503. /* Init driver variable */
  504. db->dbug_cnt = 0;
  505. /* set and active a timer process */
  506. init_timer(&db->timer);
  507. db->timer.expires = DM9000_TIMER_WUT;
  508. db->timer.data = (unsigned long) dev;
  509. db->timer.function = &dm9000_timer;
  510. add_timer(&db->timer);
  511. mii_check_media(&db->mii, netif_msg_link(db), 1);
  512. netif_start_queue(dev);
  513. return 0;
  514. }
  515. /*
  516. * Initilize dm9000 board
  517. */
  518. static void
  519. dm9000_init_dm9000(struct net_device *dev)
  520. {
  521. board_info_t *db = (board_info_t *) dev->priv;
  522. PRINTK1("entering %s\n",__FUNCTION__);
  523. /* I/O mode */
  524. db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
  525. /* GPIO0 on pre-activate PHY */
  526. iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
  527. iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
  528. iow(db, DM9000_GPR, 0); /* Enable PHY */
  529. /* Program operating register */
  530. iow(db, DM9000_TCR, 0); /* TX Polling clear */
  531. iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
  532. iow(db, DM9000_FCR, 0xff); /* Flow Control */
  533. iow(db, DM9000_SMCR, 0); /* Special Mode */
  534. /* clear TX status */
  535. iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
  536. iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
  537. /* Set address filter table */
  538. dm9000_hash_table(dev);
  539. /* Activate DM9000 */
  540. iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
  541. /* Enable TX/RX interrupt mask */
  542. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  543. /* Init Driver variable */
  544. db->tx_pkt_cnt = 0;
  545. db->queue_pkt_len = 0;
  546. dev->trans_start = 0;
  547. }
  548. /*
  549. * Hardware start transmission.
  550. * Send a packet to media from the upper layer.
  551. */
  552. static int
  553. dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
  554. {
  555. board_info_t *db = (board_info_t *) dev->priv;
  556. PRINTK3("dm9000_start_xmit\n");
  557. if (db->tx_pkt_cnt > 1)
  558. return 1;
  559. netif_stop_queue(dev);
  560. /* Disable all interrupts */
  561. iow(db, DM9000_IMR, IMR_PAR);
  562. /* Move data to DM9000 TX RAM */
  563. writeb(DM9000_MWCMD, db->io_addr);
  564. (db->outblk)(db->io_data, skb->data, skb->len);
  565. db->stats.tx_bytes += skb->len;
  566. /* TX control: First packet immediately send, second packet queue */
  567. if (db->tx_pkt_cnt == 0) {
  568. /* First Packet */
  569. db->tx_pkt_cnt++;
  570. /* Set TX length to DM9000 */
  571. iow(db, DM9000_TXPLL, skb->len & 0xff);
  572. iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
  573. /* Issue TX polling command */
  574. iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
  575. dev->trans_start = jiffies; /* save the time stamp */
  576. } else {
  577. /* Second packet */
  578. db->tx_pkt_cnt++;
  579. db->queue_pkt_len = skb->len;
  580. }
  581. /* free this SKB */
  582. dev_kfree_skb(skb);
  583. /* Re-enable resource check */
  584. if (db->tx_pkt_cnt == 1)
  585. netif_wake_queue(dev);
  586. /* Re-enable interrupt */
  587. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  588. return 0;
  589. }
  590. static void
  591. dm9000_shutdown(struct net_device *dev)
  592. {
  593. board_info_t *db = (board_info_t *) dev->priv;
  594. /* RESET device */
  595. dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
  596. iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
  597. iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
  598. iow(db, DM9000_RCR, 0x00); /* Disable RX */
  599. }
  600. /*
  601. * Stop the interface.
  602. * The interface is stopped when it is brought.
  603. */
  604. static int
  605. dm9000_stop(struct net_device *ndev)
  606. {
  607. board_info_t *db = (board_info_t *) ndev->priv;
  608. PRINTK1("entering %s\n",__FUNCTION__);
  609. /* deleted timer */
  610. del_timer(&db->timer);
  611. netif_stop_queue(ndev);
  612. netif_carrier_off(ndev);
  613. /* free interrupt */
  614. free_irq(ndev->irq, ndev);
  615. dm9000_shutdown(ndev);
  616. return 0;
  617. }
  618. /*
  619. * DM9000 interrupt handler
  620. * receive the packet to upper layer, free the transmitted packet
  621. */
  622. static void
  623. dm9000_tx_done(struct net_device *dev, board_info_t * db)
  624. {
  625. int tx_status = ior(db, DM9000_NSR); /* Got TX status */
  626. if (tx_status & (NSR_TX2END | NSR_TX1END)) {
  627. /* One packet sent complete */
  628. db->tx_pkt_cnt--;
  629. db->stats.tx_packets++;
  630. /* Queue packet check & send */
  631. if (db->tx_pkt_cnt > 0) {
  632. iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
  633. iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
  634. iow(db, DM9000_TCR, TCR_TXREQ);
  635. dev->trans_start = jiffies;
  636. }
  637. netif_wake_queue(dev);
  638. }
  639. }
  640. static irqreturn_t
  641. dm9000_interrupt(int irq, void *dev_id)
  642. {
  643. struct net_device *dev = dev_id;
  644. board_info_t *db;
  645. int int_status;
  646. u8 reg_save;
  647. PRINTK3("entering %s\n",__FUNCTION__);
  648. if (!dev) {
  649. PRINTK1("dm9000_interrupt() without DEVICE arg\n");
  650. return IRQ_HANDLED;
  651. }
  652. /* A real interrupt coming */
  653. db = (board_info_t *) dev->priv;
  654. spin_lock(&db->lock);
  655. /* Save previous register address */
  656. reg_save = readb(db->io_addr);
  657. /* Disable all interrupts */
  658. iow(db, DM9000_IMR, IMR_PAR);
  659. /* Got DM9000 interrupt status */
  660. int_status = ior(db, DM9000_ISR); /* Got ISR */
  661. iow(db, DM9000_ISR, int_status); /* Clear ISR status */
  662. /* Received the coming packet */
  663. if (int_status & ISR_PRS)
  664. dm9000_rx(dev);
  665. /* Trnasmit Interrupt check */
  666. if (int_status & ISR_PTS)
  667. dm9000_tx_done(dev, db);
  668. /* Re-enable interrupt mask */
  669. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  670. /* Restore previous register address */
  671. writeb(reg_save, db->io_addr);
  672. spin_unlock(&db->lock);
  673. return IRQ_HANDLED;
  674. }
  675. /*
  676. * Get statistics from driver.
  677. */
  678. static struct net_device_stats *
  679. dm9000_get_stats(struct net_device *dev)
  680. {
  681. board_info_t *db = (board_info_t *) dev->priv;
  682. return &db->stats;
  683. }
  684. /*
  685. * A periodic timer routine
  686. * Dynamic media sense, allocated Rx buffer...
  687. */
  688. static void
  689. dm9000_timer(unsigned long data)
  690. {
  691. struct net_device *dev = (struct net_device *) data;
  692. board_info_t *db = (board_info_t *) dev->priv;
  693. PRINTK3("dm9000_timer()\n");
  694. mii_check_media(&db->mii, netif_msg_link(db), 0);
  695. /* Set timer again */
  696. db->timer.expires = DM9000_TIMER_WUT;
  697. add_timer(&db->timer);
  698. }
  699. struct dm9000_rxhdr {
  700. u16 RxStatus;
  701. u16 RxLen;
  702. } __attribute__((__packed__));
  703. /*
  704. * Received a packet and pass to upper layer
  705. */
  706. static void
  707. dm9000_rx(struct net_device *dev)
  708. {
  709. board_info_t *db = (board_info_t *) dev->priv;
  710. struct dm9000_rxhdr rxhdr;
  711. struct sk_buff *skb;
  712. u8 rxbyte, *rdptr;
  713. bool GoodPacket;
  714. int RxLen;
  715. /* Check packet ready or not */
  716. do {
  717. ior(db, DM9000_MRCMDX); /* Dummy read */
  718. /* Get most updated data */
  719. rxbyte = readb(db->io_data);
  720. /* Status check: this byte must be 0 or 1 */
  721. if (rxbyte > DM9000_PKT_RDY) {
  722. printk("status check failed: %d\n", rxbyte);
  723. iow(db, DM9000_RCR, 0x00); /* Stop Device */
  724. iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
  725. return;
  726. }
  727. if (rxbyte != DM9000_PKT_RDY)
  728. return;
  729. /* A packet ready now & Get status/length */
  730. GoodPacket = true;
  731. writeb(DM9000_MRCMD, db->io_addr);
  732. (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
  733. RxLen = rxhdr.RxLen;
  734. /* Packet Status check */
  735. if (RxLen < 0x40) {
  736. GoodPacket = false;
  737. PRINTK1("Bad Packet received (runt)\n");
  738. }
  739. if (RxLen > DM9000_PKT_MAX) {
  740. PRINTK1("RST: RX Len:%x\n", RxLen);
  741. }
  742. if (rxhdr.RxStatus & 0xbf00) {
  743. GoodPacket = false;
  744. if (rxhdr.RxStatus & 0x100) {
  745. PRINTK1("fifo error\n");
  746. db->stats.rx_fifo_errors++;
  747. }
  748. if (rxhdr.RxStatus & 0x200) {
  749. PRINTK1("crc error\n");
  750. db->stats.rx_crc_errors++;
  751. }
  752. if (rxhdr.RxStatus & 0x8000) {
  753. PRINTK1("length error\n");
  754. db->stats.rx_length_errors++;
  755. }
  756. }
  757. /* Move data from DM9000 */
  758. if (GoodPacket
  759. && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
  760. skb_reserve(skb, 2);
  761. rdptr = (u8 *) skb_put(skb, RxLen - 4);
  762. /* Read received packet from RX SRAM */
  763. (db->inblk)(db->io_data, rdptr, RxLen);
  764. db->stats.rx_bytes += RxLen;
  765. /* Pass to upper layer */
  766. skb->protocol = eth_type_trans(skb, dev);
  767. netif_rx(skb);
  768. db->stats.rx_packets++;
  769. } else {
  770. /* need to dump the packet's data */
  771. (db->dumpblk)(db->io_data, RxLen);
  772. }
  773. } while (rxbyte == DM9000_PKT_RDY);
  774. }
  775. /*
  776. * Read a word data from SROM
  777. */
  778. static u16
  779. read_srom_word(board_info_t * db, int offset)
  780. {
  781. iow(db, DM9000_EPAR, offset);
  782. iow(db, DM9000_EPCR, EPCR_ERPRR);
  783. mdelay(8); /* according to the datasheet 200us should be enough,
  784. but it doesn't work */
  785. iow(db, DM9000_EPCR, 0x0);
  786. return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
  787. }
  788. #ifdef DM9000_PROGRAM_EEPROM
  789. /*
  790. * Write a word data to SROM
  791. */
  792. static void
  793. write_srom_word(board_info_t * db, int offset, u16 val)
  794. {
  795. iow(db, DM9000_EPAR, offset);
  796. iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
  797. iow(db, DM9000_EPDRL, (val & 0xff));
  798. iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
  799. mdelay(8); /* same shit */
  800. iow(db, DM9000_EPCR, 0);
  801. }
  802. /*
  803. * Only for development:
  804. * Here we write static data to the eeprom in case
  805. * we don't have valid content on a new board
  806. */
  807. static void
  808. program_eeprom(board_info_t * db)
  809. {
  810. u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
  811. 0x0000, /* Autoload: accept nothing */
  812. 0x0a46, 0x9000, /* Vendor / Product ID */
  813. 0x0000, /* pin control */
  814. 0x0000,
  815. }; /* Wake-up mode control */
  816. int i;
  817. for (i = 0; i < 8; i++)
  818. write_srom_word(db, i, eeprom[i]);
  819. }
  820. #endif
  821. /*
  822. * Calculate the CRC valude of the Rx packet
  823. * flag = 1 : return the reverse CRC (for the received packet CRC)
  824. * 0 : return the normal CRC (for Hash Table index)
  825. */
  826. static unsigned long
  827. cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
  828. {
  829. u32 crc = ether_crc_le(Len, Data);
  830. if (flag)
  831. return ~crc;
  832. return crc;
  833. }
  834. /*
  835. * Set DM9000 multicast address
  836. */
  837. static void
  838. dm9000_hash_table(struct net_device *dev)
  839. {
  840. board_info_t *db = (board_info_t *) dev->priv;
  841. struct dev_mc_list *mcptr = dev->mc_list;
  842. int mc_cnt = dev->mc_count;
  843. u32 hash_val;
  844. u16 i, oft, hash_table[4];
  845. unsigned long flags;
  846. PRINTK2("dm9000_hash_table()\n");
  847. spin_lock_irqsave(&db->lock,flags);
  848. for (i = 0, oft = 0x10; i < 6; i++, oft++)
  849. iow(db, oft, dev->dev_addr[i]);
  850. /* Clear Hash Table */
  851. for (i = 0; i < 4; i++)
  852. hash_table[i] = 0x0;
  853. /* broadcast address */
  854. hash_table[3] = 0x8000;
  855. /* the multicast address in Hash Table : 64 bits */
  856. for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
  857. hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
  858. hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
  859. }
  860. /* Write the hash table to MAC MD table */
  861. for (i = 0, oft = 0x16; i < 4; i++) {
  862. iow(db, oft++, hash_table[i] & 0xff);
  863. iow(db, oft++, (hash_table[i] >> 8) & 0xff);
  864. }
  865. spin_unlock_irqrestore(&db->lock,flags);
  866. }
  867. /*
  868. * Read a word from phyxcer
  869. */
  870. static int
  871. dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
  872. {
  873. board_info_t *db = (board_info_t *) dev->priv;
  874. unsigned long flags;
  875. unsigned int reg_save;
  876. int ret;
  877. spin_lock_irqsave(&db->lock,flags);
  878. /* Save previous register address */
  879. reg_save = readb(db->io_addr);
  880. /* Fill the phyxcer register into REG_0C */
  881. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  882. iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
  883. udelay(100); /* Wait read complete */
  884. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
  885. /* The read data keeps on REG_0D & REG_0E */
  886. ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
  887. /* restore the previous address */
  888. writeb(reg_save, db->io_addr);
  889. spin_unlock_irqrestore(&db->lock,flags);
  890. return ret;
  891. }
  892. /*
  893. * Write a word to phyxcer
  894. */
  895. static void
  896. dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
  897. {
  898. board_info_t *db = (board_info_t *) dev->priv;
  899. unsigned long flags;
  900. unsigned long reg_save;
  901. spin_lock_irqsave(&db->lock,flags);
  902. /* Save previous register address */
  903. reg_save = readb(db->io_addr);
  904. /* Fill the phyxcer register into REG_0C */
  905. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  906. /* Fill the written data into REG_0D & REG_0E */
  907. iow(db, DM9000_EPDRL, (value & 0xff));
  908. iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
  909. iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
  910. udelay(500); /* Wait write complete */
  911. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
  912. /* restore the previous address */
  913. writeb(reg_save, db->io_addr);
  914. spin_unlock_irqrestore(&db->lock,flags);
  915. }
  916. static int
  917. dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
  918. {
  919. struct net_device *ndev = platform_get_drvdata(dev);
  920. if (ndev) {
  921. if (netif_running(ndev)) {
  922. netif_device_detach(ndev);
  923. dm9000_shutdown(ndev);
  924. }
  925. }
  926. return 0;
  927. }
  928. static int
  929. dm9000_drv_resume(struct platform_device *dev)
  930. {
  931. struct net_device *ndev = platform_get_drvdata(dev);
  932. board_info_t *db = (board_info_t *) ndev->priv;
  933. if (ndev) {
  934. if (netif_running(ndev)) {
  935. dm9000_reset(db);
  936. dm9000_init_dm9000(ndev);
  937. netif_device_attach(ndev);
  938. }
  939. }
  940. return 0;
  941. }
  942. static int
  943. dm9000_drv_remove(struct platform_device *pdev)
  944. {
  945. struct net_device *ndev = platform_get_drvdata(pdev);
  946. platform_set_drvdata(pdev, NULL);
  947. unregister_netdev(ndev);
  948. dm9000_release_board(pdev, (board_info_t *) ndev->priv);
  949. free_netdev(ndev); /* free device structure */
  950. PRINTK1("clean_module() exit\n");
  951. return 0;
  952. }
  953. static struct platform_driver dm9000_driver = {
  954. .driver = {
  955. .name = "dm9000",
  956. .owner = THIS_MODULE,
  957. },
  958. .probe = dm9000_probe,
  959. .remove = dm9000_drv_remove,
  960. .suspend = dm9000_drv_suspend,
  961. .resume = dm9000_drv_resume,
  962. };
  963. static int __init
  964. dm9000_init(void)
  965. {
  966. printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME);
  967. return platform_driver_register(&dm9000_driver); /* search board and register */
  968. }
  969. static void __exit
  970. dm9000_cleanup(void)
  971. {
  972. platform_driver_unregister(&dm9000_driver);
  973. }
  974. module_init(dm9000_init);
  975. module_exit(dm9000_cleanup);
  976. MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
  977. MODULE_DESCRIPTION("Davicom DM9000 network driver");
  978. MODULE_LICENSE("GPL");