au1000_eth.c 35 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341
  1. /*
  2. *
  3. * Alchemy Au1x00 ethernet driver
  4. *
  5. * Copyright 2001-2003, 2006 MontaVista Software Inc.
  6. * Copyright 2002 TimeSys Corp.
  7. * Added ethtool/mii-tool support,
  8. * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
  9. * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
  10. * or riemer@riemer-nt.de: fixed the link beat detection with
  11. * ioctls (SIOCGMIIPHY)
  12. * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
  13. * converted to use linux-2.6.x's PHY framework
  14. *
  15. * Author: MontaVista Software, Inc.
  16. * ppopov@mvista.com or source@mvista.com
  17. *
  18. * ########################################################################
  19. *
  20. * This program is free software; you can distribute it and/or modify it
  21. * under the terms of the GNU General Public License (Version 2) as
  22. * published by the Free Software Foundation.
  23. *
  24. * This program is distributed in the hope it will be useful, but WITHOUT
  25. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  26. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  27. * for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License along
  30. * with this program; if not, write to the Free Software Foundation, Inc.,
  31. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  32. *
  33. * ########################################################################
  34. *
  35. *
  36. */
  37. #include <linux/module.h>
  38. #include <linux/kernel.h>
  39. #include <linux/string.h>
  40. #include <linux/timer.h>
  41. #include <linux/errno.h>
  42. #include <linux/in.h>
  43. #include <linux/ioport.h>
  44. #include <linux/bitops.h>
  45. #include <linux/slab.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/init.h>
  48. #include <linux/netdevice.h>
  49. #include <linux/etherdevice.h>
  50. #include <linux/ethtool.h>
  51. #include <linux/mii.h>
  52. #include <linux/skbuff.h>
  53. #include <linux/delay.h>
  54. #include <linux/crc32.h>
  55. #include <linux/phy.h>
  56. #include <asm/mipsregs.h>
  57. #include <asm/irq.h>
  58. #include <asm/io.h>
  59. #include <asm/processor.h>
  60. #include <asm/mach-au1x00/au1000.h>
  61. #include <asm/cpu.h>
  62. #include "au1000_eth.h"
  63. #ifdef AU1000_ETH_DEBUG
  64. static int au1000_debug = 5;
  65. #else
  66. static int au1000_debug = 3;
  67. #endif
  68. #define DRV_NAME "au1000_eth"
  69. #define DRV_VERSION "1.6"
  70. #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
  71. #define DRV_DESC "Au1xxx on-chip Ethernet driver"
  72. MODULE_AUTHOR(DRV_AUTHOR);
  73. MODULE_DESCRIPTION(DRV_DESC);
  74. MODULE_LICENSE("GPL");
  75. // prototypes
  76. static void hard_stop(struct net_device *);
  77. static void enable_rx_tx(struct net_device *dev);
  78. static struct net_device * au1000_probe(int port_num);
  79. static int au1000_init(struct net_device *);
  80. static int au1000_open(struct net_device *);
  81. static int au1000_close(struct net_device *);
  82. static int au1000_tx(struct sk_buff *, struct net_device *);
  83. static int au1000_rx(struct net_device *);
  84. static irqreturn_t au1000_interrupt(int, void *);
  85. static void au1000_tx_timeout(struct net_device *);
  86. static void set_rx_mode(struct net_device *);
  87. static struct net_device_stats *au1000_get_stats(struct net_device *);
  88. static int au1000_ioctl(struct net_device *, struct ifreq *, int);
  89. static int mdio_read(struct net_device *, int, int);
  90. static void mdio_write(struct net_device *, int, int, u16);
  91. static void au1000_adjust_link(struct net_device *);
  92. static void enable_mac(struct net_device *, int);
  93. // externs
  94. extern int get_ethernet_addr(char *ethernet_addr);
  95. extern void str2eaddr(unsigned char *ea, unsigned char *str);
  96. extern char * prom_getcmdline(void);
  97. /*
  98. * Theory of operation
  99. *
  100. * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
  101. * There are four receive and four transmit descriptors. These
  102. * descriptors are not in memory; rather, they are just a set of
  103. * hardware registers.
  104. *
  105. * Since the Au1000 has a coherent data cache, the receive and
  106. * transmit buffers are allocated from the KSEG0 segment. The
  107. * hardware registers, however, are still mapped at KSEG1 to
  108. * make sure there's no out-of-order writes, and that all writes
  109. * complete immediately.
  110. */
  111. /* These addresses are only used if yamon doesn't tell us what
  112. * the mac address is, and the mac address is not passed on the
  113. * command line.
  114. */
  115. static unsigned char au1000_mac_addr[6] __devinitdata = {
  116. 0x00, 0x50, 0xc2, 0x0c, 0x30, 0x00
  117. };
  118. struct au1000_private *au_macs[NUM_ETH_INTERFACES];
  119. /*
  120. * board-specific configurations
  121. *
  122. * PHY detection algorithm
  123. *
  124. * If AU1XXX_PHY_STATIC_CONFIG is undefined, the PHY setup is
  125. * autodetected:
  126. *
  127. * mii_probe() first searches the current MAC's MII bus for a PHY,
  128. * selecting the first (or last, if AU1XXX_PHY_SEARCH_HIGHEST_ADDR is
  129. * defined) PHY address not already claimed by another netdev.
  130. *
  131. * If nothing was found that way when searching for the 2nd ethernet
  132. * controller's PHY and AU1XXX_PHY1_SEARCH_ON_MAC0 is defined, then
  133. * the first MII bus is searched as well for an unclaimed PHY; this is
  134. * needed in case of a dual-PHY accessible only through the MAC0's MII
  135. * bus.
  136. *
  137. * Finally, if no PHY is found, then the corresponding ethernet
  138. * controller is not registered to the network subsystem.
  139. */
  140. /* autodetection defaults */
  141. #undef AU1XXX_PHY_SEARCH_HIGHEST_ADDR
  142. #define AU1XXX_PHY1_SEARCH_ON_MAC0
  143. /* static PHY setup
  144. *
  145. * most boards PHY setup should be detectable properly with the
  146. * autodetection algorithm in mii_probe(), but in some cases (e.g. if
  147. * you have a switch attached, or want to use the PHY's interrupt
  148. * notification capabilities) you can provide a static PHY
  149. * configuration here
  150. *
  151. * IRQs may only be set, if a PHY address was configured
  152. * If a PHY address is given, also a bus id is required to be set
  153. *
  154. * ps: make sure the used irqs are configured properly in the board
  155. * specific irq-map
  156. */
  157. #if defined(CONFIG_MIPS_BOSPORUS)
  158. /*
  159. * Micrel/Kendin 5 port switch attached to MAC0,
  160. * MAC0 is associated with PHY address 5 (== WAN port)
  161. * MAC1 is not associated with any PHY, since it's connected directly
  162. * to the switch.
  163. * no interrupts are used
  164. */
  165. # define AU1XXX_PHY_STATIC_CONFIG
  166. # define AU1XXX_PHY0_ADDR 5
  167. # define AU1XXX_PHY0_BUSID 0
  168. # undef AU1XXX_PHY0_IRQ
  169. # undef AU1XXX_PHY1_ADDR
  170. # undef AU1XXX_PHY1_BUSID
  171. # undef AU1XXX_PHY1_IRQ
  172. #endif
  173. #if defined(AU1XXX_PHY0_BUSID) && (AU1XXX_PHY0_BUSID > 0)
  174. # error MAC0-associated PHY attached 2nd MACs MII bus not supported yet
  175. #endif
  176. /*
  177. * MII operations
  178. */
  179. static int mdio_read(struct net_device *dev, int phy_addr, int reg)
  180. {
  181. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  182. volatile u32 *const mii_control_reg = &aup->mac->mii_control;
  183. volatile u32 *const mii_data_reg = &aup->mac->mii_data;
  184. u32 timedout = 20;
  185. u32 mii_control;
  186. while (*mii_control_reg & MAC_MII_BUSY) {
  187. mdelay(1);
  188. if (--timedout == 0) {
  189. printk(KERN_ERR "%s: read_MII busy timeout!!\n",
  190. dev->name);
  191. return -1;
  192. }
  193. }
  194. mii_control = MAC_SET_MII_SELECT_REG(reg) |
  195. MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
  196. *mii_control_reg = mii_control;
  197. timedout = 20;
  198. while (*mii_control_reg & MAC_MII_BUSY) {
  199. mdelay(1);
  200. if (--timedout == 0) {
  201. printk(KERN_ERR "%s: mdio_read busy timeout!!\n",
  202. dev->name);
  203. return -1;
  204. }
  205. }
  206. return (int)*mii_data_reg;
  207. }
  208. static void mdio_write(struct net_device *dev, int phy_addr, int reg, u16 value)
  209. {
  210. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  211. volatile u32 *const mii_control_reg = &aup->mac->mii_control;
  212. volatile u32 *const mii_data_reg = &aup->mac->mii_data;
  213. u32 timedout = 20;
  214. u32 mii_control;
  215. while (*mii_control_reg & MAC_MII_BUSY) {
  216. mdelay(1);
  217. if (--timedout == 0) {
  218. printk(KERN_ERR "%s: mdio_write busy timeout!!\n",
  219. dev->name);
  220. return;
  221. }
  222. }
  223. mii_control = MAC_SET_MII_SELECT_REG(reg) |
  224. MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
  225. *mii_data_reg = value;
  226. *mii_control_reg = mii_control;
  227. }
  228. static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
  229. {
  230. /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
  231. * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */
  232. struct net_device *const dev = bus->priv;
  233. enable_mac(dev, 0); /* make sure the MAC associated with this
  234. * mii_bus is enabled */
  235. return mdio_read(dev, phy_addr, regnum);
  236. }
  237. static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
  238. u16 value)
  239. {
  240. struct net_device *const dev = bus->priv;
  241. enable_mac(dev, 0); /* make sure the MAC associated with this
  242. * mii_bus is enabled */
  243. mdio_write(dev, phy_addr, regnum, value);
  244. return 0;
  245. }
  246. static int mdiobus_reset(struct mii_bus *bus)
  247. {
  248. struct net_device *const dev = bus->priv;
  249. enable_mac(dev, 0); /* make sure the MAC associated with this
  250. * mii_bus is enabled */
  251. return 0;
  252. }
  253. static int mii_probe (struct net_device *dev)
  254. {
  255. struct au1000_private *const aup = (struct au1000_private *) dev->priv;
  256. struct phy_device *phydev = NULL;
  257. #if defined(AU1XXX_PHY_STATIC_CONFIG)
  258. BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
  259. if(aup->mac_id == 0) { /* get PHY0 */
  260. # if defined(AU1XXX_PHY0_ADDR)
  261. phydev = au_macs[AU1XXX_PHY0_BUSID]->mii_bus.phy_map[AU1XXX_PHY0_ADDR];
  262. # else
  263. printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
  264. dev->name);
  265. return 0;
  266. # endif /* defined(AU1XXX_PHY0_ADDR) */
  267. } else if (aup->mac_id == 1) { /* get PHY1 */
  268. # if defined(AU1XXX_PHY1_ADDR)
  269. phydev = au_macs[AU1XXX_PHY1_BUSID]->mii_bus.phy_map[AU1XXX_PHY1_ADDR];
  270. # else
  271. printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
  272. dev->name);
  273. return 0;
  274. # endif /* defined(AU1XXX_PHY1_ADDR) */
  275. }
  276. #else /* defined(AU1XXX_PHY_STATIC_CONFIG) */
  277. int phy_addr;
  278. /* find the first (lowest address) PHY on the current MAC's MII bus */
  279. for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
  280. if (aup->mii_bus.phy_map[phy_addr]) {
  281. phydev = aup->mii_bus.phy_map[phy_addr];
  282. # if !defined(AU1XXX_PHY_SEARCH_HIGHEST_ADDR)
  283. break; /* break out with first one found */
  284. # endif
  285. }
  286. # if defined(AU1XXX_PHY1_SEARCH_ON_MAC0)
  287. /* try harder to find a PHY */
  288. if (!phydev && (aup->mac_id == 1)) {
  289. /* no PHY found, maybe we have a dual PHY? */
  290. printk (KERN_INFO DRV_NAME ": no PHY found on MAC1, "
  291. "let's see if it's attached to MAC0...\n");
  292. BUG_ON(!au_macs[0]);
  293. /* find the first (lowest address) non-attached PHY on
  294. * the MAC0 MII bus */
  295. for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
  296. struct phy_device *const tmp_phydev =
  297. au_macs[0]->mii_bus.phy_map[phy_addr];
  298. if (!tmp_phydev)
  299. continue; /* no PHY here... */
  300. if (tmp_phydev->attached_dev)
  301. continue; /* already claimed by MAC0 */
  302. phydev = tmp_phydev;
  303. break; /* found it */
  304. }
  305. }
  306. # endif /* defined(AU1XXX_PHY1_SEARCH_OTHER_BUS) */
  307. #endif /* defined(AU1XXX_PHY_STATIC_CONFIG) */
  308. if (!phydev) {
  309. printk (KERN_ERR DRV_NAME ":%s: no PHY found\n", dev->name);
  310. return -1;
  311. }
  312. /* now we are supposed to have a proper phydev, to attach to... */
  313. BUG_ON(!phydev);
  314. BUG_ON(phydev->attached_dev);
  315. phydev = phy_connect(dev, phydev->dev.bus_id, &au1000_adjust_link, 0,
  316. PHY_INTERFACE_MODE_MII);
  317. if (IS_ERR(phydev)) {
  318. printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
  319. return PTR_ERR(phydev);
  320. }
  321. /* mask with MAC supported features */
  322. phydev->supported &= (SUPPORTED_10baseT_Half
  323. | SUPPORTED_10baseT_Full
  324. | SUPPORTED_100baseT_Half
  325. | SUPPORTED_100baseT_Full
  326. | SUPPORTED_Autoneg
  327. /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
  328. | SUPPORTED_MII
  329. | SUPPORTED_TP);
  330. phydev->advertising = phydev->supported;
  331. aup->old_link = 0;
  332. aup->old_speed = 0;
  333. aup->old_duplex = -1;
  334. aup->phy_dev = phydev;
  335. printk(KERN_INFO "%s: attached PHY driver [%s] "
  336. "(mii_bus:phy_addr=%s, irq=%d)\n",
  337. dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
  338. return 0;
  339. }
  340. /*
  341. * Buffer allocation/deallocation routines. The buffer descriptor returned
  342. * has the virtual and dma address of a buffer suitable for
  343. * both, receive and transmit operations.
  344. */
  345. static db_dest_t *GetFreeDB(struct au1000_private *aup)
  346. {
  347. db_dest_t *pDB;
  348. pDB = aup->pDBfree;
  349. if (pDB) {
  350. aup->pDBfree = pDB->pnext;
  351. }
  352. return pDB;
  353. }
  354. void ReleaseDB(struct au1000_private *aup, db_dest_t *pDB)
  355. {
  356. db_dest_t *pDBfree = aup->pDBfree;
  357. if (pDBfree)
  358. pDBfree->pnext = pDB;
  359. aup->pDBfree = pDB;
  360. }
  361. static void enable_rx_tx(struct net_device *dev)
  362. {
  363. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  364. if (au1000_debug > 4)
  365. printk(KERN_INFO "%s: enable_rx_tx\n", dev->name);
  366. aup->mac->control |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
  367. au_sync_delay(10);
  368. }
  369. static void hard_stop(struct net_device *dev)
  370. {
  371. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  372. if (au1000_debug > 4)
  373. printk(KERN_INFO "%s: hard stop\n", dev->name);
  374. aup->mac->control &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
  375. au_sync_delay(10);
  376. }
  377. static void enable_mac(struct net_device *dev, int force_reset)
  378. {
  379. unsigned long flags;
  380. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  381. spin_lock_irqsave(&aup->lock, flags);
  382. if(force_reset || (!aup->mac_enabled)) {
  383. *aup->enable = MAC_EN_CLOCK_ENABLE;
  384. au_sync_delay(2);
  385. *aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
  386. | MAC_EN_CLOCK_ENABLE);
  387. au_sync_delay(2);
  388. aup->mac_enabled = 1;
  389. }
  390. spin_unlock_irqrestore(&aup->lock, flags);
  391. }
  392. static void reset_mac_unlocked(struct net_device *dev)
  393. {
  394. struct au1000_private *const aup = (struct au1000_private *) dev->priv;
  395. int i;
  396. hard_stop(dev);
  397. *aup->enable = MAC_EN_CLOCK_ENABLE;
  398. au_sync_delay(2);
  399. *aup->enable = 0;
  400. au_sync_delay(2);
  401. aup->tx_full = 0;
  402. for (i = 0; i < NUM_RX_DMA; i++) {
  403. /* reset control bits */
  404. aup->rx_dma_ring[i]->buff_stat &= ~0xf;
  405. }
  406. for (i = 0; i < NUM_TX_DMA; i++) {
  407. /* reset control bits */
  408. aup->tx_dma_ring[i]->buff_stat &= ~0xf;
  409. }
  410. aup->mac_enabled = 0;
  411. }
  412. static void reset_mac(struct net_device *dev)
  413. {
  414. struct au1000_private *const aup = (struct au1000_private *) dev->priv;
  415. unsigned long flags;
  416. if (au1000_debug > 4)
  417. printk(KERN_INFO "%s: reset mac, aup %x\n",
  418. dev->name, (unsigned)aup);
  419. spin_lock_irqsave(&aup->lock, flags);
  420. reset_mac_unlocked (dev);
  421. spin_unlock_irqrestore(&aup->lock, flags);
  422. }
  423. /*
  424. * Setup the receive and transmit "rings". These pointers are the addresses
  425. * of the rx and tx MAC DMA registers so they are fixed by the hardware --
  426. * these are not descriptors sitting in memory.
  427. */
  428. static void
  429. setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base)
  430. {
  431. int i;
  432. for (i = 0; i < NUM_RX_DMA; i++) {
  433. aup->rx_dma_ring[i] =
  434. (volatile rx_dma_t *) (rx_base + sizeof(rx_dma_t)*i);
  435. }
  436. for (i = 0; i < NUM_TX_DMA; i++) {
  437. aup->tx_dma_ring[i] =
  438. (volatile tx_dma_t *) (tx_base + sizeof(tx_dma_t)*i);
  439. }
  440. }
  441. static struct {
  442. u32 base_addr;
  443. u32 macen_addr;
  444. int irq;
  445. struct net_device *dev;
  446. } iflist[2] = {
  447. #ifdef CONFIG_SOC_AU1000
  448. {AU1000_ETH0_BASE, AU1000_MAC0_ENABLE, AU1000_MAC0_DMA_INT},
  449. {AU1000_ETH1_BASE, AU1000_MAC1_ENABLE, AU1000_MAC1_DMA_INT}
  450. #endif
  451. #ifdef CONFIG_SOC_AU1100
  452. {AU1100_ETH0_BASE, AU1100_MAC0_ENABLE, AU1100_MAC0_DMA_INT}
  453. #endif
  454. #ifdef CONFIG_SOC_AU1500
  455. {AU1500_ETH0_BASE, AU1500_MAC0_ENABLE, AU1500_MAC0_DMA_INT},
  456. {AU1500_ETH1_BASE, AU1500_MAC1_ENABLE, AU1500_MAC1_DMA_INT}
  457. #endif
  458. #ifdef CONFIG_SOC_AU1550
  459. {AU1550_ETH0_BASE, AU1550_MAC0_ENABLE, AU1550_MAC0_DMA_INT},
  460. {AU1550_ETH1_BASE, AU1550_MAC1_ENABLE, AU1550_MAC1_DMA_INT}
  461. #endif
  462. };
  463. static int num_ifs;
  464. /*
  465. * Setup the base address and interupt of the Au1xxx ethernet macs
  466. * based on cpu type and whether the interface is enabled in sys_pinfunc
  467. * register. The last interface is enabled if SYS_PF_NI2 (bit 4) is 0.
  468. */
  469. static int __init au1000_init_module(void)
  470. {
  471. int ni = (int)((au_readl(SYS_PINFUNC) & (u32)(SYS_PF_NI2)) >> 4);
  472. struct net_device *dev;
  473. int i, found_one = 0;
  474. num_ifs = NUM_ETH_INTERFACES - ni;
  475. for(i = 0; i < num_ifs; i++) {
  476. dev = au1000_probe(i);
  477. iflist[i].dev = dev;
  478. if (dev)
  479. found_one++;
  480. }
  481. if (!found_one)
  482. return -ENODEV;
  483. return 0;
  484. }
  485. /*
  486. * ethtool operations
  487. */
  488. static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  489. {
  490. struct au1000_private *aup = (struct au1000_private *)dev->priv;
  491. if (aup->phy_dev)
  492. return phy_ethtool_gset(aup->phy_dev, cmd);
  493. return -EINVAL;
  494. }
  495. static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  496. {
  497. struct au1000_private *aup = (struct au1000_private *)dev->priv;
  498. if (!capable(CAP_NET_ADMIN))
  499. return -EPERM;
  500. if (aup->phy_dev)
  501. return phy_ethtool_sset(aup->phy_dev, cmd);
  502. return -EINVAL;
  503. }
  504. static void
  505. au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  506. {
  507. struct au1000_private *aup = (struct au1000_private *)dev->priv;
  508. strcpy(info->driver, DRV_NAME);
  509. strcpy(info->version, DRV_VERSION);
  510. info->fw_version[0] = '\0';
  511. sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id);
  512. info->regdump_len = 0;
  513. }
  514. static const struct ethtool_ops au1000_ethtool_ops = {
  515. .get_settings = au1000_get_settings,
  516. .set_settings = au1000_set_settings,
  517. .get_drvinfo = au1000_get_drvinfo,
  518. .get_link = ethtool_op_get_link,
  519. };
  520. static struct net_device * au1000_probe(int port_num)
  521. {
  522. static unsigned version_printed = 0;
  523. struct au1000_private *aup = NULL;
  524. struct net_device *dev = NULL;
  525. db_dest_t *pDB, *pDBfree;
  526. char *pmac, *argptr;
  527. char ethaddr[6];
  528. int irq, i, err;
  529. u32 base, macen;
  530. if (port_num >= NUM_ETH_INTERFACES)
  531. return NULL;
  532. base = CPHYSADDR(iflist[port_num].base_addr );
  533. macen = CPHYSADDR(iflist[port_num].macen_addr);
  534. irq = iflist[port_num].irq;
  535. if (!request_mem_region( base, MAC_IOSIZE, "Au1x00 ENET") ||
  536. !request_mem_region(macen, 4, "Au1x00 ENET"))
  537. return NULL;
  538. if (version_printed++ == 0)
  539. printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR);
  540. dev = alloc_etherdev(sizeof(struct au1000_private));
  541. if (!dev) {
  542. printk(KERN_ERR "%s: alloc_etherdev failed\n", DRV_NAME);
  543. return NULL;
  544. }
  545. if ((err = register_netdev(dev)) != 0) {
  546. printk(KERN_ERR "%s: Cannot register net device, error %d\n",
  547. DRV_NAME, err);
  548. free_netdev(dev);
  549. return NULL;
  550. }
  551. printk("%s: Au1xx0 Ethernet found at 0x%x, irq %d\n",
  552. dev->name, base, irq);
  553. aup = dev->priv;
  554. /* Allocate the data buffers */
  555. /* Snooping works fine with eth on all au1xxx */
  556. aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
  557. (NUM_TX_BUFFS + NUM_RX_BUFFS),
  558. &aup->dma_addr, 0);
  559. if (!aup->vaddr) {
  560. free_netdev(dev);
  561. release_mem_region( base, MAC_IOSIZE);
  562. release_mem_region(macen, 4);
  563. return NULL;
  564. }
  565. /* aup->mac is the base address of the MAC's registers */
  566. aup->mac = (volatile mac_reg_t *)iflist[port_num].base_addr;
  567. /* Setup some variables for quick register address access */
  568. aup->enable = (volatile u32 *)iflist[port_num].macen_addr;
  569. aup->mac_id = port_num;
  570. au_macs[port_num] = aup;
  571. if (port_num == 0) {
  572. /* Check the environment variables first */
  573. if (get_ethernet_addr(ethaddr) == 0)
  574. memcpy(au1000_mac_addr, ethaddr, sizeof(au1000_mac_addr));
  575. else {
  576. /* Check command line */
  577. argptr = prom_getcmdline();
  578. if ((pmac = strstr(argptr, "ethaddr=")) == NULL)
  579. printk(KERN_INFO "%s: No MAC address found\n",
  580. dev->name);
  581. /* Use the hard coded MAC addresses */
  582. else {
  583. str2eaddr(ethaddr, pmac + strlen("ethaddr="));
  584. memcpy(au1000_mac_addr, ethaddr,
  585. sizeof(au1000_mac_addr));
  586. }
  587. }
  588. setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
  589. } else if (port_num == 1)
  590. setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
  591. /*
  592. * Assign to the Ethernet ports two consecutive MAC addresses
  593. * to match those that are printed on their stickers
  594. */
  595. memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr));
  596. dev->dev_addr[5] += port_num;
  597. *aup->enable = 0;
  598. aup->mac_enabled = 0;
  599. aup->mii_bus.priv = dev;
  600. aup->mii_bus.read = mdiobus_read;
  601. aup->mii_bus.write = mdiobus_write;
  602. aup->mii_bus.reset = mdiobus_reset;
  603. aup->mii_bus.name = "au1000_eth_mii";
  604. aup->mii_bus.id = aup->mac_id;
  605. aup->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
  606. for(i = 0; i < PHY_MAX_ADDR; ++i)
  607. aup->mii_bus.irq[i] = PHY_POLL;
  608. /* if known, set corresponding PHY IRQs */
  609. #if defined(AU1XXX_PHY_STATIC_CONFIG)
  610. # if defined(AU1XXX_PHY0_IRQ)
  611. if (AU1XXX_PHY0_BUSID == aup->mii_bus.id)
  612. aup->mii_bus.irq[AU1XXX_PHY0_ADDR] = AU1XXX_PHY0_IRQ;
  613. # endif
  614. # if defined(AU1XXX_PHY1_IRQ)
  615. if (AU1XXX_PHY1_BUSID == aup->mii_bus.id)
  616. aup->mii_bus.irq[AU1XXX_PHY1_ADDR] = AU1XXX_PHY1_IRQ;
  617. # endif
  618. #endif
  619. mdiobus_register(&aup->mii_bus);
  620. if (mii_probe(dev) != 0) {
  621. goto err_out;
  622. }
  623. pDBfree = NULL;
  624. /* setup the data buffer descriptors and attach a buffer to each one */
  625. pDB = aup->db;
  626. for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
  627. pDB->pnext = pDBfree;
  628. pDBfree = pDB;
  629. pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
  630. pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
  631. pDB++;
  632. }
  633. aup->pDBfree = pDBfree;
  634. for (i = 0; i < NUM_RX_DMA; i++) {
  635. pDB = GetFreeDB(aup);
  636. if (!pDB) {
  637. goto err_out;
  638. }
  639. aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
  640. aup->rx_db_inuse[i] = pDB;
  641. }
  642. for (i = 0; i < NUM_TX_DMA; i++) {
  643. pDB = GetFreeDB(aup);
  644. if (!pDB) {
  645. goto err_out;
  646. }
  647. aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
  648. aup->tx_dma_ring[i]->len = 0;
  649. aup->tx_db_inuse[i] = pDB;
  650. }
  651. spin_lock_init(&aup->lock);
  652. dev->base_addr = base;
  653. dev->irq = irq;
  654. dev->open = au1000_open;
  655. dev->hard_start_xmit = au1000_tx;
  656. dev->stop = au1000_close;
  657. dev->get_stats = au1000_get_stats;
  658. dev->set_multicast_list = &set_rx_mode;
  659. dev->do_ioctl = &au1000_ioctl;
  660. SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
  661. dev->tx_timeout = au1000_tx_timeout;
  662. dev->watchdog_timeo = ETH_TX_TIMEOUT;
  663. /*
  664. * The boot code uses the ethernet controller, so reset it to start
  665. * fresh. au1000_init() expects that the device is in reset state.
  666. */
  667. reset_mac(dev);
  668. return dev;
  669. err_out:
  670. /* here we should have a valid dev plus aup-> register addresses
  671. * so we can reset the mac properly.*/
  672. reset_mac(dev);
  673. for (i = 0; i < NUM_RX_DMA; i++) {
  674. if (aup->rx_db_inuse[i])
  675. ReleaseDB(aup, aup->rx_db_inuse[i]);
  676. }
  677. for (i = 0; i < NUM_TX_DMA; i++) {
  678. if (aup->tx_db_inuse[i])
  679. ReleaseDB(aup, aup->tx_db_inuse[i]);
  680. }
  681. dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
  682. (void *)aup->vaddr, aup->dma_addr);
  683. unregister_netdev(dev);
  684. free_netdev(dev);
  685. release_mem_region( base, MAC_IOSIZE);
  686. release_mem_region(macen, 4);
  687. return NULL;
  688. }
  689. /*
  690. * Initialize the interface.
  691. *
  692. * When the device powers up, the clocks are disabled and the
  693. * mac is in reset state. When the interface is closed, we
  694. * do the same -- reset the device and disable the clocks to
  695. * conserve power. Thus, whenever au1000_init() is called,
  696. * the device should already be in reset state.
  697. */
  698. static int au1000_init(struct net_device *dev)
  699. {
  700. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  701. u32 flags;
  702. int i;
  703. u32 control;
  704. if (au1000_debug > 4)
  705. printk("%s: au1000_init\n", dev->name);
  706. /* bring the device out of reset */
  707. enable_mac(dev, 1);
  708. spin_lock_irqsave(&aup->lock, flags);
  709. aup->mac->control = 0;
  710. aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
  711. aup->tx_tail = aup->tx_head;
  712. aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
  713. aup->mac->mac_addr_high = dev->dev_addr[5]<<8 | dev->dev_addr[4];
  714. aup->mac->mac_addr_low = dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
  715. dev->dev_addr[1]<<8 | dev->dev_addr[0];
  716. for (i = 0; i < NUM_RX_DMA; i++) {
  717. aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
  718. }
  719. au_sync();
  720. control = MAC_RX_ENABLE | MAC_TX_ENABLE;
  721. #ifndef CONFIG_CPU_LITTLE_ENDIAN
  722. control |= MAC_BIG_ENDIAN;
  723. #endif
  724. if (aup->phy_dev) {
  725. if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
  726. control |= MAC_FULL_DUPLEX;
  727. else
  728. control |= MAC_DISABLE_RX_OWN;
  729. } else { /* PHY-less op, assume full-duplex */
  730. control |= MAC_FULL_DUPLEX;
  731. }
  732. aup->mac->control = control;
  733. aup->mac->vlan1_tag = 0x8100; /* activate vlan support */
  734. au_sync();
  735. spin_unlock_irqrestore(&aup->lock, flags);
  736. return 0;
  737. }
  738. static void
  739. au1000_adjust_link(struct net_device *dev)
  740. {
  741. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  742. struct phy_device *phydev = aup->phy_dev;
  743. unsigned long flags;
  744. int status_change = 0;
  745. BUG_ON(!aup->phy_dev);
  746. spin_lock_irqsave(&aup->lock, flags);
  747. if (phydev->link && (aup->old_speed != phydev->speed)) {
  748. // speed changed
  749. switch(phydev->speed) {
  750. case SPEED_10:
  751. case SPEED_100:
  752. break;
  753. default:
  754. printk(KERN_WARNING
  755. "%s: Speed (%d) is not 10/100 ???\n",
  756. dev->name, phydev->speed);
  757. break;
  758. }
  759. aup->old_speed = phydev->speed;
  760. status_change = 1;
  761. }
  762. if (phydev->link && (aup->old_duplex != phydev->duplex)) {
  763. // duplex mode changed
  764. /* switching duplex mode requires to disable rx and tx! */
  765. hard_stop(dev);
  766. if (DUPLEX_FULL == phydev->duplex)
  767. aup->mac->control = ((aup->mac->control
  768. | MAC_FULL_DUPLEX)
  769. & ~MAC_DISABLE_RX_OWN);
  770. else
  771. aup->mac->control = ((aup->mac->control
  772. & ~MAC_FULL_DUPLEX)
  773. | MAC_DISABLE_RX_OWN);
  774. au_sync_delay(1);
  775. enable_rx_tx(dev);
  776. aup->old_duplex = phydev->duplex;
  777. status_change = 1;
  778. }
  779. if(phydev->link != aup->old_link) {
  780. // link state changed
  781. if (phydev->link) // link went up
  782. netif_schedule(dev);
  783. else { // link went down
  784. aup->old_speed = 0;
  785. aup->old_duplex = -1;
  786. }
  787. aup->old_link = phydev->link;
  788. status_change = 1;
  789. }
  790. spin_unlock_irqrestore(&aup->lock, flags);
  791. if (status_change) {
  792. if (phydev->link)
  793. printk(KERN_INFO "%s: link up (%d/%s)\n",
  794. dev->name, phydev->speed,
  795. DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
  796. else
  797. printk(KERN_INFO "%s: link down\n", dev->name);
  798. }
  799. }
  800. static int au1000_open(struct net_device *dev)
  801. {
  802. int retval;
  803. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  804. if (au1000_debug > 4)
  805. printk("%s: open: dev=%p\n", dev->name, dev);
  806. if ((retval = request_irq(dev->irq, &au1000_interrupt, 0,
  807. dev->name, dev))) {
  808. printk(KERN_ERR "%s: unable to get IRQ %d\n",
  809. dev->name, dev->irq);
  810. return retval;
  811. }
  812. if ((retval = au1000_init(dev))) {
  813. printk(KERN_ERR "%s: error in au1000_init\n", dev->name);
  814. free_irq(dev->irq, dev);
  815. return retval;
  816. }
  817. if (aup->phy_dev) {
  818. /* cause the PHY state machine to schedule a link state check */
  819. aup->phy_dev->state = PHY_CHANGELINK;
  820. phy_start(aup->phy_dev);
  821. }
  822. netif_start_queue(dev);
  823. if (au1000_debug > 4)
  824. printk("%s: open: Initialization done.\n", dev->name);
  825. return 0;
  826. }
  827. static int au1000_close(struct net_device *dev)
  828. {
  829. unsigned long flags;
  830. struct au1000_private *const aup = (struct au1000_private *) dev->priv;
  831. if (au1000_debug > 4)
  832. printk("%s: close: dev=%p\n", dev->name, dev);
  833. if (aup->phy_dev)
  834. phy_stop(aup->phy_dev);
  835. spin_lock_irqsave(&aup->lock, flags);
  836. reset_mac_unlocked (dev);
  837. /* stop the device */
  838. netif_stop_queue(dev);
  839. /* disable the interrupt */
  840. free_irq(dev->irq, dev);
  841. spin_unlock_irqrestore(&aup->lock, flags);
  842. return 0;
  843. }
  844. static void __exit au1000_cleanup_module(void)
  845. {
  846. int i, j;
  847. struct net_device *dev;
  848. struct au1000_private *aup;
  849. for (i = 0; i < num_ifs; i++) {
  850. dev = iflist[i].dev;
  851. if (dev) {
  852. aup = (struct au1000_private *) dev->priv;
  853. unregister_netdev(dev);
  854. for (j = 0; j < NUM_RX_DMA; j++)
  855. if (aup->rx_db_inuse[j])
  856. ReleaseDB(aup, aup->rx_db_inuse[j]);
  857. for (j = 0; j < NUM_TX_DMA; j++)
  858. if (aup->tx_db_inuse[j])
  859. ReleaseDB(aup, aup->tx_db_inuse[j]);
  860. dma_free_noncoherent(NULL, MAX_BUF_SIZE *
  861. (NUM_TX_BUFFS + NUM_RX_BUFFS),
  862. (void *)aup->vaddr, aup->dma_addr);
  863. release_mem_region(dev->base_addr, MAC_IOSIZE);
  864. release_mem_region(CPHYSADDR(iflist[i].macen_addr), 4);
  865. free_netdev(dev);
  866. }
  867. }
  868. }
  869. static void update_tx_stats(struct net_device *dev, u32 status)
  870. {
  871. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  872. struct net_device_stats *ps = &aup->stats;
  873. if (status & TX_FRAME_ABORTED) {
  874. if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
  875. if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
  876. /* any other tx errors are only valid
  877. * in half duplex mode */
  878. ps->tx_errors++;
  879. ps->tx_aborted_errors++;
  880. }
  881. }
  882. else {
  883. ps->tx_errors++;
  884. ps->tx_aborted_errors++;
  885. if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
  886. ps->tx_carrier_errors++;
  887. }
  888. }
  889. }
  890. /*
  891. * Called from the interrupt service routine to acknowledge
  892. * the TX DONE bits. This is a must if the irq is setup as
  893. * edge triggered.
  894. */
  895. static void au1000_tx_ack(struct net_device *dev)
  896. {
  897. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  898. volatile tx_dma_t *ptxd;
  899. ptxd = aup->tx_dma_ring[aup->tx_tail];
  900. while (ptxd->buff_stat & TX_T_DONE) {
  901. update_tx_stats(dev, ptxd->status);
  902. ptxd->buff_stat &= ~TX_T_DONE;
  903. ptxd->len = 0;
  904. au_sync();
  905. aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
  906. ptxd = aup->tx_dma_ring[aup->tx_tail];
  907. if (aup->tx_full) {
  908. aup->tx_full = 0;
  909. netif_wake_queue(dev);
  910. }
  911. }
  912. }
  913. /*
  914. * Au1000 transmit routine.
  915. */
  916. static int au1000_tx(struct sk_buff *skb, struct net_device *dev)
  917. {
  918. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  919. struct net_device_stats *ps = &aup->stats;
  920. volatile tx_dma_t *ptxd;
  921. u32 buff_stat;
  922. db_dest_t *pDB;
  923. int i;
  924. if (au1000_debug > 5)
  925. printk("%s: tx: aup %x len=%d, data=%p, head %d\n",
  926. dev->name, (unsigned)aup, skb->len,
  927. skb->data, aup->tx_head);
  928. ptxd = aup->tx_dma_ring[aup->tx_head];
  929. buff_stat = ptxd->buff_stat;
  930. if (buff_stat & TX_DMA_ENABLE) {
  931. /* We've wrapped around and the transmitter is still busy */
  932. netif_stop_queue(dev);
  933. aup->tx_full = 1;
  934. return 1;
  935. }
  936. else if (buff_stat & TX_T_DONE) {
  937. update_tx_stats(dev, ptxd->status);
  938. ptxd->len = 0;
  939. }
  940. if (aup->tx_full) {
  941. aup->tx_full = 0;
  942. netif_wake_queue(dev);
  943. }
  944. pDB = aup->tx_db_inuse[aup->tx_head];
  945. skb_copy_from_linear_data(skb, pDB->vaddr, skb->len);
  946. if (skb->len < ETH_ZLEN) {
  947. for (i=skb->len; i<ETH_ZLEN; i++) {
  948. ((char *)pDB->vaddr)[i] = 0;
  949. }
  950. ptxd->len = ETH_ZLEN;
  951. }
  952. else
  953. ptxd->len = skb->len;
  954. ps->tx_packets++;
  955. ps->tx_bytes += ptxd->len;
  956. ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
  957. au_sync();
  958. dev_kfree_skb(skb);
  959. aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
  960. dev->trans_start = jiffies;
  961. return 0;
  962. }
  963. static inline void update_rx_stats(struct net_device *dev, u32 status)
  964. {
  965. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  966. struct net_device_stats *ps = &aup->stats;
  967. ps->rx_packets++;
  968. if (status & RX_MCAST_FRAME)
  969. ps->multicast++;
  970. if (status & RX_ERROR) {
  971. ps->rx_errors++;
  972. if (status & RX_MISSED_FRAME)
  973. ps->rx_missed_errors++;
  974. if (status & (RX_OVERLEN | RX_OVERLEN | RX_LEN_ERROR))
  975. ps->rx_length_errors++;
  976. if (status & RX_CRC_ERROR)
  977. ps->rx_crc_errors++;
  978. if (status & RX_COLL)
  979. ps->collisions++;
  980. }
  981. else
  982. ps->rx_bytes += status & RX_FRAME_LEN_MASK;
  983. }
  984. /*
  985. * Au1000 receive routine.
  986. */
  987. static int au1000_rx(struct net_device *dev)
  988. {
  989. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  990. struct sk_buff *skb;
  991. volatile rx_dma_t *prxd;
  992. u32 buff_stat, status;
  993. db_dest_t *pDB;
  994. u32 frmlen;
  995. if (au1000_debug > 5)
  996. printk("%s: au1000_rx head %d\n", dev->name, aup->rx_head);
  997. prxd = aup->rx_dma_ring[aup->rx_head];
  998. buff_stat = prxd->buff_stat;
  999. while (buff_stat & RX_T_DONE) {
  1000. status = prxd->status;
  1001. pDB = aup->rx_db_inuse[aup->rx_head];
  1002. update_rx_stats(dev, status);
  1003. if (!(status & RX_ERROR)) {
  1004. /* good frame */
  1005. frmlen = (status & RX_FRAME_LEN_MASK);
  1006. frmlen -= 4; /* Remove FCS */
  1007. skb = dev_alloc_skb(frmlen + 2);
  1008. if (skb == NULL) {
  1009. printk(KERN_ERR
  1010. "%s: Memory squeeze, dropping packet.\n",
  1011. dev->name);
  1012. aup->stats.rx_dropped++;
  1013. continue;
  1014. }
  1015. skb_reserve(skb, 2); /* 16 byte IP header align */
  1016. eth_copy_and_sum(skb,
  1017. (unsigned char *)pDB->vaddr, frmlen, 0);
  1018. skb_put(skb, frmlen);
  1019. skb->protocol = eth_type_trans(skb, dev);
  1020. netif_rx(skb); /* pass the packet to upper layers */
  1021. }
  1022. else {
  1023. if (au1000_debug > 4) {
  1024. if (status & RX_MISSED_FRAME)
  1025. printk("rx miss\n");
  1026. if (status & RX_WDOG_TIMER)
  1027. printk("rx wdog\n");
  1028. if (status & RX_RUNT)
  1029. printk("rx runt\n");
  1030. if (status & RX_OVERLEN)
  1031. printk("rx overlen\n");
  1032. if (status & RX_COLL)
  1033. printk("rx coll\n");
  1034. if (status & RX_MII_ERROR)
  1035. printk("rx mii error\n");
  1036. if (status & RX_CRC_ERROR)
  1037. printk("rx crc error\n");
  1038. if (status & RX_LEN_ERROR)
  1039. printk("rx len error\n");
  1040. if (status & RX_U_CNTRL_FRAME)
  1041. printk("rx u control frame\n");
  1042. if (status & RX_MISSED_FRAME)
  1043. printk("rx miss\n");
  1044. }
  1045. }
  1046. prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
  1047. aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
  1048. au_sync();
  1049. /* next descriptor */
  1050. prxd = aup->rx_dma_ring[aup->rx_head];
  1051. buff_stat = prxd->buff_stat;
  1052. dev->last_rx = jiffies;
  1053. }
  1054. return 0;
  1055. }
  1056. /*
  1057. * Au1000 interrupt service routine.
  1058. */
  1059. static irqreturn_t au1000_interrupt(int irq, void *dev_id)
  1060. {
  1061. struct net_device *dev = (struct net_device *) dev_id;
  1062. if (dev == NULL) {
  1063. printk(KERN_ERR "%s: isr: null dev ptr\n", dev->name);
  1064. return IRQ_RETVAL(1);
  1065. }
  1066. /* Handle RX interrupts first to minimize chance of overrun */
  1067. au1000_rx(dev);
  1068. au1000_tx_ack(dev);
  1069. return IRQ_RETVAL(1);
  1070. }
  1071. /*
  1072. * The Tx ring has been full longer than the watchdog timeout
  1073. * value. The transmitter must be hung?
  1074. */
  1075. static void au1000_tx_timeout(struct net_device *dev)
  1076. {
  1077. printk(KERN_ERR "%s: au1000_tx_timeout: dev=%p\n", dev->name, dev);
  1078. reset_mac(dev);
  1079. au1000_init(dev);
  1080. dev->trans_start = jiffies;
  1081. netif_wake_queue(dev);
  1082. }
  1083. static void set_rx_mode(struct net_device *dev)
  1084. {
  1085. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  1086. if (au1000_debug > 4)
  1087. printk("%s: set_rx_mode: flags=%x\n", dev->name, dev->flags);
  1088. if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
  1089. aup->mac->control |= MAC_PROMISCUOUS;
  1090. } else if ((dev->flags & IFF_ALLMULTI) ||
  1091. dev->mc_count > MULTICAST_FILTER_LIMIT) {
  1092. aup->mac->control |= MAC_PASS_ALL_MULTI;
  1093. aup->mac->control &= ~MAC_PROMISCUOUS;
  1094. printk(KERN_INFO "%s: Pass all multicast\n", dev->name);
  1095. } else {
  1096. int i;
  1097. struct dev_mc_list *mclist;
  1098. u32 mc_filter[2]; /* Multicast hash filter */
  1099. mc_filter[1] = mc_filter[0] = 0;
  1100. for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
  1101. i++, mclist = mclist->next) {
  1102. set_bit(ether_crc(ETH_ALEN, mclist->dmi_addr)>>26,
  1103. (long *)mc_filter);
  1104. }
  1105. aup->mac->multi_hash_high = mc_filter[1];
  1106. aup->mac->multi_hash_low = mc_filter[0];
  1107. aup->mac->control &= ~MAC_PROMISCUOUS;
  1108. aup->mac->control |= MAC_HASH_MODE;
  1109. }
  1110. }
  1111. static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1112. {
  1113. struct au1000_private *aup = (struct au1000_private *)dev->priv;
  1114. if (!netif_running(dev)) return -EINVAL;
  1115. if (!aup->phy_dev) return -EINVAL; // PHY not controllable
  1116. return phy_mii_ioctl(aup->phy_dev, if_mii(rq), cmd);
  1117. }
  1118. static struct net_device_stats *au1000_get_stats(struct net_device *dev)
  1119. {
  1120. struct au1000_private *aup = (struct au1000_private *) dev->priv;
  1121. if (au1000_debug > 4)
  1122. printk("%s: au1000_get_stats: dev=%p\n", dev->name, dev);
  1123. if (netif_device_present(dev)) {
  1124. return &aup->stats;
  1125. }
  1126. return 0;
  1127. }
  1128. module_init(au1000_init_module);
  1129. module_exit(au1000_cleanup_module);