atl1.h 7.9 KB

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  1. /*
  2. * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
  3. * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
  4. * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
  5. *
  6. * Derived from Intel e1000 driver
  7. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the Free
  11. * Software Foundation; either version 2 of the License, or (at your option)
  12. * any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful, but WITHOUT
  15. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  17. * more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along with
  20. * this program; if not, write to the Free Software Foundation, Inc., 59
  21. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22. */
  23. #ifndef _ATL1_H_
  24. #define _ATL1_H_
  25. #include <linux/types.h>
  26. #include <linux/if_vlan.h>
  27. #include "atl1_hw.h"
  28. /* function prototypes needed by multiple files */
  29. s32 atl1_up(struct atl1_adapter *adapter);
  30. void atl1_down(struct atl1_adapter *adapter);
  31. int atl1_reset(struct atl1_adapter *adapter);
  32. s32 atl1_setup_ring_resources(struct atl1_adapter *adapter);
  33. void atl1_free_ring_resources(struct atl1_adapter *adapter);
  34. extern char atl1_driver_name[];
  35. extern char atl1_driver_version[];
  36. extern const struct ethtool_ops atl1_ethtool_ops;
  37. struct atl1_adapter;
  38. #define ATL1_MAX_INTR 3
  39. #define ATL1_DEFAULT_TPD 256
  40. #define ATL1_MAX_TPD 1024
  41. #define ATL1_MIN_TPD 64
  42. #define ATL1_DEFAULT_RFD 512
  43. #define ATL1_MIN_RFD 128
  44. #define ATL1_MAX_RFD 2048
  45. #define ATL1_GET_DESC(R, i, type) (&(((type *)((R)->desc))[i]))
  46. #define ATL1_RFD_DESC(R, i) ATL1_GET_DESC(R, i, struct rx_free_desc)
  47. #define ATL1_TPD_DESC(R, i) ATL1_GET_DESC(R, i, struct tx_packet_desc)
  48. #define ATL1_RRD_DESC(R, i) ATL1_GET_DESC(R, i, struct rx_return_desc)
  49. /*
  50. * Some workarounds require millisecond delays and are run during interrupt
  51. * context. Most notably, when establishing link, the phy may need tweaking
  52. * but cannot process phy register reads/writes faster than millisecond
  53. * intervals...and we establish link due to a "link status change" interrupt.
  54. */
  55. /*
  56. * wrapper around a pointer to a socket buffer,
  57. * so a DMA handle can be stored along with the buffer
  58. */
  59. struct atl1_buffer {
  60. struct sk_buff *skb;
  61. u16 length;
  62. u16 alloced;
  63. dma_addr_t dma;
  64. };
  65. #define MAX_TX_BUF_LEN 0x3000 /* 12KB */
  66. struct atl1_tpd_ring {
  67. void *desc; /* pointer to the descriptor ring memory */
  68. dma_addr_t dma; /* physical adress of the descriptor ring */
  69. u16 size; /* length of descriptor ring in bytes */
  70. u16 count; /* number of descriptors in the ring */
  71. u16 hw_idx; /* hardware index */
  72. atomic_t next_to_clean;
  73. atomic_t next_to_use;
  74. struct atl1_buffer *buffer_info;
  75. };
  76. struct atl1_rfd_ring {
  77. void *desc;
  78. dma_addr_t dma;
  79. u16 size;
  80. u16 count;
  81. atomic_t next_to_use;
  82. u16 next_to_clean;
  83. struct atl1_buffer *buffer_info;
  84. };
  85. struct atl1_rrd_ring {
  86. void *desc;
  87. dma_addr_t dma;
  88. unsigned int size;
  89. u16 count;
  90. u16 next_to_use;
  91. atomic_t next_to_clean;
  92. };
  93. struct atl1_ring_header {
  94. void *desc; /* pointer to the descriptor ring memory */
  95. dma_addr_t dma; /* physical adress of the descriptor ring */
  96. unsigned int size; /* length of descriptor ring in bytes */
  97. };
  98. struct atl1_cmb {
  99. struct coals_msg_block *cmb;
  100. dma_addr_t dma;
  101. };
  102. struct atl1_smb {
  103. struct stats_msg_block *smb;
  104. dma_addr_t dma;
  105. };
  106. /* Statistics counters */
  107. struct atl1_sft_stats {
  108. u64 rx_packets;
  109. u64 tx_packets;
  110. u64 rx_bytes;
  111. u64 tx_bytes;
  112. u64 multicast;
  113. u64 collisions;
  114. u64 rx_errors;
  115. u64 rx_length_errors;
  116. u64 rx_crc_errors;
  117. u64 rx_frame_errors;
  118. u64 rx_fifo_errors;
  119. u64 rx_missed_errors;
  120. u64 tx_errors;
  121. u64 tx_fifo_errors;
  122. u64 tx_aborted_errors;
  123. u64 tx_window_errors;
  124. u64 tx_carrier_errors;
  125. u64 tx_pause; /* num Pause packet transmitted. */
  126. u64 excecol; /* num tx packets aborted due to excessive collisions. */
  127. u64 deffer; /* num deferred tx packets */
  128. u64 scc; /* num packets subsequently transmitted successfully w/ single prior collision. */
  129. u64 mcc; /* num packets subsequently transmitted successfully w/ multiple prior collisions. */
  130. u64 latecol; /* num tx packets w/ late collisions. */
  131. u64 tx_underun; /* num tx packets aborted due to transmit FIFO underrun, or TRD FIFO underrun */
  132. u64 tx_trunc; /* num tx packets truncated due to size exceeding MTU, regardless whether truncated by Selene or not. (The name doesn't really reflect the meaning in this case.) */
  133. u64 rx_pause; /* num Pause packets received. */
  134. u64 rx_rrd_ov;
  135. u64 rx_trunc;
  136. };
  137. /* board specific private data structure */
  138. #define ATL1_REGS_LEN 8
  139. /* Structure containing variables used by the shared code */
  140. struct atl1_hw {
  141. u8 __iomem *hw_addr;
  142. struct atl1_adapter *back;
  143. enum atl1_dma_order dma_ord;
  144. enum atl1_dma_rcb rcb_value;
  145. enum atl1_dma_req_block dmar_block;
  146. enum atl1_dma_req_block dmaw_block;
  147. u8 preamble_len;
  148. u8 max_retry; /* Retransmission maximum, after which the packet will be discarded */
  149. u8 jam_ipg; /* IPG to start JAM for collision based flow control in half-duplex mode. In units of 8-bit time */
  150. u8 ipgt; /* Desired back to back inter-packet gap. The default is 96-bit time */
  151. u8 min_ifg; /* Minimum number of IFG to enforce in between RX frames. Frame gap below such IFP is dropped */
  152. u8 ipgr1; /* 64bit Carrier-Sense window */
  153. u8 ipgr2; /* 96-bit IPG window */
  154. u8 tpd_burst; /* Number of TPD to prefetch in cache-aligned burst. Each TPD is 16 bytes long */
  155. u8 rfd_burst; /* Number of RFD to prefetch in cache-aligned burst. Each RFD is 12 bytes long */
  156. u8 rfd_fetch_gap;
  157. u8 rrd_burst; /* Threshold number of RRDs that can be retired in a burst. Each RRD is 16 bytes long */
  158. u8 tpd_fetch_th;
  159. u8 tpd_fetch_gap;
  160. u16 tx_jumbo_task_th;
  161. u16 txf_burst; /* Number of data bytes to read in a cache-aligned burst. Each SRAM entry is
  162. 8 bytes long */
  163. u16 rx_jumbo_th; /* Jumbo packet size for non-VLAN packet. VLAN packets should add 4 bytes */
  164. u16 rx_jumbo_lkah;
  165. u16 rrd_ret_timer; /* RRD retirement timer. Decrement by 1 after every 512ns passes. */
  166. u16 lcol; /* Collision Window */
  167. u16 cmb_tpd;
  168. u16 cmb_rrd;
  169. u16 cmb_rx_timer;
  170. u16 cmb_tx_timer;
  171. u32 smb_timer;
  172. u16 media_type;
  173. u16 autoneg_advertised;
  174. u16 pci_cmd_word;
  175. u16 mii_autoneg_adv_reg;
  176. u16 mii_1000t_ctrl_reg;
  177. u32 mem_rang;
  178. u32 txcw;
  179. u32 max_frame_size;
  180. u32 min_frame_size;
  181. u32 mc_filter_type;
  182. u32 num_mc_addrs;
  183. u32 collision_delta;
  184. u32 tx_packet_delta;
  185. u16 phy_spd_default;
  186. u16 dev_rev;
  187. u8 revision_id;
  188. /* spi flash */
  189. u8 flash_vendor;
  190. u8 dma_fairness;
  191. u8 mac_addr[ETH_ALEN];
  192. u8 perm_mac_addr[ETH_ALEN];
  193. /* bool phy_preamble_sup; */
  194. bool phy_configured;
  195. };
  196. struct atl1_adapter {
  197. /* OS defined structs */
  198. struct net_device *netdev;
  199. struct pci_dev *pdev;
  200. struct net_device_stats net_stats;
  201. struct atl1_sft_stats soft_stats;
  202. struct vlan_group *vlgrp;
  203. u32 rx_buffer_len;
  204. u32 wol;
  205. u16 link_speed;
  206. u16 link_duplex;
  207. spinlock_t lock;
  208. atomic_t irq_sem;
  209. struct work_struct tx_timeout_task;
  210. struct work_struct link_chg_task;
  211. struct work_struct pcie_dma_to_rst_task;
  212. struct timer_list watchdog_timer;
  213. struct timer_list phy_config_timer;
  214. bool phy_timer_pending;
  215. bool mac_disabled;
  216. /* All descriptor rings' memory */
  217. struct atl1_ring_header ring_header;
  218. /* TX */
  219. struct atl1_tpd_ring tpd_ring;
  220. spinlock_t mb_lock;
  221. /* RX */
  222. struct atl1_rfd_ring rfd_ring;
  223. struct atl1_rrd_ring rrd_ring;
  224. u64 hw_csum_err;
  225. u64 hw_csum_good;
  226. u32 gorcl;
  227. u64 gorcl_old;
  228. /* Interrupt Moderator timer ( 2us resolution) */
  229. u16 imt;
  230. /* Interrupt Clear timer (2us resolution) */
  231. u16 ict;
  232. /* MII interface info */
  233. struct mii_if_info mii;
  234. /* structs defined in atl1_hw.h */
  235. u32 bd_number; /* board number */
  236. bool pci_using_64;
  237. struct atl1_hw hw;
  238. struct atl1_smb smb;
  239. struct atl1_cmb cmb;
  240. u32 pci_state[16];
  241. };
  242. #endif /* _ATL1_H_ */