pmc551.c 25 KB

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  1. /*
  2. * $Id: pmc551.c,v 1.32 2005/11/07 11:14:25 gleixner Exp $
  3. *
  4. * PMC551 PCI Mezzanine Ram Device
  5. *
  6. * Author:
  7. * Mark Ferrell <mferrell@mvista.com>
  8. * Copyright 1999,2000 Nortel Networks
  9. *
  10. * License:
  11. * As part of this driver was derived from the slram.c driver it
  12. * falls under the same license, which is GNU General Public
  13. * License v2
  14. *
  15. * Description:
  16. * This driver is intended to support the PMC551 PCI Ram device
  17. * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
  18. * cPCI embedded systems. The device contains a single SROM
  19. * that initially programs the V370PDC chipset onboard the
  20. * device, and various banks of DRAM/SDRAM onboard. This driver
  21. * implements this PCI Ram device as an MTD (Memory Technology
  22. * Device) so that it can be used to hold a file system, or for
  23. * added swap space in embedded systems. Since the memory on
  24. * this board isn't as fast as main memory we do not try to hook
  25. * it into main memory as that would simply reduce performance
  26. * on the system. Using it as a block device allows us to use
  27. * it as high speed swap or for a high speed disk device of some
  28. * sort. Which becomes very useful on diskless systems in the
  29. * embedded market I might add.
  30. *
  31. * Notes:
  32. * Due to what I assume is more buggy SROM, the 64M PMC551 I
  33. * have available claims that all 4 of it's DRAM banks have 64M
  34. * of ram configured (making a grand total of 256M onboard).
  35. * This is slightly annoying since the BAR0 size reflects the
  36. * aperture size, not the dram size, and the V370PDC supplies no
  37. * other method for memory size discovery. This problem is
  38. * mostly only relevant when compiled as a module, as the
  39. * unloading of the module with an aperture size smaller then
  40. * the ram will cause the driver to detect the onboard memory
  41. * size to be equal to the aperture size when the module is
  42. * reloaded. Soooo, to help, the module supports an msize
  43. * option to allow the specification of the onboard memory, and
  44. * an asize option, to allow the specification of the aperture
  45. * size. The aperture must be equal to or less then the memory
  46. * size, the driver will correct this if you screw it up. This
  47. * problem is not relevant for compiled in drivers as compiled
  48. * in drivers only init once.
  49. *
  50. * Credits:
  51. * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
  52. * initial example code of how to initialize this device and for
  53. * help with questions I had concerning operation of the device.
  54. *
  55. * Most of the MTD code for this driver was originally written
  56. * for the slram.o module in the MTD drivers package which
  57. * allows the mapping of system memory into an MTD device.
  58. * Since the PMC551 memory module is accessed in the same
  59. * fashion as system memory, the slram.c code became a very nice
  60. * fit to the needs of this driver. All we added was PCI
  61. * detection/initialization to the driver and automatically figure
  62. * out the size via the PCI detection.o, later changes by Corey
  63. * Minyard set up the card to utilize a 1M sliding apature.
  64. *
  65. * Corey Minyard <minyard@nortelnetworks.com>
  66. * * Modified driver to utilize a sliding aperture instead of
  67. * mapping all memory into kernel space which turned out to
  68. * be very wasteful.
  69. * * Located a bug in the SROM's initialization sequence that
  70. * made the memory unusable, added a fix to code to touch up
  71. * the DRAM some.
  72. *
  73. * Bugs/FIXME's:
  74. * * MUST fix the init function to not spin on a register
  75. * waiting for it to set .. this does not safely handle busted
  76. * devices that never reset the register correctly which will
  77. * cause the system to hang w/ a reboot being the only chance at
  78. * recover. [sort of fixed, could be better]
  79. * * Add I2C handling of the SROM so we can read the SROM's information
  80. * about the aperture size. This should always accurately reflect the
  81. * onboard memory size.
  82. * * Comb the init routine. It's still a bit cludgy on a few things.
  83. */
  84. #include <linux/kernel.h>
  85. #include <linux/module.h>
  86. #include <asm/uaccess.h>
  87. #include <linux/types.h>
  88. #include <linux/init.h>
  89. #include <linux/ptrace.h>
  90. #include <linux/slab.h>
  91. #include <linux/string.h>
  92. #include <linux/timer.h>
  93. #include <linux/major.h>
  94. #include <linux/fs.h>
  95. #include <linux/ioctl.h>
  96. #include <asm/io.h>
  97. #include <asm/system.h>
  98. #include <linux/pci.h>
  99. #include <linux/mtd/mtd.h>
  100. #include <linux/mtd/pmc551.h>
  101. #include <linux/mtd/compatmac.h>
  102. static struct mtd_info *pmc551list;
  103. static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr)
  104. {
  105. struct mypriv *priv = mtd->priv;
  106. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  107. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  108. unsigned long end;
  109. u_char *ptr;
  110. size_t retlen;
  111. #ifdef CONFIG_MTD_PMC551_DEBUG
  112. printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr,
  113. (long)instr->len);
  114. #endif
  115. end = instr->addr + instr->len - 1;
  116. /* Is it past the end? */
  117. if (end > mtd->size) {
  118. #ifdef CONFIG_MTD_PMC551_DEBUG
  119. printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n",
  120. (long)end, (long)mtd->size);
  121. #endif
  122. return -EINVAL;
  123. }
  124. eoff_hi = end & ~(priv->asize - 1);
  125. soff_hi = instr->addr & ~(priv->asize - 1);
  126. eoff_lo = end & (priv->asize - 1);
  127. soff_lo = instr->addr & (priv->asize - 1);
  128. pmc551_point(mtd, instr->addr, instr->len, &retlen, &ptr);
  129. if (soff_hi == eoff_hi || mtd->size == priv->asize) {
  130. /* The whole thing fits within one access, so just one shot
  131. will do it. */
  132. memset(ptr, 0xff, instr->len);
  133. } else {
  134. /* We have to do multiple writes to get all the data
  135. written. */
  136. while (soff_hi != eoff_hi) {
  137. #ifdef CONFIG_MTD_PMC551_DEBUG
  138. printk(KERN_DEBUG "pmc551_erase() soff_hi: %ld, "
  139. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  140. #endif
  141. memset(ptr, 0xff, priv->asize);
  142. if (soff_hi + priv->asize >= mtd->size) {
  143. goto out;
  144. }
  145. soff_hi += priv->asize;
  146. pmc551_point(mtd, (priv->base_map0 | soff_hi),
  147. priv->asize, &retlen, &ptr);
  148. }
  149. memset(ptr, 0xff, eoff_lo);
  150. }
  151. out:
  152. instr->state = MTD_ERASE_DONE;
  153. #ifdef CONFIG_MTD_PMC551_DEBUG
  154. printk(KERN_DEBUG "pmc551_erase() done\n");
  155. #endif
  156. mtd_erase_callback(instr);
  157. return 0;
  158. }
  159. static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
  160. size_t * retlen, u_char ** mtdbuf)
  161. {
  162. struct mypriv *priv = mtd->priv;
  163. u32 soff_hi;
  164. u32 soff_lo;
  165. #ifdef CONFIG_MTD_PMC551_DEBUG
  166. printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
  167. #endif
  168. if (from + len > mtd->size) {
  169. #ifdef CONFIG_MTD_PMC551_DEBUG
  170. printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n",
  171. (long)from + len, (long)mtd->size);
  172. #endif
  173. return -EINVAL;
  174. }
  175. soff_hi = from & ~(priv->asize - 1);
  176. soff_lo = from & (priv->asize - 1);
  177. /* Cheap hack optimization */
  178. if (priv->curr_map0 != from) {
  179. pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
  180. (priv->base_map0 | soff_hi));
  181. priv->curr_map0 = soff_hi;
  182. }
  183. *mtdbuf = priv->start + soff_lo;
  184. *retlen = len;
  185. return 0;
  186. }
  187. static void pmc551_unpoint(struct mtd_info *mtd, u_char * addr, loff_t from,
  188. size_t len)
  189. {
  190. #ifdef CONFIG_MTD_PMC551_DEBUG
  191. printk(KERN_DEBUG "pmc551_unpoint()\n");
  192. #endif
  193. }
  194. static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len,
  195. size_t * retlen, u_char * buf)
  196. {
  197. struct mypriv *priv = mtd->priv;
  198. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  199. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  200. unsigned long end;
  201. u_char *ptr;
  202. u_char *copyto = buf;
  203. #ifdef CONFIG_MTD_PMC551_DEBUG
  204. printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n",
  205. (long)from, (long)len, (long)priv->asize);
  206. #endif
  207. end = from + len - 1;
  208. /* Is it past the end? */
  209. if (end > mtd->size) {
  210. #ifdef CONFIG_MTD_PMC551_DEBUG
  211. printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n",
  212. (long)end, (long)mtd->size);
  213. #endif
  214. return -EINVAL;
  215. }
  216. soff_hi = from & ~(priv->asize - 1);
  217. eoff_hi = end & ~(priv->asize - 1);
  218. soff_lo = from & (priv->asize - 1);
  219. eoff_lo = end & (priv->asize - 1);
  220. pmc551_point(mtd, from, len, retlen, &ptr);
  221. if (soff_hi == eoff_hi) {
  222. /* The whole thing fits within one access, so just one shot
  223. will do it. */
  224. memcpy(copyto, ptr, len);
  225. copyto += len;
  226. } else {
  227. /* We have to do multiple writes to get all the data
  228. written. */
  229. while (soff_hi != eoff_hi) {
  230. #ifdef CONFIG_MTD_PMC551_DEBUG
  231. printk(KERN_DEBUG "pmc551_read() soff_hi: %ld, "
  232. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  233. #endif
  234. memcpy(copyto, ptr, priv->asize);
  235. copyto += priv->asize;
  236. if (soff_hi + priv->asize >= mtd->size) {
  237. goto out;
  238. }
  239. soff_hi += priv->asize;
  240. pmc551_point(mtd, soff_hi, priv->asize, retlen, &ptr);
  241. }
  242. memcpy(copyto, ptr, eoff_lo);
  243. copyto += eoff_lo;
  244. }
  245. out:
  246. #ifdef CONFIG_MTD_PMC551_DEBUG
  247. printk(KERN_DEBUG "pmc551_read() done\n");
  248. #endif
  249. *retlen = copyto - buf;
  250. return 0;
  251. }
  252. static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len,
  253. size_t * retlen, const u_char * buf)
  254. {
  255. struct mypriv *priv = mtd->priv;
  256. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  257. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  258. unsigned long end;
  259. u_char *ptr;
  260. const u_char *copyfrom = buf;
  261. #ifdef CONFIG_MTD_PMC551_DEBUG
  262. printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n",
  263. (long)to, (long)len, (long)priv->asize);
  264. #endif
  265. end = to + len - 1;
  266. /* Is it past the end? or did the u32 wrap? */
  267. if (end > mtd->size) {
  268. #ifdef CONFIG_MTD_PMC551_DEBUG
  269. printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, "
  270. "size: %ld, to: %ld)\n", (long)end, (long)mtd->size,
  271. (long)to);
  272. #endif
  273. return -EINVAL;
  274. }
  275. soff_hi = to & ~(priv->asize - 1);
  276. eoff_hi = end & ~(priv->asize - 1);
  277. soff_lo = to & (priv->asize - 1);
  278. eoff_lo = end & (priv->asize - 1);
  279. pmc551_point(mtd, to, len, retlen, &ptr);
  280. if (soff_hi == eoff_hi) {
  281. /* The whole thing fits within one access, so just one shot
  282. will do it. */
  283. memcpy(ptr, copyfrom, len);
  284. copyfrom += len;
  285. } else {
  286. /* We have to do multiple writes to get all the data
  287. written. */
  288. while (soff_hi != eoff_hi) {
  289. #ifdef CONFIG_MTD_PMC551_DEBUG
  290. printk(KERN_DEBUG "pmc551_write() soff_hi: %ld, "
  291. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  292. #endif
  293. memcpy(ptr, copyfrom, priv->asize);
  294. copyfrom += priv->asize;
  295. if (soff_hi >= mtd->size) {
  296. goto out;
  297. }
  298. soff_hi += priv->asize;
  299. pmc551_point(mtd, soff_hi, priv->asize, retlen, &ptr);
  300. }
  301. memcpy(ptr, copyfrom, eoff_lo);
  302. copyfrom += eoff_lo;
  303. }
  304. out:
  305. #ifdef CONFIG_MTD_PMC551_DEBUG
  306. printk(KERN_DEBUG "pmc551_write() done\n");
  307. #endif
  308. *retlen = copyfrom - buf;
  309. return 0;
  310. }
  311. /*
  312. * Fixup routines for the V370PDC
  313. * PCI device ID 0x020011b0
  314. *
  315. * This function basicly kick starts the DRAM oboard the card and gets it
  316. * ready to be used. Before this is done the device reads VERY erratic, so
  317. * much that it can crash the Linux 2.2.x series kernels when a user cat's
  318. * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
  319. * register. FIXME: stop spinning on registers .. must implement a timeout
  320. * mechanism
  321. * returns the size of the memory region found.
  322. */
  323. static u32 fixup_pmc551(struct pci_dev *dev)
  324. {
  325. #ifdef CONFIG_MTD_PMC551_BUGFIX
  326. u32 dram_data;
  327. #endif
  328. u32 size, dcmd, cfg, dtmp;
  329. u16 cmd, tmp, i;
  330. u8 bcmd, counter;
  331. /* Sanity Check */
  332. if (!dev) {
  333. return -ENODEV;
  334. }
  335. /*
  336. * Attempt to reset the card
  337. * FIXME: Stop Spinning registers
  338. */
  339. counter = 0;
  340. /* unlock registers */
  341. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5);
  342. /* read in old data */
  343. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
  344. /* bang the reset line up and down for a few */
  345. for (i = 0; i < 10; i++) {
  346. counter = 0;
  347. bcmd &= ~0x80;
  348. while (counter++ < 100) {
  349. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  350. }
  351. counter = 0;
  352. bcmd |= 0x80;
  353. while (counter++ < 100) {
  354. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  355. }
  356. }
  357. bcmd |= (0x40 | 0x20);
  358. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  359. /*
  360. * Take care and turn off the memory on the device while we
  361. * tweak the configurations
  362. */
  363. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  364. tmp = cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
  365. pci_write_config_word(dev, PCI_COMMAND, tmp);
  366. /*
  367. * Disable existing aperture before probing memory size
  368. */
  369. pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
  370. dtmp = (dcmd | PMC551_PCI_MEM_MAP_ENABLE | PMC551_PCI_MEM_MAP_REG_EN);
  371. pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
  372. /*
  373. * Grab old BAR0 config so that we can figure out memory size
  374. * This is another bit of kludge going on. The reason for the
  375. * redundancy is I am hoping to retain the original configuration
  376. * previously assigned to the card by the BIOS or some previous
  377. * fixup routine in the kernel. So we read the old config into cfg,
  378. * then write all 1's to the memory space, read back the result into
  379. * "size", and then write back all the old config.
  380. */
  381. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &cfg);
  382. #ifndef CONFIG_MTD_PMC551_BUGFIX
  383. pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, ~0);
  384. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &size);
  385. size = (size & PCI_BASE_ADDRESS_MEM_MASK);
  386. size &= ~(size - 1);
  387. pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, cfg);
  388. #else
  389. /*
  390. * Get the size of the memory by reading all the DRAM size values
  391. * and adding them up.
  392. *
  393. * KLUDGE ALERT: the boards we are using have invalid column and
  394. * row mux values. We fix them here, but this will break other
  395. * memory configurations.
  396. */
  397. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
  398. size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
  399. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  400. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  401. pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
  402. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
  403. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  404. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  405. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  406. pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
  407. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
  408. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  409. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  410. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  411. pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
  412. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
  413. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  414. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  415. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  416. pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
  417. /*
  418. * Oops .. something went wrong
  419. */
  420. if ((size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
  421. return -ENODEV;
  422. }
  423. #endif /* CONFIG_MTD_PMC551_BUGFIX */
  424. if ((cfg & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
  425. return -ENODEV;
  426. }
  427. /*
  428. * Precharge Dram
  429. */
  430. pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0400);
  431. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x00bf);
  432. /*
  433. * Wait until command has gone through
  434. * FIXME: register spinning issue
  435. */
  436. do {
  437. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  438. if (counter++ > 100)
  439. break;
  440. } while ((PCI_COMMAND_IO) & cmd);
  441. /*
  442. * Turn on auto refresh
  443. * The loop is taken directly from Ramix's example code. I assume that
  444. * this must be held high for some duration of time, but I can find no
  445. * documentation refrencing the reasons why.
  446. */
  447. for (i = 1; i <= 8; i++) {
  448. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0df);
  449. /*
  450. * Make certain command has gone through
  451. * FIXME: register spinning issue
  452. */
  453. counter = 0;
  454. do {
  455. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  456. if (counter++ > 100)
  457. break;
  458. } while ((PCI_COMMAND_IO) & cmd);
  459. }
  460. pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0020);
  461. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0ff);
  462. /*
  463. * Wait until command completes
  464. * FIXME: register spinning issue
  465. */
  466. counter = 0;
  467. do {
  468. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  469. if (counter++ > 100)
  470. break;
  471. } while ((PCI_COMMAND_IO) & cmd);
  472. pci_read_config_dword(dev, PMC551_DRAM_CFG, &dcmd);
  473. dcmd |= 0x02000000;
  474. pci_write_config_dword(dev, PMC551_DRAM_CFG, dcmd);
  475. /*
  476. * Check to make certain fast back-to-back, if not
  477. * then set it so
  478. */
  479. pci_read_config_word(dev, PCI_STATUS, &cmd);
  480. if ((cmd & PCI_COMMAND_FAST_BACK) == 0) {
  481. cmd |= PCI_COMMAND_FAST_BACK;
  482. pci_write_config_word(dev, PCI_STATUS, cmd);
  483. }
  484. /*
  485. * Check to make certain the DEVSEL is set correctly, this device
  486. * has a tendancy to assert DEVSEL and TRDY when a write is performed
  487. * to the memory when memory is read-only
  488. */
  489. if ((cmd & PCI_STATUS_DEVSEL_MASK) != 0x0) {
  490. cmd &= ~PCI_STATUS_DEVSEL_MASK;
  491. pci_write_config_word(dev, PCI_STATUS, cmd);
  492. }
  493. /*
  494. * Set to be prefetchable and put everything back based on old cfg.
  495. * it's possible that the reset of the V370PDC nuked the original
  496. * setup
  497. */
  498. /*
  499. cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
  500. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  501. */
  502. /*
  503. * Turn PCI memory and I/O bus access back on
  504. */
  505. pci_write_config_word(dev, PCI_COMMAND,
  506. PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
  507. #ifdef CONFIG_MTD_PMC551_DEBUG
  508. /*
  509. * Some screen fun
  510. */
  511. printk(KERN_DEBUG "pmc551: %d%c (0x%x) of %sprefetchable memory at "
  512. "0x%llx\n", (size < 1024) ? size : (size < 1048576) ?
  513. size >> 10 : size >> 20,
  514. (size < 1024) ? 'B' : (size < 1048576) ? 'K' : 'M', size,
  515. ((dcmd & (0x1 << 3)) == 0) ? "non-" : "",
  516. (unsigned long long)pci_resource_start(dev, 0));
  517. /*
  518. * Check to see the state of the memory
  519. */
  520. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dcmd);
  521. printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
  522. "pmc551: DRAM_BLK0 Size: %d at %d\n"
  523. "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
  524. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  525. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  526. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  527. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  528. ((dcmd >> 9) & 0xF));
  529. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dcmd);
  530. printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
  531. "pmc551: DRAM_BLK1 Size: %d at %d\n"
  532. "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
  533. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  534. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  535. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  536. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  537. ((dcmd >> 9) & 0xF));
  538. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dcmd);
  539. printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
  540. "pmc551: DRAM_BLK2 Size: %d at %d\n"
  541. "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
  542. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  543. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  544. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  545. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  546. ((dcmd >> 9) & 0xF));
  547. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dcmd);
  548. printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
  549. "pmc551: DRAM_BLK3 Size: %d at %d\n"
  550. "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
  551. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  552. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  553. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  554. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  555. ((dcmd >> 9) & 0xF));
  556. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  557. printk(KERN_DEBUG "pmc551: Memory Access %s\n",
  558. (((0x1 << 1) & cmd) == 0) ? "off" : "on");
  559. printk(KERN_DEBUG "pmc551: I/O Access %s\n",
  560. (((0x1 << 0) & cmd) == 0) ? "off" : "on");
  561. pci_read_config_word(dev, PCI_STATUS, &cmd);
  562. printk(KERN_DEBUG "pmc551: Devsel %s\n",
  563. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x000) ? "Fast" :
  564. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x200) ? "Medium" :
  565. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x400) ? "Slow" : "Invalid");
  566. printk(KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
  567. ((PCI_COMMAND_FAST_BACK & cmd) == 0) ? "Not " : "");
  568. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
  569. printk(KERN_DEBUG "pmc551: EEPROM is under %s control\n"
  570. "pmc551: System Control Register is %slocked to PCI access\n"
  571. "pmc551: System Control Register is %slocked to EEPROM access\n",
  572. (bcmd & 0x1) ? "software" : "hardware",
  573. (bcmd & 0x20) ? "" : "un", (bcmd & 0x40) ? "" : "un");
  574. #endif
  575. return size;
  576. }
  577. /*
  578. * Kernel version specific module stuffages
  579. */
  580. MODULE_LICENSE("GPL");
  581. MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
  582. MODULE_DESCRIPTION(PMC551_VERSION);
  583. /*
  584. * Stuff these outside the ifdef so as to not bust compiled in driver support
  585. */
  586. static int msize = 0;
  587. #if defined(CONFIG_MTD_PMC551_APERTURE_SIZE)
  588. static int asize = CONFIG_MTD_PMC551_APERTURE_SIZE
  589. #else
  590. static int asize = 0;
  591. #endif
  592. module_param(msize, int, 0);
  593. MODULE_PARM_DESC(msize, "memory size in Megabytes [1 - 1024]");
  594. module_param(asize, int, 0);
  595. MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
  596. /*
  597. * PMC551 Card Initialization
  598. */
  599. static int __init init_pmc551(void)
  600. {
  601. struct pci_dev *PCI_Device = NULL;
  602. struct mypriv *priv;
  603. int count, found = 0;
  604. struct mtd_info *mtd;
  605. u32 length = 0;
  606. if (msize) {
  607. msize = (1 << (ffs(msize) - 1)) << 20;
  608. if (msize > (1 << 30)) {
  609. printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n",
  610. msize);
  611. return -EINVAL;
  612. }
  613. }
  614. if (asize) {
  615. asize = (1 << (ffs(asize) - 1)) << 20;
  616. if (asize > (1 << 30)) {
  617. printk(KERN_NOTICE "pmc551: Invalid aperture size "
  618. "[%d]\n", asize);
  619. return -EINVAL;
  620. }
  621. }
  622. printk(KERN_INFO PMC551_VERSION);
  623. /*
  624. * PCU-bus chipset probe.
  625. */
  626. for (count = 0; count < MAX_MTD_DEVICES; count++) {
  627. if ((PCI_Device = pci_get_device(PCI_VENDOR_ID_V3_SEMI,
  628. PCI_DEVICE_ID_V3_SEMI_V370PDC,
  629. PCI_Device)) == NULL) {
  630. break;
  631. }
  632. printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n",
  633. (unsigned long long)pci_resource_start(PCI_Device, 0));
  634. /*
  635. * The PMC551 device acts VERY weird if you don't init it
  636. * first. i.e. it will not correctly report devsel. If for
  637. * some reason the sdram is in a wrote-protected state the
  638. * device will DEVSEL when it is written to causing problems
  639. * with the oldproc.c driver in
  640. * some kernels (2.2.*)
  641. */
  642. if ((length = fixup_pmc551(PCI_Device)) <= 0) {
  643. printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
  644. break;
  645. }
  646. /*
  647. * This is needed until the driver is capable of reading the
  648. * onboard I2C SROM to discover the "real" memory size.
  649. */
  650. if (msize) {
  651. length = msize;
  652. printk(KERN_NOTICE "pmc551: Using specified memory "
  653. "size 0x%x\n", length);
  654. } else {
  655. msize = length;
  656. }
  657. mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
  658. if (!mtd) {
  659. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
  660. "device.\n");
  661. break;
  662. }
  663. priv = kzalloc(sizeof(struct mypriv), GFP_KERNEL);
  664. if (!priv) {
  665. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
  666. "device.\n");
  667. kfree(mtd);
  668. break;
  669. }
  670. mtd->priv = priv;
  671. priv->dev = PCI_Device;
  672. if (asize > length) {
  673. printk(KERN_NOTICE "pmc551: reducing aperture size to "
  674. "fit %dM\n", length >> 20);
  675. priv->asize = asize = length;
  676. } else if (asize == 0 || asize == length) {
  677. printk(KERN_NOTICE "pmc551: Using existing aperture "
  678. "size %dM\n", length >> 20);
  679. priv->asize = asize = length;
  680. } else {
  681. printk(KERN_NOTICE "pmc551: Using specified aperture "
  682. "size %dM\n", asize >> 20);
  683. priv->asize = asize;
  684. }
  685. priv->start = pci_iomap(PCI_Device, 0, priv->asize);
  686. if (!priv->start) {
  687. printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
  688. kfree(mtd->priv);
  689. kfree(mtd);
  690. break;
  691. }
  692. #ifdef CONFIG_MTD_PMC551_DEBUG
  693. printk(KERN_DEBUG "pmc551: setting aperture to %d\n",
  694. ffs(priv->asize >> 20) - 1);
  695. #endif
  696. priv->base_map0 = (PMC551_PCI_MEM_MAP_REG_EN
  697. | PMC551_PCI_MEM_MAP_ENABLE
  698. | (ffs(priv->asize >> 20) - 1) << 4);
  699. priv->curr_map0 = priv->base_map0;
  700. pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
  701. priv->curr_map0);
  702. #ifdef CONFIG_MTD_PMC551_DEBUG
  703. printk(KERN_DEBUG "pmc551: aperture set to %d\n",
  704. (priv->base_map0 & 0xF0) >> 4);
  705. #endif
  706. mtd->size = msize;
  707. mtd->flags = MTD_CAP_RAM;
  708. mtd->erase = pmc551_erase;
  709. mtd->read = pmc551_read;
  710. mtd->write = pmc551_write;
  711. mtd->point = pmc551_point;
  712. mtd->unpoint = pmc551_unpoint;
  713. mtd->type = MTD_RAM;
  714. mtd->name = "PMC551 RAM board";
  715. mtd->erasesize = 0x10000;
  716. mtd->writesize = 1;
  717. mtd->owner = THIS_MODULE;
  718. if (add_mtd_device(mtd)) {
  719. printk(KERN_NOTICE "pmc551: Failed to register new "
  720. "device\n");
  721. pci_iounmap(PCI_Device, priv->start);
  722. kfree(mtd->priv);
  723. kfree(mtd);
  724. break;
  725. }
  726. /* Keep a reference as the add_mtd_device worked */
  727. pci_dev_get(PCI_Device);
  728. printk(KERN_NOTICE "Registered pmc551 memory device.\n");
  729. printk(KERN_NOTICE "Mapped %dM of memory from 0x%p to 0x%p\n",
  730. priv->asize >> 20,
  731. priv->start, priv->start + priv->asize);
  732. printk(KERN_NOTICE "Total memory is %d%c\n",
  733. (length < 1024) ? length :
  734. (length < 1048576) ? length >> 10 : length >> 20,
  735. (length < 1024) ? 'B' : (length < 1048576) ? 'K' : 'M');
  736. priv->nextpmc551 = pmc551list;
  737. pmc551list = mtd;
  738. found++;
  739. }
  740. /* Exited early, reference left over */
  741. if (PCI_Device)
  742. pci_dev_put(PCI_Device);
  743. if (!pmc551list) {
  744. printk(KERN_NOTICE "pmc551: not detected\n");
  745. return -ENODEV;
  746. } else {
  747. printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
  748. return 0;
  749. }
  750. }
  751. /*
  752. * PMC551 Card Cleanup
  753. */
  754. static void __exit cleanup_pmc551(void)
  755. {
  756. int found = 0;
  757. struct mtd_info *mtd;
  758. struct mypriv *priv;
  759. while ((mtd = pmc551list)) {
  760. priv = mtd->priv;
  761. pmc551list = priv->nextpmc551;
  762. if (priv->start) {
  763. printk(KERN_DEBUG "pmc551: unmapping %dM starting at "
  764. "0x%p\n", priv->asize >> 20, priv->start);
  765. pci_iounmap(priv->dev, priv->start);
  766. }
  767. pci_dev_put(priv->dev);
  768. kfree(mtd->priv);
  769. del_mtd_device(mtd);
  770. kfree(mtd);
  771. found++;
  772. }
  773. printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
  774. }
  775. module_init(init_pmc551);
  776. module_exit(cleanup_pmc551);