mtd_dataflash.c 17 KB

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  1. /*
  2. * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
  3. *
  4. * Largely derived from at91_dataflash.c:
  5. * Copyright (C) 2003-2005 SAN People (Pty) Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/slab.h>
  15. #include <linux/delay.h>
  16. #include <linux/device.h>
  17. #include <linux/spi/spi.h>
  18. #include <linux/spi/flash.h>
  19. #include <linux/mtd/mtd.h>
  20. #include <linux/mtd/partitions.h>
  21. /*
  22. * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
  23. * each chip, which may be used for double buffered I/O; but this driver
  24. * doesn't (yet) use these for any kind of i/o overlap or prefetching.
  25. *
  26. * Sometimes DataFlash is packaged in MMC-format cards, although the
  27. * MMC stack can't use SPI (yet), or distinguish between MMC and DataFlash
  28. * protocols during enumeration.
  29. */
  30. #define CONFIG_DATAFLASH_WRITE_VERIFY
  31. /* reads can bypass the buffers */
  32. #define OP_READ_CONTINUOUS 0xE8
  33. #define OP_READ_PAGE 0xD2
  34. /* group B requests can run even while status reports "busy" */
  35. #define OP_READ_STATUS 0xD7 /* group B */
  36. /* move data between host and buffer */
  37. #define OP_READ_BUFFER1 0xD4 /* group B */
  38. #define OP_READ_BUFFER2 0xD6 /* group B */
  39. #define OP_WRITE_BUFFER1 0x84 /* group B */
  40. #define OP_WRITE_BUFFER2 0x87 /* group B */
  41. /* erasing flash */
  42. #define OP_ERASE_PAGE 0x81
  43. #define OP_ERASE_BLOCK 0x50
  44. /* move data between buffer and flash */
  45. #define OP_TRANSFER_BUF1 0x53
  46. #define OP_TRANSFER_BUF2 0x55
  47. #define OP_MREAD_BUFFER1 0xD4
  48. #define OP_MREAD_BUFFER2 0xD6
  49. #define OP_MWERASE_BUFFER1 0x83
  50. #define OP_MWERASE_BUFFER2 0x86
  51. #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
  52. #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
  53. /* write to buffer, then write-erase to flash */
  54. #define OP_PROGRAM_VIA_BUF1 0x82
  55. #define OP_PROGRAM_VIA_BUF2 0x85
  56. /* compare buffer to flash */
  57. #define OP_COMPARE_BUF1 0x60
  58. #define OP_COMPARE_BUF2 0x61
  59. /* read flash to buffer, then write-erase to flash */
  60. #define OP_REWRITE_VIA_BUF1 0x58
  61. #define OP_REWRITE_VIA_BUF2 0x59
  62. /* newer chips report JEDEC manufacturer and device IDs; chip
  63. * serial number and OTP bits; and per-sector writeprotect.
  64. */
  65. #define OP_READ_ID 0x9F
  66. #define OP_READ_SECURITY 0x77
  67. #define OP_WRITE_SECURITY 0x9A /* OTP bits */
  68. struct dataflash {
  69. u8 command[4];
  70. char name[24];
  71. unsigned partitioned:1;
  72. unsigned short page_offset; /* offset in flash address */
  73. unsigned int page_size; /* of bytes per page */
  74. struct semaphore lock;
  75. struct spi_device *spi;
  76. struct mtd_info mtd;
  77. };
  78. #ifdef CONFIG_MTD_PARTITIONS
  79. #define mtd_has_partitions() (1)
  80. #else
  81. #define mtd_has_partitions() (0)
  82. #endif
  83. /* ......................................................................... */
  84. /*
  85. * Return the status of the DataFlash device.
  86. */
  87. static inline int dataflash_status(struct spi_device *spi)
  88. {
  89. /* NOTE: at45db321c over 25 MHz wants to write
  90. * a dummy byte after the opcode...
  91. */
  92. return spi_w8r8(spi, OP_READ_STATUS);
  93. }
  94. /*
  95. * Poll the DataFlash device until it is READY.
  96. * This usually takes 5-20 msec or so; more for sector erase.
  97. */
  98. static int dataflash_waitready(struct spi_device *spi)
  99. {
  100. int status;
  101. for (;;) {
  102. status = dataflash_status(spi);
  103. if (status < 0) {
  104. DEBUG(MTD_DEBUG_LEVEL1, "%s: status %d?\n",
  105. spi->dev.bus_id, status);
  106. status = 0;
  107. }
  108. if (status & (1 << 7)) /* RDY/nBSY */
  109. return status;
  110. msleep(3);
  111. }
  112. }
  113. /* ......................................................................... */
  114. /*
  115. * Erase pages of flash.
  116. */
  117. static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
  118. {
  119. struct dataflash *priv = (struct dataflash *)mtd->priv;
  120. struct spi_device *spi = priv->spi;
  121. struct spi_transfer x = { .tx_dma = 0, };
  122. struct spi_message msg;
  123. unsigned blocksize = priv->page_size << 3;
  124. u8 *command;
  125. DEBUG(MTD_DEBUG_LEVEL2, "%s: erase addr=0x%x len 0x%x\n",
  126. spi->dev.bus_id,
  127. instr->addr, instr->len);
  128. /* Sanity checks */
  129. if ((instr->addr + instr->len) > mtd->size
  130. || (instr->len % priv->page_size) != 0
  131. || (instr->addr % priv->page_size) != 0)
  132. return -EINVAL;
  133. spi_message_init(&msg);
  134. x.tx_buf = command = priv->command;
  135. x.len = 4;
  136. spi_message_add_tail(&x, &msg);
  137. down(&priv->lock);
  138. while (instr->len > 0) {
  139. unsigned int pageaddr;
  140. int status;
  141. int do_block;
  142. /* Calculate flash page address; use block erase (for speed) if
  143. * we're at a block boundary and need to erase the whole block.
  144. */
  145. pageaddr = instr->addr / priv->page_size;
  146. do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
  147. pageaddr = pageaddr << priv->page_offset;
  148. command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
  149. command[1] = (u8)(pageaddr >> 16);
  150. command[2] = (u8)(pageaddr >> 8);
  151. command[3] = 0;
  152. DEBUG(MTD_DEBUG_LEVEL3, "ERASE %s: (%x) %x %x %x [%i]\n",
  153. do_block ? "block" : "page",
  154. command[0], command[1], command[2], command[3],
  155. pageaddr);
  156. status = spi_sync(spi, &msg);
  157. (void) dataflash_waitready(spi);
  158. if (status < 0) {
  159. printk(KERN_ERR "%s: erase %x, err %d\n",
  160. spi->dev.bus_id, pageaddr, status);
  161. /* REVISIT: can retry instr->retries times; or
  162. * giveup and instr->fail_addr = instr->addr;
  163. */
  164. continue;
  165. }
  166. if (do_block) {
  167. instr->addr += blocksize;
  168. instr->len -= blocksize;
  169. } else {
  170. instr->addr += priv->page_size;
  171. instr->len -= priv->page_size;
  172. }
  173. }
  174. up(&priv->lock);
  175. /* Inform MTD subsystem that erase is complete */
  176. instr->state = MTD_ERASE_DONE;
  177. mtd_erase_callback(instr);
  178. return 0;
  179. }
  180. /*
  181. * Read from the DataFlash device.
  182. * from : Start offset in flash device
  183. * len : Amount to read
  184. * retlen : About of data actually read
  185. * buf : Buffer containing the data
  186. */
  187. static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
  188. size_t *retlen, u_char *buf)
  189. {
  190. struct dataflash *priv = (struct dataflash *)mtd->priv;
  191. struct spi_transfer x[2] = { { .tx_dma = 0, }, };
  192. struct spi_message msg;
  193. unsigned int addr;
  194. u8 *command;
  195. int status;
  196. DEBUG(MTD_DEBUG_LEVEL2, "%s: read 0x%x..0x%x\n",
  197. priv->spi->dev.bus_id, (unsigned)from, (unsigned)(from + len));
  198. *retlen = 0;
  199. /* Sanity checks */
  200. if (!len)
  201. return 0;
  202. if (from + len > mtd->size)
  203. return -EINVAL;
  204. /* Calculate flash page/byte address */
  205. addr = (((unsigned)from / priv->page_size) << priv->page_offset)
  206. + ((unsigned)from % priv->page_size);
  207. command = priv->command;
  208. DEBUG(MTD_DEBUG_LEVEL3, "READ: (%x) %x %x %x\n",
  209. command[0], command[1], command[2], command[3]);
  210. spi_message_init(&msg);
  211. x[0].tx_buf = command;
  212. x[0].len = 8;
  213. spi_message_add_tail(&x[0], &msg);
  214. x[1].rx_buf = buf;
  215. x[1].len = len;
  216. spi_message_add_tail(&x[1], &msg);
  217. down(&priv->lock);
  218. /* Continuous read, max clock = f(car) which may be less than
  219. * the peak rate available. Some chips support commands with
  220. * fewer "don't care" bytes. Both buffers stay unchanged.
  221. */
  222. command[0] = OP_READ_CONTINUOUS;
  223. command[1] = (u8)(addr >> 16);
  224. command[2] = (u8)(addr >> 8);
  225. command[3] = (u8)(addr >> 0);
  226. /* plus 4 "don't care" bytes */
  227. status = spi_sync(priv->spi, &msg);
  228. up(&priv->lock);
  229. if (status >= 0) {
  230. *retlen = msg.actual_length - 8;
  231. status = 0;
  232. } else
  233. DEBUG(MTD_DEBUG_LEVEL1, "%s: read %x..%x --> %d\n",
  234. priv->spi->dev.bus_id,
  235. (unsigned)from, (unsigned)(from + len),
  236. status);
  237. return status;
  238. }
  239. /*
  240. * Write to the DataFlash device.
  241. * to : Start offset in flash device
  242. * len : Amount to write
  243. * retlen : Amount of data actually written
  244. * buf : Buffer containing the data
  245. */
  246. static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
  247. size_t * retlen, const u_char * buf)
  248. {
  249. struct dataflash *priv = (struct dataflash *)mtd->priv;
  250. struct spi_device *spi = priv->spi;
  251. struct spi_transfer x[2] = { { .tx_dma = 0, }, };
  252. struct spi_message msg;
  253. unsigned int pageaddr, addr, offset, writelen;
  254. size_t remaining = len;
  255. u_char *writebuf = (u_char *) buf;
  256. int status = -EINVAL;
  257. u8 *command;
  258. DEBUG(MTD_DEBUG_LEVEL2, "%s: write 0x%x..0x%x\n",
  259. spi->dev.bus_id, (unsigned)to, (unsigned)(to + len));
  260. *retlen = 0;
  261. /* Sanity checks */
  262. if (!len)
  263. return 0;
  264. if ((to + len) > mtd->size)
  265. return -EINVAL;
  266. spi_message_init(&msg);
  267. x[0].tx_buf = command = priv->command;
  268. x[0].len = 4;
  269. spi_message_add_tail(&x[0], &msg);
  270. pageaddr = ((unsigned)to / priv->page_size);
  271. offset = ((unsigned)to % priv->page_size);
  272. if (offset + len > priv->page_size)
  273. writelen = priv->page_size - offset;
  274. else
  275. writelen = len;
  276. down(&priv->lock);
  277. while (remaining > 0) {
  278. DEBUG(MTD_DEBUG_LEVEL3, "write @ %i:%i len=%i\n",
  279. pageaddr, offset, writelen);
  280. /* REVISIT:
  281. * (a) each page in a sector must be rewritten at least
  282. * once every 10K sibling erase/program operations.
  283. * (b) for pages that are already erased, we could
  284. * use WRITE+MWRITE not PROGRAM for ~30% speedup.
  285. * (c) WRITE to buffer could be done while waiting for
  286. * a previous MWRITE/MWERASE to complete ...
  287. * (d) error handling here seems to be mostly missing.
  288. *
  289. * Two persistent bits per page, plus a per-sector counter,
  290. * could support (a) and (b) ... we might consider using
  291. * the second half of sector zero, which is just one block,
  292. * to track that state. (On AT91, that sector should also
  293. * support boot-from-DataFlash.)
  294. */
  295. addr = pageaddr << priv->page_offset;
  296. /* (1) Maybe transfer partial page to Buffer1 */
  297. if (writelen != priv->page_size) {
  298. command[0] = OP_TRANSFER_BUF1;
  299. command[1] = (addr & 0x00FF0000) >> 16;
  300. command[2] = (addr & 0x0000FF00) >> 8;
  301. command[3] = 0;
  302. DEBUG(MTD_DEBUG_LEVEL3, "TRANSFER: (%x) %x %x %x\n",
  303. command[0], command[1], command[2], command[3]);
  304. status = spi_sync(spi, &msg);
  305. if (status < 0)
  306. DEBUG(MTD_DEBUG_LEVEL1, "%s: xfer %u -> %d \n",
  307. spi->dev.bus_id, addr, status);
  308. (void) dataflash_waitready(priv->spi);
  309. }
  310. /* (2) Program full page via Buffer1 */
  311. addr += offset;
  312. command[0] = OP_PROGRAM_VIA_BUF1;
  313. command[1] = (addr & 0x00FF0000) >> 16;
  314. command[2] = (addr & 0x0000FF00) >> 8;
  315. command[3] = (addr & 0x000000FF);
  316. DEBUG(MTD_DEBUG_LEVEL3, "PROGRAM: (%x) %x %x %x\n",
  317. command[0], command[1], command[2], command[3]);
  318. x[1].tx_buf = writebuf;
  319. x[1].len = writelen;
  320. spi_message_add_tail(x + 1, &msg);
  321. status = spi_sync(spi, &msg);
  322. spi_transfer_del(x + 1);
  323. if (status < 0)
  324. DEBUG(MTD_DEBUG_LEVEL1, "%s: pgm %u/%u -> %d \n",
  325. spi->dev.bus_id, addr, writelen, status);
  326. (void) dataflash_waitready(priv->spi);
  327. #ifdef CONFIG_DATAFLASH_WRITE_VERIFY
  328. /* (3) Compare to Buffer1 */
  329. addr = pageaddr << priv->page_offset;
  330. command[0] = OP_COMPARE_BUF1;
  331. command[1] = (addr & 0x00FF0000) >> 16;
  332. command[2] = (addr & 0x0000FF00) >> 8;
  333. command[3] = 0;
  334. DEBUG(MTD_DEBUG_LEVEL3, "COMPARE: (%x) %x %x %x\n",
  335. command[0], command[1], command[2], command[3]);
  336. status = spi_sync(spi, &msg);
  337. if (status < 0)
  338. DEBUG(MTD_DEBUG_LEVEL1, "%s: compare %u -> %d \n",
  339. spi->dev.bus_id, addr, status);
  340. status = dataflash_waitready(priv->spi);
  341. /* Check result of the compare operation */
  342. if ((status & (1 << 6)) == 1) {
  343. printk(KERN_ERR "%s: compare page %u, err %d\n",
  344. spi->dev.bus_id, pageaddr, status);
  345. remaining = 0;
  346. status = -EIO;
  347. break;
  348. } else
  349. status = 0;
  350. #endif /* CONFIG_DATAFLASH_WRITE_VERIFY */
  351. remaining = remaining - writelen;
  352. pageaddr++;
  353. offset = 0;
  354. writebuf += writelen;
  355. *retlen += writelen;
  356. if (remaining > priv->page_size)
  357. writelen = priv->page_size;
  358. else
  359. writelen = remaining;
  360. }
  361. up(&priv->lock);
  362. return status;
  363. }
  364. /* ......................................................................... */
  365. /*
  366. * Register DataFlash device with MTD subsystem.
  367. */
  368. static int __devinit
  369. add_dataflash(struct spi_device *spi, char *name,
  370. int nr_pages, int pagesize, int pageoffset)
  371. {
  372. struct dataflash *priv;
  373. struct mtd_info *device;
  374. struct flash_platform_data *pdata = spi->dev.platform_data;
  375. priv = kzalloc(sizeof *priv, GFP_KERNEL);
  376. if (!priv)
  377. return -ENOMEM;
  378. init_MUTEX(&priv->lock);
  379. priv->spi = spi;
  380. priv->page_size = pagesize;
  381. priv->page_offset = pageoffset;
  382. /* name must be usable with cmdlinepart */
  383. sprintf(priv->name, "spi%d.%d-%s",
  384. spi->master->bus_num, spi->chip_select,
  385. name);
  386. device = &priv->mtd;
  387. device->name = (pdata && pdata->name) ? pdata->name : priv->name;
  388. device->size = nr_pages * pagesize;
  389. device->erasesize = pagesize;
  390. device->writesize = pagesize;
  391. device->owner = THIS_MODULE;
  392. device->type = MTD_DATAFLASH;
  393. device->flags = MTD_WRITEABLE;
  394. device->erase = dataflash_erase;
  395. device->read = dataflash_read;
  396. device->write = dataflash_write;
  397. device->priv = priv;
  398. dev_info(&spi->dev, "%s (%d KBytes)\n", name, device->size/1024);
  399. dev_set_drvdata(&spi->dev, priv);
  400. if (mtd_has_partitions()) {
  401. struct mtd_partition *parts;
  402. int nr_parts = 0;
  403. #ifdef CONFIG_MTD_CMDLINE_PARTS
  404. static const char *part_probes[] = { "cmdlinepart", NULL, };
  405. nr_parts = parse_mtd_partitions(device, part_probes, &parts, 0);
  406. #endif
  407. if (nr_parts <= 0 && pdata && pdata->parts) {
  408. parts = pdata->parts;
  409. nr_parts = pdata->nr_parts;
  410. }
  411. if (nr_parts > 0) {
  412. priv->partitioned = 1;
  413. return add_mtd_partitions(device, parts, nr_parts);
  414. }
  415. } else if (pdata && pdata->nr_parts)
  416. dev_warn(&spi->dev, "ignoring %d default partitions on %s\n",
  417. pdata->nr_parts, device->name);
  418. return add_mtd_device(device) == 1 ? -ENODEV : 0;
  419. }
  420. /*
  421. * Detect and initialize DataFlash device:
  422. *
  423. * Device Density ID code #Pages PageSize Offset
  424. * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
  425. * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1025 264 9
  426. * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
  427. * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
  428. * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
  429. * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
  430. * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
  431. * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
  432. */
  433. static int __devinit dataflash_probe(struct spi_device *spi)
  434. {
  435. int status;
  436. status = dataflash_status(spi);
  437. if (status <= 0 || status == 0xff) {
  438. DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n",
  439. spi->dev.bus_id, status);
  440. if (status == 0 || status == 0xff)
  441. status = -ENODEV;
  442. return status;
  443. }
  444. /* if there's a device there, assume it's dataflash.
  445. * board setup should have set spi->max_speed_max to
  446. * match f(car) for continuous reads, mode 0 or 3.
  447. */
  448. switch (status & 0x3c) {
  449. case 0x0c: /* 0 0 1 1 x x */
  450. status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
  451. break;
  452. case 0x14: /* 0 1 0 1 x x */
  453. status = add_dataflash(spi, "AT45DB021B", 1025, 264, 9);
  454. break;
  455. case 0x1c: /* 0 1 1 1 x x */
  456. status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
  457. break;
  458. case 0x24: /* 1 0 0 1 x x */
  459. status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
  460. break;
  461. case 0x2c: /* 1 0 1 1 x x */
  462. status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
  463. break;
  464. case 0x34: /* 1 1 0 1 x x */
  465. status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
  466. break;
  467. case 0x38: /* 1 1 1 x x x */
  468. case 0x3c:
  469. status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
  470. break;
  471. /* obsolete AT45DB1282 not (yet?) supported */
  472. default:
  473. DEBUG(MTD_DEBUG_LEVEL1, "%s: unsupported device (%x)\n",
  474. spi->dev.bus_id, status & 0x3c);
  475. status = -ENODEV;
  476. }
  477. if (status < 0)
  478. DEBUG(MTD_DEBUG_LEVEL1, "%s: add_dataflash --> %d\n",
  479. spi->dev.bus_id, status);
  480. return status;
  481. }
  482. static int __devexit dataflash_remove(struct spi_device *spi)
  483. {
  484. struct dataflash *flash = dev_get_drvdata(&spi->dev);
  485. int status;
  486. DEBUG(MTD_DEBUG_LEVEL1, "%s: remove\n", spi->dev.bus_id);
  487. if (mtd_has_partitions() && flash->partitioned)
  488. status = del_mtd_partitions(&flash->mtd);
  489. else
  490. status = del_mtd_device(&flash->mtd);
  491. if (status == 0)
  492. kfree(flash);
  493. return status;
  494. }
  495. static struct spi_driver dataflash_driver = {
  496. .driver = {
  497. .name = "mtd_dataflash",
  498. .bus = &spi_bus_type,
  499. .owner = THIS_MODULE,
  500. },
  501. .probe = dataflash_probe,
  502. .remove = __devexit_p(dataflash_remove),
  503. /* FIXME: investigate suspend and resume... */
  504. };
  505. static int __init dataflash_init(void)
  506. {
  507. return spi_register_driver(&dataflash_driver);
  508. }
  509. module_init(dataflash_init);
  510. static void __exit dataflash_exit(void)
  511. {
  512. spi_unregister_driver(&dataflash_driver);
  513. }
  514. module_exit(dataflash_exit);
  515. MODULE_LICENSE("GPL");
  516. MODULE_AUTHOR("Andrew Victor, David Brownell");
  517. MODULE_DESCRIPTION("MTD DataFlash driver");