pvrusb2-i2c-core.c 29 KB

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  1. /*
  2. *
  3. * $Id$
  4. *
  5. * Copyright (C) 2005 Mike Isely <isely@pobox.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #include "pvrusb2-i2c-core.h"
  22. #include "pvrusb2-hdw-internal.h"
  23. #include "pvrusb2-debug.h"
  24. #include "pvrusb2-fx2-cmd.h"
  25. #include "pvrusb2.h"
  26. #define trace_i2c(...) pvr2_trace(PVR2_TRACE_I2C,__VA_ARGS__)
  27. /*
  28. This module attempts to implement a compliant I2C adapter for the pvrusb2
  29. device. By doing this we can then make use of existing functionality in
  30. V4L (e.g. tuner.c) rather than rolling our own.
  31. */
  32. static unsigned int i2c_scan = 0;
  33. module_param(i2c_scan, int, S_IRUGO|S_IWUSR);
  34. MODULE_PARM_DESC(i2c_scan,"scan i2c bus at insmod time");
  35. static int ir_mode[PVR_NUM] = { [0 ... PVR_NUM-1] = 1 };
  36. module_param_array(ir_mode, int, NULL, 0444);
  37. MODULE_PARM_DESC(ir_mode,"specify: 0=disable IR reception, 1=normal IR");
  38. static unsigned int pvr2_i2c_client_describe(struct pvr2_i2c_client *cp,
  39. unsigned int detail,
  40. char *buf,unsigned int maxlen);
  41. static int pvr2_i2c_write(struct pvr2_hdw *hdw, /* Context */
  42. u8 i2c_addr, /* I2C address we're talking to */
  43. u8 *data, /* Data to write */
  44. u16 length) /* Size of data to write */
  45. {
  46. /* Return value - default 0 means success */
  47. int ret;
  48. if (!data) length = 0;
  49. if (length > (sizeof(hdw->cmd_buffer) - 3)) {
  50. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  51. "Killing an I2C write to %u that is too large"
  52. " (desired=%u limit=%u)",
  53. i2c_addr,
  54. length,(unsigned int)(sizeof(hdw->cmd_buffer) - 3));
  55. return -ENOTSUPP;
  56. }
  57. LOCK_TAKE(hdw->ctl_lock);
  58. /* Clear the command buffer (likely to be paranoia) */
  59. memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer));
  60. /* Set up command buffer for an I2C write */
  61. hdw->cmd_buffer[0] = FX2CMD_I2C_WRITE; /* write prefix */
  62. hdw->cmd_buffer[1] = i2c_addr; /* i2c addr of chip */
  63. hdw->cmd_buffer[2] = length; /* length of what follows */
  64. if (length) memcpy(hdw->cmd_buffer + 3, data, length);
  65. /* Do the operation */
  66. ret = pvr2_send_request(hdw,
  67. hdw->cmd_buffer,
  68. length + 3,
  69. hdw->cmd_buffer,
  70. 1);
  71. if (!ret) {
  72. if (hdw->cmd_buffer[0] != 8) {
  73. ret = -EIO;
  74. if (hdw->cmd_buffer[0] != 7) {
  75. trace_i2c("unexpected status"
  76. " from i2_write[%d]: %d",
  77. i2c_addr,hdw->cmd_buffer[0]);
  78. }
  79. }
  80. }
  81. LOCK_GIVE(hdw->ctl_lock);
  82. return ret;
  83. }
  84. static int pvr2_i2c_read(struct pvr2_hdw *hdw, /* Context */
  85. u8 i2c_addr, /* I2C address we're talking to */
  86. u8 *data, /* Data to write */
  87. u16 dlen, /* Size of data to write */
  88. u8 *res, /* Where to put data we read */
  89. u16 rlen) /* Amount of data to read */
  90. {
  91. /* Return value - default 0 means success */
  92. int ret;
  93. if (!data) dlen = 0;
  94. if (dlen > (sizeof(hdw->cmd_buffer) - 4)) {
  95. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  96. "Killing an I2C read to %u that has wlen too large"
  97. " (desired=%u limit=%u)",
  98. i2c_addr,
  99. dlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 4));
  100. return -ENOTSUPP;
  101. }
  102. if (res && (rlen > (sizeof(hdw->cmd_buffer) - 1))) {
  103. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  104. "Killing an I2C read to %u that has rlen too large"
  105. " (desired=%u limit=%u)",
  106. i2c_addr,
  107. rlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 1));
  108. return -ENOTSUPP;
  109. }
  110. LOCK_TAKE(hdw->ctl_lock);
  111. /* Clear the command buffer (likely to be paranoia) */
  112. memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer));
  113. /* Set up command buffer for an I2C write followed by a read */
  114. hdw->cmd_buffer[0] = FX2CMD_I2C_READ; /* read prefix */
  115. hdw->cmd_buffer[1] = dlen; /* arg length */
  116. hdw->cmd_buffer[2] = rlen; /* answer length. Device will send one
  117. more byte (status). */
  118. hdw->cmd_buffer[3] = i2c_addr; /* i2c addr of chip */
  119. if (dlen) memcpy(hdw->cmd_buffer + 4, data, dlen);
  120. /* Do the operation */
  121. ret = pvr2_send_request(hdw,
  122. hdw->cmd_buffer,
  123. 4 + dlen,
  124. hdw->cmd_buffer,
  125. rlen + 1);
  126. if (!ret) {
  127. if (hdw->cmd_buffer[0] != 8) {
  128. ret = -EIO;
  129. if (hdw->cmd_buffer[0] != 7) {
  130. trace_i2c("unexpected status"
  131. " from i2_read[%d]: %d",
  132. i2c_addr,hdw->cmd_buffer[0]);
  133. }
  134. }
  135. }
  136. /* Copy back the result */
  137. if (res && rlen) {
  138. if (ret) {
  139. /* Error, just blank out the return buffer */
  140. memset(res, 0, rlen);
  141. } else {
  142. memcpy(res, hdw->cmd_buffer + 1, rlen);
  143. }
  144. }
  145. LOCK_GIVE(hdw->ctl_lock);
  146. return ret;
  147. }
  148. /* This is the common low level entry point for doing I2C operations to the
  149. hardware. */
  150. static int pvr2_i2c_basic_op(struct pvr2_hdw *hdw,
  151. u8 i2c_addr,
  152. u8 *wdata,
  153. u16 wlen,
  154. u8 *rdata,
  155. u16 rlen)
  156. {
  157. if (!rdata) rlen = 0;
  158. if (!wdata) wlen = 0;
  159. if (rlen || !wlen) {
  160. return pvr2_i2c_read(hdw,i2c_addr,wdata,wlen,rdata,rlen);
  161. } else {
  162. return pvr2_i2c_write(hdw,i2c_addr,wdata,wlen);
  163. }
  164. }
  165. /* This is a special entry point for cases of I2C transaction attempts to
  166. the IR receiver. The implementation here simulates the IR receiver by
  167. issuing a command to the FX2 firmware and using that response to return
  168. what the real I2C receiver would have returned. We use this for 24xxx
  169. devices, where the IR receiver chip has been removed and replaced with
  170. FX2 related logic. */
  171. static int i2c_24xxx_ir(struct pvr2_hdw *hdw,
  172. u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen)
  173. {
  174. u8 dat[4];
  175. unsigned int stat;
  176. if (!(rlen || wlen)) {
  177. /* This is a probe attempt. Just let it succeed. */
  178. return 0;
  179. }
  180. /* We don't understand this kind of transaction */
  181. if ((wlen != 0) || (rlen == 0)) return -EIO;
  182. if (rlen < 3) {
  183. /* Mike Isely <isely@pobox.com> Appears to be a probe
  184. attempt from lirc. Just fill in zeroes and return. If
  185. we try instead to do the full transaction here, then bad
  186. things seem to happen within the lirc driver module
  187. (version 0.8.0-7 sources from Debian, when run under
  188. vanilla 2.6.17.6 kernel) - and I don't have the patience
  189. to chase it down. */
  190. if (rlen > 0) rdata[0] = 0;
  191. if (rlen > 1) rdata[1] = 0;
  192. return 0;
  193. }
  194. /* Issue a command to the FX2 to read the IR receiver. */
  195. LOCK_TAKE(hdw->ctl_lock); do {
  196. hdw->cmd_buffer[0] = FX2CMD_GET_IR_CODE;
  197. stat = pvr2_send_request(hdw,
  198. hdw->cmd_buffer,1,
  199. hdw->cmd_buffer,4);
  200. dat[0] = hdw->cmd_buffer[0];
  201. dat[1] = hdw->cmd_buffer[1];
  202. dat[2] = hdw->cmd_buffer[2];
  203. dat[3] = hdw->cmd_buffer[3];
  204. } while (0); LOCK_GIVE(hdw->ctl_lock);
  205. /* Give up if that operation failed. */
  206. if (stat != 0) return stat;
  207. /* Mangle the results into something that looks like the real IR
  208. receiver. */
  209. rdata[2] = 0xc1;
  210. if (dat[0] != 1) {
  211. /* No code received. */
  212. rdata[0] = 0;
  213. rdata[1] = 0;
  214. } else {
  215. u16 val;
  216. /* Mash the FX2 firmware-provided IR code into something
  217. that the normal i2c chip-level driver expects. */
  218. val = dat[1];
  219. val <<= 8;
  220. val |= dat[2];
  221. val >>= 1;
  222. val &= ~0x0003;
  223. val |= 0x8000;
  224. rdata[0] = (val >> 8) & 0xffu;
  225. rdata[1] = val & 0xffu;
  226. }
  227. return 0;
  228. }
  229. /* This is a special entry point that is entered if an I2C operation is
  230. attempted to a wm8775 chip on model 24xxx hardware. Autodetect of this
  231. part doesn't work, but we know it is really there. So let's look for
  232. the autodetect attempt and just return success if we see that. */
  233. static int i2c_hack_wm8775(struct pvr2_hdw *hdw,
  234. u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen)
  235. {
  236. if (!(rlen || wlen)) {
  237. // This is a probe attempt. Just let it succeed.
  238. return 0;
  239. }
  240. return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen);
  241. }
  242. /* This is an entry point designed to always fail any attempt to perform a
  243. transfer. We use this to cause certain I2C addresses to not be
  244. probed. */
  245. static int i2c_black_hole(struct pvr2_hdw *hdw,
  246. u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen)
  247. {
  248. return -EIO;
  249. }
  250. /* This is a special entry point that is entered if an I2C operation is
  251. attempted to a cx25840 chip on model 24xxx hardware. This chip can
  252. sometimes wedge itself. Worse still, when this happens msp3400 can
  253. falsely detect this part and then the system gets hosed up after msp3400
  254. gets confused and dies. What we want to do here is try to keep msp3400
  255. away and also try to notice if the chip is wedged and send a warning to
  256. the system log. */
  257. static int i2c_hack_cx25840(struct pvr2_hdw *hdw,
  258. u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen)
  259. {
  260. int ret;
  261. unsigned int subaddr;
  262. u8 wbuf[2];
  263. int state = hdw->i2c_cx25840_hack_state;
  264. if (!(rlen || wlen)) {
  265. // Probe attempt - always just succeed and don't bother the
  266. // hardware (this helps to make the state machine further
  267. // down somewhat easier).
  268. return 0;
  269. }
  270. if (state == 3) {
  271. return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen);
  272. }
  273. /* We're looking for the exact pattern where the revision register
  274. is being read. The cx25840 module will always look at the
  275. revision register first. Any other pattern of access therefore
  276. has to be a probe attempt from somebody else so we'll reject it.
  277. Normally we could just let each client just probe the part
  278. anyway, but when the cx25840 is wedged, msp3400 will get a false
  279. positive and that just screws things up... */
  280. if (wlen == 0) {
  281. switch (state) {
  282. case 1: subaddr = 0x0100; break;
  283. case 2: subaddr = 0x0101; break;
  284. default: goto fail;
  285. }
  286. } else if (wlen == 2) {
  287. subaddr = (wdata[0] << 8) | wdata[1];
  288. switch (subaddr) {
  289. case 0x0100: state = 1; break;
  290. case 0x0101: state = 2; break;
  291. default: goto fail;
  292. }
  293. } else {
  294. goto fail;
  295. }
  296. if (!rlen) goto success;
  297. state = 0;
  298. if (rlen != 1) goto fail;
  299. /* If we get to here then we have a legitimate read for one of the
  300. two revision bytes, so pass it through. */
  301. wbuf[0] = subaddr >> 8;
  302. wbuf[1] = subaddr;
  303. ret = pvr2_i2c_basic_op(hdw,i2c_addr,wbuf,2,rdata,rlen);
  304. if ((ret != 0) || (*rdata == 0x04) || (*rdata == 0x0a)) {
  305. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  306. "WARNING: Detected a wedged cx25840 chip;"
  307. " the device will not work.");
  308. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  309. "WARNING: Try power cycling the pvrusb2 device.");
  310. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  311. "WARNING: Disabling further access to the device"
  312. " to prevent other foul-ups.");
  313. // This blocks all further communication with the part.
  314. hdw->i2c_func[0x44] = NULL;
  315. pvr2_hdw_render_useless(hdw);
  316. goto fail;
  317. }
  318. /* Success! */
  319. pvr2_trace(PVR2_TRACE_CHIPS,"cx25840 appears to be OK.");
  320. state = 3;
  321. success:
  322. hdw->i2c_cx25840_hack_state = state;
  323. return 0;
  324. fail:
  325. hdw->i2c_cx25840_hack_state = state;
  326. return -EIO;
  327. }
  328. /* This is a very, very limited I2C adapter implementation. We can only
  329. support what we actually know will work on the device... */
  330. static int pvr2_i2c_xfer(struct i2c_adapter *i2c_adap,
  331. struct i2c_msg msgs[],
  332. int num)
  333. {
  334. int ret = -ENOTSUPP;
  335. pvr2_i2c_func funcp = NULL;
  336. struct pvr2_hdw *hdw = (struct pvr2_hdw *)(i2c_adap->algo_data);
  337. if (!num) {
  338. ret = -EINVAL;
  339. goto done;
  340. }
  341. if ((msgs[0].flags & I2C_M_NOSTART)) {
  342. trace_i2c("i2c refusing I2C_M_NOSTART");
  343. goto done;
  344. }
  345. if (msgs[0].addr < PVR2_I2C_FUNC_CNT) {
  346. funcp = hdw->i2c_func[msgs[0].addr];
  347. }
  348. if (!funcp) {
  349. ret = -EIO;
  350. goto done;
  351. }
  352. if (num == 1) {
  353. if (msgs[0].flags & I2C_M_RD) {
  354. /* Simple read */
  355. u16 tcnt,bcnt,offs;
  356. if (!msgs[0].len) {
  357. /* Length == 0 read. This is a probe. */
  358. if (funcp(hdw,msgs[0].addr,NULL,0,NULL,0)) {
  359. ret = -EIO;
  360. goto done;
  361. }
  362. ret = 1;
  363. goto done;
  364. }
  365. /* If the read is short enough we'll do the whole
  366. thing atomically. Otherwise we have no choice
  367. but to break apart the reads. */
  368. tcnt = msgs[0].len;
  369. offs = 0;
  370. while (tcnt) {
  371. bcnt = tcnt;
  372. if (bcnt > sizeof(hdw->cmd_buffer)-1) {
  373. bcnt = sizeof(hdw->cmd_buffer)-1;
  374. }
  375. if (funcp(hdw,msgs[0].addr,NULL,0,
  376. msgs[0].buf+offs,bcnt)) {
  377. ret = -EIO;
  378. goto done;
  379. }
  380. offs += bcnt;
  381. tcnt -= bcnt;
  382. }
  383. ret = 1;
  384. goto done;
  385. } else {
  386. /* Simple write */
  387. ret = 1;
  388. if (funcp(hdw,msgs[0].addr,
  389. msgs[0].buf,msgs[0].len,NULL,0)) {
  390. ret = -EIO;
  391. }
  392. goto done;
  393. }
  394. } else if (num == 2) {
  395. if (msgs[0].addr != msgs[1].addr) {
  396. trace_i2c("i2c refusing 2 phase transfer with"
  397. " conflicting target addresses");
  398. ret = -ENOTSUPP;
  399. goto done;
  400. }
  401. if ((!((msgs[0].flags & I2C_M_RD))) &&
  402. (msgs[1].flags & I2C_M_RD)) {
  403. u16 tcnt,bcnt,wcnt,offs;
  404. /* Write followed by atomic read. If the read
  405. portion is short enough we'll do the whole thing
  406. atomically. Otherwise we have no choice but to
  407. break apart the reads. */
  408. tcnt = msgs[1].len;
  409. wcnt = msgs[0].len;
  410. offs = 0;
  411. while (tcnt || wcnt) {
  412. bcnt = tcnt;
  413. if (bcnt > sizeof(hdw->cmd_buffer)-1) {
  414. bcnt = sizeof(hdw->cmd_buffer)-1;
  415. }
  416. if (funcp(hdw,msgs[0].addr,
  417. msgs[0].buf,wcnt,
  418. msgs[1].buf+offs,bcnt)) {
  419. ret = -EIO;
  420. goto done;
  421. }
  422. offs += bcnt;
  423. tcnt -= bcnt;
  424. wcnt = 0;
  425. }
  426. ret = 2;
  427. goto done;
  428. } else {
  429. trace_i2c("i2c refusing complex transfer"
  430. " read0=%d read1=%d",
  431. (msgs[0].flags & I2C_M_RD),
  432. (msgs[1].flags & I2C_M_RD));
  433. }
  434. } else {
  435. trace_i2c("i2c refusing %d phase transfer",num);
  436. }
  437. done:
  438. if (pvrusb2_debug & PVR2_TRACE_I2C_TRAF) {
  439. unsigned int idx,offs,cnt;
  440. for (idx = 0; idx < num; idx++) {
  441. cnt = msgs[idx].len;
  442. printk(KERN_INFO
  443. "pvrusb2 i2c xfer %u/%u:"
  444. " addr=0x%x len=%d %s%s",
  445. idx+1,num,
  446. msgs[idx].addr,
  447. cnt,
  448. (msgs[idx].flags & I2C_M_RD ?
  449. "read" : "write"),
  450. (msgs[idx].flags & I2C_M_NOSTART ?
  451. " nostart" : ""));
  452. if ((ret > 0) || !(msgs[idx].flags & I2C_M_RD)) {
  453. if (cnt > 8) cnt = 8;
  454. printk(" [");
  455. for (offs = 0; offs < (cnt>8?8:cnt); offs++) {
  456. if (offs) printk(" ");
  457. printk("%02x",msgs[idx].buf[offs]);
  458. }
  459. if (offs < cnt) printk(" ...");
  460. printk("]");
  461. }
  462. if (idx+1 == num) {
  463. printk(" result=%d",ret);
  464. }
  465. printk("\n");
  466. }
  467. if (!num) {
  468. printk(KERN_INFO
  469. "pvrusb2 i2c xfer null transfer result=%d\n",
  470. ret);
  471. }
  472. }
  473. return ret;
  474. }
  475. static int pvr2_i2c_control(struct i2c_adapter *adapter,
  476. unsigned int cmd, unsigned long arg)
  477. {
  478. return 0;
  479. }
  480. static u32 pvr2_i2c_functionality(struct i2c_adapter *adap)
  481. {
  482. return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C | I2C_FUNC_SMBUS_BYTE_DATA;
  483. }
  484. static int pvr2_i2c_core_singleton(struct i2c_client *cp,
  485. unsigned int cmd,void *arg)
  486. {
  487. int stat;
  488. if (!cp) return -EINVAL;
  489. if (!(cp->driver)) return -EINVAL;
  490. if (!(cp->driver->command)) return -EINVAL;
  491. if (!try_module_get(cp->driver->driver.owner)) return -EAGAIN;
  492. stat = cp->driver->command(cp,cmd,arg);
  493. module_put(cp->driver->driver.owner);
  494. return stat;
  495. }
  496. int pvr2_i2c_client_cmd(struct pvr2_i2c_client *cp,unsigned int cmd,void *arg)
  497. {
  498. int stat;
  499. if (pvrusb2_debug & PVR2_TRACE_I2C_CMD) {
  500. char buf[100];
  501. unsigned int cnt;
  502. cnt = pvr2_i2c_client_describe(cp,PVR2_I2C_DETAIL_DEBUG,
  503. buf,sizeof(buf));
  504. pvr2_trace(PVR2_TRACE_I2C_CMD,
  505. "i2c COMMAND (code=%u 0x%x) to %.*s",
  506. cmd,cmd,cnt,buf);
  507. }
  508. stat = pvr2_i2c_core_singleton(cp->client,cmd,arg);
  509. if (pvrusb2_debug & PVR2_TRACE_I2C_CMD) {
  510. char buf[100];
  511. unsigned int cnt;
  512. cnt = pvr2_i2c_client_describe(cp,PVR2_I2C_DETAIL_DEBUG,
  513. buf,sizeof(buf));
  514. pvr2_trace(PVR2_TRACE_I2C_CMD,
  515. "i2c COMMAND to %.*s (ret=%d)",cnt,buf,stat);
  516. }
  517. return stat;
  518. }
  519. int pvr2_i2c_core_cmd(struct pvr2_hdw *hdw,unsigned int cmd,void *arg)
  520. {
  521. struct list_head *item,*nc;
  522. struct pvr2_i2c_client *cp;
  523. int stat = -EINVAL;
  524. if (!hdw) return stat;
  525. mutex_lock(&hdw->i2c_list_lock);
  526. list_for_each_safe(item,nc,&hdw->i2c_clients) {
  527. cp = list_entry(item,struct pvr2_i2c_client,list);
  528. if (!cp->recv_enable) continue;
  529. mutex_unlock(&hdw->i2c_list_lock);
  530. stat = pvr2_i2c_client_cmd(cp,cmd,arg);
  531. mutex_lock(&hdw->i2c_list_lock);
  532. }
  533. mutex_unlock(&hdw->i2c_list_lock);
  534. return stat;
  535. }
  536. static int handler_check(struct pvr2_i2c_client *cp)
  537. {
  538. struct pvr2_i2c_handler *hp = cp->handler;
  539. if (!hp) return 0;
  540. if (!hp->func_table->check) return 0;
  541. return hp->func_table->check(hp->func_data) != 0;
  542. }
  543. #define BUFSIZE 500
  544. void pvr2_i2c_core_status_poll(struct pvr2_hdw *hdw)
  545. {
  546. struct list_head *item;
  547. struct pvr2_i2c_client *cp;
  548. mutex_lock(&hdw->i2c_list_lock); do {
  549. struct v4l2_tuner *vtp = &hdw->tuner_signal_info;
  550. memset(vtp,0,sizeof(*vtp));
  551. list_for_each(item,&hdw->i2c_clients) {
  552. cp = list_entry(item,struct pvr2_i2c_client,list);
  553. if (!cp->detected_flag) continue;
  554. if (!cp->status_poll) continue;
  555. cp->status_poll(cp);
  556. }
  557. hdw->tuner_signal_stale = 0;
  558. pvr2_trace(PVR2_TRACE_CHIPS,"i2c status poll"
  559. " type=%u strength=%u audio=0x%x cap=0x%x"
  560. " low=%u hi=%u",
  561. vtp->type,
  562. vtp->signal,vtp->rxsubchans,vtp->capability,
  563. vtp->rangelow,vtp->rangehigh);
  564. } while (0); mutex_unlock(&hdw->i2c_list_lock);
  565. }
  566. /* Issue various I2C operations to bring chip-level drivers into sync with
  567. state stored in this driver. */
  568. void pvr2_i2c_core_sync(struct pvr2_hdw *hdw)
  569. {
  570. unsigned long msk;
  571. unsigned int idx;
  572. struct list_head *item,*nc;
  573. struct pvr2_i2c_client *cp;
  574. if (!hdw->i2c_linked) return;
  575. if (!(hdw->i2c_pend_types & PVR2_I2C_PEND_ALL)) {
  576. return;
  577. }
  578. mutex_lock(&hdw->i2c_list_lock); do {
  579. pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: core_sync BEGIN");
  580. if (hdw->i2c_pend_types & PVR2_I2C_PEND_DETECT) {
  581. /* One or more I2C clients have attached since we
  582. last synced. So scan the list and identify the
  583. new clients. */
  584. char *buf;
  585. unsigned int cnt;
  586. unsigned long amask = 0;
  587. buf = kmalloc(BUFSIZE,GFP_KERNEL);
  588. pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_DETECT");
  589. hdw->i2c_pend_types &= ~PVR2_I2C_PEND_DETECT;
  590. list_for_each(item,&hdw->i2c_clients) {
  591. cp = list_entry(item,struct pvr2_i2c_client,
  592. list);
  593. if (!cp->detected_flag) {
  594. cp->ctl_mask = 0;
  595. pvr2_i2c_probe(hdw,cp);
  596. cp->detected_flag = !0;
  597. msk = cp->ctl_mask;
  598. cnt = 0;
  599. if (buf) {
  600. cnt = pvr2_i2c_client_describe(
  601. cp,
  602. PVR2_I2C_DETAIL_ALL,
  603. buf,BUFSIZE);
  604. }
  605. trace_i2c("Probed: %.*s",cnt,buf);
  606. if (handler_check(cp)) {
  607. hdw->i2c_pend_types |=
  608. PVR2_I2C_PEND_CLIENT;
  609. }
  610. cp->pend_mask = msk;
  611. hdw->i2c_pend_mask |= msk;
  612. hdw->i2c_pend_types |=
  613. PVR2_I2C_PEND_REFRESH;
  614. }
  615. amask |= cp->ctl_mask;
  616. }
  617. hdw->i2c_active_mask = amask;
  618. if (buf) kfree(buf);
  619. }
  620. if (hdw->i2c_pend_types & PVR2_I2C_PEND_STALE) {
  621. /* Need to do one or more global updates. Arrange
  622. for this to happen. */
  623. unsigned long m2;
  624. pvr2_trace(PVR2_TRACE_I2C_CORE,
  625. "i2c: PEND_STALE (0x%lx)",
  626. hdw->i2c_stale_mask);
  627. hdw->i2c_pend_types &= ~PVR2_I2C_PEND_STALE;
  628. list_for_each(item,&hdw->i2c_clients) {
  629. cp = list_entry(item,struct pvr2_i2c_client,
  630. list);
  631. m2 = hdw->i2c_stale_mask;
  632. m2 &= cp->ctl_mask;
  633. m2 &= ~cp->pend_mask;
  634. if (m2) {
  635. pvr2_trace(PVR2_TRACE_I2C_CORE,
  636. "i2c: cp=%p setting 0x%lx",
  637. cp,m2);
  638. cp->pend_mask |= m2;
  639. }
  640. }
  641. hdw->i2c_pend_mask |= hdw->i2c_stale_mask;
  642. hdw->i2c_stale_mask = 0;
  643. hdw->i2c_pend_types |= PVR2_I2C_PEND_REFRESH;
  644. }
  645. if (hdw->i2c_pend_types & PVR2_I2C_PEND_CLIENT) {
  646. /* One or more client handlers are asking for an
  647. update. Run through the list of known clients
  648. and update each one. */
  649. pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_CLIENT");
  650. hdw->i2c_pend_types &= ~PVR2_I2C_PEND_CLIENT;
  651. list_for_each_safe(item,nc,&hdw->i2c_clients) {
  652. cp = list_entry(item,struct pvr2_i2c_client,
  653. list);
  654. if (!cp->handler) continue;
  655. if (!cp->handler->func_table->update) continue;
  656. pvr2_trace(PVR2_TRACE_I2C_CORE,
  657. "i2c: cp=%p update",cp);
  658. mutex_unlock(&hdw->i2c_list_lock);
  659. cp->handler->func_table->update(
  660. cp->handler->func_data);
  661. mutex_lock(&hdw->i2c_list_lock);
  662. /* If client's update function set some
  663. additional pending bits, account for that
  664. here. */
  665. if (cp->pend_mask & ~hdw->i2c_pend_mask) {
  666. hdw->i2c_pend_mask |= cp->pend_mask;
  667. hdw->i2c_pend_types |=
  668. PVR2_I2C_PEND_REFRESH;
  669. }
  670. }
  671. }
  672. if (hdw->i2c_pend_types & PVR2_I2C_PEND_REFRESH) {
  673. const struct pvr2_i2c_op *opf;
  674. unsigned long pm;
  675. /* Some actual updates are pending. Walk through
  676. each update type and perform it. */
  677. pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_REFRESH"
  678. " (0x%lx)",hdw->i2c_pend_mask);
  679. hdw->i2c_pend_types &= ~PVR2_I2C_PEND_REFRESH;
  680. pm = hdw->i2c_pend_mask;
  681. hdw->i2c_pend_mask = 0;
  682. for (idx = 0, msk = 1; pm; idx++, msk <<= 1) {
  683. if (!(pm & msk)) continue;
  684. pm &= ~msk;
  685. list_for_each(item,&hdw->i2c_clients) {
  686. cp = list_entry(item,
  687. struct pvr2_i2c_client,
  688. list);
  689. if (cp->pend_mask & msk) {
  690. cp->pend_mask &= ~msk;
  691. cp->recv_enable = !0;
  692. } else {
  693. cp->recv_enable = 0;
  694. }
  695. }
  696. opf = pvr2_i2c_get_op(idx);
  697. if (!opf) continue;
  698. mutex_unlock(&hdw->i2c_list_lock);
  699. opf->update(hdw);
  700. mutex_lock(&hdw->i2c_list_lock);
  701. }
  702. }
  703. pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: core_sync END");
  704. } while (0); mutex_unlock(&hdw->i2c_list_lock);
  705. }
  706. int pvr2_i2c_core_check_stale(struct pvr2_hdw *hdw)
  707. {
  708. unsigned long msk,sm,pm;
  709. unsigned int idx;
  710. const struct pvr2_i2c_op *opf;
  711. struct list_head *item;
  712. struct pvr2_i2c_client *cp;
  713. unsigned int pt = 0;
  714. pvr2_trace(PVR2_TRACE_I2C_CORE,"pvr2_i2c_core_check_stale BEGIN");
  715. pm = hdw->i2c_active_mask;
  716. sm = 0;
  717. for (idx = 0, msk = 1; pm; idx++, msk <<= 1) {
  718. if (!(msk & pm)) continue;
  719. pm &= ~msk;
  720. opf = pvr2_i2c_get_op(idx);
  721. if (!opf) continue;
  722. if (opf->check(hdw)) {
  723. sm |= msk;
  724. }
  725. }
  726. if (sm) pt |= PVR2_I2C_PEND_STALE;
  727. list_for_each(item,&hdw->i2c_clients) {
  728. cp = list_entry(item,struct pvr2_i2c_client,list);
  729. if (!handler_check(cp)) continue;
  730. pt |= PVR2_I2C_PEND_CLIENT;
  731. }
  732. if (pt) {
  733. mutex_lock(&hdw->i2c_list_lock); do {
  734. hdw->i2c_pend_types |= pt;
  735. hdw->i2c_stale_mask |= sm;
  736. hdw->i2c_pend_mask |= hdw->i2c_stale_mask;
  737. } while (0); mutex_unlock(&hdw->i2c_list_lock);
  738. }
  739. pvr2_trace(PVR2_TRACE_I2C_CORE,
  740. "i2c: types=0x%x stale=0x%lx pend=0x%lx",
  741. hdw->i2c_pend_types,
  742. hdw->i2c_stale_mask,
  743. hdw->i2c_pend_mask);
  744. pvr2_trace(PVR2_TRACE_I2C_CORE,"pvr2_i2c_core_check_stale END");
  745. return (hdw->i2c_pend_types & PVR2_I2C_PEND_ALL) != 0;
  746. }
  747. static unsigned int pvr2_i2c_client_describe(struct pvr2_i2c_client *cp,
  748. unsigned int detail,
  749. char *buf,unsigned int maxlen)
  750. {
  751. unsigned int ccnt,bcnt;
  752. int spcfl = 0;
  753. const struct pvr2_i2c_op *opf;
  754. ccnt = 0;
  755. if (detail & PVR2_I2C_DETAIL_DEBUG) {
  756. bcnt = scnprintf(buf,maxlen,
  757. "ctxt=%p ctl_mask=0x%lx",
  758. cp,cp->ctl_mask);
  759. ccnt += bcnt; buf += bcnt; maxlen -= bcnt;
  760. spcfl = !0;
  761. }
  762. bcnt = scnprintf(buf,maxlen,
  763. "%s%s @ 0x%x",
  764. (spcfl ? " " : ""),
  765. cp->client->name,
  766. cp->client->addr);
  767. ccnt += bcnt; buf += bcnt; maxlen -= bcnt;
  768. if ((detail & PVR2_I2C_DETAIL_HANDLER) &&
  769. cp->handler && cp->handler->func_table->describe) {
  770. bcnt = scnprintf(buf,maxlen," (");
  771. ccnt += bcnt; buf += bcnt; maxlen -= bcnt;
  772. bcnt = cp->handler->func_table->describe(
  773. cp->handler->func_data,buf,maxlen);
  774. ccnt += bcnt; buf += bcnt; maxlen -= bcnt;
  775. bcnt = scnprintf(buf,maxlen,")");
  776. ccnt += bcnt; buf += bcnt; maxlen -= bcnt;
  777. }
  778. if ((detail & PVR2_I2C_DETAIL_CTLMASK) && cp->ctl_mask) {
  779. unsigned int idx;
  780. unsigned long msk,sm;
  781. int spcfl;
  782. bcnt = scnprintf(buf,maxlen," [");
  783. ccnt += bcnt; buf += bcnt; maxlen -= bcnt;
  784. sm = 0;
  785. spcfl = 0;
  786. for (idx = 0, msk = 1; msk; idx++, msk <<= 1) {
  787. if (!(cp->ctl_mask & msk)) continue;
  788. opf = pvr2_i2c_get_op(idx);
  789. if (opf) {
  790. bcnt = scnprintf(buf,maxlen,"%s%s",
  791. spcfl ? " " : "",
  792. opf->name);
  793. ccnt += bcnt; buf += bcnt; maxlen -= bcnt;
  794. spcfl = !0;
  795. } else {
  796. sm |= msk;
  797. }
  798. }
  799. if (sm) {
  800. bcnt = scnprintf(buf,maxlen,"%s%lx",
  801. idx != 0 ? " " : "",sm);
  802. ccnt += bcnt; buf += bcnt; maxlen -= bcnt;
  803. }
  804. bcnt = scnprintf(buf,maxlen,"]");
  805. ccnt += bcnt; buf += bcnt; maxlen -= bcnt;
  806. }
  807. return ccnt;
  808. }
  809. unsigned int pvr2_i2c_report(struct pvr2_hdw *hdw,
  810. char *buf,unsigned int maxlen)
  811. {
  812. unsigned int ccnt,bcnt;
  813. struct list_head *item;
  814. struct pvr2_i2c_client *cp;
  815. ccnt = 0;
  816. mutex_lock(&hdw->i2c_list_lock); do {
  817. list_for_each(item,&hdw->i2c_clients) {
  818. cp = list_entry(item,struct pvr2_i2c_client,list);
  819. bcnt = pvr2_i2c_client_describe(
  820. cp,
  821. (PVR2_I2C_DETAIL_HANDLER|
  822. PVR2_I2C_DETAIL_CTLMASK),
  823. buf,maxlen);
  824. ccnt += bcnt; buf += bcnt; maxlen -= bcnt;
  825. bcnt = scnprintf(buf,maxlen,"\n");
  826. ccnt += bcnt; buf += bcnt; maxlen -= bcnt;
  827. }
  828. } while (0); mutex_unlock(&hdw->i2c_list_lock);
  829. return ccnt;
  830. }
  831. static int pvr2_i2c_attach_inform(struct i2c_client *client)
  832. {
  833. struct pvr2_hdw *hdw = (struct pvr2_hdw *)(client->adapter->algo_data);
  834. struct pvr2_i2c_client *cp;
  835. int fl = !(hdw->i2c_pend_types & PVR2_I2C_PEND_ALL);
  836. cp = kzalloc(sizeof(*cp),GFP_KERNEL);
  837. trace_i2c("i2c_attach [client=%s @ 0x%x ctxt=%p]",
  838. client->name,
  839. client->addr,cp);
  840. if (!cp) return -ENOMEM;
  841. cp->hdw = hdw;
  842. INIT_LIST_HEAD(&cp->list);
  843. cp->client = client;
  844. mutex_lock(&hdw->i2c_list_lock); do {
  845. list_add_tail(&cp->list,&hdw->i2c_clients);
  846. hdw->i2c_pend_types |= PVR2_I2C_PEND_DETECT;
  847. } while (0); mutex_unlock(&hdw->i2c_list_lock);
  848. if (fl) pvr2_hdw_poll_trigger_unlocked(hdw);
  849. return 0;
  850. }
  851. static int pvr2_i2c_detach_inform(struct i2c_client *client)
  852. {
  853. struct pvr2_hdw *hdw = (struct pvr2_hdw *)(client->adapter->algo_data);
  854. struct pvr2_i2c_client *cp;
  855. struct list_head *item,*nc;
  856. unsigned long amask = 0;
  857. int foundfl = 0;
  858. mutex_lock(&hdw->i2c_list_lock); do {
  859. list_for_each_safe(item,nc,&hdw->i2c_clients) {
  860. cp = list_entry(item,struct pvr2_i2c_client,list);
  861. if (cp->client == client) {
  862. trace_i2c("pvr2_i2c_detach"
  863. " [client=%s @ 0x%x ctxt=%p]",
  864. client->name,
  865. client->addr,cp);
  866. if (cp->handler &&
  867. cp->handler->func_table->detach) {
  868. cp->handler->func_table->detach(
  869. cp->handler->func_data);
  870. }
  871. list_del(&cp->list);
  872. kfree(cp);
  873. foundfl = !0;
  874. continue;
  875. }
  876. amask |= cp->ctl_mask;
  877. }
  878. hdw->i2c_active_mask = amask;
  879. } while (0); mutex_unlock(&hdw->i2c_list_lock);
  880. if (!foundfl) {
  881. trace_i2c("pvr2_i2c_detach [client=%s @ 0x%x ctxt=<unknown>]",
  882. client->name,
  883. client->addr);
  884. }
  885. return 0;
  886. }
  887. static struct i2c_algorithm pvr2_i2c_algo_template = {
  888. .master_xfer = pvr2_i2c_xfer,
  889. .algo_control = pvr2_i2c_control,
  890. .functionality = pvr2_i2c_functionality,
  891. };
  892. static struct i2c_adapter pvr2_i2c_adap_template = {
  893. .owner = THIS_MODULE,
  894. .class = I2C_CLASS_TV_ANALOG,
  895. .id = I2C_HW_B_BT848,
  896. .client_register = pvr2_i2c_attach_inform,
  897. .client_unregister = pvr2_i2c_detach_inform,
  898. };
  899. static void do_i2c_scan(struct pvr2_hdw *hdw)
  900. {
  901. struct i2c_msg msg[1];
  902. int i,rc;
  903. msg[0].addr = 0;
  904. msg[0].flags = I2C_M_RD;
  905. msg[0].len = 0;
  906. msg[0].buf = NULL;
  907. printk("%s: i2c scan beginning\n",hdw->name);
  908. for (i = 0; i < 128; i++) {
  909. msg[0].addr = i;
  910. rc = i2c_transfer(&hdw->i2c_adap,msg, ARRAY_SIZE(msg));
  911. if (rc != 1) continue;
  912. printk("%s: i2c scan: found device @ 0x%x\n",hdw->name,i);
  913. }
  914. printk("%s: i2c scan done.\n",hdw->name);
  915. }
  916. void pvr2_i2c_core_init(struct pvr2_hdw *hdw)
  917. {
  918. unsigned int idx;
  919. /* The default action for all possible I2C addresses is just to do
  920. the transfer normally. */
  921. for (idx = 0; idx < PVR2_I2C_FUNC_CNT; idx++) {
  922. hdw->i2c_func[idx] = pvr2_i2c_basic_op;
  923. }
  924. /* However, deal with various special cases for 24xxx hardware. */
  925. if (ir_mode[hdw->unit_number] == 0) {
  926. printk(KERN_INFO "%s: IR disabled\n",hdw->name);
  927. hdw->i2c_func[0x18] = i2c_black_hole;
  928. } else if (ir_mode[hdw->unit_number] == 1) {
  929. if (hdw->hdw_type == PVR2_HDW_TYPE_24XXX) {
  930. hdw->i2c_func[0x18] = i2c_24xxx_ir;
  931. }
  932. }
  933. if (hdw->hdw_type == PVR2_HDW_TYPE_24XXX) {
  934. hdw->i2c_func[0x1b] = i2c_hack_wm8775;
  935. hdw->i2c_func[0x44] = i2c_hack_cx25840;
  936. }
  937. // Configure the adapter and set up everything else related to it.
  938. memcpy(&hdw->i2c_adap,&pvr2_i2c_adap_template,sizeof(hdw->i2c_adap));
  939. memcpy(&hdw->i2c_algo,&pvr2_i2c_algo_template,sizeof(hdw->i2c_algo));
  940. strlcpy(hdw->i2c_adap.name,hdw->name,sizeof(hdw->i2c_adap.name));
  941. hdw->i2c_adap.dev.parent = &hdw->usb_dev->dev;
  942. hdw->i2c_adap.algo = &hdw->i2c_algo;
  943. hdw->i2c_adap.algo_data = hdw;
  944. hdw->i2c_pend_mask = 0;
  945. hdw->i2c_stale_mask = 0;
  946. hdw->i2c_active_mask = 0;
  947. INIT_LIST_HEAD(&hdw->i2c_clients);
  948. mutex_init(&hdw->i2c_list_lock);
  949. hdw->i2c_linked = !0;
  950. i2c_add_adapter(&hdw->i2c_adap);
  951. if (i2c_scan) do_i2c_scan(hdw);
  952. }
  953. void pvr2_i2c_core_done(struct pvr2_hdw *hdw)
  954. {
  955. if (hdw->i2c_linked) {
  956. i2c_del_adapter(&hdw->i2c_adap);
  957. hdw->i2c_linked = 0;
  958. }
  959. }
  960. /*
  961. Stuff for Emacs to see, in order to encourage consistent editing style:
  962. *** Local Variables: ***
  963. *** mode: c ***
  964. *** fill-column: 75 ***
  965. *** tab-width: 8 ***
  966. *** c-basic-offset: 8 ***
  967. *** End: ***
  968. */