budget-ci.c 34 KB

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  1. /*
  2. * budget-ci.c: driver for the SAA7146 based Budget DVB cards
  3. *
  4. * Compiled from various sources by Michael Hunold <michael@mihu.de>
  5. *
  6. * msp430 IR support contributed by Jack Thomasson <jkt@Helius.COM>
  7. * partially based on the Siemens DVB driver by Ralph+Marcus Metzler
  8. *
  9. * CI interface support (c) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  27. *
  28. *
  29. * the project's page is at http://www.linuxtv.org/dvb/
  30. */
  31. #include <linux/module.h>
  32. #include <linux/errno.h>
  33. #include <linux/slab.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/input.h>
  36. #include <linux/spinlock.h>
  37. #include <media/ir-common.h>
  38. #include "budget.h"
  39. #include "dvb_ca_en50221.h"
  40. #include "stv0299.h"
  41. #include "stv0297.h"
  42. #include "tda1004x.h"
  43. #include "lnbp21.h"
  44. #include "bsbe1.h"
  45. #include "bsru6.h"
  46. /*
  47. * Regarding DEBIADDR_IR:
  48. * Some CI modules hang if random addresses are read.
  49. * Using address 0x4000 for the IR read means that we
  50. * use the same address as for CI version, which should
  51. * be a safe default.
  52. */
  53. #define DEBIADDR_IR 0x4000
  54. #define DEBIADDR_CICONTROL 0x0000
  55. #define DEBIADDR_CIVERSION 0x4000
  56. #define DEBIADDR_IO 0x1000
  57. #define DEBIADDR_ATTR 0x3000
  58. #define CICONTROL_RESET 0x01
  59. #define CICONTROL_ENABLETS 0x02
  60. #define CICONTROL_CAMDETECT 0x08
  61. #define DEBICICTL 0x00420000
  62. #define DEBICICAM 0x02420000
  63. #define SLOTSTATUS_NONE 1
  64. #define SLOTSTATUS_PRESENT 2
  65. #define SLOTSTATUS_RESET 4
  66. #define SLOTSTATUS_READY 8
  67. #define SLOTSTATUS_OCCUPIED (SLOTSTATUS_PRESENT|SLOTSTATUS_RESET|SLOTSTATUS_READY)
  68. /*
  69. * Milliseconds during which a key is regarded as pressed.
  70. * If an identical command arrives within this time, the timer will start over.
  71. */
  72. #define IR_KEYPRESS_TIMEOUT 250
  73. /* RC5 device wildcard */
  74. #define IR_DEVICE_ANY 255
  75. static int rc5_device = -1;
  76. module_param(rc5_device, int, 0644);
  77. MODULE_PARM_DESC(rc5_device, "only IR commands to given RC5 device (device = 0 - 31, any device = 255, default: autodetect)");
  78. static int ir_debug = 0;
  79. module_param(ir_debug, int, 0644);
  80. MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
  81. struct budget_ci_ir {
  82. struct input_dev *dev;
  83. struct tasklet_struct msp430_irq_tasklet;
  84. struct timer_list timer_keyup;
  85. char name[72]; /* 40 + 32 for (struct saa7146_dev).name */
  86. char phys[32];
  87. struct ir_input_state state;
  88. int rc5_device;
  89. u32 last_raw;
  90. u32 ir_key;
  91. bool have_command;
  92. };
  93. struct budget_ci {
  94. struct budget budget;
  95. struct tasklet_struct ciintf_irq_tasklet;
  96. int slot_status;
  97. int ci_irq;
  98. struct dvb_ca_en50221 ca;
  99. struct budget_ci_ir ir;
  100. u8 tuner_pll_address; /* used for philips_tdm1316l configs */
  101. };
  102. static void msp430_ir_keyup(unsigned long data)
  103. {
  104. struct budget_ci_ir *ir = (struct budget_ci_ir *) data;
  105. ir_input_nokey(ir->dev, &ir->state);
  106. }
  107. static void msp430_ir_interrupt(unsigned long data)
  108. {
  109. struct budget_ci *budget_ci = (struct budget_ci *) data;
  110. struct input_dev *dev = budget_ci->ir.dev;
  111. u32 command = ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8;
  112. u32 raw;
  113. /*
  114. * The msp430 chip can generate two different bytes, command and device
  115. *
  116. * type1: X1CCCCCC, C = command bits (0 - 63)
  117. * type2: X0TDDDDD, D = device bits (0 - 31), T = RC5 toggle bit
  118. *
  119. * Each signal from the remote control can generate one or more command
  120. * bytes and one or more device bytes. For the repeated bytes, the
  121. * highest bit (X) is set. The first command byte is always generated
  122. * before the first device byte. Other than that, no specific order
  123. * seems to apply. To make life interesting, bytes can also be lost.
  124. *
  125. * Only when we have a command and device byte, a keypress is
  126. * generated.
  127. */
  128. if (ir_debug)
  129. printk("budget_ci: received byte 0x%02x\n", command);
  130. /* Remove repeat bit, we use every command */
  131. command = command & 0x7f;
  132. /* Is this a RC5 command byte? */
  133. if (command & 0x40) {
  134. budget_ci->ir.have_command = true;
  135. budget_ci->ir.ir_key = command & 0x3f;
  136. return;
  137. }
  138. /* It's a RC5 device byte */
  139. if (!budget_ci->ir.have_command)
  140. return;
  141. budget_ci->ir.have_command = false;
  142. if (budget_ci->ir.rc5_device != IR_DEVICE_ANY &&
  143. budget_ci->ir.rc5_device != (command & 0x1f))
  144. return;
  145. /* Is this a repeated key sequence? (same device, command, toggle) */
  146. raw = budget_ci->ir.ir_key | (command << 8);
  147. if (budget_ci->ir.last_raw != raw || !timer_pending(&budget_ci->ir.timer_keyup)) {
  148. ir_input_nokey(dev, &budget_ci->ir.state);
  149. ir_input_keydown(dev, &budget_ci->ir.state,
  150. budget_ci->ir.ir_key, raw);
  151. budget_ci->ir.last_raw = raw;
  152. }
  153. mod_timer(&budget_ci->ir.timer_keyup, jiffies + msecs_to_jiffies(IR_KEYPRESS_TIMEOUT));
  154. }
  155. static int msp430_ir_init(struct budget_ci *budget_ci)
  156. {
  157. struct saa7146_dev *saa = budget_ci->budget.dev;
  158. struct input_dev *input_dev = budget_ci->ir.dev;
  159. int error;
  160. budget_ci->ir.dev = input_dev = input_allocate_device();
  161. if (!input_dev) {
  162. printk(KERN_ERR "budget_ci: IR interface initialisation failed\n");
  163. error = -ENOMEM;
  164. goto out1;
  165. }
  166. snprintf(budget_ci->ir.name, sizeof(budget_ci->ir.name),
  167. "Budget-CI dvb ir receiver %s", saa->name);
  168. snprintf(budget_ci->ir.phys, sizeof(budget_ci->ir.phys),
  169. "pci-%s/ir0", pci_name(saa->pci));
  170. input_dev->name = budget_ci->ir.name;
  171. input_dev->phys = budget_ci->ir.phys;
  172. input_dev->id.bustype = BUS_PCI;
  173. input_dev->id.version = 1;
  174. if (saa->pci->subsystem_vendor) {
  175. input_dev->id.vendor = saa->pci->subsystem_vendor;
  176. input_dev->id.product = saa->pci->subsystem_device;
  177. } else {
  178. input_dev->id.vendor = saa->pci->vendor;
  179. input_dev->id.product = saa->pci->device;
  180. }
  181. input_dev->cdev.dev = &saa->pci->dev;
  182. /* Select keymap and address */
  183. switch (budget_ci->budget.dev->pci->subsystem_device) {
  184. case 0x100c:
  185. case 0x100f:
  186. case 0x1011:
  187. case 0x1012:
  188. case 0x1017:
  189. /* The hauppauge keymap is a superset of these remotes */
  190. ir_input_init(input_dev, &budget_ci->ir.state,
  191. IR_TYPE_RC5, ir_codes_hauppauge_new);
  192. if (rc5_device < 0)
  193. budget_ci->ir.rc5_device = 0x1f;
  194. else
  195. budget_ci->ir.rc5_device = rc5_device;
  196. break;
  197. case 0x1010:
  198. /* for the Technotrend 1500 bundled remote */
  199. ir_input_init(input_dev, &budget_ci->ir.state,
  200. IR_TYPE_RC5, ir_codes_tt_1500);
  201. if (rc5_device < 0)
  202. budget_ci->ir.rc5_device = IR_DEVICE_ANY;
  203. else
  204. budget_ci->ir.rc5_device = rc5_device;
  205. break;
  206. default:
  207. /* unknown remote */
  208. ir_input_init(input_dev, &budget_ci->ir.state,
  209. IR_TYPE_RC5, ir_codes_budget_ci_old);
  210. if (rc5_device < 0)
  211. budget_ci->ir.rc5_device = IR_DEVICE_ANY;
  212. else
  213. budget_ci->ir.rc5_device = rc5_device;
  214. break;
  215. }
  216. /* initialise the key-up timeout handler */
  217. init_timer(&budget_ci->ir.timer_keyup);
  218. budget_ci->ir.timer_keyup.function = msp430_ir_keyup;
  219. budget_ci->ir.timer_keyup.data = (unsigned long) &budget_ci->ir;
  220. budget_ci->ir.last_raw = 0xffff; /* An impossible value */
  221. error = input_register_device(input_dev);
  222. if (error) {
  223. printk(KERN_ERR "budget_ci: could not init driver for IR device (code %d)\n", error);
  224. goto out2;
  225. }
  226. /* note: these must be after input_register_device */
  227. input_dev->rep[REP_DELAY] = 400;
  228. input_dev->rep[REP_PERIOD] = 250;
  229. tasklet_init(&budget_ci->ir.msp430_irq_tasklet, msp430_ir_interrupt,
  230. (unsigned long) budget_ci);
  231. SAA7146_IER_ENABLE(saa, MASK_06);
  232. saa7146_setgpio(saa, 3, SAA7146_GPIO_IRQHI);
  233. return 0;
  234. out2:
  235. input_free_device(input_dev);
  236. out1:
  237. return error;
  238. }
  239. static void msp430_ir_deinit(struct budget_ci *budget_ci)
  240. {
  241. struct saa7146_dev *saa = budget_ci->budget.dev;
  242. struct input_dev *dev = budget_ci->ir.dev;
  243. SAA7146_IER_DISABLE(saa, MASK_06);
  244. saa7146_setgpio(saa, 3, SAA7146_GPIO_INPUT);
  245. tasklet_kill(&budget_ci->ir.msp430_irq_tasklet);
  246. del_timer_sync(&dev->timer);
  247. ir_input_nokey(dev, &budget_ci->ir.state);
  248. input_unregister_device(dev);
  249. }
  250. static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
  251. {
  252. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  253. if (slot != 0)
  254. return -EINVAL;
  255. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  256. DEBIADDR_ATTR | (address & 0xfff), 1, 1, 0);
  257. }
  258. static int ciintf_write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address, u8 value)
  259. {
  260. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  261. if (slot != 0)
  262. return -EINVAL;
  263. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  264. DEBIADDR_ATTR | (address & 0xfff), 1, value, 1, 0);
  265. }
  266. static int ciintf_read_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address)
  267. {
  268. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  269. if (slot != 0)
  270. return -EINVAL;
  271. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  272. DEBIADDR_IO | (address & 3), 1, 1, 0);
  273. }
  274. static int ciintf_write_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address, u8 value)
  275. {
  276. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  277. if (slot != 0)
  278. return -EINVAL;
  279. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  280. DEBIADDR_IO | (address & 3), 1, value, 1, 0);
  281. }
  282. static int ciintf_slot_reset(struct dvb_ca_en50221 *ca, int slot)
  283. {
  284. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  285. struct saa7146_dev *saa = budget_ci->budget.dev;
  286. if (slot != 0)
  287. return -EINVAL;
  288. if (budget_ci->ci_irq) {
  289. // trigger on RISING edge during reset so we know when READY is re-asserted
  290. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  291. }
  292. budget_ci->slot_status = SLOTSTATUS_RESET;
  293. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  294. msleep(1);
  295. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  296. CICONTROL_RESET, 1, 0);
  297. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  298. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  299. return 0;
  300. }
  301. static int ciintf_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
  302. {
  303. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  304. struct saa7146_dev *saa = budget_ci->budget.dev;
  305. if (slot != 0)
  306. return -EINVAL;
  307. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  308. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  309. return 0;
  310. }
  311. static int ciintf_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
  312. {
  313. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  314. struct saa7146_dev *saa = budget_ci->budget.dev;
  315. int tmp;
  316. if (slot != 0)
  317. return -EINVAL;
  318. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTLO);
  319. tmp = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  320. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  321. tmp | CICONTROL_ENABLETS, 1, 0);
  322. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTA);
  323. return 0;
  324. }
  325. static void ciintf_interrupt(unsigned long data)
  326. {
  327. struct budget_ci *budget_ci = (struct budget_ci *) data;
  328. struct saa7146_dev *saa = budget_ci->budget.dev;
  329. unsigned int flags;
  330. // ensure we don't get spurious IRQs during initialisation
  331. if (!budget_ci->budget.ci_present)
  332. return;
  333. // read the CAM status
  334. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  335. if (flags & CICONTROL_CAMDETECT) {
  336. // GPIO should be set to trigger on falling edge if a CAM is present
  337. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  338. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  339. // CAM insertion IRQ
  340. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  341. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  342. DVB_CA_EN50221_CAMCHANGE_INSERTED);
  343. } else if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  344. // CAM ready (reset completed)
  345. budget_ci->slot_status = SLOTSTATUS_READY;
  346. dvb_ca_en50221_camready_irq(&budget_ci->ca, 0);
  347. } else if (budget_ci->slot_status & SLOTSTATUS_READY) {
  348. // FR/DA IRQ
  349. dvb_ca_en50221_frda_irq(&budget_ci->ca, 0);
  350. }
  351. } else {
  352. // trigger on rising edge if a CAM is not present - when a CAM is inserted, we
  353. // only want to get the IRQ when it sets READY. If we trigger on the falling edge,
  354. // the CAM might not actually be ready yet.
  355. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  356. // generate a CAM removal IRQ if we haven't already
  357. if (budget_ci->slot_status & SLOTSTATUS_OCCUPIED) {
  358. // CAM removal IRQ
  359. budget_ci->slot_status = SLOTSTATUS_NONE;
  360. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  361. DVB_CA_EN50221_CAMCHANGE_REMOVED);
  362. }
  363. }
  364. }
  365. static int ciintf_poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
  366. {
  367. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  368. unsigned int flags;
  369. // ensure we don't get spurious IRQs during initialisation
  370. if (!budget_ci->budget.ci_present)
  371. return -EINVAL;
  372. // read the CAM status
  373. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  374. if (flags & CICONTROL_CAMDETECT) {
  375. // mark it as present if it wasn't before
  376. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  377. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  378. }
  379. // during a RESET, we check if we can read from IO memory to see when CAM is ready
  380. if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  381. if (ciintf_read_attribute_mem(ca, slot, 0) == 0x1d) {
  382. budget_ci->slot_status = SLOTSTATUS_READY;
  383. }
  384. }
  385. } else {
  386. budget_ci->slot_status = SLOTSTATUS_NONE;
  387. }
  388. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  389. if (budget_ci->slot_status & SLOTSTATUS_READY) {
  390. return DVB_CA_EN50221_POLL_CAM_PRESENT | DVB_CA_EN50221_POLL_CAM_READY;
  391. }
  392. return DVB_CA_EN50221_POLL_CAM_PRESENT;
  393. }
  394. return 0;
  395. }
  396. static int ciintf_init(struct budget_ci *budget_ci)
  397. {
  398. struct saa7146_dev *saa = budget_ci->budget.dev;
  399. int flags;
  400. int result;
  401. int ci_version;
  402. int ca_flags;
  403. memset(&budget_ci->ca, 0, sizeof(struct dvb_ca_en50221));
  404. // enable DEBI pins
  405. saa7146_write(saa, MC1, MASK_27 | MASK_11);
  406. // test if it is there
  407. ci_version = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CIVERSION, 1, 1, 0);
  408. if ((ci_version & 0xa0) != 0xa0) {
  409. result = -ENODEV;
  410. goto error;
  411. }
  412. // determine whether a CAM is present or not
  413. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  414. budget_ci->slot_status = SLOTSTATUS_NONE;
  415. if (flags & CICONTROL_CAMDETECT)
  416. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  417. // version 0xa2 of the CI firmware doesn't generate interrupts
  418. if (ci_version == 0xa2) {
  419. ca_flags = 0;
  420. budget_ci->ci_irq = 0;
  421. } else {
  422. ca_flags = DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE |
  423. DVB_CA_EN50221_FLAG_IRQ_FR |
  424. DVB_CA_EN50221_FLAG_IRQ_DA;
  425. budget_ci->ci_irq = 1;
  426. }
  427. // register CI interface
  428. budget_ci->ca.owner = THIS_MODULE;
  429. budget_ci->ca.read_attribute_mem = ciintf_read_attribute_mem;
  430. budget_ci->ca.write_attribute_mem = ciintf_write_attribute_mem;
  431. budget_ci->ca.read_cam_control = ciintf_read_cam_control;
  432. budget_ci->ca.write_cam_control = ciintf_write_cam_control;
  433. budget_ci->ca.slot_reset = ciintf_slot_reset;
  434. budget_ci->ca.slot_shutdown = ciintf_slot_shutdown;
  435. budget_ci->ca.slot_ts_enable = ciintf_slot_ts_enable;
  436. budget_ci->ca.poll_slot_status = ciintf_poll_slot_status;
  437. budget_ci->ca.data = budget_ci;
  438. if ((result = dvb_ca_en50221_init(&budget_ci->budget.dvb_adapter,
  439. &budget_ci->ca,
  440. ca_flags, 1)) != 0) {
  441. printk("budget_ci: CI interface detected, but initialisation failed.\n");
  442. goto error;
  443. }
  444. // Setup CI slot IRQ
  445. if (budget_ci->ci_irq) {
  446. tasklet_init(&budget_ci->ciintf_irq_tasklet, ciintf_interrupt, (unsigned long) budget_ci);
  447. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  448. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  449. } else {
  450. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  451. }
  452. SAA7146_IER_ENABLE(saa, MASK_03);
  453. }
  454. // enable interface
  455. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  456. CICONTROL_RESET, 1, 0);
  457. // success!
  458. printk("budget_ci: CI interface initialised\n");
  459. budget_ci->budget.ci_present = 1;
  460. // forge a fake CI IRQ so the CAM state is setup correctly
  461. if (budget_ci->ci_irq) {
  462. flags = DVB_CA_EN50221_CAMCHANGE_REMOVED;
  463. if (budget_ci->slot_status != SLOTSTATUS_NONE)
  464. flags = DVB_CA_EN50221_CAMCHANGE_INSERTED;
  465. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, flags);
  466. }
  467. return 0;
  468. error:
  469. saa7146_write(saa, MC1, MASK_27);
  470. return result;
  471. }
  472. static void ciintf_deinit(struct budget_ci *budget_ci)
  473. {
  474. struct saa7146_dev *saa = budget_ci->budget.dev;
  475. // disable CI interrupts
  476. if (budget_ci->ci_irq) {
  477. SAA7146_IER_DISABLE(saa, MASK_03);
  478. saa7146_setgpio(saa, 0, SAA7146_GPIO_INPUT);
  479. tasklet_kill(&budget_ci->ciintf_irq_tasklet);
  480. }
  481. // reset interface
  482. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  483. msleep(1);
  484. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  485. CICONTROL_RESET, 1, 0);
  486. // disable TS data stream to CI interface
  487. saa7146_setgpio(saa, 1, SAA7146_GPIO_INPUT);
  488. // release the CA device
  489. dvb_ca_en50221_release(&budget_ci->ca);
  490. // disable DEBI pins
  491. saa7146_write(saa, MC1, MASK_27);
  492. }
  493. static void budget_ci_irq(struct saa7146_dev *dev, u32 * isr)
  494. {
  495. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  496. dprintk(8, "dev: %p, budget_ci: %p\n", dev, budget_ci);
  497. if (*isr & MASK_06)
  498. tasklet_schedule(&budget_ci->ir.msp430_irq_tasklet);
  499. if (*isr & MASK_10)
  500. ttpci_budget_irq10_handler(dev, isr);
  501. if ((*isr & MASK_03) && (budget_ci->budget.ci_present) && (budget_ci->ci_irq))
  502. tasklet_schedule(&budget_ci->ciintf_irq_tasklet);
  503. }
  504. static u8 philips_su1278_tt_inittab[] = {
  505. 0x01, 0x0f,
  506. 0x02, 0x30,
  507. 0x03, 0x00,
  508. 0x04, 0x5b,
  509. 0x05, 0x85,
  510. 0x06, 0x02,
  511. 0x07, 0x00,
  512. 0x08, 0x02,
  513. 0x09, 0x00,
  514. 0x0C, 0x01,
  515. 0x0D, 0x81,
  516. 0x0E, 0x44,
  517. 0x0f, 0x14,
  518. 0x10, 0x3c,
  519. 0x11, 0x84,
  520. 0x12, 0xda,
  521. 0x13, 0x97,
  522. 0x14, 0x95,
  523. 0x15, 0xc9,
  524. 0x16, 0x19,
  525. 0x17, 0x8c,
  526. 0x18, 0x59,
  527. 0x19, 0xf8,
  528. 0x1a, 0xfe,
  529. 0x1c, 0x7f,
  530. 0x1d, 0x00,
  531. 0x1e, 0x00,
  532. 0x1f, 0x50,
  533. 0x20, 0x00,
  534. 0x21, 0x00,
  535. 0x22, 0x00,
  536. 0x23, 0x00,
  537. 0x28, 0x00,
  538. 0x29, 0x28,
  539. 0x2a, 0x14,
  540. 0x2b, 0x0f,
  541. 0x2c, 0x09,
  542. 0x2d, 0x09,
  543. 0x31, 0x1f,
  544. 0x32, 0x19,
  545. 0x33, 0xfc,
  546. 0x34, 0x93,
  547. 0xff, 0xff
  548. };
  549. static int philips_su1278_tt_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
  550. {
  551. stv0299_writereg(fe, 0x0e, 0x44);
  552. if (srate >= 10000000) {
  553. stv0299_writereg(fe, 0x13, 0x97);
  554. stv0299_writereg(fe, 0x14, 0x95);
  555. stv0299_writereg(fe, 0x15, 0xc9);
  556. stv0299_writereg(fe, 0x17, 0x8c);
  557. stv0299_writereg(fe, 0x1a, 0xfe);
  558. stv0299_writereg(fe, 0x1c, 0x7f);
  559. stv0299_writereg(fe, 0x2d, 0x09);
  560. } else {
  561. stv0299_writereg(fe, 0x13, 0x99);
  562. stv0299_writereg(fe, 0x14, 0x8d);
  563. stv0299_writereg(fe, 0x15, 0xce);
  564. stv0299_writereg(fe, 0x17, 0x43);
  565. stv0299_writereg(fe, 0x1a, 0x1d);
  566. stv0299_writereg(fe, 0x1c, 0x12);
  567. stv0299_writereg(fe, 0x2d, 0x05);
  568. }
  569. stv0299_writereg(fe, 0x0e, 0x23);
  570. stv0299_writereg(fe, 0x0f, 0x94);
  571. stv0299_writereg(fe, 0x10, 0x39);
  572. stv0299_writereg(fe, 0x15, 0xc9);
  573. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  574. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  575. stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
  576. return 0;
  577. }
  578. static int philips_su1278_tt_tuner_set_params(struct dvb_frontend *fe,
  579. struct dvb_frontend_parameters *params)
  580. {
  581. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  582. u32 div;
  583. u8 buf[4];
  584. struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) };
  585. if ((params->frequency < 950000) || (params->frequency > 2150000))
  586. return -EINVAL;
  587. div = (params->frequency + (500 - 1)) / 500; // round correctly
  588. buf[0] = (div >> 8) & 0x7f;
  589. buf[1] = div & 0xff;
  590. buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2;
  591. buf[3] = 0x20;
  592. if (params->u.qpsk.symbol_rate < 4000000)
  593. buf[3] |= 1;
  594. if (params->frequency < 1250000)
  595. buf[3] |= 0;
  596. else if (params->frequency < 1550000)
  597. buf[3] |= 0x40;
  598. else if (params->frequency < 2050000)
  599. buf[3] |= 0x80;
  600. else if (params->frequency < 2150000)
  601. buf[3] |= 0xC0;
  602. if (fe->ops.i2c_gate_ctrl)
  603. fe->ops.i2c_gate_ctrl(fe, 1);
  604. if (i2c_transfer(&budget_ci->budget.i2c_adap, &msg, 1) != 1)
  605. return -EIO;
  606. return 0;
  607. }
  608. static struct stv0299_config philips_su1278_tt_config = {
  609. .demod_address = 0x68,
  610. .inittab = philips_su1278_tt_inittab,
  611. .mclk = 64000000UL,
  612. .invert = 0,
  613. .skip_reinit = 1,
  614. .lock_output = STV0229_LOCKOUTPUT_1,
  615. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  616. .min_delay_ms = 50,
  617. .set_symbol_rate = philips_su1278_tt_set_symbol_rate,
  618. };
  619. static int philips_tdm1316l_tuner_init(struct dvb_frontend *fe)
  620. {
  621. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  622. static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  623. static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 };
  624. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = td1316_init,.len =
  625. sizeof(td1316_init) };
  626. // setup PLL configuration
  627. if (fe->ops.i2c_gate_ctrl)
  628. fe->ops.i2c_gate_ctrl(fe, 1);
  629. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  630. return -EIO;
  631. msleep(1);
  632. // disable the mc44BC374c (do not check for errors)
  633. tuner_msg.addr = 0x65;
  634. tuner_msg.buf = disable_mc44BC374c;
  635. tuner_msg.len = sizeof(disable_mc44BC374c);
  636. if (fe->ops.i2c_gate_ctrl)
  637. fe->ops.i2c_gate_ctrl(fe, 1);
  638. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) {
  639. if (fe->ops.i2c_gate_ctrl)
  640. fe->ops.i2c_gate_ctrl(fe, 1);
  641. i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1);
  642. }
  643. return 0;
  644. }
  645. static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  646. {
  647. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  648. u8 tuner_buf[4];
  649. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) };
  650. int tuner_frequency = 0;
  651. u8 band, cp, filter;
  652. // determine charge pump
  653. tuner_frequency = params->frequency + 36130000;
  654. if (tuner_frequency < 87000000)
  655. return -EINVAL;
  656. else if (tuner_frequency < 130000000)
  657. cp = 3;
  658. else if (tuner_frequency < 160000000)
  659. cp = 5;
  660. else if (tuner_frequency < 200000000)
  661. cp = 6;
  662. else if (tuner_frequency < 290000000)
  663. cp = 3;
  664. else if (tuner_frequency < 420000000)
  665. cp = 5;
  666. else if (tuner_frequency < 480000000)
  667. cp = 6;
  668. else if (tuner_frequency < 620000000)
  669. cp = 3;
  670. else if (tuner_frequency < 830000000)
  671. cp = 5;
  672. else if (tuner_frequency < 895000000)
  673. cp = 7;
  674. else
  675. return -EINVAL;
  676. // determine band
  677. if (params->frequency < 49000000)
  678. return -EINVAL;
  679. else if (params->frequency < 159000000)
  680. band = 1;
  681. else if (params->frequency < 444000000)
  682. band = 2;
  683. else if (params->frequency < 861000000)
  684. band = 4;
  685. else
  686. return -EINVAL;
  687. // setup PLL filter and TDA9889
  688. switch (params->u.ofdm.bandwidth) {
  689. case BANDWIDTH_6_MHZ:
  690. tda1004x_writereg(fe, 0x0C, 0x14);
  691. filter = 0;
  692. break;
  693. case BANDWIDTH_7_MHZ:
  694. tda1004x_writereg(fe, 0x0C, 0x80);
  695. filter = 0;
  696. break;
  697. case BANDWIDTH_8_MHZ:
  698. tda1004x_writereg(fe, 0x0C, 0x14);
  699. filter = 1;
  700. break;
  701. default:
  702. return -EINVAL;
  703. }
  704. // calculate divisor
  705. // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
  706. tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000;
  707. // setup tuner buffer
  708. tuner_buf[0] = tuner_frequency >> 8;
  709. tuner_buf[1] = tuner_frequency & 0xff;
  710. tuner_buf[2] = 0xca;
  711. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  712. if (fe->ops.i2c_gate_ctrl)
  713. fe->ops.i2c_gate_ctrl(fe, 1);
  714. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  715. return -EIO;
  716. msleep(1);
  717. return 0;
  718. }
  719. static int philips_tdm1316l_request_firmware(struct dvb_frontend *fe,
  720. const struct firmware **fw, char *name)
  721. {
  722. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  723. return request_firmware(fw, name, &budget_ci->budget.dev->pci->dev);
  724. }
  725. static struct tda1004x_config philips_tdm1316l_config = {
  726. .demod_address = 0x8,
  727. .invert = 0,
  728. .invert_oclk = 0,
  729. .xtal_freq = TDA10046_XTAL_4M,
  730. .agc_config = TDA10046_AGC_DEFAULT,
  731. .if_freq = TDA10046_FREQ_3617,
  732. .request_firmware = philips_tdm1316l_request_firmware,
  733. };
  734. static struct tda1004x_config philips_tdm1316l_config_invert = {
  735. .demod_address = 0x8,
  736. .invert = 1,
  737. .invert_oclk = 0,
  738. .xtal_freq = TDA10046_XTAL_4M,
  739. .agc_config = TDA10046_AGC_DEFAULT,
  740. .if_freq = TDA10046_FREQ_3617,
  741. .request_firmware = philips_tdm1316l_request_firmware,
  742. };
  743. static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  744. {
  745. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  746. u8 tuner_buf[5];
  747. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,
  748. .flags = 0,
  749. .buf = tuner_buf,
  750. .len = sizeof(tuner_buf) };
  751. int tuner_frequency = 0;
  752. u8 band, cp, filter;
  753. // determine charge pump
  754. tuner_frequency = params->frequency + 36125000;
  755. if (tuner_frequency < 87000000)
  756. return -EINVAL;
  757. else if (tuner_frequency < 130000000) {
  758. cp = 3;
  759. band = 1;
  760. } else if (tuner_frequency < 160000000) {
  761. cp = 5;
  762. band = 1;
  763. } else if (tuner_frequency < 200000000) {
  764. cp = 6;
  765. band = 1;
  766. } else if (tuner_frequency < 290000000) {
  767. cp = 3;
  768. band = 2;
  769. } else if (tuner_frequency < 420000000) {
  770. cp = 5;
  771. band = 2;
  772. } else if (tuner_frequency < 480000000) {
  773. cp = 6;
  774. band = 2;
  775. } else if (tuner_frequency < 620000000) {
  776. cp = 3;
  777. band = 4;
  778. } else if (tuner_frequency < 830000000) {
  779. cp = 5;
  780. band = 4;
  781. } else if (tuner_frequency < 895000000) {
  782. cp = 7;
  783. band = 4;
  784. } else
  785. return -EINVAL;
  786. // assume PLL filter should always be 8MHz for the moment.
  787. filter = 1;
  788. // calculate divisor
  789. tuner_frequency = (params->frequency + 36125000 + (62500/2)) / 62500;
  790. // setup tuner buffer
  791. tuner_buf[0] = tuner_frequency >> 8;
  792. tuner_buf[1] = tuner_frequency & 0xff;
  793. tuner_buf[2] = 0xc8;
  794. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  795. tuner_buf[4] = 0x80;
  796. if (fe->ops.i2c_gate_ctrl)
  797. fe->ops.i2c_gate_ctrl(fe, 1);
  798. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  799. return -EIO;
  800. msleep(50);
  801. if (fe->ops.i2c_gate_ctrl)
  802. fe->ops.i2c_gate_ctrl(fe, 1);
  803. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  804. return -EIO;
  805. msleep(1);
  806. return 0;
  807. }
  808. static u8 dvbc_philips_tdm1316l_inittab[] = {
  809. 0x80, 0x01,
  810. 0x80, 0x00,
  811. 0x81, 0x01,
  812. 0x81, 0x00,
  813. 0x00, 0x09,
  814. 0x01, 0x69,
  815. 0x03, 0x00,
  816. 0x04, 0x00,
  817. 0x07, 0x00,
  818. 0x08, 0x00,
  819. 0x20, 0x00,
  820. 0x21, 0x40,
  821. 0x22, 0x00,
  822. 0x23, 0x00,
  823. 0x24, 0x40,
  824. 0x25, 0x88,
  825. 0x30, 0xff,
  826. 0x31, 0x00,
  827. 0x32, 0xff,
  828. 0x33, 0x00,
  829. 0x34, 0x50,
  830. 0x35, 0x7f,
  831. 0x36, 0x00,
  832. 0x37, 0x20,
  833. 0x38, 0x00,
  834. 0x40, 0x1c,
  835. 0x41, 0xff,
  836. 0x42, 0x29,
  837. 0x43, 0x20,
  838. 0x44, 0xff,
  839. 0x45, 0x00,
  840. 0x46, 0x00,
  841. 0x49, 0x04,
  842. 0x4a, 0x00,
  843. 0x4b, 0x7b,
  844. 0x52, 0x30,
  845. 0x55, 0xae,
  846. 0x56, 0x47,
  847. 0x57, 0xe1,
  848. 0x58, 0x3a,
  849. 0x5a, 0x1e,
  850. 0x5b, 0x34,
  851. 0x60, 0x00,
  852. 0x63, 0x00,
  853. 0x64, 0x00,
  854. 0x65, 0x00,
  855. 0x66, 0x00,
  856. 0x67, 0x00,
  857. 0x68, 0x00,
  858. 0x69, 0x00,
  859. 0x6a, 0x02,
  860. 0x6b, 0x00,
  861. 0x70, 0xff,
  862. 0x71, 0x00,
  863. 0x72, 0x00,
  864. 0x73, 0x00,
  865. 0x74, 0x0c,
  866. 0x80, 0x00,
  867. 0x81, 0x00,
  868. 0x82, 0x00,
  869. 0x83, 0x00,
  870. 0x84, 0x04,
  871. 0x85, 0x80,
  872. 0x86, 0x24,
  873. 0x87, 0x78,
  874. 0x88, 0x10,
  875. 0x89, 0x00,
  876. 0x90, 0x01,
  877. 0x91, 0x01,
  878. 0xa0, 0x04,
  879. 0xa1, 0x00,
  880. 0xa2, 0x00,
  881. 0xb0, 0x91,
  882. 0xb1, 0x0b,
  883. 0xc0, 0x53,
  884. 0xc1, 0x70,
  885. 0xc2, 0x12,
  886. 0xd0, 0x00,
  887. 0xd1, 0x00,
  888. 0xd2, 0x00,
  889. 0xd3, 0x00,
  890. 0xd4, 0x00,
  891. 0xd5, 0x00,
  892. 0xde, 0x00,
  893. 0xdf, 0x00,
  894. 0x61, 0x38,
  895. 0x62, 0x0a,
  896. 0x53, 0x13,
  897. 0x59, 0x08,
  898. 0xff, 0xff,
  899. };
  900. static struct stv0297_config dvbc_philips_tdm1316l_config = {
  901. .demod_address = 0x1c,
  902. .inittab = dvbc_philips_tdm1316l_inittab,
  903. .invert = 0,
  904. .stop_during_read = 1,
  905. };
  906. static void frontend_init(struct budget_ci *budget_ci)
  907. {
  908. switch (budget_ci->budget.dev->pci->subsystem_device) {
  909. case 0x100c: // Hauppauge/TT Nova-CI budget (stv0299/ALPS BSRU6(tsa5059))
  910. budget_ci->budget.dvb_frontend =
  911. dvb_attach(stv0299_attach, &alps_bsru6_config, &budget_ci->budget.i2c_adap);
  912. if (budget_ci->budget.dvb_frontend) {
  913. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
  914. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  915. break;
  916. }
  917. break;
  918. case 0x100f: // Hauppauge/TT Nova-CI budget (stv0299b/Philips su1278(tsa5059))
  919. budget_ci->budget.dvb_frontend =
  920. dvb_attach(stv0299_attach, &philips_su1278_tt_config, &budget_ci->budget.i2c_adap);
  921. if (budget_ci->budget.dvb_frontend) {
  922. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_su1278_tt_tuner_set_params;
  923. break;
  924. }
  925. break;
  926. case 0x1010: // TT DVB-C CI budget (stv0297/Philips tdm1316l(tda6651tt))
  927. budget_ci->tuner_pll_address = 0x61;
  928. budget_ci->budget.dvb_frontend =
  929. dvb_attach(stv0297_attach, &dvbc_philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  930. if (budget_ci->budget.dvb_frontend) {
  931. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = dvbc_philips_tdm1316l_tuner_set_params;
  932. break;
  933. }
  934. break;
  935. case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889)
  936. budget_ci->tuner_pll_address = 0x63;
  937. budget_ci->budget.dvb_frontend =
  938. dvb_attach(tda10045_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  939. if (budget_ci->budget.dvb_frontend) {
  940. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  941. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  942. break;
  943. }
  944. break;
  945. case 0x1012: // TT DVB-T CI budget (tda10046/Philips tdm1316l(tda6651tt))
  946. budget_ci->tuner_pll_address = 0x60;
  947. budget_ci->budget.dvb_frontend =
  948. dvb_attach(tda10046_attach, &philips_tdm1316l_config_invert, &budget_ci->budget.i2c_adap);
  949. if (budget_ci->budget.dvb_frontend) {
  950. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  951. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  952. break;
  953. }
  954. break;
  955. case 0x1017: // TT S-1500 PCI
  956. budget_ci->budget.dvb_frontend = dvb_attach(stv0299_attach, &alps_bsbe1_config, &budget_ci->budget.i2c_adap);
  957. if (budget_ci->budget.dvb_frontend) {
  958. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
  959. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  960. budget_ci->budget.dvb_frontend->ops.dishnetwork_send_legacy_command = NULL;
  961. if (dvb_attach(lnbp21_attach, budget_ci->budget.dvb_frontend, &budget_ci->budget.i2c_adap, LNBP21_LLC, 0) == NULL) {
  962. printk("%s: No LNBP21 found!\n", __FUNCTION__);
  963. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  964. budget_ci->budget.dvb_frontend = NULL;
  965. }
  966. }
  967. break;
  968. }
  969. if (budget_ci->budget.dvb_frontend == NULL) {
  970. printk("budget-ci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
  971. budget_ci->budget.dev->pci->vendor,
  972. budget_ci->budget.dev->pci->device,
  973. budget_ci->budget.dev->pci->subsystem_vendor,
  974. budget_ci->budget.dev->pci->subsystem_device);
  975. } else {
  976. if (dvb_register_frontend
  977. (&budget_ci->budget.dvb_adapter, budget_ci->budget.dvb_frontend)) {
  978. printk("budget-ci: Frontend registration failed!\n");
  979. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  980. budget_ci->budget.dvb_frontend = NULL;
  981. }
  982. }
  983. }
  984. static int budget_ci_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info)
  985. {
  986. struct budget_ci *budget_ci;
  987. int err;
  988. budget_ci = kzalloc(sizeof(struct budget_ci), GFP_KERNEL);
  989. if (!budget_ci) {
  990. err = -ENOMEM;
  991. goto out1;
  992. }
  993. dprintk(2, "budget_ci: %p\n", budget_ci);
  994. dev->ext_priv = budget_ci;
  995. err = ttpci_budget_init(&budget_ci->budget, dev, info, THIS_MODULE);
  996. if (err)
  997. goto out2;
  998. err = msp430_ir_init(budget_ci);
  999. if (err)
  1000. goto out3;
  1001. ciintf_init(budget_ci);
  1002. budget_ci->budget.dvb_adapter.priv = budget_ci;
  1003. frontend_init(budget_ci);
  1004. ttpci_budget_init_hooks(&budget_ci->budget);
  1005. return 0;
  1006. out3:
  1007. ttpci_budget_deinit(&budget_ci->budget);
  1008. out2:
  1009. kfree(budget_ci);
  1010. out1:
  1011. return err;
  1012. }
  1013. static int budget_ci_detach(struct saa7146_dev *dev)
  1014. {
  1015. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  1016. struct saa7146_dev *saa = budget_ci->budget.dev;
  1017. int err;
  1018. if (budget_ci->budget.ci_present)
  1019. ciintf_deinit(budget_ci);
  1020. msp430_ir_deinit(budget_ci);
  1021. if (budget_ci->budget.dvb_frontend) {
  1022. dvb_unregister_frontend(budget_ci->budget.dvb_frontend);
  1023. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  1024. }
  1025. err = ttpci_budget_deinit(&budget_ci->budget);
  1026. // disable frontend and CI interface
  1027. saa7146_setgpio(saa, 2, SAA7146_GPIO_INPUT);
  1028. kfree(budget_ci);
  1029. return err;
  1030. }
  1031. static struct saa7146_extension budget_extension;
  1032. MAKE_BUDGET_INFO(ttbs2, "TT-Budget/S-1500 PCI", BUDGET_TT);
  1033. MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC);
  1034. MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT);
  1035. MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT);
  1036. MAKE_BUDGET_INFO(ttbcci, "TT-Budget-C-CI PCI", BUDGET_TT);
  1037. static struct pci_device_id pci_tbl[] = {
  1038. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c),
  1039. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f),
  1040. MAKE_EXTENSION_PCI(ttbcci, 0x13c2, 0x1010),
  1041. MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011),
  1042. MAKE_EXTENSION_PCI(ttbtci, 0x13c2, 0x1012),
  1043. MAKE_EXTENSION_PCI(ttbs2, 0x13c2, 0x1017),
  1044. {
  1045. .vendor = 0,
  1046. }
  1047. };
  1048. MODULE_DEVICE_TABLE(pci, pci_tbl);
  1049. static struct saa7146_extension budget_extension = {
  1050. .name = "budget_ci dvb",
  1051. .flags = SAA7146_USE_I2C_IRQ,
  1052. .module = THIS_MODULE,
  1053. .pci_tbl = &pci_tbl[0],
  1054. .attach = budget_ci_attach,
  1055. .detach = budget_ci_detach,
  1056. .irq_mask = MASK_03 | MASK_06 | MASK_10,
  1057. .irq_func = budget_ci_irq,
  1058. };
  1059. static int __init budget_ci_init(void)
  1060. {
  1061. return saa7146_register_extension(&budget_extension);
  1062. }
  1063. static void __exit budget_ci_exit(void)
  1064. {
  1065. saa7146_unregister_extension(&budget_extension);
  1066. }
  1067. module_init(budget_ci_init);
  1068. module_exit(budget_ci_exit);
  1069. MODULE_LICENSE("GPL");
  1070. MODULE_AUTHOR("Michael Hunold, Jack Thomasson, Andrew de Quincey, others");
  1071. MODULE_DESCRIPTION("driver for the SAA7146 based so-called "
  1072. "budget PCI DVB cards w/ CI-module produced by "
  1073. "Siemens, Technotrend, Hauppauge");