pluto2.c 20 KB

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  1. /*
  2. * pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T]
  3. *
  4. * Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org>
  5. *
  6. * based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/
  7. * by Dany Salman <salmandany@yahoo.fr>
  8. * Copyright (c) 2004 TDF
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. */
  25. #include <linux/i2c.h>
  26. #include <linux/i2c-algo-bit.h>
  27. #include <linux/init.h>
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/pci.h>
  31. #include <linux/dma-mapping.h>
  32. #include "demux.h"
  33. #include "dmxdev.h"
  34. #include "dvb_demux.h"
  35. #include "dvb_frontend.h"
  36. #include "dvb_net.h"
  37. #include "dvbdev.h"
  38. #include "tda1004x.h"
  39. #define DRIVER_NAME "pluto2"
  40. #define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */
  41. #define REG_PCAR 0x0020 /* PC address register */
  42. #define REG_TSCR 0x0024 /* TS ctrl & status */
  43. #define REG_MISC 0x0028 /* miscellaneous */
  44. #define REG_MMAC 0x002c /* MSB MAC address */
  45. #define REG_IMAC 0x0030 /* ISB MAC address */
  46. #define REG_LMAC 0x0034 /* LSB MAC address */
  47. #define REG_SPID 0x0038 /* SPI data */
  48. #define REG_SLCS 0x003c /* serial links ctrl/status */
  49. #define PID0_NOFIL (0x0001 << 16)
  50. #define PIDn_ENP (0x0001 << 15)
  51. #define PID0_END (0x0001 << 14)
  52. #define PID0_AFIL (0x0001 << 13)
  53. #define PIDn_PID (0x1fff << 0)
  54. #define TSCR_NBPACKETS (0x00ff << 24)
  55. #define TSCR_DEM (0x0001 << 17)
  56. #define TSCR_DE (0x0001 << 16)
  57. #define TSCR_RSTN (0x0001 << 15)
  58. #define TSCR_MSKO (0x0001 << 14)
  59. #define TSCR_MSKA (0x0001 << 13)
  60. #define TSCR_MSKL (0x0001 << 12)
  61. #define TSCR_OVR (0x0001 << 11)
  62. #define TSCR_AFUL (0x0001 << 10)
  63. #define TSCR_LOCK (0x0001 << 9)
  64. #define TSCR_IACK (0x0001 << 8)
  65. #define TSCR_ADEF (0x007f << 0)
  66. #define MISC_DVR (0x0fff << 4)
  67. #define MISC_ALED (0x0001 << 3)
  68. #define MISC_FRST (0x0001 << 2)
  69. #define MISC_LED1 (0x0001 << 1)
  70. #define MISC_LED0 (0x0001 << 0)
  71. #define SPID_SPIDR (0x00ff << 0)
  72. #define SLCS_SCL (0x0001 << 7)
  73. #define SLCS_SDA (0x0001 << 6)
  74. #define SLCS_CSN (0x0001 << 2)
  75. #define SLCS_OVR (0x0001 << 1)
  76. #define SLCS_SWC (0x0001 << 0)
  77. #define TS_DMA_PACKETS (8)
  78. #define TS_DMA_BYTES (188 * TS_DMA_PACKETS)
  79. #define I2C_ADDR_TDA10046 0x10
  80. #define I2C_ADDR_TUA6034 0xc2
  81. #define NHWFILTERS 8
  82. struct pluto {
  83. /* pci */
  84. struct pci_dev *pdev;
  85. u8 __iomem *io_mem;
  86. /* dvb */
  87. struct dmx_frontend hw_frontend;
  88. struct dmx_frontend mem_frontend;
  89. struct dmxdev dmxdev;
  90. struct dvb_adapter dvb_adapter;
  91. struct dvb_demux demux;
  92. struct dvb_frontend *fe;
  93. struct dvb_net dvbnet;
  94. unsigned int full_ts_users;
  95. unsigned int users;
  96. /* i2c */
  97. struct i2c_algo_bit_data i2c_bit;
  98. struct i2c_adapter i2c_adap;
  99. unsigned int i2cbug;
  100. /* irq */
  101. unsigned int overflow;
  102. /* dma */
  103. dma_addr_t dma_addr;
  104. u8 dma_buf[TS_DMA_BYTES];
  105. u8 dummy[4096];
  106. };
  107. static inline struct pluto *feed_to_pluto(struct dvb_demux_feed *feed)
  108. {
  109. return container_of(feed->demux, struct pluto, demux);
  110. }
  111. static inline struct pluto *frontend_to_pluto(struct dvb_frontend *fe)
  112. {
  113. return container_of(fe->dvb, struct pluto, dvb_adapter);
  114. }
  115. static inline u32 pluto_readreg(struct pluto *pluto, u32 reg)
  116. {
  117. return readl(&pluto->io_mem[reg]);
  118. }
  119. static inline void pluto_writereg(struct pluto *pluto, u32 reg, u32 val)
  120. {
  121. writel(val, &pluto->io_mem[reg]);
  122. }
  123. static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits)
  124. {
  125. u32 val = readl(&pluto->io_mem[reg]);
  126. val &= ~mask;
  127. val |= bits;
  128. writel(val, &pluto->io_mem[reg]);
  129. }
  130. static void pluto_write_tscr(struct pluto *pluto, u32 val)
  131. {
  132. /* set the number of packets */
  133. val &= ~TSCR_ADEF;
  134. val |= TS_DMA_PACKETS / 2;
  135. pluto_writereg(pluto, REG_TSCR, val);
  136. }
  137. static void pluto_setsda(void *data, int state)
  138. {
  139. struct pluto *pluto = data;
  140. if (state)
  141. pluto_rw(pluto, REG_SLCS, SLCS_SDA, SLCS_SDA);
  142. else
  143. pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0);
  144. }
  145. static void pluto_setscl(void *data, int state)
  146. {
  147. struct pluto *pluto = data;
  148. if (state)
  149. pluto_rw(pluto, REG_SLCS, SLCS_SCL, SLCS_SCL);
  150. else
  151. pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0);
  152. /* try to detect i2c_inb() to workaround hardware bug:
  153. * reset SDA to high after SCL has been set to low */
  154. if ((state) && (pluto->i2cbug == 0)) {
  155. pluto->i2cbug = 1;
  156. } else {
  157. if ((!state) && (pluto->i2cbug == 1))
  158. pluto_setsda(pluto, 1);
  159. pluto->i2cbug = 0;
  160. }
  161. }
  162. static int pluto_getsda(void *data)
  163. {
  164. struct pluto *pluto = data;
  165. return pluto_readreg(pluto, REG_SLCS) & SLCS_SDA;
  166. }
  167. static int pluto_getscl(void *data)
  168. {
  169. struct pluto *pluto = data;
  170. return pluto_readreg(pluto, REG_SLCS) & SLCS_SCL;
  171. }
  172. static void pluto_reset_frontend(struct pluto *pluto, int reenable)
  173. {
  174. u32 val = pluto_readreg(pluto, REG_MISC);
  175. if (val & MISC_FRST) {
  176. val &= ~MISC_FRST;
  177. pluto_writereg(pluto, REG_MISC, val);
  178. }
  179. if (reenable) {
  180. val |= MISC_FRST;
  181. pluto_writereg(pluto, REG_MISC, val);
  182. }
  183. }
  184. static void pluto_reset_ts(struct pluto *pluto, int reenable)
  185. {
  186. u32 val = pluto_readreg(pluto, REG_TSCR);
  187. if (val & TSCR_RSTN) {
  188. val &= ~TSCR_RSTN;
  189. pluto_write_tscr(pluto, val);
  190. }
  191. if (reenable) {
  192. val |= TSCR_RSTN;
  193. pluto_write_tscr(pluto, val);
  194. }
  195. }
  196. static void pluto_set_dma_addr(struct pluto *pluto)
  197. {
  198. pluto_writereg(pluto, REG_PCAR, cpu_to_le32(pluto->dma_addr));
  199. }
  200. static int __devinit pluto_dma_map(struct pluto *pluto)
  201. {
  202. pluto->dma_addr = pci_map_single(pluto->pdev, pluto->dma_buf,
  203. TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
  204. return pci_dma_mapping_error(pluto->dma_addr);
  205. }
  206. static void pluto_dma_unmap(struct pluto *pluto)
  207. {
  208. pci_unmap_single(pluto->pdev, pluto->dma_addr,
  209. TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
  210. }
  211. static int pluto_start_feed(struct dvb_demux_feed *f)
  212. {
  213. struct pluto *pluto = feed_to_pluto(f);
  214. /* enable PID filtering */
  215. if (pluto->users++ == 0)
  216. pluto_rw(pluto, REG_PIDn(0), PID0_AFIL | PID0_NOFIL, 0);
  217. if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
  218. pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, PIDn_ENP | f->pid);
  219. else if (pluto->full_ts_users++ == 0)
  220. pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, PID0_NOFIL);
  221. return 0;
  222. }
  223. static int pluto_stop_feed(struct dvb_demux_feed *f)
  224. {
  225. struct pluto *pluto = feed_to_pluto(f);
  226. /* disable PID filtering */
  227. if (--pluto->users == 0)
  228. pluto_rw(pluto, REG_PIDn(0), PID0_AFIL, PID0_AFIL);
  229. if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
  230. pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, 0x1fff);
  231. else if (--pluto->full_ts_users == 0)
  232. pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, 0);
  233. return 0;
  234. }
  235. static void pluto_dma_end(struct pluto *pluto, unsigned int nbpackets)
  236. {
  237. /* synchronize the DMA transfer with the CPU
  238. * first so that we see updated contents. */
  239. pci_dma_sync_single_for_cpu(pluto->pdev, pluto->dma_addr,
  240. TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
  241. /* Workaround for broken hardware:
  242. * [1] On startup NBPACKETS seems to contain an uninitialized value,
  243. * but no packets have been transfered.
  244. * [2] Sometimes (actually very often) NBPACKETS stays at zero
  245. * although one packet has been transfered.
  246. * [3] Sometimes (actually rarely), the card gets into an erroneous
  247. * mode where it continuously generates interrupts, claiming it
  248. * has recieved nbpackets>TS_DMA_PACKETS packets, but no packet
  249. * has been transfered. Only a reset seems to solve this
  250. */
  251. if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) {
  252. unsigned int i = 0;
  253. while (pluto->dma_buf[i] == 0x47)
  254. i += 188;
  255. nbpackets = i / 188;
  256. if (i == 0) {
  257. pluto_reset_ts(pluto, 1);
  258. dev_printk(KERN_DEBUG, &pluto->pdev->dev, "resetting TS because of invalid packet counter\n");
  259. }
  260. }
  261. dvb_dmx_swfilter_packets(&pluto->demux, pluto->dma_buf, nbpackets);
  262. /* clear the dma buffer. this is needed to be able to identify
  263. * new valid ts packets above */
  264. memset(pluto->dma_buf, 0, nbpackets * 188);
  265. /* reset the dma address */
  266. pluto_set_dma_addr(pluto);
  267. /* sync the buffer and give it back to the card */
  268. pci_dma_sync_single_for_device(pluto->pdev, pluto->dma_addr,
  269. TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
  270. }
  271. static irqreturn_t pluto_irq(int irq, void *dev_id)
  272. {
  273. struct pluto *pluto = dev_id;
  274. u32 tscr;
  275. /* check whether an interrupt occured on this device */
  276. tscr = pluto_readreg(pluto, REG_TSCR);
  277. if (!(tscr & (TSCR_DE | TSCR_OVR)))
  278. return IRQ_NONE;
  279. if (tscr == 0xffffffff) {
  280. // FIXME: maybe recover somehow
  281. dev_err(&pluto->pdev->dev, "card hung up :(\n");
  282. return IRQ_HANDLED;
  283. }
  284. /* dma end interrupt */
  285. if (tscr & TSCR_DE) {
  286. pluto_dma_end(pluto, (tscr & TSCR_NBPACKETS) >> 24);
  287. /* overflow interrupt */
  288. if (tscr & TSCR_OVR)
  289. pluto->overflow++;
  290. if (pluto->overflow) {
  291. dev_err(&pluto->pdev->dev, "overflow irq (%d)\n",
  292. pluto->overflow);
  293. pluto_reset_ts(pluto, 1);
  294. pluto->overflow = 0;
  295. }
  296. } else if (tscr & TSCR_OVR) {
  297. pluto->overflow++;
  298. }
  299. /* ACK the interrupt */
  300. pluto_write_tscr(pluto, tscr | TSCR_IACK);
  301. return IRQ_HANDLED;
  302. }
  303. static void __devinit pluto_enable_irqs(struct pluto *pluto)
  304. {
  305. u32 val = pluto_readreg(pluto, REG_TSCR);
  306. /* disable AFUL and LOCK interrupts */
  307. val |= (TSCR_MSKA | TSCR_MSKL);
  308. /* enable DMA and OVERFLOW interrupts */
  309. val &= ~(TSCR_DEM | TSCR_MSKO);
  310. /* clear pending interrupts */
  311. val |= TSCR_IACK;
  312. pluto_write_tscr(pluto, val);
  313. }
  314. static void pluto_disable_irqs(struct pluto *pluto)
  315. {
  316. u32 val = pluto_readreg(pluto, REG_TSCR);
  317. /* disable all interrupts */
  318. val |= (TSCR_DEM | TSCR_MSKO | TSCR_MSKA | TSCR_MSKL);
  319. /* clear pending interrupts */
  320. val |= TSCR_IACK;
  321. pluto_write_tscr(pluto, val);
  322. }
  323. static int __devinit pluto_hw_init(struct pluto *pluto)
  324. {
  325. pluto_reset_frontend(pluto, 1);
  326. /* set automatic LED control by FPGA */
  327. pluto_rw(pluto, REG_MISC, MISC_ALED, MISC_ALED);
  328. /* set data endianess */
  329. #ifdef __LITTLE_ENDIAN
  330. pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END);
  331. #else
  332. pluto_rw(pluto, REG_PIDn(0), PID0_END, 0);
  333. #endif
  334. /* map DMA and set address */
  335. pluto_dma_map(pluto);
  336. pluto_set_dma_addr(pluto);
  337. /* enable interrupts */
  338. pluto_enable_irqs(pluto);
  339. /* reset TS logic */
  340. pluto_reset_ts(pluto, 1);
  341. return 0;
  342. }
  343. static void pluto_hw_exit(struct pluto *pluto)
  344. {
  345. /* disable interrupts */
  346. pluto_disable_irqs(pluto);
  347. pluto_reset_ts(pluto, 0);
  348. /* LED: disable automatic control, enable yellow, disable green */
  349. pluto_rw(pluto, REG_MISC, MISC_ALED | MISC_LED1 | MISC_LED0, MISC_LED1);
  350. /* unmap DMA */
  351. pluto_dma_unmap(pluto);
  352. pluto_reset_frontend(pluto, 0);
  353. }
  354. static inline u32 divide(u32 numerator, u32 denominator)
  355. {
  356. if (denominator == 0)
  357. return ~0;
  358. return (numerator + denominator / 2) / denominator;
  359. }
  360. /* LG Innotek TDTE-E001P (Infineon TUA6034) */
  361. static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe,
  362. struct dvb_frontend_parameters *p)
  363. {
  364. struct pluto *pluto = frontend_to_pluto(fe);
  365. struct i2c_msg msg;
  366. int ret;
  367. u8 buf[4];
  368. u32 div;
  369. // Fref = 166.667 Hz
  370. // Fref * 3 = 500.000 Hz
  371. // IF = 36166667
  372. // IF / Fref = 217
  373. //div = divide(p->frequency + 36166667, 166667);
  374. div = divide(p->frequency * 3, 500000) + 217;
  375. buf[0] = (div >> 8) & 0x7f;
  376. buf[1] = (div >> 0) & 0xff;
  377. if (p->frequency < 611000000)
  378. buf[2] = 0xb4;
  379. else if (p->frequency < 811000000)
  380. buf[2] = 0xbc;
  381. else
  382. buf[2] = 0xf4;
  383. // VHF: 174-230 MHz
  384. // center: 350 MHz
  385. // UHF: 470-862 MHz
  386. if (p->frequency < 350000000)
  387. buf[3] = 0x02;
  388. else
  389. buf[3] = 0x04;
  390. if (p->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
  391. buf[3] |= 0x08;
  392. if (sizeof(buf) == 6) {
  393. buf[4] = buf[2];
  394. buf[4] &= ~0x1c;
  395. buf[4] |= 0x18;
  396. buf[5] = (0 << 7) | (2 << 4);
  397. }
  398. msg.addr = I2C_ADDR_TUA6034 >> 1;
  399. msg.flags = 0;
  400. msg.buf = buf;
  401. msg.len = sizeof(buf);
  402. if (fe->ops.i2c_gate_ctrl)
  403. fe->ops.i2c_gate_ctrl(fe, 1);
  404. ret = i2c_transfer(&pluto->i2c_adap, &msg, 1);
  405. if (ret < 0)
  406. return ret;
  407. else if (ret == 0)
  408. return -EREMOTEIO;
  409. return 0;
  410. }
  411. static int pluto2_request_firmware(struct dvb_frontend *fe,
  412. const struct firmware **fw, char *name)
  413. {
  414. struct pluto *pluto = frontend_to_pluto(fe);
  415. return request_firmware(fw, name, &pluto->pdev->dev);
  416. }
  417. static struct tda1004x_config pluto2_fe_config __devinitdata = {
  418. .demod_address = I2C_ADDR_TDA10046 >> 1,
  419. .invert = 1,
  420. .invert_oclk = 0,
  421. .xtal_freq = TDA10046_XTAL_16M,
  422. .agc_config = TDA10046_AGC_DEFAULT,
  423. .if_freq = TDA10046_FREQ_3617,
  424. .request_firmware = pluto2_request_firmware,
  425. };
  426. static int __devinit frontend_init(struct pluto *pluto)
  427. {
  428. int ret;
  429. pluto->fe = tda10046_attach(&pluto2_fe_config, &pluto->i2c_adap);
  430. if (!pluto->fe) {
  431. dev_err(&pluto->pdev->dev, "could not attach frontend\n");
  432. return -ENODEV;
  433. }
  434. pluto->fe->ops.tuner_ops.set_params = lg_tdtpe001p_tuner_set_params;
  435. ret = dvb_register_frontend(&pluto->dvb_adapter, pluto->fe);
  436. if (ret < 0) {
  437. if (pluto->fe->ops.release)
  438. pluto->fe->ops.release(pluto->fe);
  439. return ret;
  440. }
  441. return 0;
  442. }
  443. static void __devinit pluto_read_rev(struct pluto *pluto)
  444. {
  445. u32 val = pluto_readreg(pluto, REG_MISC) & MISC_DVR;
  446. dev_info(&pluto->pdev->dev, "board revision %d.%d\n",
  447. (val >> 12) & 0x0f, (val >> 4) & 0xff);
  448. }
  449. static void __devinit pluto_read_mac(struct pluto *pluto, u8 *mac)
  450. {
  451. u32 val = pluto_readreg(pluto, REG_MMAC);
  452. mac[0] = (val >> 8) & 0xff;
  453. mac[1] = (val >> 0) & 0xff;
  454. val = pluto_readreg(pluto, REG_IMAC);
  455. mac[2] = (val >> 8) & 0xff;
  456. mac[3] = (val >> 0) & 0xff;
  457. val = pluto_readreg(pluto, REG_LMAC);
  458. mac[4] = (val >> 8) & 0xff;
  459. mac[5] = (val >> 0) & 0xff;
  460. dev_info(&pluto->pdev->dev, "MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
  461. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
  462. }
  463. static int __devinit pluto_read_serial(struct pluto *pluto)
  464. {
  465. struct pci_dev *pdev = pluto->pdev;
  466. unsigned int i, j;
  467. u8 __iomem *cis;
  468. cis = pci_iomap(pdev, 1, 0);
  469. if (!cis)
  470. return -EIO;
  471. dev_info(&pdev->dev, "S/N ");
  472. for (i = 0xe0; i < 0x100; i += 4) {
  473. u32 val = readl(&cis[i]);
  474. for (j = 0; j < 32; j += 8) {
  475. if ((val & 0xff) == 0xff)
  476. goto out;
  477. printk("%c", val & 0xff);
  478. val >>= 8;
  479. }
  480. }
  481. out:
  482. printk("\n");
  483. pci_iounmap(pdev, cis);
  484. return 0;
  485. }
  486. static int __devinit pluto2_probe(struct pci_dev *pdev,
  487. const struct pci_device_id *ent)
  488. {
  489. struct pluto *pluto;
  490. struct dvb_adapter *dvb_adapter;
  491. struct dvb_demux *dvbdemux;
  492. struct dmx_demux *dmx;
  493. int ret = -ENOMEM;
  494. pluto = kzalloc(sizeof(struct pluto), GFP_KERNEL);
  495. if (!pluto)
  496. goto out;
  497. pluto->pdev = pdev;
  498. ret = pci_enable_device(pdev);
  499. if (ret < 0)
  500. goto err_kfree;
  501. /* enable interrupts */
  502. pci_write_config_dword(pdev, 0x6c, 0x8000);
  503. ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  504. if (ret < 0)
  505. goto err_pci_disable_device;
  506. pci_set_master(pdev);
  507. ret = pci_request_regions(pdev, DRIVER_NAME);
  508. if (ret < 0)
  509. goto err_pci_disable_device;
  510. pluto->io_mem = pci_iomap(pdev, 0, 0x40);
  511. if (!pluto->io_mem) {
  512. ret = -EIO;
  513. goto err_pci_release_regions;
  514. }
  515. pci_set_drvdata(pdev, pluto);
  516. ret = request_irq(pdev->irq, pluto_irq, IRQF_SHARED, DRIVER_NAME, pluto);
  517. if (ret < 0)
  518. goto err_pci_iounmap;
  519. ret = pluto_hw_init(pluto);
  520. if (ret < 0)
  521. goto err_free_irq;
  522. /* i2c */
  523. i2c_set_adapdata(&pluto->i2c_adap, pluto);
  524. strcpy(pluto->i2c_adap.name, DRIVER_NAME);
  525. pluto->i2c_adap.owner = THIS_MODULE;
  526. pluto->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
  527. pluto->i2c_adap.dev.parent = &pdev->dev;
  528. pluto->i2c_adap.algo_data = &pluto->i2c_bit;
  529. pluto->i2c_bit.data = pluto;
  530. pluto->i2c_bit.setsda = pluto_setsda;
  531. pluto->i2c_bit.setscl = pluto_setscl;
  532. pluto->i2c_bit.getsda = pluto_getsda;
  533. pluto->i2c_bit.getscl = pluto_getscl;
  534. pluto->i2c_bit.udelay = 10;
  535. pluto->i2c_bit.timeout = 10;
  536. /* Raise SCL and SDA */
  537. pluto_setsda(pluto, 1);
  538. pluto_setscl(pluto, 1);
  539. ret = i2c_bit_add_bus(&pluto->i2c_adap);
  540. if (ret < 0)
  541. goto err_pluto_hw_exit;
  542. /* dvb */
  543. ret = dvb_register_adapter(&pluto->dvb_adapter, DRIVER_NAME, THIS_MODULE, &pdev->dev);
  544. if (ret < 0)
  545. goto err_i2c_del_adapter;
  546. dvb_adapter = &pluto->dvb_adapter;
  547. pluto_read_rev(pluto);
  548. pluto_read_serial(pluto);
  549. pluto_read_mac(pluto, dvb_adapter->proposed_mac);
  550. dvbdemux = &pluto->demux;
  551. dvbdemux->filternum = 256;
  552. dvbdemux->feednum = 256;
  553. dvbdemux->start_feed = pluto_start_feed;
  554. dvbdemux->stop_feed = pluto_stop_feed;
  555. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
  556. DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
  557. ret = dvb_dmx_init(dvbdemux);
  558. if (ret < 0)
  559. goto err_dvb_unregister_adapter;
  560. dmx = &dvbdemux->dmx;
  561. pluto->hw_frontend.source = DMX_FRONTEND_0;
  562. pluto->mem_frontend.source = DMX_MEMORY_FE;
  563. pluto->dmxdev.filternum = NHWFILTERS;
  564. pluto->dmxdev.demux = dmx;
  565. ret = dvb_dmxdev_init(&pluto->dmxdev, dvb_adapter);
  566. if (ret < 0)
  567. goto err_dvb_dmx_release;
  568. ret = dmx->add_frontend(dmx, &pluto->hw_frontend);
  569. if (ret < 0)
  570. goto err_dvb_dmxdev_release;
  571. ret = dmx->add_frontend(dmx, &pluto->mem_frontend);
  572. if (ret < 0)
  573. goto err_remove_hw_frontend;
  574. ret = dmx->connect_frontend(dmx, &pluto->hw_frontend);
  575. if (ret < 0)
  576. goto err_remove_mem_frontend;
  577. ret = frontend_init(pluto);
  578. if (ret < 0)
  579. goto err_disconnect_frontend;
  580. dvb_net_init(dvb_adapter, &pluto->dvbnet, dmx);
  581. out:
  582. return ret;
  583. err_disconnect_frontend:
  584. dmx->disconnect_frontend(dmx);
  585. err_remove_mem_frontend:
  586. dmx->remove_frontend(dmx, &pluto->mem_frontend);
  587. err_remove_hw_frontend:
  588. dmx->remove_frontend(dmx, &pluto->hw_frontend);
  589. err_dvb_dmxdev_release:
  590. dvb_dmxdev_release(&pluto->dmxdev);
  591. err_dvb_dmx_release:
  592. dvb_dmx_release(dvbdemux);
  593. err_dvb_unregister_adapter:
  594. dvb_unregister_adapter(dvb_adapter);
  595. err_i2c_del_adapter:
  596. i2c_del_adapter(&pluto->i2c_adap);
  597. err_pluto_hw_exit:
  598. pluto_hw_exit(pluto);
  599. err_free_irq:
  600. free_irq(pdev->irq, pluto);
  601. err_pci_iounmap:
  602. pci_iounmap(pdev, pluto->io_mem);
  603. err_pci_release_regions:
  604. pci_release_regions(pdev);
  605. err_pci_disable_device:
  606. pci_disable_device(pdev);
  607. err_kfree:
  608. pci_set_drvdata(pdev, NULL);
  609. kfree(pluto);
  610. goto out;
  611. }
  612. static void __devexit pluto2_remove(struct pci_dev *pdev)
  613. {
  614. struct pluto *pluto = pci_get_drvdata(pdev);
  615. struct dvb_adapter *dvb_adapter = &pluto->dvb_adapter;
  616. struct dvb_demux *dvbdemux = &pluto->demux;
  617. struct dmx_demux *dmx = &dvbdemux->dmx;
  618. dmx->close(dmx);
  619. dvb_net_release(&pluto->dvbnet);
  620. if (pluto->fe)
  621. dvb_unregister_frontend(pluto->fe);
  622. dmx->disconnect_frontend(dmx);
  623. dmx->remove_frontend(dmx, &pluto->mem_frontend);
  624. dmx->remove_frontend(dmx, &pluto->hw_frontend);
  625. dvb_dmxdev_release(&pluto->dmxdev);
  626. dvb_dmx_release(dvbdemux);
  627. dvb_unregister_adapter(dvb_adapter);
  628. i2c_del_adapter(&pluto->i2c_adap);
  629. pluto_hw_exit(pluto);
  630. free_irq(pdev->irq, pluto);
  631. pci_iounmap(pdev, pluto->io_mem);
  632. pci_release_regions(pdev);
  633. pci_disable_device(pdev);
  634. pci_set_drvdata(pdev, NULL);
  635. kfree(pluto);
  636. }
  637. #ifndef PCI_VENDOR_ID_SCM
  638. #define PCI_VENDOR_ID_SCM 0x0432
  639. #endif
  640. #ifndef PCI_DEVICE_ID_PLUTO2
  641. #define PCI_DEVICE_ID_PLUTO2 0x0001
  642. #endif
  643. static struct pci_device_id pluto2_id_table[] __devinitdata = {
  644. {
  645. .vendor = PCI_VENDOR_ID_SCM,
  646. .device = PCI_DEVICE_ID_PLUTO2,
  647. .subvendor = PCI_ANY_ID,
  648. .subdevice = PCI_ANY_ID,
  649. }, {
  650. /* empty */
  651. },
  652. };
  653. MODULE_DEVICE_TABLE(pci, pluto2_id_table);
  654. static struct pci_driver pluto2_driver = {
  655. .name = DRIVER_NAME,
  656. .id_table = pluto2_id_table,
  657. .probe = pluto2_probe,
  658. .remove = __devexit_p(pluto2_remove),
  659. };
  660. static int __init pluto2_init(void)
  661. {
  662. return pci_register_driver(&pluto2_driver);
  663. }
  664. static void __exit pluto2_exit(void)
  665. {
  666. pci_unregister_driver(&pluto2_driver);
  667. }
  668. module_init(pluto2_init);
  669. module_exit(pluto2_exit);
  670. MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>");
  671. MODULE_DESCRIPTION("Pluto2 driver");
  672. MODULE_LICENSE("GPL");