tda10086.c 18 KB

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  1. /*
  2. Driver for Philips tda10086 DVBS Demodulator
  3. (c) 2006 Andrew de Quincey
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include <linux/init.h>
  17. #include <linux/module.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/device.h>
  20. #include <linux/jiffies.h>
  21. #include <linux/string.h>
  22. #include <linux/slab.h>
  23. #include "dvb_frontend.h"
  24. #include "tda10086.h"
  25. #define SACLK 96000000
  26. struct tda10086_state {
  27. struct i2c_adapter* i2c;
  28. const struct tda10086_config* config;
  29. struct dvb_frontend frontend;
  30. /* private demod data */
  31. u32 frequency;
  32. u32 symbol_rate;
  33. };
  34. static int debug = 0;
  35. #define dprintk(args...) \
  36. do { \
  37. if (debug) printk(KERN_DEBUG "tda10086: " args); \
  38. } while (0)
  39. static int tda10086_write_byte(struct tda10086_state *state, int reg, int data)
  40. {
  41. int ret;
  42. u8 b0[] = { reg, data };
  43. struct i2c_msg msg = { .flags = 0, .buf = b0, .len = 2 };
  44. msg.addr = state->config->demod_address;
  45. ret = i2c_transfer(state->i2c, &msg, 1);
  46. if (ret != 1)
  47. dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
  48. __FUNCTION__, reg, data, ret);
  49. return (ret != 1) ? ret : 0;
  50. }
  51. static int tda10086_read_byte(struct tda10086_state *state, int reg)
  52. {
  53. int ret;
  54. u8 b0[] = { reg };
  55. u8 b1[] = { 0 };
  56. struct i2c_msg msg[] = {{ .flags = 0, .buf = b0, .len = 1 },
  57. { .flags = I2C_M_RD, .buf = b1, .len = 1 }};
  58. msg[0].addr = state->config->demod_address;
  59. msg[1].addr = state->config->demod_address;
  60. ret = i2c_transfer(state->i2c, msg, 2);
  61. if (ret != 2) {
  62. dprintk("%s: error reg=0x%x, ret=%i\n", __FUNCTION__, reg,
  63. ret);
  64. return ret;
  65. }
  66. return b1[0];
  67. }
  68. static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask, int data)
  69. {
  70. int val;
  71. // read a byte and check
  72. val = tda10086_read_byte(state, reg);
  73. if (val < 0)
  74. return val;
  75. // mask if off
  76. val = val & ~mask;
  77. val |= data & 0xff;
  78. // write it out again
  79. return tda10086_write_byte(state, reg, val);
  80. }
  81. static int tda10086_init(struct dvb_frontend* fe)
  82. {
  83. struct tda10086_state* state = fe->demodulator_priv;
  84. dprintk ("%s\n", __FUNCTION__);
  85. // reset
  86. tda10086_write_byte(state, 0x00, 0x00);
  87. msleep(10);
  88. // misc setup
  89. tda10086_write_byte(state, 0x01, 0x94);
  90. tda10086_write_byte(state, 0x02, 0x35); // NOTE: TT drivers appear to disable CSWP
  91. tda10086_write_byte(state, 0x03, 0x64);
  92. tda10086_write_byte(state, 0x04, 0x43);
  93. tda10086_write_byte(state, 0x0c, 0x0c);
  94. tda10086_write_byte(state, 0x1b, 0xb0); // noise threshold
  95. tda10086_write_byte(state, 0x20, 0x89); // misc
  96. tda10086_write_byte(state, 0x30, 0x04); // acquisition period length
  97. tda10086_write_byte(state, 0x32, 0x00); // irq off
  98. tda10086_write_byte(state, 0x31, 0x56); // setup AFC
  99. // setup PLL (assumes 16Mhz XIN)
  100. tda10086_write_byte(state, 0x55, 0x2c); // misc PLL setup
  101. tda10086_write_byte(state, 0x3a, 0x0b); // M=12
  102. tda10086_write_byte(state, 0x3b, 0x01); // P=2
  103. tda10086_write_mask(state, 0x55, 0x20, 0x00); // powerup PLL
  104. // setup TS interface
  105. tda10086_write_byte(state, 0x11, 0x81);
  106. tda10086_write_byte(state, 0x12, 0x81);
  107. tda10086_write_byte(state, 0x19, 0x40); // parallel mode A + MSBFIRST
  108. tda10086_write_byte(state, 0x56, 0x80); // powerdown WPLL - unused in the mode we use
  109. tda10086_write_byte(state, 0x57, 0x08); // bypass WPLL - unused in the mode we use
  110. tda10086_write_byte(state, 0x10, 0x2a);
  111. // setup ADC
  112. tda10086_write_byte(state, 0x58, 0x61); // ADC setup
  113. tda10086_write_mask(state, 0x58, 0x01, 0x00); // powerup ADC
  114. // setup AGC
  115. tda10086_write_byte(state, 0x05, 0x0B);
  116. tda10086_write_byte(state, 0x37, 0x63);
  117. tda10086_write_byte(state, 0x3f, 0x03); // NOTE: flydvb uses 0x0a and varies it
  118. tda10086_write_byte(state, 0x40, 0x64);
  119. tda10086_write_byte(state, 0x41, 0x4f);
  120. tda10086_write_byte(state, 0x42, 0x43);
  121. // setup viterbi
  122. tda10086_write_byte(state, 0x1a, 0x11); // VBER 10^6, DVB, QPSK
  123. // setup carrier recovery
  124. tda10086_write_byte(state, 0x3d, 0x80);
  125. // setup SEC
  126. tda10086_write_byte(state, 0x36, 0x00); // all SEC off
  127. tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000))); // } tone frequency
  128. tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8); // }
  129. return 0;
  130. }
  131. static void tda10086_diseqc_wait(struct tda10086_state *state)
  132. {
  133. unsigned long timeout = jiffies + msecs_to_jiffies(200);
  134. while (!(tda10086_read_byte(state, 0x50) & 0x01)) {
  135. if(time_after(jiffies, timeout)) {
  136. printk("%s: diseqc queue not ready, command may be lost.\n", __FUNCTION__);
  137. break;
  138. }
  139. msleep(10);
  140. }
  141. }
  142. static int tda10086_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
  143. {
  144. struct tda10086_state* state = fe->demodulator_priv;
  145. dprintk ("%s\n", __FUNCTION__);
  146. switch(tone) {
  147. case SEC_TONE_OFF:
  148. tda10086_write_byte(state, 0x36, 0x00);
  149. break;
  150. case SEC_TONE_ON:
  151. tda10086_write_byte(state, 0x36, 0x01);
  152. break;
  153. }
  154. return 0;
  155. }
  156. static int tda10086_send_master_cmd (struct dvb_frontend* fe,
  157. struct dvb_diseqc_master_cmd* cmd)
  158. {
  159. struct tda10086_state* state = fe->demodulator_priv;
  160. int i;
  161. u8 oldval;
  162. dprintk ("%s\n", __FUNCTION__);
  163. if (cmd->msg_len > 6)
  164. return -EINVAL;
  165. oldval = tda10086_read_byte(state, 0x36);
  166. for(i=0; i< cmd->msg_len; i++) {
  167. tda10086_write_byte(state, 0x48+i, cmd->msg[i]);
  168. }
  169. tda10086_write_byte(state, 0x36, 0x08 | ((cmd->msg_len - 1) << 4));
  170. tda10086_diseqc_wait(state);
  171. tda10086_write_byte(state, 0x36, oldval);
  172. return 0;
  173. }
  174. static int tda10086_send_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)
  175. {
  176. struct tda10086_state* state = fe->demodulator_priv;
  177. u8 oldval = tda10086_read_byte(state, 0x36);
  178. dprintk ("%s\n", __FUNCTION__);
  179. switch(minicmd) {
  180. case SEC_MINI_A:
  181. tda10086_write_byte(state, 0x36, 0x04);
  182. break;
  183. case SEC_MINI_B:
  184. tda10086_write_byte(state, 0x36, 0x06);
  185. break;
  186. }
  187. tda10086_diseqc_wait(state);
  188. tda10086_write_byte(state, 0x36, oldval);
  189. return 0;
  190. }
  191. static int tda10086_set_inversion(struct tda10086_state *state,
  192. struct dvb_frontend_parameters *fe_params)
  193. {
  194. u8 invval = 0x80;
  195. dprintk ("%s %i %i\n", __FUNCTION__, fe_params->inversion, state->config->invert);
  196. switch(fe_params->inversion) {
  197. case INVERSION_OFF:
  198. if (state->config->invert)
  199. invval = 0x40;
  200. break;
  201. case INVERSION_ON:
  202. if (!state->config->invert)
  203. invval = 0x40;
  204. break;
  205. case INVERSION_AUTO:
  206. invval = 0x00;
  207. break;
  208. }
  209. tda10086_write_mask(state, 0x0c, 0xc0, invval);
  210. return 0;
  211. }
  212. static int tda10086_set_symbol_rate(struct tda10086_state *state,
  213. struct dvb_frontend_parameters *fe_params)
  214. {
  215. u8 dfn = 0;
  216. u8 afs = 0;
  217. u8 byp = 0;
  218. u8 reg37 = 0x43;
  219. u8 reg42 = 0x43;
  220. u64 big;
  221. u32 tmp;
  222. u32 bdr;
  223. u32 bdri;
  224. u32 symbol_rate = fe_params->u.qpsk.symbol_rate;
  225. dprintk ("%s %i\n", __FUNCTION__, symbol_rate);
  226. // setup the decimation and anti-aliasing filters..
  227. if (symbol_rate < (u32) (SACLK * 0.0137)) {
  228. dfn=4;
  229. afs=1;
  230. } else if (symbol_rate < (u32) (SACLK * 0.0208)) {
  231. dfn=4;
  232. afs=0;
  233. } else if (symbol_rate < (u32) (SACLK * 0.0270)) {
  234. dfn=3;
  235. afs=1;
  236. } else if (symbol_rate < (u32) (SACLK * 0.0416)) {
  237. dfn=3;
  238. afs=0;
  239. } else if (symbol_rate < (u32) (SACLK * 0.0550)) {
  240. dfn=2;
  241. afs=1;
  242. } else if (symbol_rate < (u32) (SACLK * 0.0833)) {
  243. dfn=2;
  244. afs=0;
  245. } else if (symbol_rate < (u32) (SACLK * 0.1100)) {
  246. dfn=1;
  247. afs=1;
  248. } else if (symbol_rate < (u32) (SACLK * 0.1666)) {
  249. dfn=1;
  250. afs=0;
  251. } else if (symbol_rate < (u32) (SACLK * 0.2200)) {
  252. dfn=0;
  253. afs=1;
  254. } else if (symbol_rate < (u32) (SACLK * 0.3333)) {
  255. dfn=0;
  256. afs=0;
  257. } else {
  258. reg37 = 0x63;
  259. reg42 = 0x4f;
  260. byp=1;
  261. }
  262. // calculate BDR
  263. big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn);
  264. big += ((SACLK/1000ULL)-1ULL);
  265. do_div(big, (SACLK/1000ULL));
  266. bdr = big & 0xfffff;
  267. // calculate BDRI
  268. tmp = (1<<dfn)*(symbol_rate/1000);
  269. bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp;
  270. tda10086_write_byte(state, 0x21, (afs << 7) | dfn);
  271. tda10086_write_mask(state, 0x20, 0x08, byp << 3);
  272. tda10086_write_byte(state, 0x06, bdr);
  273. tda10086_write_byte(state, 0x07, bdr >> 8);
  274. tda10086_write_byte(state, 0x08, bdr >> 16);
  275. tda10086_write_byte(state, 0x09, bdri);
  276. tda10086_write_byte(state, 0x37, reg37);
  277. tda10086_write_byte(state, 0x42, reg42);
  278. return 0;
  279. }
  280. static int tda10086_set_fec(struct tda10086_state *state,
  281. struct dvb_frontend_parameters *fe_params)
  282. {
  283. u8 fecval;
  284. dprintk ("%s %i\n", __FUNCTION__, fe_params->u.qpsk.fec_inner);
  285. switch(fe_params->u.qpsk.fec_inner) {
  286. case FEC_1_2:
  287. fecval = 0x00;
  288. break;
  289. case FEC_2_3:
  290. fecval = 0x01;
  291. break;
  292. case FEC_3_4:
  293. fecval = 0x02;
  294. break;
  295. case FEC_4_5:
  296. fecval = 0x03;
  297. break;
  298. case FEC_5_6:
  299. fecval = 0x04;
  300. break;
  301. case FEC_6_7:
  302. fecval = 0x05;
  303. break;
  304. case FEC_7_8:
  305. fecval = 0x06;
  306. break;
  307. case FEC_8_9:
  308. fecval = 0x07;
  309. break;
  310. case FEC_AUTO:
  311. fecval = 0x08;
  312. break;
  313. default:
  314. return -1;
  315. }
  316. tda10086_write_byte(state, 0x0d, fecval);
  317. return 0;
  318. }
  319. static int tda10086_set_frontend(struct dvb_frontend* fe,
  320. struct dvb_frontend_parameters *fe_params)
  321. {
  322. struct tda10086_state *state = fe->demodulator_priv;
  323. int ret;
  324. u32 freq = 0;
  325. int freqoff;
  326. dprintk ("%s\n", __FUNCTION__);
  327. // set params
  328. if (fe->ops.tuner_ops.set_params) {
  329. fe->ops.tuner_ops.set_params(fe, fe_params);
  330. if (fe->ops.i2c_gate_ctrl)
  331. fe->ops.i2c_gate_ctrl(fe, 0);
  332. if (fe->ops.tuner_ops.get_frequency)
  333. fe->ops.tuner_ops.get_frequency(fe, &freq);
  334. if (fe->ops.i2c_gate_ctrl)
  335. fe->ops.i2c_gate_ctrl(fe, 0);
  336. }
  337. // calcluate the frequency offset (in *Hz* not kHz)
  338. freqoff = fe_params->frequency - freq;
  339. freqoff = ((1<<16) * freqoff) / (SACLK/1000);
  340. tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f));
  341. tda10086_write_byte(state, 0x3e, freqoff);
  342. if ((ret = tda10086_set_inversion(state, fe_params)) < 0)
  343. return ret;
  344. if ((ret = tda10086_set_symbol_rate(state, fe_params)) < 0)
  345. return ret;
  346. if ((ret = tda10086_set_fec(state, fe_params)) < 0)
  347. return ret;
  348. // soft reset + disable TS output until lock
  349. tda10086_write_mask(state, 0x10, 0x40, 0x40);
  350. tda10086_write_mask(state, 0x00, 0x01, 0x00);
  351. state->symbol_rate = fe_params->u.qpsk.symbol_rate;
  352. state->frequency = fe_params->frequency;
  353. return 0;
  354. }
  355. static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *fe_params)
  356. {
  357. struct tda10086_state* state = fe->demodulator_priv;
  358. u8 val;
  359. int tmp;
  360. u64 tmp64;
  361. dprintk ("%s\n", __FUNCTION__);
  362. // check for invalid symbol rate
  363. if (fe_params->u.qpsk.symbol_rate < 500000)
  364. return -EINVAL;
  365. // calculate the updated frequency (note: we convert from Hz->kHz)
  366. tmp64 = tda10086_read_byte(state, 0x52);
  367. tmp64 |= (tda10086_read_byte(state, 0x51) << 8);
  368. if (tmp64 & 0x8000)
  369. tmp64 |= 0xffffffffffff0000ULL;
  370. tmp64 = (tmp64 * (SACLK/1000ULL));
  371. do_div(tmp64, (1ULL<<15) * (1ULL<<1));
  372. fe_params->frequency = (int) state->frequency + (int) tmp64;
  373. // the inversion
  374. val = tda10086_read_byte(state, 0x0c);
  375. if (val & 0x80) {
  376. switch(val & 0x40) {
  377. case 0x00:
  378. fe_params->inversion = INVERSION_OFF;
  379. if (state->config->invert)
  380. fe_params->inversion = INVERSION_ON;
  381. break;
  382. default:
  383. fe_params->inversion = INVERSION_ON;
  384. if (state->config->invert)
  385. fe_params->inversion = INVERSION_OFF;
  386. break;
  387. }
  388. } else {
  389. tda10086_read_byte(state, 0x0f);
  390. switch(val & 0x02) {
  391. case 0x00:
  392. fe_params->inversion = INVERSION_OFF;
  393. if (state->config->invert)
  394. fe_params->inversion = INVERSION_ON;
  395. break;
  396. default:
  397. fe_params->inversion = INVERSION_ON;
  398. if (state->config->invert)
  399. fe_params->inversion = INVERSION_OFF;
  400. break;
  401. }
  402. }
  403. // calculate the updated symbol rate
  404. tmp = tda10086_read_byte(state, 0x1d);
  405. if (tmp & 0x80)
  406. tmp |= 0xffffff00;
  407. tmp = (tmp * 480 * (1<<1)) / 128;
  408. tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
  409. fe_params->u.qpsk.symbol_rate = state->symbol_rate + tmp;
  410. // the FEC
  411. val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
  412. switch(val) {
  413. case 0x00:
  414. fe_params->u.qpsk.fec_inner = FEC_1_2;
  415. break;
  416. case 0x01:
  417. fe_params->u.qpsk.fec_inner = FEC_2_3;
  418. break;
  419. case 0x02:
  420. fe_params->u.qpsk.fec_inner = FEC_3_4;
  421. break;
  422. case 0x03:
  423. fe_params->u.qpsk.fec_inner = FEC_4_5;
  424. break;
  425. case 0x04:
  426. fe_params->u.qpsk.fec_inner = FEC_5_6;
  427. break;
  428. case 0x05:
  429. fe_params->u.qpsk.fec_inner = FEC_6_7;
  430. break;
  431. case 0x06:
  432. fe_params->u.qpsk.fec_inner = FEC_7_8;
  433. break;
  434. case 0x07:
  435. fe_params->u.qpsk.fec_inner = FEC_8_9;
  436. break;
  437. }
  438. return 0;
  439. }
  440. static int tda10086_read_status(struct dvb_frontend* fe, fe_status_t *fe_status)
  441. {
  442. struct tda10086_state* state = fe->demodulator_priv;
  443. u8 val;
  444. dprintk ("%s\n", __FUNCTION__);
  445. val = tda10086_read_byte(state, 0x0e);
  446. *fe_status = 0;
  447. if (val & 0x01)
  448. *fe_status |= FE_HAS_SIGNAL;
  449. if (val & 0x02)
  450. *fe_status |= FE_HAS_CARRIER;
  451. if (val & 0x04)
  452. *fe_status |= FE_HAS_VITERBI;
  453. if (val & 0x08)
  454. *fe_status |= FE_HAS_SYNC;
  455. if (val & 0x10)
  456. *fe_status |= FE_HAS_LOCK;
  457. return 0;
  458. }
  459. static int tda10086_read_signal_strength(struct dvb_frontend* fe, u16 * signal)
  460. {
  461. struct tda10086_state* state = fe->demodulator_priv;
  462. u8 _str;
  463. dprintk ("%s\n", __FUNCTION__);
  464. _str = tda10086_read_byte(state, 0x43);
  465. *signal = (_str << 8) | _str;
  466. return 0;
  467. }
  468. static int tda10086_read_snr(struct dvb_frontend* fe, u16 * snr)
  469. {
  470. struct tda10086_state* state = fe->demodulator_priv;
  471. u8 _snr;
  472. dprintk ("%s\n", __FUNCTION__);
  473. _snr = tda10086_read_byte(state, 0x1c);
  474. *snr = (_snr << 8) | _snr;
  475. return 0;
  476. }
  477. static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
  478. {
  479. struct tda10086_state* state = fe->demodulator_priv;
  480. dprintk ("%s\n", __FUNCTION__);
  481. // read it
  482. *ucblocks = tda10086_read_byte(state, 0x18) & 0x7f;
  483. // reset counter
  484. tda10086_write_byte(state, 0x18, 0x00);
  485. tda10086_write_byte(state, 0x18, 0x80);
  486. return 0;
  487. }
  488. static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber)
  489. {
  490. struct tda10086_state* state = fe->demodulator_priv;
  491. dprintk ("%s\n", __FUNCTION__);
  492. // read it
  493. *ber = 0;
  494. *ber |= tda10086_read_byte(state, 0x15);
  495. *ber |= tda10086_read_byte(state, 0x16) << 8;
  496. *ber |= (tda10086_read_byte(state, 0x17) & 0xf) << 16;
  497. return 0;
  498. }
  499. static int tda10086_sleep(struct dvb_frontend* fe)
  500. {
  501. struct tda10086_state* state = fe->demodulator_priv;
  502. dprintk ("%s\n", __FUNCTION__);
  503. tda10086_write_mask(state, 0x00, 0x08, 0x08);
  504. return 0;
  505. }
  506. static int tda10086_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
  507. {
  508. struct tda10086_state* state = fe->demodulator_priv;
  509. dprintk ("%s\n", __FUNCTION__);
  510. if (enable) {
  511. tda10086_write_mask(state, 0x00, 0x10, 0x10);
  512. } else {
  513. tda10086_write_mask(state, 0x00, 0x10, 0x00);
  514. }
  515. return 0;
  516. }
  517. static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
  518. {
  519. if (fesettings->parameters.u.qpsk.symbol_rate > 20000000) {
  520. fesettings->min_delay_ms = 50;
  521. fesettings->step_size = 2000;
  522. fesettings->max_drift = 8000;
  523. } else if (fesettings->parameters.u.qpsk.symbol_rate > 12000000) {
  524. fesettings->min_delay_ms = 100;
  525. fesettings->step_size = 1500;
  526. fesettings->max_drift = 9000;
  527. } else if (fesettings->parameters.u.qpsk.symbol_rate > 8000000) {
  528. fesettings->min_delay_ms = 100;
  529. fesettings->step_size = 1000;
  530. fesettings->max_drift = 8000;
  531. } else if (fesettings->parameters.u.qpsk.symbol_rate > 4000000) {
  532. fesettings->min_delay_ms = 100;
  533. fesettings->step_size = 500;
  534. fesettings->max_drift = 7000;
  535. } else if (fesettings->parameters.u.qpsk.symbol_rate > 2000000) {
  536. fesettings->min_delay_ms = 200;
  537. fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000);
  538. fesettings->max_drift = 14 * fesettings->step_size;
  539. } else {
  540. fesettings->min_delay_ms = 200;
  541. fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000);
  542. fesettings->max_drift = 18 * fesettings->step_size;
  543. }
  544. return 0;
  545. }
  546. static void tda10086_release(struct dvb_frontend* fe)
  547. {
  548. struct tda10086_state *state = fe->demodulator_priv;
  549. tda10086_sleep(fe);
  550. kfree(state);
  551. }
  552. static struct dvb_frontend_ops tda10086_ops = {
  553. .info = {
  554. .name = "Philips TDA10086 DVB-S",
  555. .type = FE_QPSK,
  556. .frequency_min = 950000,
  557. .frequency_max = 2150000,
  558. .frequency_stepsize = 125, /* kHz for QPSK frontends */
  559. .symbol_rate_min = 1000000,
  560. .symbol_rate_max = 45000000,
  561. .caps = FE_CAN_INVERSION_AUTO |
  562. FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  563. FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  564. FE_CAN_QPSK
  565. },
  566. .release = tda10086_release,
  567. .init = tda10086_init,
  568. .sleep = tda10086_sleep,
  569. .i2c_gate_ctrl = tda10086_i2c_gate_ctrl,
  570. .set_frontend = tda10086_set_frontend,
  571. .get_frontend = tda10086_get_frontend,
  572. .get_tune_settings = tda10086_get_tune_settings,
  573. .read_status = tda10086_read_status,
  574. .read_ber = tda10086_read_ber,
  575. .read_signal_strength = tda10086_read_signal_strength,
  576. .read_snr = tda10086_read_snr,
  577. .read_ucblocks = tda10086_read_ucblocks,
  578. .diseqc_send_master_cmd = tda10086_send_master_cmd,
  579. .diseqc_send_burst = tda10086_send_burst,
  580. .set_tone = tda10086_set_tone,
  581. };
  582. struct dvb_frontend* tda10086_attach(const struct tda10086_config* config,
  583. struct i2c_adapter* i2c)
  584. {
  585. struct tda10086_state *state;
  586. dprintk ("%s\n", __FUNCTION__);
  587. /* allocate memory for the internal state */
  588. state = kmalloc(sizeof(struct tda10086_state), GFP_KERNEL);
  589. if (!state)
  590. return NULL;
  591. /* setup the state */
  592. state->config = config;
  593. state->i2c = i2c;
  594. /* check if the demod is there */
  595. if (tda10086_read_byte(state, 0x1e) != 0xe1) {
  596. kfree(state);
  597. return NULL;
  598. }
  599. /* create dvb_frontend */
  600. memcpy(&state->frontend.ops, &tda10086_ops, sizeof(struct dvb_frontend_ops));
  601. state->frontend.demodulator_priv = state;
  602. return &state->frontend;
  603. }
  604. module_param(debug, int, 0644);
  605. MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  606. MODULE_DESCRIPTION("Philips TDA10086 DVB-S Demodulator");
  607. MODULE_AUTHOR("Andrew de Quincey");
  608. MODULE_LICENSE("GPL");
  609. EXPORT_SYMBOL(tda10086_attach);