or51132.c 17 KB

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  1. /*
  2. * Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
  3. *
  4. *
  5. * Copyright (C) 2007 Trent Piepho <xyzzy@speakeasy.org>
  6. *
  7. * Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
  8. *
  9. * Based on code from Jack Kelliher (kelliher@xmission.com)
  10. * Copyright (C) 2002 & pcHDTV, inc.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. */
  27. /*
  28. * This driver needs two external firmware files. Please copy
  29. * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
  30. * /usr/lib/hotplug/firmware/ or /lib/firmware/
  31. * (depending on configuration of firmware hotplug).
  32. */
  33. #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
  34. #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
  35. #include <linux/kernel.h>
  36. #include <linux/module.h>
  37. #include <linux/moduleparam.h>
  38. #include <linux/init.h>
  39. #include <linux/delay.h>
  40. #include <linux/string.h>
  41. #include <linux/slab.h>
  42. #include <asm/byteorder.h>
  43. #include "dvb_math.h"
  44. #include "dvb_frontend.h"
  45. #include "dvb-pll.h"
  46. #include "or51132.h"
  47. static int debug;
  48. #define dprintk(args...) \
  49. do { \
  50. if (debug) printk(KERN_DEBUG "or51132: " args); \
  51. } while (0)
  52. struct or51132_state
  53. {
  54. struct i2c_adapter* i2c;
  55. /* Configuration settings */
  56. const struct or51132_config* config;
  57. struct dvb_frontend frontend;
  58. /* Demodulator private data */
  59. fe_modulation_t current_modulation;
  60. u32 snr; /* Result of last SNR calculation */
  61. /* Tuner private data */
  62. u32 current_frequency;
  63. };
  64. /* Write buffer to demod */
  65. static int or51132_writebuf(struct or51132_state *state, const u8 *buf, int len)
  66. {
  67. int err;
  68. struct i2c_msg msg = { .addr = state->config->demod_address,
  69. .flags = 0, .buf = (u8*)buf, .len = len };
  70. /* msleep(20); */ /* doesn't appear to be necessary */
  71. if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  72. printk(KERN_WARNING "or51132: I2C write (addr 0x%02x len %d) error: %d\n",
  73. msg.addr, msg.len, err);
  74. return -EREMOTEIO;
  75. }
  76. return 0;
  77. }
  78. /* Write constant bytes, e.g. or51132_writebytes(state, 0x04, 0x42, 0x00);
  79. Less code and more efficient that loading a buffer on the stack with
  80. the bytes to send and then calling or51132_writebuf() on that. */
  81. #define or51132_writebytes(state, data...) \
  82. ({ const static u8 _data[] = {data}; \
  83. or51132_writebuf(state, _data, sizeof(_data)); })
  84. /* Read data from demod into buffer. Returns 0 on success. */
  85. static int or51132_readbuf(struct or51132_state *state, u8 *buf, int len)
  86. {
  87. int err;
  88. struct i2c_msg msg = { .addr = state->config->demod_address,
  89. .flags = I2C_M_RD, .buf = buf, .len = len };
  90. /* msleep(20); */ /* doesn't appear to be necessary */
  91. if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  92. printk(KERN_WARNING "or51132: I2C read (addr 0x%02x len %d) error: %d\n",
  93. msg.addr, msg.len, err);
  94. return -EREMOTEIO;
  95. }
  96. return 0;
  97. }
  98. /* Reads a 16-bit demod register. Returns <0 on error. */
  99. static int or51132_readreg(struct or51132_state *state, u8 reg)
  100. {
  101. u8 buf[2] = { 0x04, reg };
  102. struct i2c_msg msg[2] = {
  103. {.addr = state->config->demod_address, .flags = 0,
  104. .buf = buf, .len = 2 },
  105. {.addr = state->config->demod_address, .flags = I2C_M_RD,
  106. .buf = buf, .len = 2 }};
  107. int err;
  108. if ((err = i2c_transfer(state->i2c, msg, 2)) != 2) {
  109. printk(KERN_WARNING "or51132: I2C error reading register %d: %d\n",
  110. reg, err);
  111. return -EREMOTEIO;
  112. }
  113. return le16_to_cpup((u16*)buf);
  114. }
  115. static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
  116. {
  117. struct or51132_state* state = fe->demodulator_priv;
  118. const static u8 run_buf[] = {0x7F,0x01};
  119. u8 rec_buf[8];
  120. u32 firmwareAsize, firmwareBsize;
  121. int i,ret;
  122. dprintk("Firmware is %Zd bytes\n",fw->size);
  123. /* Get size of firmware A and B */
  124. firmwareAsize = le32_to_cpu(*((u32*)fw->data));
  125. dprintk("FirmwareA is %i bytes\n",firmwareAsize);
  126. firmwareBsize = le32_to_cpu(*((u32*)(fw->data+4)));
  127. dprintk("FirmwareB is %i bytes\n",firmwareBsize);
  128. /* Upload firmware */
  129. if ((ret = or51132_writebuf(state, &fw->data[8], firmwareAsize))) {
  130. printk(KERN_WARNING "or51132: load_firmware error 1\n");
  131. return ret;
  132. }
  133. if ((ret = or51132_writebuf(state, &fw->data[8+firmwareAsize],
  134. firmwareBsize))) {
  135. printk(KERN_WARNING "or51132: load_firmware error 2\n");
  136. return ret;
  137. }
  138. if ((ret = or51132_writebuf(state, run_buf, 2))) {
  139. printk(KERN_WARNING "or51132: load_firmware error 3\n");
  140. return ret;
  141. }
  142. if ((ret = or51132_writebuf(state, run_buf, 2))) {
  143. printk(KERN_WARNING "or51132: load_firmware error 4\n");
  144. return ret;
  145. }
  146. /* 50ms for operation to begin */
  147. msleep(50);
  148. /* Read back ucode version to besure we loaded correctly and are really up and running */
  149. /* Get uCode version */
  150. if ((ret = or51132_writebytes(state, 0x10, 0x10, 0x00))) {
  151. printk(KERN_WARNING "or51132: load_firmware error a\n");
  152. return ret;
  153. }
  154. if ((ret = or51132_writebytes(state, 0x04, 0x17))) {
  155. printk(KERN_WARNING "or51132: load_firmware error b\n");
  156. return ret;
  157. }
  158. if ((ret = or51132_writebytes(state, 0x00, 0x00))) {
  159. printk(KERN_WARNING "or51132: load_firmware error c\n");
  160. return ret;
  161. }
  162. for (i=0;i<4;i++) {
  163. /* Once upon a time, this command might have had something
  164. to do with getting the firmware version, but it's
  165. not used anymore:
  166. {0x04,0x00,0x30,0x00,i+1} */
  167. /* Read 8 bytes, two bytes at a time */
  168. if ((ret = or51132_readbuf(state, &rec_buf[i*2], 2))) {
  169. printk(KERN_WARNING
  170. "or51132: load_firmware error d - %d\n",i);
  171. return ret;
  172. }
  173. }
  174. printk(KERN_WARNING
  175. "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
  176. rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
  177. rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
  178. rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
  179. rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
  180. if ((ret = or51132_writebytes(state, 0x10, 0x00, 0x00))) {
  181. printk(KERN_WARNING "or51132: load_firmware error e\n");
  182. return ret;
  183. }
  184. return 0;
  185. };
  186. static int or51132_init(struct dvb_frontend* fe)
  187. {
  188. return 0;
  189. }
  190. static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
  191. {
  192. *ber = 0;
  193. return 0;
  194. }
  195. static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
  196. {
  197. *ucblocks = 0;
  198. return 0;
  199. }
  200. static int or51132_sleep(struct dvb_frontend* fe)
  201. {
  202. return 0;
  203. }
  204. static int or51132_setmode(struct dvb_frontend* fe)
  205. {
  206. struct or51132_state* state = fe->demodulator_priv;
  207. u8 cmd_buf1[3] = {0x04, 0x01, 0x5f};
  208. u8 cmd_buf2[3] = {0x1c, 0x00, 0 };
  209. dprintk("setmode %d\n",(int)state->current_modulation);
  210. switch (state->current_modulation) {
  211. case VSB_8:
  212. /* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high */
  213. cmd_buf1[2] = 0x50;
  214. /* REC MODE inv IF spectrum, Normal */
  215. cmd_buf2[1] = 0x03;
  216. /* Channel MODE ATSC/VSB8 */
  217. cmd_buf2[2] = 0x06;
  218. break;
  219. /* All QAM modes are:
  220. Auto-deinterleave; MPEGser, MPEG2tr, phase noise-high
  221. REC MODE Normal Carrier Lock */
  222. case QAM_AUTO:
  223. /* Channel MODE Auto QAM64/256 */
  224. cmd_buf2[2] = 0x4f;
  225. break;
  226. case QAM_256:
  227. /* Channel MODE QAM256 */
  228. cmd_buf2[2] = 0x45;
  229. break;
  230. case QAM_64:
  231. /* Channel MODE QAM64 */
  232. cmd_buf2[2] = 0x43;
  233. break;
  234. default:
  235. printk(KERN_WARNING
  236. "or51132: setmode: Modulation set to unsupported value (%d)\n",
  237. state->current_modulation);
  238. return -EINVAL;
  239. }
  240. /* Set Receiver 1 register */
  241. if (or51132_writebuf(state, cmd_buf1, 3)) {
  242. printk(KERN_WARNING "or51132: set_mode error 1\n");
  243. return -EREMOTEIO;
  244. }
  245. dprintk("set #1 to %02x\n", cmd_buf1[2]);
  246. /* Set operation mode in Receiver 6 register */
  247. if (or51132_writebuf(state, cmd_buf2, 3)) {
  248. printk(KERN_WARNING "or51132: set_mode error 2\n");
  249. return -EREMOTEIO;
  250. }
  251. dprintk("set #6 to 0x%02x%02x\n", cmd_buf2[1], cmd_buf2[2]);
  252. return 0;
  253. }
  254. /* Some modulations use the same firmware. This classifies modulations
  255. by the firmware they use. */
  256. #define MOD_FWCLASS_UNKNOWN 0
  257. #define MOD_FWCLASS_VSB 1
  258. #define MOD_FWCLASS_QAM 2
  259. static int modulation_fw_class(fe_modulation_t modulation)
  260. {
  261. switch(modulation) {
  262. case VSB_8:
  263. return MOD_FWCLASS_VSB;
  264. case QAM_AUTO:
  265. case QAM_64:
  266. case QAM_256:
  267. return MOD_FWCLASS_QAM;
  268. default:
  269. return MOD_FWCLASS_UNKNOWN;
  270. }
  271. }
  272. static int or51132_set_parameters(struct dvb_frontend* fe,
  273. struct dvb_frontend_parameters *param)
  274. {
  275. int ret;
  276. struct or51132_state* state = fe->demodulator_priv;
  277. const struct firmware *fw;
  278. const char *fwname;
  279. int clock_mode;
  280. /* Upload new firmware only if we need a different one */
  281. if (modulation_fw_class(state->current_modulation) !=
  282. modulation_fw_class(param->u.vsb.modulation)) {
  283. switch(modulation_fw_class(param->u.vsb.modulation)) {
  284. case MOD_FWCLASS_VSB:
  285. dprintk("set_parameters VSB MODE\n");
  286. fwname = OR51132_VSB_FIRMWARE;
  287. /* Set non-punctured clock for VSB */
  288. clock_mode = 0;
  289. break;
  290. case MOD_FWCLASS_QAM:
  291. dprintk("set_parameters QAM MODE\n");
  292. fwname = OR51132_QAM_FIRMWARE;
  293. /* Set punctured clock for QAM */
  294. clock_mode = 1;
  295. break;
  296. default:
  297. printk("or51132: Modulation type(%d) UNSUPPORTED\n",
  298. param->u.vsb.modulation);
  299. return -1;
  300. }
  301. printk("or51132: Waiting for firmware upload(%s)...\n",
  302. fwname);
  303. ret = request_firmware(&fw, fwname, &state->i2c->dev);
  304. if (ret) {
  305. printk(KERN_WARNING "or51132: No firmware up"
  306. "loaded(timeout or file not found?)\n");
  307. return ret;
  308. }
  309. ret = or51132_load_firmware(fe, fw);
  310. release_firmware(fw);
  311. if (ret) {
  312. printk(KERN_WARNING "or51132: Writing firmware to "
  313. "device failed!\n");
  314. return ret;
  315. }
  316. printk("or51132: Firmware upload complete.\n");
  317. state->config->set_ts_params(fe, clock_mode);
  318. }
  319. /* Change only if we are actually changing the modulation */
  320. if (state->current_modulation != param->u.vsb.modulation) {
  321. state->current_modulation = param->u.vsb.modulation;
  322. or51132_setmode(fe);
  323. }
  324. if (fe->ops.tuner_ops.set_params) {
  325. fe->ops.tuner_ops.set_params(fe, param);
  326. if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
  327. }
  328. /* Set to current mode */
  329. or51132_setmode(fe);
  330. /* Update current frequency */
  331. state->current_frequency = param->frequency;
  332. return 0;
  333. }
  334. static int or51132_get_parameters(struct dvb_frontend* fe,
  335. struct dvb_frontend_parameters *param)
  336. {
  337. struct or51132_state* state = fe->demodulator_priv;
  338. int status;
  339. int retry = 1;
  340. start:
  341. /* Receiver Status */
  342. if ((status = or51132_readreg(state, 0x00)) < 0) {
  343. printk(KERN_WARNING "or51132: get_parameters: error reading receiver status\n");
  344. return -EREMOTEIO;
  345. }
  346. switch(status&0xff) {
  347. case 0x06: param->u.vsb.modulation = VSB_8; break;
  348. case 0x43: param->u.vsb.modulation = QAM_64; break;
  349. case 0x45: param->u.vsb.modulation = QAM_256; break;
  350. default:
  351. if (retry--) goto start;
  352. printk(KERN_WARNING "or51132: unknown status 0x%02x\n",
  353. status&0xff);
  354. return -EREMOTEIO;
  355. }
  356. /* FIXME: Read frequency from frontend, take AFC into account */
  357. param->frequency = state->current_frequency;
  358. /* FIXME: How to read inversion setting? Receiver 6 register? */
  359. param->inversion = INVERSION_AUTO;
  360. return 0;
  361. }
  362. static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
  363. {
  364. struct or51132_state* state = fe->demodulator_priv;
  365. int reg;
  366. /* Receiver Status */
  367. if ((reg = or51132_readreg(state, 0x00)) < 0) {
  368. printk(KERN_WARNING "or51132: read_status: error reading receiver status: %d\n", reg);
  369. *status = 0;
  370. return -EREMOTEIO;
  371. }
  372. dprintk("%s: read_status %04x\n", __FUNCTION__, reg);
  373. if (reg & 0x0100) /* Receiver Lock */
  374. *status = FE_HAS_SIGNAL|FE_HAS_CARRIER|FE_HAS_VITERBI|
  375. FE_HAS_SYNC|FE_HAS_LOCK;
  376. else
  377. *status = 0;
  378. return 0;
  379. }
  380. /* Calculate SNR estimation (scaled by 2^24)
  381. 8-VSB SNR and QAM equations from Oren datasheets
  382. For 8-VSB:
  383. SNR[dB] = 10 * log10(897152044.8282 / MSE^2 ) - K
  384. Where K = 0 if NTSC rejection filter is OFF; and
  385. K = 3 if NTSC rejection filter is ON
  386. For QAM64:
  387. SNR[dB] = 10 * log10(897152044.8282 / MSE^2 )
  388. For QAM256:
  389. SNR[dB] = 10 * log10(907832426.314266 / MSE^2 )
  390. We re-write the snr equation as:
  391. SNR * 2^24 = 10*(c - 2*intlog10(MSE))
  392. Where for QAM256, c = log10(907832426.314266) * 2^24
  393. and for 8-VSB and QAM64, c = log10(897152044.8282) * 2^24 */
  394. static u32 calculate_snr(u32 mse, u32 c)
  395. {
  396. if (mse == 0) /* No signal */
  397. return 0;
  398. mse = 2*intlog10(mse);
  399. if (mse > c) {
  400. /* Negative SNR, which is possible, but realisticly the
  401. demod will lose lock before the signal gets this bad. The
  402. API only allows for unsigned values, so just return 0 */
  403. return 0;
  404. }
  405. return 10*(c - mse);
  406. }
  407. static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
  408. {
  409. struct or51132_state* state = fe->demodulator_priv;
  410. int noise, reg;
  411. u32 c, usK = 0;
  412. int retry = 1;
  413. start:
  414. /* SNR after Equalizer */
  415. noise = or51132_readreg(state, 0x02);
  416. if (noise < 0) {
  417. printk(KERN_WARNING "or51132: read_snr: error reading equalizer\n");
  418. return -EREMOTEIO;
  419. }
  420. dprintk("read_snr noise (%d)\n", noise);
  421. /* Read status, contains modulation type for QAM_AUTO and
  422. NTSC filter for VSB */
  423. reg = or51132_readreg(state, 0x00);
  424. if (reg < 0) {
  425. printk(KERN_WARNING "or51132: read_snr: error reading receiver status\n");
  426. return -EREMOTEIO;
  427. }
  428. switch (reg&0xff) {
  429. case 0x06:
  430. if (reg & 0x1000) usK = 3 << 24;
  431. /* Fall through to QAM64 case */
  432. case 0x43:
  433. c = 150204167;
  434. break;
  435. case 0x45:
  436. c = 150290396;
  437. break;
  438. default:
  439. printk(KERN_WARNING "or51132: unknown status 0x%02x\n", reg&0xff);
  440. if (retry--) goto start;
  441. return -EREMOTEIO;
  442. }
  443. dprintk("%s: modulation %02x, NTSC rej O%s\n", __FUNCTION__,
  444. reg&0xff, reg&0x1000?"n":"ff");
  445. /* Calculate SNR using noise, c, and NTSC rejection correction */
  446. state->snr = calculate_snr(noise, c) - usK;
  447. *snr = (state->snr) >> 16;
  448. dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __FUNCTION__, noise,
  449. state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16);
  450. return 0;
  451. }
  452. static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
  453. {
  454. /* Calculate Strength from SNR up to 35dB */
  455. /* Even though the SNR can go higher than 35dB, there is some comfort */
  456. /* factor in having a range of strong signals that can show at 100% */
  457. struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
  458. u16 snr;
  459. int ret;
  460. ret = fe->ops.read_snr(fe, &snr);
  461. if (ret != 0)
  462. return ret;
  463. /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
  464. /* scale the range 0 - 35*2^24 into 0 - 65535 */
  465. if (state->snr >= 8960 * 0x10000)
  466. *strength = 0xffff;
  467. else
  468. *strength = state->snr / 8960;
  469. return 0;
  470. }
  471. static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
  472. {
  473. fe_tune_settings->min_delay_ms = 500;
  474. fe_tune_settings->step_size = 0;
  475. fe_tune_settings->max_drift = 0;
  476. return 0;
  477. }
  478. static void or51132_release(struct dvb_frontend* fe)
  479. {
  480. struct or51132_state* state = fe->demodulator_priv;
  481. kfree(state);
  482. }
  483. static struct dvb_frontend_ops or51132_ops;
  484. struct dvb_frontend* or51132_attach(const struct or51132_config* config,
  485. struct i2c_adapter* i2c)
  486. {
  487. struct or51132_state* state = NULL;
  488. /* Allocate memory for the internal state */
  489. state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
  490. if (state == NULL)
  491. goto error;
  492. /* Setup the state */
  493. state->config = config;
  494. state->i2c = i2c;
  495. state->current_frequency = -1;
  496. state->current_modulation = -1;
  497. /* Create dvb_frontend */
  498. memcpy(&state->frontend.ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
  499. state->frontend.demodulator_priv = state;
  500. return &state->frontend;
  501. error:
  502. kfree(state);
  503. return NULL;
  504. }
  505. static struct dvb_frontend_ops or51132_ops = {
  506. .info = {
  507. .name = "Oren OR51132 VSB/QAM Frontend",
  508. .type = FE_ATSC,
  509. .frequency_min = 44000000,
  510. .frequency_max = 958000000,
  511. .frequency_stepsize = 166666,
  512. .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  513. FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  514. FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
  515. FE_CAN_8VSB
  516. },
  517. .release = or51132_release,
  518. .init = or51132_init,
  519. .sleep = or51132_sleep,
  520. .set_frontend = or51132_set_parameters,
  521. .get_frontend = or51132_get_parameters,
  522. .get_tune_settings = or51132_get_tune_settings,
  523. .read_status = or51132_read_status,
  524. .read_ber = or51132_read_ber,
  525. .read_signal_strength = or51132_read_signal_strength,
  526. .read_snr = or51132_read_snr,
  527. .read_ucblocks = or51132_read_ucblocks,
  528. };
  529. module_param(debug, int, 0644);
  530. MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  531. MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
  532. MODULE_AUTHOR("Kirk Lapray");
  533. MODULE_AUTHOR("Trent Piepho");
  534. MODULE_LICENSE("GPL");
  535. EXPORT_SYMBOL(or51132_attach);
  536. /*
  537. * Local variables:
  538. * c-basic-offset: 8
  539. * End:
  540. */