mthca_provider.c 35 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
  5. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  6. * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
  7. *
  8. * This software is available to you under a choice of one of two
  9. * licenses. You may choose to be licensed under the terms of the GNU
  10. * General Public License (GPL) Version 2, available from the file
  11. * COPYING in the main directory of this source tree, or the
  12. * OpenIB.org BSD license below:
  13. *
  14. * Redistribution and use in source and binary forms, with or
  15. * without modification, are permitted provided that the following
  16. * conditions are met:
  17. *
  18. * - Redistributions of source code must retain the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer.
  21. *
  22. * - Redistributions in binary form must reproduce the above
  23. * copyright notice, this list of conditions and the following
  24. * disclaimer in the documentation and/or other materials
  25. * provided with the distribution.
  26. *
  27. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34. * SOFTWARE.
  35. *
  36. * $Id: mthca_provider.c 4859 2006-01-09 21:55:10Z roland $
  37. */
  38. #include <rdma/ib_smi.h>
  39. #include <rdma/ib_umem.h>
  40. #include <rdma/ib_user_verbs.h>
  41. #include <linux/mm.h>
  42. #include "mthca_dev.h"
  43. #include "mthca_cmd.h"
  44. #include "mthca_user.h"
  45. #include "mthca_memfree.h"
  46. static void init_query_mad(struct ib_smp *mad)
  47. {
  48. mad->base_version = 1;
  49. mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  50. mad->class_version = 1;
  51. mad->method = IB_MGMT_METHOD_GET;
  52. }
  53. static int mthca_query_device(struct ib_device *ibdev,
  54. struct ib_device_attr *props)
  55. {
  56. struct ib_smp *in_mad = NULL;
  57. struct ib_smp *out_mad = NULL;
  58. int err = -ENOMEM;
  59. struct mthca_dev* mdev = to_mdev(ibdev);
  60. u8 status;
  61. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  62. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  63. if (!in_mad || !out_mad)
  64. goto out;
  65. memset(props, 0, sizeof *props);
  66. props->fw_ver = mdev->fw_ver;
  67. init_query_mad(in_mad);
  68. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  69. err = mthca_MAD_IFC(mdev, 1, 1,
  70. 1, NULL, NULL, in_mad, out_mad,
  71. &status);
  72. if (err)
  73. goto out;
  74. if (status) {
  75. err = -EINVAL;
  76. goto out;
  77. }
  78. props->device_cap_flags = mdev->device_cap_flags;
  79. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  80. 0xffffff;
  81. props->vendor_part_id = be16_to_cpup((__be16 *) (out_mad->data + 30));
  82. props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
  83. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  84. props->max_mr_size = ~0ull;
  85. props->page_size_cap = mdev->limits.page_size_cap;
  86. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  87. props->max_qp_wr = mdev->limits.max_wqes;
  88. props->max_sge = mdev->limits.max_sg;
  89. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  90. props->max_cqe = mdev->limits.max_cqes;
  91. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  92. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  93. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  94. props->max_qp_init_rd_atom = mdev->limits.max_qp_init_rdma;
  95. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  96. props->max_srq = mdev->limits.num_srqs - mdev->limits.reserved_srqs;
  97. props->max_srq_wr = mdev->limits.max_srq_wqes;
  98. props->max_srq_sge = mdev->limits.max_srq_sge;
  99. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  100. props->atomic_cap = mdev->limits.flags & DEV_LIM_FLAG_ATOMIC ?
  101. IB_ATOMIC_HCA : IB_ATOMIC_NONE;
  102. props->max_pkeys = mdev->limits.pkey_table_len;
  103. props->max_mcast_grp = mdev->limits.num_mgms + mdev->limits.num_amgms;
  104. props->max_mcast_qp_attach = MTHCA_QP_PER_MGM;
  105. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  106. props->max_mcast_grp;
  107. /*
  108. * If Sinai memory key optimization is being used, then only
  109. * the 8-bit key portion will change. For other HCAs, the
  110. * unused index bits will also be used for FMR remapping.
  111. */
  112. if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  113. props->max_map_per_fmr = 255;
  114. else
  115. props->max_map_per_fmr =
  116. (1 << (32 - ilog2(mdev->limits.num_mpts))) - 1;
  117. err = 0;
  118. out:
  119. kfree(in_mad);
  120. kfree(out_mad);
  121. return err;
  122. }
  123. static int mthca_query_port(struct ib_device *ibdev,
  124. u8 port, struct ib_port_attr *props)
  125. {
  126. struct ib_smp *in_mad = NULL;
  127. struct ib_smp *out_mad = NULL;
  128. int err = -ENOMEM;
  129. u8 status;
  130. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  131. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  132. if (!in_mad || !out_mad)
  133. goto out;
  134. memset(props, 0, sizeof *props);
  135. init_query_mad(in_mad);
  136. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  137. in_mad->attr_mod = cpu_to_be32(port);
  138. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  139. port, NULL, NULL, in_mad, out_mad,
  140. &status);
  141. if (err)
  142. goto out;
  143. if (status) {
  144. err = -EINVAL;
  145. goto out;
  146. }
  147. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  148. props->lmc = out_mad->data[34] & 0x7;
  149. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  150. props->sm_sl = out_mad->data[36] & 0xf;
  151. props->state = out_mad->data[32] & 0xf;
  152. props->phys_state = out_mad->data[33] >> 4;
  153. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  154. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  155. props->max_msg_sz = 0x80000000;
  156. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  157. props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
  158. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  159. props->active_width = out_mad->data[31] & 0xf;
  160. props->active_speed = out_mad->data[35] >> 4;
  161. props->max_mtu = out_mad->data[41] & 0xf;
  162. props->active_mtu = out_mad->data[36] >> 4;
  163. props->subnet_timeout = out_mad->data[51] & 0x1f;
  164. props->max_vl_num = out_mad->data[37] >> 4;
  165. props->init_type_reply = out_mad->data[41] >> 4;
  166. out:
  167. kfree(in_mad);
  168. kfree(out_mad);
  169. return err;
  170. }
  171. static int mthca_modify_device(struct ib_device *ibdev,
  172. int mask,
  173. struct ib_device_modify *props)
  174. {
  175. if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
  176. return -EOPNOTSUPP;
  177. if (mask & IB_DEVICE_MODIFY_NODE_DESC) {
  178. if (mutex_lock_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  179. return -ERESTARTSYS;
  180. memcpy(ibdev->node_desc, props->node_desc, 64);
  181. mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
  182. }
  183. return 0;
  184. }
  185. static int mthca_modify_port(struct ib_device *ibdev,
  186. u8 port, int port_modify_mask,
  187. struct ib_port_modify *props)
  188. {
  189. struct mthca_set_ib_param set_ib;
  190. struct ib_port_attr attr;
  191. int err;
  192. u8 status;
  193. if (mutex_lock_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  194. return -ERESTARTSYS;
  195. err = mthca_query_port(ibdev, port, &attr);
  196. if (err)
  197. goto out;
  198. set_ib.set_si_guid = 0;
  199. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  200. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  201. ~props->clr_port_cap_mask;
  202. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  203. if (err)
  204. goto out;
  205. if (status) {
  206. err = -EINVAL;
  207. goto out;
  208. }
  209. out:
  210. mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
  211. return err;
  212. }
  213. static int mthca_query_pkey(struct ib_device *ibdev,
  214. u8 port, u16 index, u16 *pkey)
  215. {
  216. struct ib_smp *in_mad = NULL;
  217. struct ib_smp *out_mad = NULL;
  218. int err = -ENOMEM;
  219. u8 status;
  220. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  221. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  222. if (!in_mad || !out_mad)
  223. goto out;
  224. init_query_mad(in_mad);
  225. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  226. in_mad->attr_mod = cpu_to_be32(index / 32);
  227. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  228. port, NULL, NULL, in_mad, out_mad,
  229. &status);
  230. if (err)
  231. goto out;
  232. if (status) {
  233. err = -EINVAL;
  234. goto out;
  235. }
  236. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  237. out:
  238. kfree(in_mad);
  239. kfree(out_mad);
  240. return err;
  241. }
  242. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  243. int index, union ib_gid *gid)
  244. {
  245. struct ib_smp *in_mad = NULL;
  246. struct ib_smp *out_mad = NULL;
  247. int err = -ENOMEM;
  248. u8 status;
  249. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  250. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  251. if (!in_mad || !out_mad)
  252. goto out;
  253. init_query_mad(in_mad);
  254. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  255. in_mad->attr_mod = cpu_to_be32(port);
  256. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  257. port, NULL, NULL, in_mad, out_mad,
  258. &status);
  259. if (err)
  260. goto out;
  261. if (status) {
  262. err = -EINVAL;
  263. goto out;
  264. }
  265. memcpy(gid->raw, out_mad->data + 8, 8);
  266. init_query_mad(in_mad);
  267. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  268. in_mad->attr_mod = cpu_to_be32(index / 8);
  269. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  270. port, NULL, NULL, in_mad, out_mad,
  271. &status);
  272. if (err)
  273. goto out;
  274. if (status) {
  275. err = -EINVAL;
  276. goto out;
  277. }
  278. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
  279. out:
  280. kfree(in_mad);
  281. kfree(out_mad);
  282. return err;
  283. }
  284. static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
  285. struct ib_udata *udata)
  286. {
  287. struct mthca_alloc_ucontext_resp uresp;
  288. struct mthca_ucontext *context;
  289. int err;
  290. memset(&uresp, 0, sizeof uresp);
  291. uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
  292. if (mthca_is_memfree(to_mdev(ibdev)))
  293. uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
  294. else
  295. uresp.uarc_size = 0;
  296. context = kmalloc(sizeof *context, GFP_KERNEL);
  297. if (!context)
  298. return ERR_PTR(-ENOMEM);
  299. err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
  300. if (err) {
  301. kfree(context);
  302. return ERR_PTR(err);
  303. }
  304. context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
  305. if (IS_ERR(context->db_tab)) {
  306. err = PTR_ERR(context->db_tab);
  307. mthca_uar_free(to_mdev(ibdev), &context->uar);
  308. kfree(context);
  309. return ERR_PTR(err);
  310. }
  311. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  312. mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
  313. mthca_uar_free(to_mdev(ibdev), &context->uar);
  314. kfree(context);
  315. return ERR_PTR(-EFAULT);
  316. }
  317. return &context->ibucontext;
  318. }
  319. static int mthca_dealloc_ucontext(struct ib_ucontext *context)
  320. {
  321. mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
  322. to_mucontext(context)->db_tab);
  323. mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
  324. kfree(to_mucontext(context));
  325. return 0;
  326. }
  327. static int mthca_mmap_uar(struct ib_ucontext *context,
  328. struct vm_area_struct *vma)
  329. {
  330. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  331. return -EINVAL;
  332. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  333. if (io_remap_pfn_range(vma, vma->vm_start,
  334. to_mucontext(context)->uar.pfn,
  335. PAGE_SIZE, vma->vm_page_prot))
  336. return -EAGAIN;
  337. return 0;
  338. }
  339. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
  340. struct ib_ucontext *context,
  341. struct ib_udata *udata)
  342. {
  343. struct mthca_pd *pd;
  344. int err;
  345. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  346. if (!pd)
  347. return ERR_PTR(-ENOMEM);
  348. err = mthca_pd_alloc(to_mdev(ibdev), !context, pd);
  349. if (err) {
  350. kfree(pd);
  351. return ERR_PTR(err);
  352. }
  353. if (context) {
  354. if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) {
  355. mthca_pd_free(to_mdev(ibdev), pd);
  356. kfree(pd);
  357. return ERR_PTR(-EFAULT);
  358. }
  359. }
  360. return &pd->ibpd;
  361. }
  362. static int mthca_dealloc_pd(struct ib_pd *pd)
  363. {
  364. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  365. kfree(pd);
  366. return 0;
  367. }
  368. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  369. struct ib_ah_attr *ah_attr)
  370. {
  371. int err;
  372. struct mthca_ah *ah;
  373. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  374. if (!ah)
  375. return ERR_PTR(-ENOMEM);
  376. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  377. if (err) {
  378. kfree(ah);
  379. return ERR_PTR(err);
  380. }
  381. return &ah->ibah;
  382. }
  383. static int mthca_ah_destroy(struct ib_ah *ah)
  384. {
  385. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  386. kfree(ah);
  387. return 0;
  388. }
  389. static struct ib_srq *mthca_create_srq(struct ib_pd *pd,
  390. struct ib_srq_init_attr *init_attr,
  391. struct ib_udata *udata)
  392. {
  393. struct mthca_create_srq ucmd;
  394. struct mthca_ucontext *context = NULL;
  395. struct mthca_srq *srq;
  396. int err;
  397. srq = kmalloc(sizeof *srq, GFP_KERNEL);
  398. if (!srq)
  399. return ERR_PTR(-ENOMEM);
  400. if (pd->uobject) {
  401. context = to_mucontext(pd->uobject->context);
  402. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) {
  403. err = -EFAULT;
  404. goto err_free;
  405. }
  406. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  407. context->db_tab, ucmd.db_index,
  408. ucmd.db_page);
  409. if (err)
  410. goto err_free;
  411. srq->mr.ibmr.lkey = ucmd.lkey;
  412. srq->db_index = ucmd.db_index;
  413. }
  414. err = mthca_alloc_srq(to_mdev(pd->device), to_mpd(pd),
  415. &init_attr->attr, srq);
  416. if (err && pd->uobject)
  417. mthca_unmap_user_db(to_mdev(pd->device), &context->uar,
  418. context->db_tab, ucmd.db_index);
  419. if (err)
  420. goto err_free;
  421. if (context && ib_copy_to_udata(udata, &srq->srqn, sizeof (__u32))) {
  422. mthca_free_srq(to_mdev(pd->device), srq);
  423. err = -EFAULT;
  424. goto err_free;
  425. }
  426. return &srq->ibsrq;
  427. err_free:
  428. kfree(srq);
  429. return ERR_PTR(err);
  430. }
  431. static int mthca_destroy_srq(struct ib_srq *srq)
  432. {
  433. struct mthca_ucontext *context;
  434. if (srq->uobject) {
  435. context = to_mucontext(srq->uobject->context);
  436. mthca_unmap_user_db(to_mdev(srq->device), &context->uar,
  437. context->db_tab, to_msrq(srq)->db_index);
  438. }
  439. mthca_free_srq(to_mdev(srq->device), to_msrq(srq));
  440. kfree(srq);
  441. return 0;
  442. }
  443. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  444. struct ib_qp_init_attr *init_attr,
  445. struct ib_udata *udata)
  446. {
  447. struct mthca_create_qp ucmd;
  448. struct mthca_qp *qp;
  449. int err;
  450. switch (init_attr->qp_type) {
  451. case IB_QPT_RC:
  452. case IB_QPT_UC:
  453. case IB_QPT_UD:
  454. {
  455. struct mthca_ucontext *context;
  456. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  457. if (!qp)
  458. return ERR_PTR(-ENOMEM);
  459. if (pd->uobject) {
  460. context = to_mucontext(pd->uobject->context);
  461. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) {
  462. kfree(qp);
  463. return ERR_PTR(-EFAULT);
  464. }
  465. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  466. context->db_tab,
  467. ucmd.sq_db_index, ucmd.sq_db_page);
  468. if (err) {
  469. kfree(qp);
  470. return ERR_PTR(err);
  471. }
  472. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  473. context->db_tab,
  474. ucmd.rq_db_index, ucmd.rq_db_page);
  475. if (err) {
  476. mthca_unmap_user_db(to_mdev(pd->device),
  477. &context->uar,
  478. context->db_tab,
  479. ucmd.sq_db_index);
  480. kfree(qp);
  481. return ERR_PTR(err);
  482. }
  483. qp->mr.ibmr.lkey = ucmd.lkey;
  484. qp->sq.db_index = ucmd.sq_db_index;
  485. qp->rq.db_index = ucmd.rq_db_index;
  486. }
  487. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  488. to_mcq(init_attr->send_cq),
  489. to_mcq(init_attr->recv_cq),
  490. init_attr->qp_type, init_attr->sq_sig_type,
  491. &init_attr->cap, qp);
  492. if (err && pd->uobject) {
  493. context = to_mucontext(pd->uobject->context);
  494. mthca_unmap_user_db(to_mdev(pd->device),
  495. &context->uar,
  496. context->db_tab,
  497. ucmd.sq_db_index);
  498. mthca_unmap_user_db(to_mdev(pd->device),
  499. &context->uar,
  500. context->db_tab,
  501. ucmd.rq_db_index);
  502. }
  503. qp->ibqp.qp_num = qp->qpn;
  504. break;
  505. }
  506. case IB_QPT_SMI:
  507. case IB_QPT_GSI:
  508. {
  509. /* Don't allow userspace to create special QPs */
  510. if (pd->uobject)
  511. return ERR_PTR(-EINVAL);
  512. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  513. if (!qp)
  514. return ERR_PTR(-ENOMEM);
  515. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  516. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  517. to_mcq(init_attr->send_cq),
  518. to_mcq(init_attr->recv_cq),
  519. init_attr->sq_sig_type, &init_attr->cap,
  520. qp->ibqp.qp_num, init_attr->port_num,
  521. to_msqp(qp));
  522. break;
  523. }
  524. default:
  525. /* Don't support raw QPs */
  526. return ERR_PTR(-ENOSYS);
  527. }
  528. if (err) {
  529. kfree(qp);
  530. return ERR_PTR(err);
  531. }
  532. init_attr->cap.max_send_wr = qp->sq.max;
  533. init_attr->cap.max_recv_wr = qp->rq.max;
  534. init_attr->cap.max_send_sge = qp->sq.max_gs;
  535. init_attr->cap.max_recv_sge = qp->rq.max_gs;
  536. init_attr->cap.max_inline_data = qp->max_inline_data;
  537. return &qp->ibqp;
  538. }
  539. static int mthca_destroy_qp(struct ib_qp *qp)
  540. {
  541. if (qp->uobject) {
  542. mthca_unmap_user_db(to_mdev(qp->device),
  543. &to_mucontext(qp->uobject->context)->uar,
  544. to_mucontext(qp->uobject->context)->db_tab,
  545. to_mqp(qp)->sq.db_index);
  546. mthca_unmap_user_db(to_mdev(qp->device),
  547. &to_mucontext(qp->uobject->context)->uar,
  548. to_mucontext(qp->uobject->context)->db_tab,
  549. to_mqp(qp)->rq.db_index);
  550. }
  551. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  552. kfree(qp);
  553. return 0;
  554. }
  555. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
  556. int comp_vector,
  557. struct ib_ucontext *context,
  558. struct ib_udata *udata)
  559. {
  560. struct mthca_create_cq ucmd;
  561. struct mthca_cq *cq;
  562. int nent;
  563. int err;
  564. if (entries < 1 || entries > to_mdev(ibdev)->limits.max_cqes)
  565. return ERR_PTR(-EINVAL);
  566. if (context) {
  567. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  568. return ERR_PTR(-EFAULT);
  569. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  570. to_mucontext(context)->db_tab,
  571. ucmd.set_db_index, ucmd.set_db_page);
  572. if (err)
  573. return ERR_PTR(err);
  574. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  575. to_mucontext(context)->db_tab,
  576. ucmd.arm_db_index, ucmd.arm_db_page);
  577. if (err)
  578. goto err_unmap_set;
  579. }
  580. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  581. if (!cq) {
  582. err = -ENOMEM;
  583. goto err_unmap_arm;
  584. }
  585. if (context) {
  586. cq->buf.mr.ibmr.lkey = ucmd.lkey;
  587. cq->set_ci_db_index = ucmd.set_db_index;
  588. cq->arm_db_index = ucmd.arm_db_index;
  589. }
  590. for (nent = 1; nent <= entries; nent <<= 1)
  591. ; /* nothing */
  592. err = mthca_init_cq(to_mdev(ibdev), nent,
  593. context ? to_mucontext(context) : NULL,
  594. context ? ucmd.pdn : to_mdev(ibdev)->driver_pd.pd_num,
  595. cq);
  596. if (err)
  597. goto err_free;
  598. if (context && ib_copy_to_udata(udata, &cq->cqn, sizeof (__u32))) {
  599. mthca_free_cq(to_mdev(ibdev), cq);
  600. goto err_free;
  601. }
  602. cq->resize_buf = NULL;
  603. return &cq->ibcq;
  604. err_free:
  605. kfree(cq);
  606. err_unmap_arm:
  607. if (context)
  608. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  609. to_mucontext(context)->db_tab, ucmd.arm_db_index);
  610. err_unmap_set:
  611. if (context)
  612. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  613. to_mucontext(context)->db_tab, ucmd.set_db_index);
  614. return ERR_PTR(err);
  615. }
  616. static int mthca_alloc_resize_buf(struct mthca_dev *dev, struct mthca_cq *cq,
  617. int entries)
  618. {
  619. int ret;
  620. spin_lock_irq(&cq->lock);
  621. if (cq->resize_buf) {
  622. ret = -EBUSY;
  623. goto unlock;
  624. }
  625. cq->resize_buf = kmalloc(sizeof *cq->resize_buf, GFP_ATOMIC);
  626. if (!cq->resize_buf) {
  627. ret = -ENOMEM;
  628. goto unlock;
  629. }
  630. cq->resize_buf->state = CQ_RESIZE_ALLOC;
  631. ret = 0;
  632. unlock:
  633. spin_unlock_irq(&cq->lock);
  634. if (ret)
  635. return ret;
  636. ret = mthca_alloc_cq_buf(dev, &cq->resize_buf->buf, entries);
  637. if (ret) {
  638. spin_lock_irq(&cq->lock);
  639. kfree(cq->resize_buf);
  640. cq->resize_buf = NULL;
  641. spin_unlock_irq(&cq->lock);
  642. return ret;
  643. }
  644. cq->resize_buf->cqe = entries - 1;
  645. spin_lock_irq(&cq->lock);
  646. cq->resize_buf->state = CQ_RESIZE_READY;
  647. spin_unlock_irq(&cq->lock);
  648. return 0;
  649. }
  650. static int mthca_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata)
  651. {
  652. struct mthca_dev *dev = to_mdev(ibcq->device);
  653. struct mthca_cq *cq = to_mcq(ibcq);
  654. struct mthca_resize_cq ucmd;
  655. u32 lkey;
  656. u8 status;
  657. int ret;
  658. if (entries < 1 || entries > dev->limits.max_cqes)
  659. return -EINVAL;
  660. mutex_lock(&cq->mutex);
  661. entries = roundup_pow_of_two(entries + 1);
  662. if (entries == ibcq->cqe + 1) {
  663. ret = 0;
  664. goto out;
  665. }
  666. if (cq->is_kernel) {
  667. ret = mthca_alloc_resize_buf(dev, cq, entries);
  668. if (ret)
  669. goto out;
  670. lkey = cq->resize_buf->buf.mr.ibmr.lkey;
  671. } else {
  672. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) {
  673. ret = -EFAULT;
  674. goto out;
  675. }
  676. lkey = ucmd.lkey;
  677. }
  678. ret = mthca_RESIZE_CQ(dev, cq->cqn, lkey, ilog2(entries), &status);
  679. if (status)
  680. ret = -EINVAL;
  681. if (ret) {
  682. if (cq->resize_buf) {
  683. mthca_free_cq_buf(dev, &cq->resize_buf->buf,
  684. cq->resize_buf->cqe);
  685. kfree(cq->resize_buf);
  686. spin_lock_irq(&cq->lock);
  687. cq->resize_buf = NULL;
  688. spin_unlock_irq(&cq->lock);
  689. }
  690. goto out;
  691. }
  692. if (cq->is_kernel) {
  693. struct mthca_cq_buf tbuf;
  694. int tcqe;
  695. spin_lock_irq(&cq->lock);
  696. if (cq->resize_buf->state == CQ_RESIZE_READY) {
  697. mthca_cq_resize_copy_cqes(cq);
  698. tbuf = cq->buf;
  699. tcqe = cq->ibcq.cqe;
  700. cq->buf = cq->resize_buf->buf;
  701. cq->ibcq.cqe = cq->resize_buf->cqe;
  702. } else {
  703. tbuf = cq->resize_buf->buf;
  704. tcqe = cq->resize_buf->cqe;
  705. }
  706. kfree(cq->resize_buf);
  707. cq->resize_buf = NULL;
  708. spin_unlock_irq(&cq->lock);
  709. mthca_free_cq_buf(dev, &tbuf, tcqe);
  710. } else
  711. ibcq->cqe = entries - 1;
  712. out:
  713. mutex_unlock(&cq->mutex);
  714. return ret;
  715. }
  716. static int mthca_destroy_cq(struct ib_cq *cq)
  717. {
  718. if (cq->uobject) {
  719. mthca_unmap_user_db(to_mdev(cq->device),
  720. &to_mucontext(cq->uobject->context)->uar,
  721. to_mucontext(cq->uobject->context)->db_tab,
  722. to_mcq(cq)->arm_db_index);
  723. mthca_unmap_user_db(to_mdev(cq->device),
  724. &to_mucontext(cq->uobject->context)->uar,
  725. to_mucontext(cq->uobject->context)->db_tab,
  726. to_mcq(cq)->set_ci_db_index);
  727. }
  728. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  729. kfree(cq);
  730. return 0;
  731. }
  732. static inline u32 convert_access(int acc)
  733. {
  734. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  735. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  736. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  737. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  738. MTHCA_MPT_FLAG_LOCAL_READ;
  739. }
  740. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  741. {
  742. struct mthca_mr *mr;
  743. int err;
  744. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  745. if (!mr)
  746. return ERR_PTR(-ENOMEM);
  747. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  748. to_mpd(pd)->pd_num,
  749. convert_access(acc), mr);
  750. if (err) {
  751. kfree(mr);
  752. return ERR_PTR(err);
  753. }
  754. mr->umem = NULL;
  755. return &mr->ibmr;
  756. }
  757. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  758. struct ib_phys_buf *buffer_list,
  759. int num_phys_buf,
  760. int acc,
  761. u64 *iova_start)
  762. {
  763. struct mthca_mr *mr;
  764. u64 *page_list;
  765. u64 total_size;
  766. u64 mask;
  767. int shift;
  768. int npages;
  769. int err;
  770. int i, j, n;
  771. /* First check that we have enough alignment */
  772. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  773. return ERR_PTR(-EINVAL);
  774. mask = 0;
  775. total_size = 0;
  776. for (i = 0; i < num_phys_buf; ++i) {
  777. if (i != 0)
  778. mask |= buffer_list[i].addr;
  779. if (i != num_phys_buf - 1)
  780. mask |= buffer_list[i].addr + buffer_list[i].size;
  781. total_size += buffer_list[i].size;
  782. }
  783. if (mask & ~PAGE_MASK)
  784. return ERR_PTR(-EINVAL);
  785. /* Find largest page shift we can use to cover buffers */
  786. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  787. if (num_phys_buf > 1) {
  788. if ((1ULL << shift) & mask)
  789. break;
  790. } else {
  791. if (1ULL << shift >=
  792. buffer_list[0].size +
  793. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  794. break;
  795. }
  796. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  797. buffer_list[0].addr &= ~0ull << shift;
  798. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  799. if (!mr)
  800. return ERR_PTR(-ENOMEM);
  801. npages = 0;
  802. for (i = 0; i < num_phys_buf; ++i)
  803. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  804. if (!npages)
  805. return &mr->ibmr;
  806. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  807. if (!page_list) {
  808. kfree(mr);
  809. return ERR_PTR(-ENOMEM);
  810. }
  811. n = 0;
  812. for (i = 0; i < num_phys_buf; ++i)
  813. for (j = 0;
  814. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  815. ++j)
  816. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  817. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  818. "in PD %x; shift %d, npages %d.\n",
  819. (unsigned long long) buffer_list[0].addr,
  820. (unsigned long long) *iova_start,
  821. to_mpd(pd)->pd_num,
  822. shift, npages);
  823. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  824. to_mpd(pd)->pd_num,
  825. page_list, shift, npages,
  826. *iova_start, total_size,
  827. convert_access(acc), mr);
  828. if (err) {
  829. kfree(page_list);
  830. kfree(mr);
  831. return ERR_PTR(err);
  832. }
  833. kfree(page_list);
  834. mr->umem = NULL;
  835. return &mr->ibmr;
  836. }
  837. static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  838. u64 virt, int acc, struct ib_udata *udata)
  839. {
  840. struct mthca_dev *dev = to_mdev(pd->device);
  841. struct ib_umem_chunk *chunk;
  842. struct mthca_mr *mr;
  843. u64 *pages;
  844. int shift, n, len;
  845. int i, j, k;
  846. int err = 0;
  847. int write_mtt_size;
  848. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  849. if (!mr)
  850. return ERR_PTR(-ENOMEM);
  851. mr->umem = ib_umem_get(pd->uobject->context, start, length, acc);
  852. if (IS_ERR(mr->umem)) {
  853. err = PTR_ERR(mr->umem);
  854. goto err;
  855. }
  856. shift = ffs(mr->umem->page_size) - 1;
  857. n = 0;
  858. list_for_each_entry(chunk, &mr->umem->chunk_list, list)
  859. n += chunk->nents;
  860. mr->mtt = mthca_alloc_mtt(dev, n);
  861. if (IS_ERR(mr->mtt)) {
  862. err = PTR_ERR(mr->mtt);
  863. goto err_umem;
  864. }
  865. pages = (u64 *) __get_free_page(GFP_KERNEL);
  866. if (!pages) {
  867. err = -ENOMEM;
  868. goto err_mtt;
  869. }
  870. i = n = 0;
  871. write_mtt_size = min(mthca_write_mtt_size(dev), (int) (PAGE_SIZE / sizeof *pages));
  872. list_for_each_entry(chunk, &mr->umem->chunk_list, list)
  873. for (j = 0; j < chunk->nmap; ++j) {
  874. len = sg_dma_len(&chunk->page_list[j]) >> shift;
  875. for (k = 0; k < len; ++k) {
  876. pages[i++] = sg_dma_address(&chunk->page_list[j]) +
  877. mr->umem->page_size * k;
  878. /*
  879. * Be friendly to write_mtt and pass it chunks
  880. * of appropriate size.
  881. */
  882. if (i == write_mtt_size) {
  883. err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
  884. if (err)
  885. goto mtt_done;
  886. n += i;
  887. i = 0;
  888. }
  889. }
  890. }
  891. if (i)
  892. err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
  893. mtt_done:
  894. free_page((unsigned long) pages);
  895. if (err)
  896. goto err_mtt;
  897. err = mthca_mr_alloc(dev, to_mpd(pd)->pd_num, shift, virt, length,
  898. convert_access(acc), mr);
  899. if (err)
  900. goto err_mtt;
  901. return &mr->ibmr;
  902. err_mtt:
  903. mthca_free_mtt(dev, mr->mtt);
  904. err_umem:
  905. ib_umem_release(mr->umem);
  906. err:
  907. kfree(mr);
  908. return ERR_PTR(err);
  909. }
  910. static int mthca_dereg_mr(struct ib_mr *mr)
  911. {
  912. struct mthca_mr *mmr = to_mmr(mr);
  913. mthca_free_mr(to_mdev(mr->device), mmr);
  914. if (mmr->umem)
  915. ib_umem_release(mmr->umem);
  916. kfree(mmr);
  917. return 0;
  918. }
  919. static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
  920. struct ib_fmr_attr *fmr_attr)
  921. {
  922. struct mthca_fmr *fmr;
  923. int err;
  924. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  925. if (!fmr)
  926. return ERR_PTR(-ENOMEM);
  927. memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
  928. err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
  929. convert_access(mr_access_flags), fmr);
  930. if (err) {
  931. kfree(fmr);
  932. return ERR_PTR(err);
  933. }
  934. return &fmr->ibmr;
  935. }
  936. static int mthca_dealloc_fmr(struct ib_fmr *fmr)
  937. {
  938. struct mthca_fmr *mfmr = to_mfmr(fmr);
  939. int err;
  940. err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
  941. if (err)
  942. return err;
  943. kfree(mfmr);
  944. return 0;
  945. }
  946. static int mthca_unmap_fmr(struct list_head *fmr_list)
  947. {
  948. struct ib_fmr *fmr;
  949. int err;
  950. u8 status;
  951. struct mthca_dev *mdev = NULL;
  952. list_for_each_entry(fmr, fmr_list, list) {
  953. if (mdev && to_mdev(fmr->device) != mdev)
  954. return -EINVAL;
  955. mdev = to_mdev(fmr->device);
  956. }
  957. if (!mdev)
  958. return 0;
  959. if (mthca_is_memfree(mdev)) {
  960. list_for_each_entry(fmr, fmr_list, list)
  961. mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
  962. wmb();
  963. } else
  964. list_for_each_entry(fmr, fmr_list, list)
  965. mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
  966. err = mthca_SYNC_TPT(mdev, &status);
  967. if (err)
  968. return err;
  969. if (status)
  970. return -EINVAL;
  971. return 0;
  972. }
  973. static ssize_t show_rev(struct class_device *cdev, char *buf)
  974. {
  975. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  976. return sprintf(buf, "%x\n", dev->rev_id);
  977. }
  978. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  979. {
  980. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  981. return sprintf(buf, "%d.%d.%d\n", (int) (dev->fw_ver >> 32),
  982. (int) (dev->fw_ver >> 16) & 0xffff,
  983. (int) dev->fw_ver & 0xffff);
  984. }
  985. static ssize_t show_hca(struct class_device *cdev, char *buf)
  986. {
  987. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  988. switch (dev->pdev->device) {
  989. case PCI_DEVICE_ID_MELLANOX_TAVOR:
  990. return sprintf(buf, "MT23108\n");
  991. case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
  992. return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  993. case PCI_DEVICE_ID_MELLANOX_ARBEL:
  994. return sprintf(buf, "MT25208\n");
  995. case PCI_DEVICE_ID_MELLANOX_SINAI:
  996. case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
  997. return sprintf(buf, "MT25204\n");
  998. default:
  999. return sprintf(buf, "unknown\n");
  1000. }
  1001. }
  1002. static ssize_t show_board(struct class_device *cdev, char *buf)
  1003. {
  1004. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  1005. return sprintf(buf, "%.*s\n", MTHCA_BOARD_ID_LEN, dev->board_id);
  1006. }
  1007. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  1008. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  1009. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  1010. static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  1011. static struct class_device_attribute *mthca_class_attributes[] = {
  1012. &class_device_attr_hw_rev,
  1013. &class_device_attr_fw_ver,
  1014. &class_device_attr_hca_type,
  1015. &class_device_attr_board_id
  1016. };
  1017. static int mthca_init_node_data(struct mthca_dev *dev)
  1018. {
  1019. struct ib_smp *in_mad = NULL;
  1020. struct ib_smp *out_mad = NULL;
  1021. int err = -ENOMEM;
  1022. u8 status;
  1023. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  1024. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  1025. if (!in_mad || !out_mad)
  1026. goto out;
  1027. init_query_mad(in_mad);
  1028. in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
  1029. err = mthca_MAD_IFC(dev, 1, 1,
  1030. 1, NULL, NULL, in_mad, out_mad,
  1031. &status);
  1032. if (err)
  1033. goto out;
  1034. if (status) {
  1035. err = -EINVAL;
  1036. goto out;
  1037. }
  1038. memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
  1039. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  1040. err = mthca_MAD_IFC(dev, 1, 1,
  1041. 1, NULL, NULL, in_mad, out_mad,
  1042. &status);
  1043. if (err)
  1044. goto out;
  1045. if (status) {
  1046. err = -EINVAL;
  1047. goto out;
  1048. }
  1049. memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
  1050. out:
  1051. kfree(in_mad);
  1052. kfree(out_mad);
  1053. return err;
  1054. }
  1055. int mthca_register_device(struct mthca_dev *dev)
  1056. {
  1057. int ret;
  1058. int i;
  1059. ret = mthca_init_node_data(dev);
  1060. if (ret)
  1061. return ret;
  1062. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  1063. dev->ib_dev.owner = THIS_MODULE;
  1064. dev->ib_dev.uverbs_abi_ver = MTHCA_UVERBS_ABI_VERSION;
  1065. dev->ib_dev.uverbs_cmd_mask =
  1066. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  1067. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  1068. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  1069. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  1070. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  1071. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  1072. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  1073. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  1074. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  1075. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  1076. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  1077. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  1078. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  1079. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  1080. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  1081. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  1082. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST);
  1083. dev->ib_dev.node_type = RDMA_NODE_IB_CA;
  1084. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  1085. dev->ib_dev.num_comp_vectors = 1;
  1086. dev->ib_dev.dma_device = &dev->pdev->dev;
  1087. dev->ib_dev.query_device = mthca_query_device;
  1088. dev->ib_dev.query_port = mthca_query_port;
  1089. dev->ib_dev.modify_device = mthca_modify_device;
  1090. dev->ib_dev.modify_port = mthca_modify_port;
  1091. dev->ib_dev.query_pkey = mthca_query_pkey;
  1092. dev->ib_dev.query_gid = mthca_query_gid;
  1093. dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
  1094. dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
  1095. dev->ib_dev.mmap = mthca_mmap_uar;
  1096. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  1097. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  1098. dev->ib_dev.create_ah = mthca_ah_create;
  1099. dev->ib_dev.query_ah = mthca_ah_query;
  1100. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  1101. if (dev->mthca_flags & MTHCA_FLAG_SRQ) {
  1102. dev->ib_dev.create_srq = mthca_create_srq;
  1103. dev->ib_dev.modify_srq = mthca_modify_srq;
  1104. dev->ib_dev.query_srq = mthca_query_srq;
  1105. dev->ib_dev.destroy_srq = mthca_destroy_srq;
  1106. dev->ib_dev.uverbs_cmd_mask |=
  1107. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  1108. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  1109. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  1110. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
  1111. if (mthca_is_memfree(dev))
  1112. dev->ib_dev.post_srq_recv = mthca_arbel_post_srq_recv;
  1113. else
  1114. dev->ib_dev.post_srq_recv = mthca_tavor_post_srq_recv;
  1115. }
  1116. dev->ib_dev.create_qp = mthca_create_qp;
  1117. dev->ib_dev.modify_qp = mthca_modify_qp;
  1118. dev->ib_dev.query_qp = mthca_query_qp;
  1119. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  1120. dev->ib_dev.create_cq = mthca_create_cq;
  1121. dev->ib_dev.resize_cq = mthca_resize_cq;
  1122. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  1123. dev->ib_dev.poll_cq = mthca_poll_cq;
  1124. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  1125. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  1126. dev->ib_dev.reg_user_mr = mthca_reg_user_mr;
  1127. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  1128. if (dev->mthca_flags & MTHCA_FLAG_FMR) {
  1129. dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
  1130. dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
  1131. dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
  1132. if (mthca_is_memfree(dev))
  1133. dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
  1134. else
  1135. dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
  1136. }
  1137. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  1138. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  1139. dev->ib_dev.process_mad = mthca_process_mad;
  1140. if (mthca_is_memfree(dev)) {
  1141. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  1142. dev->ib_dev.post_send = mthca_arbel_post_send;
  1143. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  1144. } else {
  1145. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  1146. dev->ib_dev.post_send = mthca_tavor_post_send;
  1147. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  1148. }
  1149. mutex_init(&dev->cap_mask_mutex);
  1150. ret = ib_register_device(&dev->ib_dev);
  1151. if (ret)
  1152. return ret;
  1153. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  1154. ret = class_device_create_file(&dev->ib_dev.class_dev,
  1155. mthca_class_attributes[i]);
  1156. if (ret) {
  1157. ib_unregister_device(&dev->ib_dev);
  1158. return ret;
  1159. }
  1160. }
  1161. mthca_start_catas_poll(dev);
  1162. return 0;
  1163. }
  1164. void mthca_unregister_device(struct mthca_dev *dev)
  1165. {
  1166. mthca_stop_catas_poll(dev);
  1167. ib_unregister_device(&dev->ib_dev);
  1168. }