ipath_verbs.c 46 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758
  1. /*
  2. * Copyright (c) 2006 QLogic, Inc. All rights reserved.
  3. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <rdma/ib_mad.h>
  34. #include <rdma/ib_user_verbs.h>
  35. #include <linux/io.h>
  36. #include <linux/utsname.h>
  37. #include "ipath_kernel.h"
  38. #include "ipath_verbs.h"
  39. #include "ipath_common.h"
  40. static unsigned int ib_ipath_qp_table_size = 251;
  41. module_param_named(qp_table_size, ib_ipath_qp_table_size, uint, S_IRUGO);
  42. MODULE_PARM_DESC(qp_table_size, "QP table size");
  43. unsigned int ib_ipath_lkey_table_size = 12;
  44. module_param_named(lkey_table_size, ib_ipath_lkey_table_size, uint,
  45. S_IRUGO);
  46. MODULE_PARM_DESC(lkey_table_size,
  47. "LKEY table size in bits (2^n, 1 <= n <= 23)");
  48. static unsigned int ib_ipath_max_pds = 0xFFFF;
  49. module_param_named(max_pds, ib_ipath_max_pds, uint, S_IWUSR | S_IRUGO);
  50. MODULE_PARM_DESC(max_pds,
  51. "Maximum number of protection domains to support");
  52. static unsigned int ib_ipath_max_ahs = 0xFFFF;
  53. module_param_named(max_ahs, ib_ipath_max_ahs, uint, S_IWUSR | S_IRUGO);
  54. MODULE_PARM_DESC(max_ahs, "Maximum number of address handles to support");
  55. unsigned int ib_ipath_max_cqes = 0x2FFFF;
  56. module_param_named(max_cqes, ib_ipath_max_cqes, uint, S_IWUSR | S_IRUGO);
  57. MODULE_PARM_DESC(max_cqes,
  58. "Maximum number of completion queue entries to support");
  59. unsigned int ib_ipath_max_cqs = 0x1FFFF;
  60. module_param_named(max_cqs, ib_ipath_max_cqs, uint, S_IWUSR | S_IRUGO);
  61. MODULE_PARM_DESC(max_cqs, "Maximum number of completion queues to support");
  62. unsigned int ib_ipath_max_qp_wrs = 0x3FFF;
  63. module_param_named(max_qp_wrs, ib_ipath_max_qp_wrs, uint,
  64. S_IWUSR | S_IRUGO);
  65. MODULE_PARM_DESC(max_qp_wrs, "Maximum number of QP WRs to support");
  66. unsigned int ib_ipath_max_qps = 16384;
  67. module_param_named(max_qps, ib_ipath_max_qps, uint, S_IWUSR | S_IRUGO);
  68. MODULE_PARM_DESC(max_qps, "Maximum number of QPs to support");
  69. unsigned int ib_ipath_max_sges = 0x60;
  70. module_param_named(max_sges, ib_ipath_max_sges, uint, S_IWUSR | S_IRUGO);
  71. MODULE_PARM_DESC(max_sges, "Maximum number of SGEs to support");
  72. unsigned int ib_ipath_max_mcast_grps = 16384;
  73. module_param_named(max_mcast_grps, ib_ipath_max_mcast_grps, uint,
  74. S_IWUSR | S_IRUGO);
  75. MODULE_PARM_DESC(max_mcast_grps,
  76. "Maximum number of multicast groups to support");
  77. unsigned int ib_ipath_max_mcast_qp_attached = 16;
  78. module_param_named(max_mcast_qp_attached, ib_ipath_max_mcast_qp_attached,
  79. uint, S_IWUSR | S_IRUGO);
  80. MODULE_PARM_DESC(max_mcast_qp_attached,
  81. "Maximum number of attached QPs to support");
  82. unsigned int ib_ipath_max_srqs = 1024;
  83. module_param_named(max_srqs, ib_ipath_max_srqs, uint, S_IWUSR | S_IRUGO);
  84. MODULE_PARM_DESC(max_srqs, "Maximum number of SRQs to support");
  85. unsigned int ib_ipath_max_srq_sges = 128;
  86. module_param_named(max_srq_sges, ib_ipath_max_srq_sges,
  87. uint, S_IWUSR | S_IRUGO);
  88. MODULE_PARM_DESC(max_srq_sges, "Maximum number of SRQ SGEs to support");
  89. unsigned int ib_ipath_max_srq_wrs = 0x1FFFF;
  90. module_param_named(max_srq_wrs, ib_ipath_max_srq_wrs,
  91. uint, S_IWUSR | S_IRUGO);
  92. MODULE_PARM_DESC(max_srq_wrs, "Maximum number of SRQ WRs support");
  93. static unsigned int ib_ipath_disable_sma;
  94. module_param_named(disable_sma, ib_ipath_disable_sma, uint, S_IWUSR | S_IRUGO);
  95. MODULE_PARM_DESC(ib_ipath_disable_sma, "Disable the SMA");
  96. const int ib_ipath_state_ops[IB_QPS_ERR + 1] = {
  97. [IB_QPS_RESET] = 0,
  98. [IB_QPS_INIT] = IPATH_POST_RECV_OK,
  99. [IB_QPS_RTR] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
  100. [IB_QPS_RTS] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
  101. IPATH_POST_SEND_OK | IPATH_PROCESS_SEND_OK,
  102. [IB_QPS_SQD] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
  103. IPATH_POST_SEND_OK,
  104. [IB_QPS_SQE] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
  105. [IB_QPS_ERR] = 0,
  106. };
  107. struct ipath_ucontext {
  108. struct ib_ucontext ibucontext;
  109. };
  110. static inline struct ipath_ucontext *to_iucontext(struct ib_ucontext
  111. *ibucontext)
  112. {
  113. return container_of(ibucontext, struct ipath_ucontext, ibucontext);
  114. }
  115. /*
  116. * Translate ib_wr_opcode into ib_wc_opcode.
  117. */
  118. const enum ib_wc_opcode ib_ipath_wc_opcode[] = {
  119. [IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,
  120. [IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
  121. [IB_WR_SEND] = IB_WC_SEND,
  122. [IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
  123. [IB_WR_RDMA_READ] = IB_WC_RDMA_READ,
  124. [IB_WR_ATOMIC_CMP_AND_SWP] = IB_WC_COMP_SWAP,
  125. [IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD
  126. };
  127. /*
  128. * System image GUID.
  129. */
  130. static __be64 sys_image_guid;
  131. /**
  132. * ipath_copy_sge - copy data to SGE memory
  133. * @ss: the SGE state
  134. * @data: the data to copy
  135. * @length: the length of the data
  136. */
  137. void ipath_copy_sge(struct ipath_sge_state *ss, void *data, u32 length)
  138. {
  139. struct ipath_sge *sge = &ss->sge;
  140. while (length) {
  141. u32 len = sge->length;
  142. BUG_ON(len == 0);
  143. if (len > length)
  144. len = length;
  145. memcpy(sge->vaddr, data, len);
  146. sge->vaddr += len;
  147. sge->length -= len;
  148. sge->sge_length -= len;
  149. if (sge->sge_length == 0) {
  150. if (--ss->num_sge)
  151. *sge = *ss->sg_list++;
  152. } else if (sge->length == 0 && sge->mr != NULL) {
  153. if (++sge->n >= IPATH_SEGSZ) {
  154. if (++sge->m >= sge->mr->mapsz)
  155. break;
  156. sge->n = 0;
  157. }
  158. sge->vaddr =
  159. sge->mr->map[sge->m]->segs[sge->n].vaddr;
  160. sge->length =
  161. sge->mr->map[sge->m]->segs[sge->n].length;
  162. }
  163. data += len;
  164. length -= len;
  165. }
  166. }
  167. /**
  168. * ipath_skip_sge - skip over SGE memory - XXX almost dup of prev func
  169. * @ss: the SGE state
  170. * @length: the number of bytes to skip
  171. */
  172. void ipath_skip_sge(struct ipath_sge_state *ss, u32 length)
  173. {
  174. struct ipath_sge *sge = &ss->sge;
  175. while (length) {
  176. u32 len = sge->length;
  177. BUG_ON(len == 0);
  178. if (len > length)
  179. len = length;
  180. sge->vaddr += len;
  181. sge->length -= len;
  182. sge->sge_length -= len;
  183. if (sge->sge_length == 0) {
  184. if (--ss->num_sge)
  185. *sge = *ss->sg_list++;
  186. } else if (sge->length == 0 && sge->mr != NULL) {
  187. if (++sge->n >= IPATH_SEGSZ) {
  188. if (++sge->m >= sge->mr->mapsz)
  189. break;
  190. sge->n = 0;
  191. }
  192. sge->vaddr =
  193. sge->mr->map[sge->m]->segs[sge->n].vaddr;
  194. sge->length =
  195. sge->mr->map[sge->m]->segs[sge->n].length;
  196. }
  197. length -= len;
  198. }
  199. }
  200. /**
  201. * ipath_post_send - post a send on a QP
  202. * @ibqp: the QP to post the send on
  203. * @wr: the list of work requests to post
  204. * @bad_wr: the first bad WR is put here
  205. *
  206. * This may be called from interrupt context.
  207. */
  208. static int ipath_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
  209. struct ib_send_wr **bad_wr)
  210. {
  211. struct ipath_qp *qp = to_iqp(ibqp);
  212. int err = 0;
  213. /* Check that state is OK to post send. */
  214. if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_SEND_OK)) {
  215. *bad_wr = wr;
  216. err = -EINVAL;
  217. goto bail;
  218. }
  219. for (; wr; wr = wr->next) {
  220. switch (qp->ibqp.qp_type) {
  221. case IB_QPT_UC:
  222. case IB_QPT_RC:
  223. err = ipath_post_ruc_send(qp, wr);
  224. break;
  225. case IB_QPT_SMI:
  226. case IB_QPT_GSI:
  227. case IB_QPT_UD:
  228. err = ipath_post_ud_send(qp, wr);
  229. break;
  230. default:
  231. err = -EINVAL;
  232. }
  233. if (err) {
  234. *bad_wr = wr;
  235. break;
  236. }
  237. }
  238. bail:
  239. return err;
  240. }
  241. /**
  242. * ipath_post_receive - post a receive on a QP
  243. * @ibqp: the QP to post the receive on
  244. * @wr: the WR to post
  245. * @bad_wr: the first bad WR is put here
  246. *
  247. * This may be called from interrupt context.
  248. */
  249. static int ipath_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
  250. struct ib_recv_wr **bad_wr)
  251. {
  252. struct ipath_qp *qp = to_iqp(ibqp);
  253. struct ipath_rwq *wq = qp->r_rq.wq;
  254. unsigned long flags;
  255. int ret;
  256. /* Check that state is OK to post receive. */
  257. if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_RECV_OK) || !wq) {
  258. *bad_wr = wr;
  259. ret = -EINVAL;
  260. goto bail;
  261. }
  262. for (; wr; wr = wr->next) {
  263. struct ipath_rwqe *wqe;
  264. u32 next;
  265. int i;
  266. if ((unsigned) wr->num_sge > qp->r_rq.max_sge) {
  267. *bad_wr = wr;
  268. ret = -ENOMEM;
  269. goto bail;
  270. }
  271. spin_lock_irqsave(&qp->r_rq.lock, flags);
  272. next = wq->head + 1;
  273. if (next >= qp->r_rq.size)
  274. next = 0;
  275. if (next == wq->tail) {
  276. spin_unlock_irqrestore(&qp->r_rq.lock, flags);
  277. *bad_wr = wr;
  278. ret = -ENOMEM;
  279. goto bail;
  280. }
  281. wqe = get_rwqe_ptr(&qp->r_rq, wq->head);
  282. wqe->wr_id = wr->wr_id;
  283. wqe->num_sge = wr->num_sge;
  284. for (i = 0; i < wr->num_sge; i++)
  285. wqe->sg_list[i] = wr->sg_list[i];
  286. wq->head = next;
  287. spin_unlock_irqrestore(&qp->r_rq.lock, flags);
  288. }
  289. ret = 0;
  290. bail:
  291. return ret;
  292. }
  293. /**
  294. * ipath_qp_rcv - processing an incoming packet on a QP
  295. * @dev: the device the packet came on
  296. * @hdr: the packet header
  297. * @has_grh: true if the packet has a GRH
  298. * @data: the packet data
  299. * @tlen: the packet length
  300. * @qp: the QP the packet came on
  301. *
  302. * This is called from ipath_ib_rcv() to process an incoming packet
  303. * for the given QP.
  304. * Called at interrupt level.
  305. */
  306. static void ipath_qp_rcv(struct ipath_ibdev *dev,
  307. struct ipath_ib_header *hdr, int has_grh,
  308. void *data, u32 tlen, struct ipath_qp *qp)
  309. {
  310. /* Check for valid receive state. */
  311. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK)) {
  312. dev->n_pkt_drops++;
  313. return;
  314. }
  315. switch (qp->ibqp.qp_type) {
  316. case IB_QPT_SMI:
  317. case IB_QPT_GSI:
  318. if (ib_ipath_disable_sma)
  319. break;
  320. /* FALLTHROUGH */
  321. case IB_QPT_UD:
  322. ipath_ud_rcv(dev, hdr, has_grh, data, tlen, qp);
  323. break;
  324. case IB_QPT_RC:
  325. ipath_rc_rcv(dev, hdr, has_grh, data, tlen, qp);
  326. break;
  327. case IB_QPT_UC:
  328. ipath_uc_rcv(dev, hdr, has_grh, data, tlen, qp);
  329. break;
  330. default:
  331. break;
  332. }
  333. }
  334. /**
  335. * ipath_ib_rcv - process an incoming packet
  336. * @arg: the device pointer
  337. * @rhdr: the header of the packet
  338. * @data: the packet data
  339. * @tlen: the packet length
  340. *
  341. * This is called from ipath_kreceive() to process an incoming packet at
  342. * interrupt level. Tlen is the length of the header + data + CRC in bytes.
  343. */
  344. void ipath_ib_rcv(struct ipath_ibdev *dev, void *rhdr, void *data,
  345. u32 tlen)
  346. {
  347. struct ipath_ib_header *hdr = rhdr;
  348. struct ipath_other_headers *ohdr;
  349. struct ipath_qp *qp;
  350. u32 qp_num;
  351. int lnh;
  352. u8 opcode;
  353. u16 lid;
  354. if (unlikely(dev == NULL))
  355. goto bail;
  356. if (unlikely(tlen < 24)) { /* LRH+BTH+CRC */
  357. dev->rcv_errors++;
  358. goto bail;
  359. }
  360. /* Check for a valid destination LID (see ch. 7.11.1). */
  361. lid = be16_to_cpu(hdr->lrh[1]);
  362. if (lid < IPATH_MULTICAST_LID_BASE) {
  363. lid &= ~((1 << (dev->mkeyprot_resv_lmc & 7)) - 1);
  364. if (unlikely(lid != dev->dd->ipath_lid)) {
  365. dev->rcv_errors++;
  366. goto bail;
  367. }
  368. }
  369. /* Check for GRH */
  370. lnh = be16_to_cpu(hdr->lrh[0]) & 3;
  371. if (lnh == IPATH_LRH_BTH)
  372. ohdr = &hdr->u.oth;
  373. else if (lnh == IPATH_LRH_GRH)
  374. ohdr = &hdr->u.l.oth;
  375. else {
  376. dev->rcv_errors++;
  377. goto bail;
  378. }
  379. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  380. dev->opstats[opcode].n_bytes += tlen;
  381. dev->opstats[opcode].n_packets++;
  382. /* Get the destination QP number. */
  383. qp_num = be32_to_cpu(ohdr->bth[1]) & IPATH_QPN_MASK;
  384. if (qp_num == IPATH_MULTICAST_QPN) {
  385. struct ipath_mcast *mcast;
  386. struct ipath_mcast_qp *p;
  387. if (lnh != IPATH_LRH_GRH) {
  388. dev->n_pkt_drops++;
  389. goto bail;
  390. }
  391. mcast = ipath_mcast_find(&hdr->u.l.grh.dgid);
  392. if (mcast == NULL) {
  393. dev->n_pkt_drops++;
  394. goto bail;
  395. }
  396. dev->n_multicast_rcv++;
  397. list_for_each_entry_rcu(p, &mcast->qp_list, list)
  398. ipath_qp_rcv(dev, hdr, 1, data, tlen, p->qp);
  399. /*
  400. * Notify ipath_multicast_detach() if it is waiting for us
  401. * to finish.
  402. */
  403. if (atomic_dec_return(&mcast->refcount) <= 1)
  404. wake_up(&mcast->wait);
  405. } else {
  406. qp = ipath_lookup_qpn(&dev->qp_table, qp_num);
  407. if (qp) {
  408. dev->n_unicast_rcv++;
  409. ipath_qp_rcv(dev, hdr, lnh == IPATH_LRH_GRH, data,
  410. tlen, qp);
  411. /*
  412. * Notify ipath_destroy_qp() if it is waiting
  413. * for us to finish.
  414. */
  415. if (atomic_dec_and_test(&qp->refcount))
  416. wake_up(&qp->wait);
  417. } else
  418. dev->n_pkt_drops++;
  419. }
  420. bail:;
  421. }
  422. /**
  423. * ipath_ib_timer - verbs timer
  424. * @arg: the device pointer
  425. *
  426. * This is called from ipath_do_rcv_timer() at interrupt level to check for
  427. * QPs which need retransmits and to collect performance numbers.
  428. */
  429. void ipath_ib_timer(struct ipath_ibdev *dev)
  430. {
  431. struct ipath_qp *resend = NULL;
  432. struct list_head *last;
  433. struct ipath_qp *qp;
  434. unsigned long flags;
  435. if (dev == NULL)
  436. return;
  437. spin_lock_irqsave(&dev->pending_lock, flags);
  438. /* Start filling the next pending queue. */
  439. if (++dev->pending_index >= ARRAY_SIZE(dev->pending))
  440. dev->pending_index = 0;
  441. /* Save any requests still in the new queue, they have timed out. */
  442. last = &dev->pending[dev->pending_index];
  443. while (!list_empty(last)) {
  444. qp = list_entry(last->next, struct ipath_qp, timerwait);
  445. list_del_init(&qp->timerwait);
  446. qp->timer_next = resend;
  447. resend = qp;
  448. atomic_inc(&qp->refcount);
  449. }
  450. last = &dev->rnrwait;
  451. if (!list_empty(last)) {
  452. qp = list_entry(last->next, struct ipath_qp, timerwait);
  453. if (--qp->s_rnr_timeout == 0) {
  454. do {
  455. list_del_init(&qp->timerwait);
  456. tasklet_hi_schedule(&qp->s_task);
  457. if (list_empty(last))
  458. break;
  459. qp = list_entry(last->next, struct ipath_qp,
  460. timerwait);
  461. } while (qp->s_rnr_timeout == 0);
  462. }
  463. }
  464. /*
  465. * We should only be in the started state if pma_sample_start != 0
  466. */
  467. if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_STARTED &&
  468. --dev->pma_sample_start == 0) {
  469. dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_RUNNING;
  470. ipath_snapshot_counters(dev->dd, &dev->ipath_sword,
  471. &dev->ipath_rword,
  472. &dev->ipath_spkts,
  473. &dev->ipath_rpkts,
  474. &dev->ipath_xmit_wait);
  475. }
  476. if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_RUNNING) {
  477. if (dev->pma_sample_interval == 0) {
  478. u64 ta, tb, tc, td, te;
  479. dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_DONE;
  480. ipath_snapshot_counters(dev->dd, &ta, &tb,
  481. &tc, &td, &te);
  482. dev->ipath_sword = ta - dev->ipath_sword;
  483. dev->ipath_rword = tb - dev->ipath_rword;
  484. dev->ipath_spkts = tc - dev->ipath_spkts;
  485. dev->ipath_rpkts = td - dev->ipath_rpkts;
  486. dev->ipath_xmit_wait = te - dev->ipath_xmit_wait;
  487. }
  488. else
  489. dev->pma_sample_interval--;
  490. }
  491. spin_unlock_irqrestore(&dev->pending_lock, flags);
  492. /* XXX What if timer fires again while this is running? */
  493. for (qp = resend; qp != NULL; qp = qp->timer_next) {
  494. struct ib_wc wc;
  495. spin_lock_irqsave(&qp->s_lock, flags);
  496. if (qp->s_last != qp->s_tail && qp->state == IB_QPS_RTS) {
  497. dev->n_timeouts++;
  498. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  499. }
  500. spin_unlock_irqrestore(&qp->s_lock, flags);
  501. /* Notify ipath_destroy_qp() if it is waiting. */
  502. if (atomic_dec_and_test(&qp->refcount))
  503. wake_up(&qp->wait);
  504. }
  505. }
  506. static void update_sge(struct ipath_sge_state *ss, u32 length)
  507. {
  508. struct ipath_sge *sge = &ss->sge;
  509. sge->vaddr += length;
  510. sge->length -= length;
  511. sge->sge_length -= length;
  512. if (sge->sge_length == 0) {
  513. if (--ss->num_sge)
  514. *sge = *ss->sg_list++;
  515. } else if (sge->length == 0 && sge->mr != NULL) {
  516. if (++sge->n >= IPATH_SEGSZ) {
  517. if (++sge->m >= sge->mr->mapsz)
  518. return;
  519. sge->n = 0;
  520. }
  521. sge->vaddr = sge->mr->map[sge->m]->segs[sge->n].vaddr;
  522. sge->length = sge->mr->map[sge->m]->segs[sge->n].length;
  523. }
  524. }
  525. #ifdef __LITTLE_ENDIAN
  526. static inline u32 get_upper_bits(u32 data, u32 shift)
  527. {
  528. return data >> shift;
  529. }
  530. static inline u32 set_upper_bits(u32 data, u32 shift)
  531. {
  532. return data << shift;
  533. }
  534. static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
  535. {
  536. data <<= ((sizeof(u32) - n) * BITS_PER_BYTE);
  537. data >>= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
  538. return data;
  539. }
  540. #else
  541. static inline u32 get_upper_bits(u32 data, u32 shift)
  542. {
  543. return data << shift;
  544. }
  545. static inline u32 set_upper_bits(u32 data, u32 shift)
  546. {
  547. return data >> shift;
  548. }
  549. static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
  550. {
  551. data >>= ((sizeof(u32) - n) * BITS_PER_BYTE);
  552. data <<= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
  553. return data;
  554. }
  555. #endif
  556. static void copy_io(u32 __iomem *piobuf, struct ipath_sge_state *ss,
  557. u32 length)
  558. {
  559. u32 extra = 0;
  560. u32 data = 0;
  561. u32 last;
  562. while (1) {
  563. u32 len = ss->sge.length;
  564. u32 off;
  565. BUG_ON(len == 0);
  566. if (len > length)
  567. len = length;
  568. if (len > ss->sge.sge_length)
  569. len = ss->sge.sge_length;
  570. /* If the source address is not aligned, try to align it. */
  571. off = (unsigned long)ss->sge.vaddr & (sizeof(u32) - 1);
  572. if (off) {
  573. u32 *addr = (u32 *)((unsigned long)ss->sge.vaddr &
  574. ~(sizeof(u32) - 1));
  575. u32 v = get_upper_bits(*addr, off * BITS_PER_BYTE);
  576. u32 y;
  577. y = sizeof(u32) - off;
  578. if (len > y)
  579. len = y;
  580. if (len + extra >= sizeof(u32)) {
  581. data |= set_upper_bits(v, extra *
  582. BITS_PER_BYTE);
  583. len = sizeof(u32) - extra;
  584. if (len == length) {
  585. last = data;
  586. break;
  587. }
  588. __raw_writel(data, piobuf);
  589. piobuf++;
  590. extra = 0;
  591. data = 0;
  592. } else {
  593. /* Clear unused upper bytes */
  594. data |= clear_upper_bytes(v, len, extra);
  595. if (len == length) {
  596. last = data;
  597. break;
  598. }
  599. extra += len;
  600. }
  601. } else if (extra) {
  602. /* Source address is aligned. */
  603. u32 *addr = (u32 *) ss->sge.vaddr;
  604. int shift = extra * BITS_PER_BYTE;
  605. int ushift = 32 - shift;
  606. u32 l = len;
  607. while (l >= sizeof(u32)) {
  608. u32 v = *addr;
  609. data |= set_upper_bits(v, shift);
  610. __raw_writel(data, piobuf);
  611. data = get_upper_bits(v, ushift);
  612. piobuf++;
  613. addr++;
  614. l -= sizeof(u32);
  615. }
  616. /*
  617. * We still have 'extra' number of bytes leftover.
  618. */
  619. if (l) {
  620. u32 v = *addr;
  621. if (l + extra >= sizeof(u32)) {
  622. data |= set_upper_bits(v, shift);
  623. len -= l + extra - sizeof(u32);
  624. if (len == length) {
  625. last = data;
  626. break;
  627. }
  628. __raw_writel(data, piobuf);
  629. piobuf++;
  630. extra = 0;
  631. data = 0;
  632. } else {
  633. /* Clear unused upper bytes */
  634. data |= clear_upper_bytes(v, l,
  635. extra);
  636. if (len == length) {
  637. last = data;
  638. break;
  639. }
  640. extra += l;
  641. }
  642. } else if (len == length) {
  643. last = data;
  644. break;
  645. }
  646. } else if (len == length) {
  647. u32 w;
  648. /*
  649. * Need to round up for the last dword in the
  650. * packet.
  651. */
  652. w = (len + 3) >> 2;
  653. __iowrite32_copy(piobuf, ss->sge.vaddr, w - 1);
  654. piobuf += w - 1;
  655. last = ((u32 *) ss->sge.vaddr)[w - 1];
  656. break;
  657. } else {
  658. u32 w = len >> 2;
  659. __iowrite32_copy(piobuf, ss->sge.vaddr, w);
  660. piobuf += w;
  661. extra = len & (sizeof(u32) - 1);
  662. if (extra) {
  663. u32 v = ((u32 *) ss->sge.vaddr)[w];
  664. /* Clear unused upper bytes */
  665. data = clear_upper_bytes(v, extra, 0);
  666. }
  667. }
  668. update_sge(ss, len);
  669. length -= len;
  670. }
  671. /* Update address before sending packet. */
  672. update_sge(ss, length);
  673. /* must flush early everything before trigger word */
  674. ipath_flush_wc();
  675. __raw_writel(last, piobuf);
  676. /* be sure trigger word is written */
  677. ipath_flush_wc();
  678. }
  679. /**
  680. * ipath_verbs_send - send a packet
  681. * @dd: the infinipath device
  682. * @hdrwords: the number of words in the header
  683. * @hdr: the packet header
  684. * @len: the length of the packet in bytes
  685. * @ss: the SGE to send
  686. */
  687. int ipath_verbs_send(struct ipath_devdata *dd, u32 hdrwords,
  688. u32 *hdr, u32 len, struct ipath_sge_state *ss)
  689. {
  690. u32 __iomem *piobuf;
  691. u32 plen;
  692. int ret;
  693. /* +1 is for the qword padding of pbc */
  694. plen = hdrwords + ((len + 3) >> 2) + 1;
  695. if (unlikely((plen << 2) > dd->ipath_ibmaxlen)) {
  696. ret = -EINVAL;
  697. goto bail;
  698. }
  699. /* Get a PIO buffer to use. */
  700. piobuf = ipath_getpiobuf(dd, NULL);
  701. if (unlikely(piobuf == NULL)) {
  702. ret = -EBUSY;
  703. goto bail;
  704. }
  705. /*
  706. * Write len to control qword, no flags.
  707. * We have to flush after the PBC for correctness on some cpus
  708. * or WC buffer can be written out of order.
  709. */
  710. writeq(plen, piobuf);
  711. ipath_flush_wc();
  712. piobuf += 2;
  713. if (len == 0) {
  714. /*
  715. * If there is just the header portion, must flush before
  716. * writing last word of header for correctness, and after
  717. * the last header word (trigger word).
  718. */
  719. __iowrite32_copy(piobuf, hdr, hdrwords - 1);
  720. ipath_flush_wc();
  721. __raw_writel(hdr[hdrwords - 1], piobuf + hdrwords - 1);
  722. ipath_flush_wc();
  723. ret = 0;
  724. goto bail;
  725. }
  726. __iowrite32_copy(piobuf, hdr, hdrwords);
  727. piobuf += hdrwords;
  728. /* The common case is aligned and contained in one segment. */
  729. if (likely(ss->num_sge == 1 && len <= ss->sge.length &&
  730. !((unsigned long)ss->sge.vaddr & (sizeof(u32) - 1)))) {
  731. u32 w;
  732. u32 *addr = (u32 *) ss->sge.vaddr;
  733. /* Update address before sending packet. */
  734. update_sge(ss, len);
  735. /* Need to round up for the last dword in the packet. */
  736. w = (len + 3) >> 2;
  737. __iowrite32_copy(piobuf, addr, w - 1);
  738. /* must flush early everything before trigger word */
  739. ipath_flush_wc();
  740. __raw_writel(addr[w - 1], piobuf + w - 1);
  741. /* be sure trigger word is written */
  742. ipath_flush_wc();
  743. ret = 0;
  744. goto bail;
  745. }
  746. copy_io(piobuf, ss, len);
  747. ret = 0;
  748. bail:
  749. return ret;
  750. }
  751. int ipath_snapshot_counters(struct ipath_devdata *dd, u64 *swords,
  752. u64 *rwords, u64 *spkts, u64 *rpkts,
  753. u64 *xmit_wait)
  754. {
  755. int ret;
  756. if (!(dd->ipath_flags & IPATH_INITTED)) {
  757. /* no hardware, freeze, etc. */
  758. ipath_dbg("unit %u not usable\n", dd->ipath_unit);
  759. ret = -EINVAL;
  760. goto bail;
  761. }
  762. *swords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
  763. *rwords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
  764. *spkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
  765. *rpkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
  766. *xmit_wait = ipath_snap_cntr(dd, dd->ipath_cregs->cr_sendstallcnt);
  767. ret = 0;
  768. bail:
  769. return ret;
  770. }
  771. /**
  772. * ipath_get_counters - get various chip counters
  773. * @dd: the infinipath device
  774. * @cntrs: counters are placed here
  775. *
  776. * Return the counters needed by recv_pma_get_portcounters().
  777. */
  778. int ipath_get_counters(struct ipath_devdata *dd,
  779. struct ipath_verbs_counters *cntrs)
  780. {
  781. int ret;
  782. if (!(dd->ipath_flags & IPATH_INITTED)) {
  783. /* no hardware, freeze, etc. */
  784. ipath_dbg("unit %u not usable\n", dd->ipath_unit);
  785. ret = -EINVAL;
  786. goto bail;
  787. }
  788. cntrs->symbol_error_counter =
  789. ipath_snap_cntr(dd, dd->ipath_cregs->cr_ibsymbolerrcnt);
  790. cntrs->link_error_recovery_counter =
  791. ipath_snap_cntr(dd, dd->ipath_cregs->cr_iblinkerrrecovcnt);
  792. /*
  793. * The link downed counter counts when the other side downs the
  794. * connection. We add in the number of times we downed the link
  795. * due to local link integrity errors to compensate.
  796. */
  797. cntrs->link_downed_counter =
  798. ipath_snap_cntr(dd, dd->ipath_cregs->cr_iblinkdowncnt);
  799. cntrs->port_rcv_errors =
  800. ipath_snap_cntr(dd, dd->ipath_cregs->cr_rxdroppktcnt) +
  801. ipath_snap_cntr(dd, dd->ipath_cregs->cr_rcvovflcnt) +
  802. ipath_snap_cntr(dd, dd->ipath_cregs->cr_portovflcnt) +
  803. ipath_snap_cntr(dd, dd->ipath_cregs->cr_err_rlencnt) +
  804. ipath_snap_cntr(dd, dd->ipath_cregs->cr_invalidrlencnt) +
  805. ipath_snap_cntr(dd, dd->ipath_cregs->cr_erricrccnt) +
  806. ipath_snap_cntr(dd, dd->ipath_cregs->cr_errvcrccnt) +
  807. ipath_snap_cntr(dd, dd->ipath_cregs->cr_errlpcrccnt) +
  808. ipath_snap_cntr(dd, dd->ipath_cregs->cr_badformatcnt) +
  809. dd->ipath_rxfc_unsupvl_errs;
  810. cntrs->port_rcv_remphys_errors =
  811. ipath_snap_cntr(dd, dd->ipath_cregs->cr_rcvebpcnt);
  812. cntrs->port_xmit_discards =
  813. ipath_snap_cntr(dd, dd->ipath_cregs->cr_unsupvlcnt);
  814. cntrs->port_xmit_data =
  815. ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
  816. cntrs->port_rcv_data =
  817. ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
  818. cntrs->port_xmit_packets =
  819. ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
  820. cntrs->port_rcv_packets =
  821. ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
  822. cntrs->local_link_integrity_errors =
  823. (dd->ipath_flags & IPATH_GPIO_ERRINTRS) ?
  824. dd->ipath_lli_errs : dd->ipath_lli_errors;
  825. cntrs->excessive_buffer_overrun_errors = dd->ipath_overrun_thresh_errs;
  826. ret = 0;
  827. bail:
  828. return ret;
  829. }
  830. /**
  831. * ipath_ib_piobufavail - callback when a PIO buffer is available
  832. * @arg: the device pointer
  833. *
  834. * This is called from ipath_intr() at interrupt level when a PIO buffer is
  835. * available after ipath_verbs_send() returned an error that no buffers were
  836. * available. Return 1 if we consumed all the PIO buffers and we still have
  837. * QPs waiting for buffers (for now, just do a tasklet_hi_schedule and
  838. * return zero).
  839. */
  840. int ipath_ib_piobufavail(struct ipath_ibdev *dev)
  841. {
  842. struct ipath_qp *qp;
  843. unsigned long flags;
  844. if (dev == NULL)
  845. goto bail;
  846. spin_lock_irqsave(&dev->pending_lock, flags);
  847. while (!list_empty(&dev->piowait)) {
  848. qp = list_entry(dev->piowait.next, struct ipath_qp,
  849. piowait);
  850. list_del_init(&qp->piowait);
  851. tasklet_hi_schedule(&qp->s_task);
  852. }
  853. spin_unlock_irqrestore(&dev->pending_lock, flags);
  854. bail:
  855. return 0;
  856. }
  857. static int ipath_query_device(struct ib_device *ibdev,
  858. struct ib_device_attr *props)
  859. {
  860. struct ipath_ibdev *dev = to_idev(ibdev);
  861. memset(props, 0, sizeof(*props));
  862. props->device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
  863. IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
  864. IB_DEVICE_SYS_IMAGE_GUID;
  865. props->page_size_cap = PAGE_SIZE;
  866. props->vendor_id = dev->dd->ipath_vendorid;
  867. props->vendor_part_id = dev->dd->ipath_deviceid;
  868. props->hw_ver = dev->dd->ipath_pcirev;
  869. props->sys_image_guid = dev->sys_image_guid;
  870. props->max_mr_size = ~0ull;
  871. props->max_qp = ib_ipath_max_qps;
  872. props->max_qp_wr = ib_ipath_max_qp_wrs;
  873. props->max_sge = ib_ipath_max_sges;
  874. props->max_cq = ib_ipath_max_cqs;
  875. props->max_ah = ib_ipath_max_ahs;
  876. props->max_cqe = ib_ipath_max_cqes;
  877. props->max_mr = dev->lk_table.max;
  878. props->max_pd = ib_ipath_max_pds;
  879. props->max_qp_rd_atom = IPATH_MAX_RDMA_ATOMIC;
  880. props->max_qp_init_rd_atom = 255;
  881. /* props->max_res_rd_atom */
  882. props->max_srq = ib_ipath_max_srqs;
  883. props->max_srq_wr = ib_ipath_max_srq_wrs;
  884. props->max_srq_sge = ib_ipath_max_srq_sges;
  885. /* props->local_ca_ack_delay */
  886. props->atomic_cap = IB_ATOMIC_GLOB;
  887. props->max_pkeys = ipath_get_npkeys(dev->dd);
  888. props->max_mcast_grp = ib_ipath_max_mcast_grps;
  889. props->max_mcast_qp_attach = ib_ipath_max_mcast_qp_attached;
  890. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  891. props->max_mcast_grp;
  892. return 0;
  893. }
  894. const u8 ipath_cvt_physportstate[16] = {
  895. [INFINIPATH_IBCS_LT_STATE_DISABLED] = 3,
  896. [INFINIPATH_IBCS_LT_STATE_LINKUP] = 5,
  897. [INFINIPATH_IBCS_LT_STATE_POLLACTIVE] = 2,
  898. [INFINIPATH_IBCS_LT_STATE_POLLQUIET] = 2,
  899. [INFINIPATH_IBCS_LT_STATE_SLEEPDELAY] = 1,
  900. [INFINIPATH_IBCS_LT_STATE_SLEEPQUIET] = 1,
  901. [INFINIPATH_IBCS_LT_STATE_CFGDEBOUNCE] = 4,
  902. [INFINIPATH_IBCS_LT_STATE_CFGRCVFCFG] = 4,
  903. [INFINIPATH_IBCS_LT_STATE_CFGWAITRMT] = 4,
  904. [INFINIPATH_IBCS_LT_STATE_CFGIDLE] = 4,
  905. [INFINIPATH_IBCS_LT_STATE_RECOVERRETRAIN] = 6,
  906. [INFINIPATH_IBCS_LT_STATE_RECOVERWAITRMT] = 6,
  907. [INFINIPATH_IBCS_LT_STATE_RECOVERIDLE] = 6,
  908. };
  909. u32 ipath_get_cr_errpkey(struct ipath_devdata *dd)
  910. {
  911. return ipath_read_creg32(dd, dd->ipath_cregs->cr_errpkey);
  912. }
  913. static int ipath_query_port(struct ib_device *ibdev,
  914. u8 port, struct ib_port_attr *props)
  915. {
  916. struct ipath_ibdev *dev = to_idev(ibdev);
  917. enum ib_mtu mtu;
  918. u16 lid = dev->dd->ipath_lid;
  919. u64 ibcstat;
  920. memset(props, 0, sizeof(*props));
  921. props->lid = lid ? lid : __constant_be16_to_cpu(IB_LID_PERMISSIVE);
  922. props->lmc = dev->mkeyprot_resv_lmc & 7;
  923. props->sm_lid = dev->sm_lid;
  924. props->sm_sl = dev->sm_sl;
  925. ibcstat = dev->dd->ipath_lastibcstat;
  926. props->state = ((ibcstat >> 4) & 0x3) + 1;
  927. /* See phys_state_show() */
  928. props->phys_state = ipath_cvt_physportstate[
  929. dev->dd->ipath_lastibcstat & 0xf];
  930. props->port_cap_flags = dev->port_cap_flags;
  931. props->gid_tbl_len = 1;
  932. props->max_msg_sz = 0x80000000;
  933. props->pkey_tbl_len = ipath_get_npkeys(dev->dd);
  934. props->bad_pkey_cntr = ipath_get_cr_errpkey(dev->dd) -
  935. dev->z_pkey_violations;
  936. props->qkey_viol_cntr = dev->qkey_violations;
  937. props->active_width = IB_WIDTH_4X;
  938. /* See rate_show() */
  939. props->active_speed = 1; /* Regular 10Mbs speed. */
  940. props->max_vl_num = 1; /* VLCap = VL0 */
  941. props->init_type_reply = 0;
  942. props->max_mtu = IB_MTU_4096;
  943. switch (dev->dd->ipath_ibmtu) {
  944. case 4096:
  945. mtu = IB_MTU_4096;
  946. break;
  947. case 2048:
  948. mtu = IB_MTU_2048;
  949. break;
  950. case 1024:
  951. mtu = IB_MTU_1024;
  952. break;
  953. case 512:
  954. mtu = IB_MTU_512;
  955. break;
  956. case 256:
  957. mtu = IB_MTU_256;
  958. break;
  959. default:
  960. mtu = IB_MTU_2048;
  961. }
  962. props->active_mtu = mtu;
  963. props->subnet_timeout = dev->subnet_timeout;
  964. return 0;
  965. }
  966. static int ipath_modify_device(struct ib_device *device,
  967. int device_modify_mask,
  968. struct ib_device_modify *device_modify)
  969. {
  970. int ret;
  971. if (device_modify_mask & ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID |
  972. IB_DEVICE_MODIFY_NODE_DESC)) {
  973. ret = -EOPNOTSUPP;
  974. goto bail;
  975. }
  976. if (device_modify_mask & IB_DEVICE_MODIFY_NODE_DESC)
  977. memcpy(device->node_desc, device_modify->node_desc, 64);
  978. if (device_modify_mask & IB_DEVICE_MODIFY_SYS_IMAGE_GUID)
  979. to_idev(device)->sys_image_guid =
  980. cpu_to_be64(device_modify->sys_image_guid);
  981. ret = 0;
  982. bail:
  983. return ret;
  984. }
  985. static int ipath_modify_port(struct ib_device *ibdev,
  986. u8 port, int port_modify_mask,
  987. struct ib_port_modify *props)
  988. {
  989. struct ipath_ibdev *dev = to_idev(ibdev);
  990. dev->port_cap_flags |= props->set_port_cap_mask;
  991. dev->port_cap_flags &= ~props->clr_port_cap_mask;
  992. if (port_modify_mask & IB_PORT_SHUTDOWN)
  993. ipath_set_linkstate(dev->dd, IPATH_IB_LINKDOWN);
  994. if (port_modify_mask & IB_PORT_RESET_QKEY_CNTR)
  995. dev->qkey_violations = 0;
  996. return 0;
  997. }
  998. static int ipath_query_gid(struct ib_device *ibdev, u8 port,
  999. int index, union ib_gid *gid)
  1000. {
  1001. struct ipath_ibdev *dev = to_idev(ibdev);
  1002. int ret;
  1003. if (index >= 1) {
  1004. ret = -EINVAL;
  1005. goto bail;
  1006. }
  1007. gid->global.subnet_prefix = dev->gid_prefix;
  1008. gid->global.interface_id = dev->dd->ipath_guid;
  1009. ret = 0;
  1010. bail:
  1011. return ret;
  1012. }
  1013. static struct ib_pd *ipath_alloc_pd(struct ib_device *ibdev,
  1014. struct ib_ucontext *context,
  1015. struct ib_udata *udata)
  1016. {
  1017. struct ipath_ibdev *dev = to_idev(ibdev);
  1018. struct ipath_pd *pd;
  1019. struct ib_pd *ret;
  1020. /*
  1021. * This is actually totally arbitrary. Some correctness tests
  1022. * assume there's a maximum number of PDs that can be allocated.
  1023. * We don't actually have this limit, but we fail the test if
  1024. * we allow allocations of more than we report for this value.
  1025. */
  1026. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  1027. if (!pd) {
  1028. ret = ERR_PTR(-ENOMEM);
  1029. goto bail;
  1030. }
  1031. spin_lock(&dev->n_pds_lock);
  1032. if (dev->n_pds_allocated == ib_ipath_max_pds) {
  1033. spin_unlock(&dev->n_pds_lock);
  1034. kfree(pd);
  1035. ret = ERR_PTR(-ENOMEM);
  1036. goto bail;
  1037. }
  1038. dev->n_pds_allocated++;
  1039. spin_unlock(&dev->n_pds_lock);
  1040. /* ib_alloc_pd() will initialize pd->ibpd. */
  1041. pd->user = udata != NULL;
  1042. ret = &pd->ibpd;
  1043. bail:
  1044. return ret;
  1045. }
  1046. static int ipath_dealloc_pd(struct ib_pd *ibpd)
  1047. {
  1048. struct ipath_pd *pd = to_ipd(ibpd);
  1049. struct ipath_ibdev *dev = to_idev(ibpd->device);
  1050. spin_lock(&dev->n_pds_lock);
  1051. dev->n_pds_allocated--;
  1052. spin_unlock(&dev->n_pds_lock);
  1053. kfree(pd);
  1054. return 0;
  1055. }
  1056. /**
  1057. * ipath_create_ah - create an address handle
  1058. * @pd: the protection domain
  1059. * @ah_attr: the attributes of the AH
  1060. *
  1061. * This may be called from interrupt context.
  1062. */
  1063. static struct ib_ah *ipath_create_ah(struct ib_pd *pd,
  1064. struct ib_ah_attr *ah_attr)
  1065. {
  1066. struct ipath_ah *ah;
  1067. struct ib_ah *ret;
  1068. struct ipath_ibdev *dev = to_idev(pd->device);
  1069. unsigned long flags;
  1070. /* A multicast address requires a GRH (see ch. 8.4.1). */
  1071. if (ah_attr->dlid >= IPATH_MULTICAST_LID_BASE &&
  1072. ah_attr->dlid != IPATH_PERMISSIVE_LID &&
  1073. !(ah_attr->ah_flags & IB_AH_GRH)) {
  1074. ret = ERR_PTR(-EINVAL);
  1075. goto bail;
  1076. }
  1077. if (ah_attr->dlid == 0) {
  1078. ret = ERR_PTR(-EINVAL);
  1079. goto bail;
  1080. }
  1081. if (ah_attr->port_num < 1 ||
  1082. ah_attr->port_num > pd->device->phys_port_cnt) {
  1083. ret = ERR_PTR(-EINVAL);
  1084. goto bail;
  1085. }
  1086. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  1087. if (!ah) {
  1088. ret = ERR_PTR(-ENOMEM);
  1089. goto bail;
  1090. }
  1091. spin_lock_irqsave(&dev->n_ahs_lock, flags);
  1092. if (dev->n_ahs_allocated == ib_ipath_max_ahs) {
  1093. spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
  1094. kfree(ah);
  1095. ret = ERR_PTR(-ENOMEM);
  1096. goto bail;
  1097. }
  1098. dev->n_ahs_allocated++;
  1099. spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
  1100. /* ib_create_ah() will initialize ah->ibah. */
  1101. ah->attr = *ah_attr;
  1102. ret = &ah->ibah;
  1103. bail:
  1104. return ret;
  1105. }
  1106. /**
  1107. * ipath_destroy_ah - destroy an address handle
  1108. * @ibah: the AH to destroy
  1109. *
  1110. * This may be called from interrupt context.
  1111. */
  1112. static int ipath_destroy_ah(struct ib_ah *ibah)
  1113. {
  1114. struct ipath_ibdev *dev = to_idev(ibah->device);
  1115. struct ipath_ah *ah = to_iah(ibah);
  1116. unsigned long flags;
  1117. spin_lock_irqsave(&dev->n_ahs_lock, flags);
  1118. dev->n_ahs_allocated--;
  1119. spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
  1120. kfree(ah);
  1121. return 0;
  1122. }
  1123. static int ipath_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr)
  1124. {
  1125. struct ipath_ah *ah = to_iah(ibah);
  1126. *ah_attr = ah->attr;
  1127. return 0;
  1128. }
  1129. /**
  1130. * ipath_get_npkeys - return the size of the PKEY table for port 0
  1131. * @dd: the infinipath device
  1132. */
  1133. unsigned ipath_get_npkeys(struct ipath_devdata *dd)
  1134. {
  1135. return ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys);
  1136. }
  1137. /**
  1138. * ipath_get_pkey - return the indexed PKEY from the port 0 PKEY table
  1139. * @dd: the infinipath device
  1140. * @index: the PKEY index
  1141. */
  1142. unsigned ipath_get_pkey(struct ipath_devdata *dd, unsigned index)
  1143. {
  1144. unsigned ret;
  1145. if (index >= ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys))
  1146. ret = 0;
  1147. else
  1148. ret = dd->ipath_pd[0]->port_pkeys[index];
  1149. return ret;
  1150. }
  1151. static int ipath_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
  1152. u16 *pkey)
  1153. {
  1154. struct ipath_ibdev *dev = to_idev(ibdev);
  1155. int ret;
  1156. if (index >= ipath_get_npkeys(dev->dd)) {
  1157. ret = -EINVAL;
  1158. goto bail;
  1159. }
  1160. *pkey = ipath_get_pkey(dev->dd, index);
  1161. ret = 0;
  1162. bail:
  1163. return ret;
  1164. }
  1165. /**
  1166. * ipath_alloc_ucontext - allocate a ucontest
  1167. * @ibdev: the infiniband device
  1168. * @udata: not used by the InfiniPath driver
  1169. */
  1170. static struct ib_ucontext *ipath_alloc_ucontext(struct ib_device *ibdev,
  1171. struct ib_udata *udata)
  1172. {
  1173. struct ipath_ucontext *context;
  1174. struct ib_ucontext *ret;
  1175. context = kmalloc(sizeof *context, GFP_KERNEL);
  1176. if (!context) {
  1177. ret = ERR_PTR(-ENOMEM);
  1178. goto bail;
  1179. }
  1180. ret = &context->ibucontext;
  1181. bail:
  1182. return ret;
  1183. }
  1184. static int ipath_dealloc_ucontext(struct ib_ucontext *context)
  1185. {
  1186. kfree(to_iucontext(context));
  1187. return 0;
  1188. }
  1189. static int ipath_verbs_register_sysfs(struct ib_device *dev);
  1190. static void __verbs_timer(unsigned long arg)
  1191. {
  1192. struct ipath_devdata *dd = (struct ipath_devdata *) arg;
  1193. /*
  1194. * If port 0 receive packet interrupts are not available, or
  1195. * can be missed, poll the receive queue
  1196. */
  1197. if (dd->ipath_flags & IPATH_POLL_RX_INTR)
  1198. ipath_kreceive(dd);
  1199. /* Handle verbs layer timeouts. */
  1200. ipath_ib_timer(dd->verbs_dev);
  1201. mod_timer(&dd->verbs_timer, jiffies + 1);
  1202. }
  1203. static int enable_timer(struct ipath_devdata *dd)
  1204. {
  1205. /*
  1206. * Early chips had a design flaw where the chip and kernel idea
  1207. * of the tail register don't always agree, and therefore we won't
  1208. * get an interrupt on the next packet received.
  1209. * If the board supports per packet receive interrupts, use it.
  1210. * Otherwise, the timer function periodically checks for packets
  1211. * to cover this case.
  1212. * Either way, the timer is needed for verbs layer related
  1213. * processing.
  1214. */
  1215. if (dd->ipath_flags & IPATH_GPIO_INTR) {
  1216. ipath_write_kreg(dd, dd->ipath_kregs->kr_debugportselect,
  1217. 0x2074076542310ULL);
  1218. /* Enable GPIO bit 2 interrupt */
  1219. dd->ipath_gpio_mask |= (u64) (1 << IPATH_GPIO_PORT0_BIT);
  1220. ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
  1221. dd->ipath_gpio_mask);
  1222. }
  1223. init_timer(&dd->verbs_timer);
  1224. dd->verbs_timer.function = __verbs_timer;
  1225. dd->verbs_timer.data = (unsigned long)dd;
  1226. dd->verbs_timer.expires = jiffies + 1;
  1227. add_timer(&dd->verbs_timer);
  1228. return 0;
  1229. }
  1230. static int disable_timer(struct ipath_devdata *dd)
  1231. {
  1232. /* Disable GPIO bit 2 interrupt */
  1233. if (dd->ipath_flags & IPATH_GPIO_INTR) {
  1234. u64 val;
  1235. /* Disable GPIO bit 2 interrupt */
  1236. val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_gpio_mask);
  1237. dd->ipath_gpio_mask &= ~((u64) (1 << IPATH_GPIO_PORT0_BIT));
  1238. ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
  1239. dd->ipath_gpio_mask);
  1240. /*
  1241. * We might want to undo changes to debugportselect,
  1242. * but how?
  1243. */
  1244. }
  1245. del_timer_sync(&dd->verbs_timer);
  1246. return 0;
  1247. }
  1248. /**
  1249. * ipath_register_ib_device - register our device with the infiniband core
  1250. * @dd: the device data structure
  1251. * Return the allocated ipath_ibdev pointer or NULL on error.
  1252. */
  1253. int ipath_register_ib_device(struct ipath_devdata *dd)
  1254. {
  1255. struct ipath_verbs_counters cntrs;
  1256. struct ipath_ibdev *idev;
  1257. struct ib_device *dev;
  1258. int ret;
  1259. idev = (struct ipath_ibdev *)ib_alloc_device(sizeof *idev);
  1260. if (idev == NULL) {
  1261. ret = -ENOMEM;
  1262. goto bail;
  1263. }
  1264. dev = &idev->ibdev;
  1265. /* Only need to initialize non-zero fields. */
  1266. spin_lock_init(&idev->n_pds_lock);
  1267. spin_lock_init(&idev->n_ahs_lock);
  1268. spin_lock_init(&idev->n_cqs_lock);
  1269. spin_lock_init(&idev->n_qps_lock);
  1270. spin_lock_init(&idev->n_srqs_lock);
  1271. spin_lock_init(&idev->n_mcast_grps_lock);
  1272. spin_lock_init(&idev->qp_table.lock);
  1273. spin_lock_init(&idev->lk_table.lock);
  1274. idev->sm_lid = __constant_be16_to_cpu(IB_LID_PERMISSIVE);
  1275. /* Set the prefix to the default value (see ch. 4.1.1) */
  1276. idev->gid_prefix = __constant_cpu_to_be64(0xfe80000000000000ULL);
  1277. ret = ipath_init_qp_table(idev, ib_ipath_qp_table_size);
  1278. if (ret)
  1279. goto err_qp;
  1280. /*
  1281. * The top ib_ipath_lkey_table_size bits are used to index the
  1282. * table. The lower 8 bits can be owned by the user (copied from
  1283. * the LKEY). The remaining bits act as a generation number or tag.
  1284. */
  1285. idev->lk_table.max = 1 << ib_ipath_lkey_table_size;
  1286. idev->lk_table.table = kzalloc(idev->lk_table.max *
  1287. sizeof(*idev->lk_table.table),
  1288. GFP_KERNEL);
  1289. if (idev->lk_table.table == NULL) {
  1290. ret = -ENOMEM;
  1291. goto err_lk;
  1292. }
  1293. INIT_LIST_HEAD(&idev->pending_mmaps);
  1294. spin_lock_init(&idev->pending_lock);
  1295. idev->mmap_offset = PAGE_SIZE;
  1296. spin_lock_init(&idev->mmap_offset_lock);
  1297. INIT_LIST_HEAD(&idev->pending[0]);
  1298. INIT_LIST_HEAD(&idev->pending[1]);
  1299. INIT_LIST_HEAD(&idev->pending[2]);
  1300. INIT_LIST_HEAD(&idev->piowait);
  1301. INIT_LIST_HEAD(&idev->rnrwait);
  1302. idev->pending_index = 0;
  1303. idev->port_cap_flags =
  1304. IB_PORT_SYS_IMAGE_GUID_SUP | IB_PORT_CLIENT_REG_SUP;
  1305. idev->pma_counter_select[0] = IB_PMA_PORT_XMIT_DATA;
  1306. idev->pma_counter_select[1] = IB_PMA_PORT_RCV_DATA;
  1307. idev->pma_counter_select[2] = IB_PMA_PORT_XMIT_PKTS;
  1308. idev->pma_counter_select[3] = IB_PMA_PORT_RCV_PKTS;
  1309. idev->pma_counter_select[4] = IB_PMA_PORT_XMIT_WAIT;
  1310. idev->link_width_enabled = 3; /* 1x or 4x */
  1311. /* Snapshot current HW counters to "clear" them. */
  1312. ipath_get_counters(dd, &cntrs);
  1313. idev->z_symbol_error_counter = cntrs.symbol_error_counter;
  1314. idev->z_link_error_recovery_counter =
  1315. cntrs.link_error_recovery_counter;
  1316. idev->z_link_downed_counter = cntrs.link_downed_counter;
  1317. idev->z_port_rcv_errors = cntrs.port_rcv_errors;
  1318. idev->z_port_rcv_remphys_errors =
  1319. cntrs.port_rcv_remphys_errors;
  1320. idev->z_port_xmit_discards = cntrs.port_xmit_discards;
  1321. idev->z_port_xmit_data = cntrs.port_xmit_data;
  1322. idev->z_port_rcv_data = cntrs.port_rcv_data;
  1323. idev->z_port_xmit_packets = cntrs.port_xmit_packets;
  1324. idev->z_port_rcv_packets = cntrs.port_rcv_packets;
  1325. idev->z_local_link_integrity_errors =
  1326. cntrs.local_link_integrity_errors;
  1327. idev->z_excessive_buffer_overrun_errors =
  1328. cntrs.excessive_buffer_overrun_errors;
  1329. /*
  1330. * The system image GUID is supposed to be the same for all
  1331. * IB HCAs in a single system but since there can be other
  1332. * device types in the system, we can't be sure this is unique.
  1333. */
  1334. if (!sys_image_guid)
  1335. sys_image_guid = dd->ipath_guid;
  1336. idev->sys_image_guid = sys_image_guid;
  1337. idev->ib_unit = dd->ipath_unit;
  1338. idev->dd = dd;
  1339. strlcpy(dev->name, "ipath%d", IB_DEVICE_NAME_MAX);
  1340. dev->owner = THIS_MODULE;
  1341. dev->node_guid = dd->ipath_guid;
  1342. dev->uverbs_abi_ver = IPATH_UVERBS_ABI_VERSION;
  1343. dev->uverbs_cmd_mask =
  1344. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  1345. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  1346. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  1347. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  1348. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  1349. (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
  1350. (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
  1351. (1ull << IB_USER_VERBS_CMD_QUERY_AH) |
  1352. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  1353. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  1354. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  1355. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  1356. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  1357. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  1358. (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
  1359. (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
  1360. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  1361. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  1362. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  1363. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  1364. (1ull << IB_USER_VERBS_CMD_POST_SEND) |
  1365. (1ull << IB_USER_VERBS_CMD_POST_RECV) |
  1366. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  1367. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
  1368. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  1369. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  1370. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  1371. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  1372. (1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
  1373. dev->node_type = RDMA_NODE_IB_CA;
  1374. dev->phys_port_cnt = 1;
  1375. dev->num_comp_vectors = 1;
  1376. dev->dma_device = &dd->pcidev->dev;
  1377. dev->query_device = ipath_query_device;
  1378. dev->modify_device = ipath_modify_device;
  1379. dev->query_port = ipath_query_port;
  1380. dev->modify_port = ipath_modify_port;
  1381. dev->query_pkey = ipath_query_pkey;
  1382. dev->query_gid = ipath_query_gid;
  1383. dev->alloc_ucontext = ipath_alloc_ucontext;
  1384. dev->dealloc_ucontext = ipath_dealloc_ucontext;
  1385. dev->alloc_pd = ipath_alloc_pd;
  1386. dev->dealloc_pd = ipath_dealloc_pd;
  1387. dev->create_ah = ipath_create_ah;
  1388. dev->destroy_ah = ipath_destroy_ah;
  1389. dev->query_ah = ipath_query_ah;
  1390. dev->create_srq = ipath_create_srq;
  1391. dev->modify_srq = ipath_modify_srq;
  1392. dev->query_srq = ipath_query_srq;
  1393. dev->destroy_srq = ipath_destroy_srq;
  1394. dev->create_qp = ipath_create_qp;
  1395. dev->modify_qp = ipath_modify_qp;
  1396. dev->query_qp = ipath_query_qp;
  1397. dev->destroy_qp = ipath_destroy_qp;
  1398. dev->post_send = ipath_post_send;
  1399. dev->post_recv = ipath_post_receive;
  1400. dev->post_srq_recv = ipath_post_srq_receive;
  1401. dev->create_cq = ipath_create_cq;
  1402. dev->destroy_cq = ipath_destroy_cq;
  1403. dev->resize_cq = ipath_resize_cq;
  1404. dev->poll_cq = ipath_poll_cq;
  1405. dev->req_notify_cq = ipath_req_notify_cq;
  1406. dev->get_dma_mr = ipath_get_dma_mr;
  1407. dev->reg_phys_mr = ipath_reg_phys_mr;
  1408. dev->reg_user_mr = ipath_reg_user_mr;
  1409. dev->dereg_mr = ipath_dereg_mr;
  1410. dev->alloc_fmr = ipath_alloc_fmr;
  1411. dev->map_phys_fmr = ipath_map_phys_fmr;
  1412. dev->unmap_fmr = ipath_unmap_fmr;
  1413. dev->dealloc_fmr = ipath_dealloc_fmr;
  1414. dev->attach_mcast = ipath_multicast_attach;
  1415. dev->detach_mcast = ipath_multicast_detach;
  1416. dev->process_mad = ipath_process_mad;
  1417. dev->mmap = ipath_mmap;
  1418. dev->dma_ops = &ipath_dma_mapping_ops;
  1419. snprintf(dev->node_desc, sizeof(dev->node_desc),
  1420. IPATH_IDSTR " %s", init_utsname()->nodename);
  1421. ret = ib_register_device(dev);
  1422. if (ret)
  1423. goto err_reg;
  1424. if (ipath_verbs_register_sysfs(dev))
  1425. goto err_class;
  1426. enable_timer(dd);
  1427. goto bail;
  1428. err_class:
  1429. ib_unregister_device(dev);
  1430. err_reg:
  1431. kfree(idev->lk_table.table);
  1432. err_lk:
  1433. kfree(idev->qp_table.table);
  1434. err_qp:
  1435. ib_dealloc_device(dev);
  1436. ipath_dev_err(dd, "cannot register verbs: %d!\n", -ret);
  1437. idev = NULL;
  1438. bail:
  1439. dd->verbs_dev = idev;
  1440. return ret;
  1441. }
  1442. void ipath_unregister_ib_device(struct ipath_ibdev *dev)
  1443. {
  1444. struct ib_device *ibdev = &dev->ibdev;
  1445. disable_timer(dev->dd);
  1446. ib_unregister_device(ibdev);
  1447. if (!list_empty(&dev->pending[0]) ||
  1448. !list_empty(&dev->pending[1]) ||
  1449. !list_empty(&dev->pending[2]))
  1450. ipath_dev_err(dev->dd, "pending list not empty!\n");
  1451. if (!list_empty(&dev->piowait))
  1452. ipath_dev_err(dev->dd, "piowait list not empty!\n");
  1453. if (!list_empty(&dev->rnrwait))
  1454. ipath_dev_err(dev->dd, "rnrwait list not empty!\n");
  1455. if (!ipath_mcast_tree_empty())
  1456. ipath_dev_err(dev->dd, "multicast table memory leak!\n");
  1457. /*
  1458. * Note that ipath_unregister_ib_device() can be called before all
  1459. * the QPs are destroyed!
  1460. */
  1461. ipath_free_all_qps(&dev->qp_table);
  1462. kfree(dev->qp_table.table);
  1463. kfree(dev->lk_table.table);
  1464. ib_dealloc_device(ibdev);
  1465. }
  1466. static ssize_t show_rev(struct class_device *cdev, char *buf)
  1467. {
  1468. struct ipath_ibdev *dev =
  1469. container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
  1470. return sprintf(buf, "%x\n", dev->dd->ipath_pcirev);
  1471. }
  1472. static ssize_t show_hca(struct class_device *cdev, char *buf)
  1473. {
  1474. struct ipath_ibdev *dev =
  1475. container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
  1476. int ret;
  1477. ret = dev->dd->ipath_f_get_boardname(dev->dd, buf, 128);
  1478. if (ret < 0)
  1479. goto bail;
  1480. strcat(buf, "\n");
  1481. ret = strlen(buf);
  1482. bail:
  1483. return ret;
  1484. }
  1485. static ssize_t show_stats(struct class_device *cdev, char *buf)
  1486. {
  1487. struct ipath_ibdev *dev =
  1488. container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
  1489. int i;
  1490. int len;
  1491. len = sprintf(buf,
  1492. "RC resends %d\n"
  1493. "RC no QACK %d\n"
  1494. "RC ACKs %d\n"
  1495. "RC SEQ NAKs %d\n"
  1496. "RC RDMA seq %d\n"
  1497. "RC RNR NAKs %d\n"
  1498. "RC OTH NAKs %d\n"
  1499. "RC timeouts %d\n"
  1500. "RC RDMA dup %d\n"
  1501. "RC stalls %d\n"
  1502. "piobuf wait %d\n"
  1503. "no piobuf %d\n"
  1504. "PKT drops %d\n"
  1505. "WQE errs %d\n",
  1506. dev->n_rc_resends, dev->n_rc_qacks, dev->n_rc_acks,
  1507. dev->n_seq_naks, dev->n_rdma_seq, dev->n_rnr_naks,
  1508. dev->n_other_naks, dev->n_timeouts,
  1509. dev->n_rdma_dup_busy, dev->n_rc_stalls, dev->n_piowait,
  1510. dev->n_no_piobuf, dev->n_pkt_drops, dev->n_wqe_errs);
  1511. for (i = 0; i < ARRAY_SIZE(dev->opstats); i++) {
  1512. const struct ipath_opcode_stats *si = &dev->opstats[i];
  1513. if (!si->n_packets && !si->n_bytes)
  1514. continue;
  1515. len += sprintf(buf + len, "%02x %llu/%llu\n", i,
  1516. (unsigned long long) si->n_packets,
  1517. (unsigned long long) si->n_bytes);
  1518. }
  1519. return len;
  1520. }
  1521. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  1522. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  1523. static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_hca, NULL);
  1524. static CLASS_DEVICE_ATTR(stats, S_IRUGO, show_stats, NULL);
  1525. static struct class_device_attribute *ipath_class_attributes[] = {
  1526. &class_device_attr_hw_rev,
  1527. &class_device_attr_hca_type,
  1528. &class_device_attr_board_id,
  1529. &class_device_attr_stats
  1530. };
  1531. static int ipath_verbs_register_sysfs(struct ib_device *dev)
  1532. {
  1533. int i;
  1534. int ret;
  1535. for (i = 0; i < ARRAY_SIZE(ipath_class_attributes); ++i)
  1536. if (class_device_create_file(&dev->class_dev,
  1537. ipath_class_attributes[i])) {
  1538. ret = 1;
  1539. goto bail;
  1540. }
  1541. ret = 0;
  1542. bail:
  1543. return ret;
  1544. }