iwch_provider.h 9.2 KB

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  1. /*
  2. * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #ifndef __IWCH_PROVIDER_H__
  33. #define __IWCH_PROVIDER_H__
  34. #include <linux/list.h>
  35. #include <linux/spinlock.h>
  36. #include <rdma/ib_verbs.h>
  37. #include <asm/types.h>
  38. #include "t3cdev.h"
  39. #include "iwch.h"
  40. #include "cxio_wr.h"
  41. #include "cxio_hal.h"
  42. struct iwch_pd {
  43. struct ib_pd ibpd;
  44. u32 pdid;
  45. struct iwch_dev *rhp;
  46. };
  47. static inline struct iwch_pd *to_iwch_pd(struct ib_pd *ibpd)
  48. {
  49. return container_of(ibpd, struct iwch_pd, ibpd);
  50. }
  51. struct tpt_attributes {
  52. u32 stag;
  53. u32 state:1;
  54. u32 type:2;
  55. u32 rsvd:1;
  56. enum tpt_mem_perm perms;
  57. u32 remote_invaliate_disable:1;
  58. u32 zbva:1;
  59. u32 mw_bind_enable:1;
  60. u32 page_size:5;
  61. u32 pdid;
  62. u32 qpid;
  63. u32 pbl_addr;
  64. u32 len;
  65. u64 va_fbo;
  66. u32 pbl_size;
  67. };
  68. struct iwch_mr {
  69. struct ib_mr ibmr;
  70. struct ib_umem *umem;
  71. struct iwch_dev *rhp;
  72. u64 kva;
  73. struct tpt_attributes attr;
  74. };
  75. typedef struct iwch_mw iwch_mw_handle;
  76. static inline struct iwch_mr *to_iwch_mr(struct ib_mr *ibmr)
  77. {
  78. return container_of(ibmr, struct iwch_mr, ibmr);
  79. }
  80. struct iwch_mw {
  81. struct ib_mw ibmw;
  82. struct iwch_dev *rhp;
  83. u64 kva;
  84. struct tpt_attributes attr;
  85. };
  86. static inline struct iwch_mw *to_iwch_mw(struct ib_mw *ibmw)
  87. {
  88. return container_of(ibmw, struct iwch_mw, ibmw);
  89. }
  90. struct iwch_cq {
  91. struct ib_cq ibcq;
  92. struct iwch_dev *rhp;
  93. struct t3_cq cq;
  94. spinlock_t lock;
  95. atomic_t refcnt;
  96. wait_queue_head_t wait;
  97. u32 __user *user_rptr_addr;
  98. };
  99. static inline struct iwch_cq *to_iwch_cq(struct ib_cq *ibcq)
  100. {
  101. return container_of(ibcq, struct iwch_cq, ibcq);
  102. }
  103. enum IWCH_QP_FLAGS {
  104. QP_QUIESCED = 0x01
  105. };
  106. struct iwch_mpa_attributes {
  107. u8 recv_marker_enabled;
  108. u8 xmit_marker_enabled; /* iWARP: enable inbound Read Resp. */
  109. u8 crc_enabled;
  110. u8 version; /* 0 or 1 */
  111. };
  112. struct iwch_qp_attributes {
  113. u32 scq;
  114. u32 rcq;
  115. u32 sq_num_entries;
  116. u32 rq_num_entries;
  117. u32 sq_max_sges;
  118. u32 sq_max_sges_rdma_write;
  119. u32 rq_max_sges;
  120. u32 state;
  121. u8 enable_rdma_read;
  122. u8 enable_rdma_write; /* enable inbound Read Resp. */
  123. u8 enable_bind;
  124. u8 enable_mmid0_fastreg; /* Enable STAG0 + Fast-register */
  125. /*
  126. * Next QP state. If specify the current state, only the
  127. * QP attributes will be modified.
  128. */
  129. u32 max_ord;
  130. u32 max_ird;
  131. u32 pd; /* IN */
  132. u32 next_state;
  133. char terminate_buffer[52];
  134. u32 terminate_msg_len;
  135. u8 is_terminate_local;
  136. struct iwch_mpa_attributes mpa_attr; /* IN-OUT */
  137. struct iwch_ep *llp_stream_handle;
  138. char *stream_msg_buf; /* Last stream msg. before Idle -> RTS */
  139. u32 stream_msg_buf_len; /* Only on Idle -> RTS */
  140. };
  141. struct iwch_qp {
  142. struct ib_qp ibqp;
  143. struct iwch_dev *rhp;
  144. struct iwch_ep *ep;
  145. struct iwch_qp_attributes attr;
  146. struct t3_wq wq;
  147. spinlock_t lock;
  148. atomic_t refcnt;
  149. wait_queue_head_t wait;
  150. enum IWCH_QP_FLAGS flags;
  151. struct timer_list timer;
  152. };
  153. static inline int qp_quiesced(struct iwch_qp *qhp)
  154. {
  155. return qhp->flags & QP_QUIESCED;
  156. }
  157. static inline struct iwch_qp *to_iwch_qp(struct ib_qp *ibqp)
  158. {
  159. return container_of(ibqp, struct iwch_qp, ibqp);
  160. }
  161. void iwch_qp_add_ref(struct ib_qp *qp);
  162. void iwch_qp_rem_ref(struct ib_qp *qp);
  163. struct iwch_ucontext {
  164. struct ib_ucontext ibucontext;
  165. struct cxio_ucontext uctx;
  166. u32 key;
  167. spinlock_t mmap_lock;
  168. struct list_head mmaps;
  169. };
  170. static inline struct iwch_ucontext *to_iwch_ucontext(struct ib_ucontext *c)
  171. {
  172. return container_of(c, struct iwch_ucontext, ibucontext);
  173. }
  174. struct iwch_mm_entry {
  175. struct list_head entry;
  176. u64 addr;
  177. u32 key;
  178. unsigned len;
  179. };
  180. static inline struct iwch_mm_entry *remove_mmap(struct iwch_ucontext *ucontext,
  181. u32 key, unsigned len)
  182. {
  183. struct list_head *pos, *nxt;
  184. struct iwch_mm_entry *mm;
  185. spin_lock(&ucontext->mmap_lock);
  186. list_for_each_safe(pos, nxt, &ucontext->mmaps) {
  187. mm = list_entry(pos, struct iwch_mm_entry, entry);
  188. if (mm->key == key && mm->len == len) {
  189. list_del_init(&mm->entry);
  190. spin_unlock(&ucontext->mmap_lock);
  191. PDBG("%s key 0x%x addr 0x%llx len %d\n", __FUNCTION__,
  192. key, (unsigned long long) mm->addr, mm->len);
  193. return mm;
  194. }
  195. }
  196. spin_unlock(&ucontext->mmap_lock);
  197. return NULL;
  198. }
  199. static inline void insert_mmap(struct iwch_ucontext *ucontext,
  200. struct iwch_mm_entry *mm)
  201. {
  202. spin_lock(&ucontext->mmap_lock);
  203. PDBG("%s key 0x%x addr 0x%llx len %d\n", __FUNCTION__,
  204. mm->key, (unsigned long long) mm->addr, mm->len);
  205. list_add_tail(&mm->entry, &ucontext->mmaps);
  206. spin_unlock(&ucontext->mmap_lock);
  207. }
  208. enum iwch_qp_attr_mask {
  209. IWCH_QP_ATTR_NEXT_STATE = 1 << 0,
  210. IWCH_QP_ATTR_ENABLE_RDMA_READ = 1 << 7,
  211. IWCH_QP_ATTR_ENABLE_RDMA_WRITE = 1 << 8,
  212. IWCH_QP_ATTR_ENABLE_RDMA_BIND = 1 << 9,
  213. IWCH_QP_ATTR_MAX_ORD = 1 << 11,
  214. IWCH_QP_ATTR_MAX_IRD = 1 << 12,
  215. IWCH_QP_ATTR_LLP_STREAM_HANDLE = 1 << 22,
  216. IWCH_QP_ATTR_STREAM_MSG_BUFFER = 1 << 23,
  217. IWCH_QP_ATTR_MPA_ATTR = 1 << 24,
  218. IWCH_QP_ATTR_QP_CONTEXT_ACTIVATE = 1 << 25,
  219. IWCH_QP_ATTR_VALID_MODIFY = (IWCH_QP_ATTR_ENABLE_RDMA_READ |
  220. IWCH_QP_ATTR_ENABLE_RDMA_WRITE |
  221. IWCH_QP_ATTR_MAX_ORD |
  222. IWCH_QP_ATTR_MAX_IRD |
  223. IWCH_QP_ATTR_LLP_STREAM_HANDLE |
  224. IWCH_QP_ATTR_STREAM_MSG_BUFFER |
  225. IWCH_QP_ATTR_MPA_ATTR |
  226. IWCH_QP_ATTR_QP_CONTEXT_ACTIVATE)
  227. };
  228. int iwch_modify_qp(struct iwch_dev *rhp,
  229. struct iwch_qp *qhp,
  230. enum iwch_qp_attr_mask mask,
  231. struct iwch_qp_attributes *attrs,
  232. int internal);
  233. enum iwch_qp_state {
  234. IWCH_QP_STATE_IDLE,
  235. IWCH_QP_STATE_RTS,
  236. IWCH_QP_STATE_ERROR,
  237. IWCH_QP_STATE_TERMINATE,
  238. IWCH_QP_STATE_CLOSING,
  239. IWCH_QP_STATE_TOT
  240. };
  241. static inline int iwch_convert_state(enum ib_qp_state ib_state)
  242. {
  243. switch (ib_state) {
  244. case IB_QPS_RESET:
  245. case IB_QPS_INIT:
  246. return IWCH_QP_STATE_IDLE;
  247. case IB_QPS_RTS:
  248. return IWCH_QP_STATE_RTS;
  249. case IB_QPS_SQD:
  250. return IWCH_QP_STATE_CLOSING;
  251. case IB_QPS_SQE:
  252. return IWCH_QP_STATE_TERMINATE;
  253. case IB_QPS_ERR:
  254. return IWCH_QP_STATE_ERROR;
  255. default:
  256. return -1;
  257. }
  258. }
  259. static inline u32 iwch_ib_to_tpt_access(int acc)
  260. {
  261. return (acc & IB_ACCESS_REMOTE_WRITE ? TPT_REMOTE_WRITE : 0) |
  262. (acc & IB_ACCESS_REMOTE_READ ? TPT_REMOTE_READ : 0) |
  263. (acc & IB_ACCESS_LOCAL_WRITE ? TPT_LOCAL_WRITE : 0) |
  264. TPT_LOCAL_READ;
  265. }
  266. static inline u32 iwch_ib_to_mwbind_access(int acc)
  267. {
  268. return (acc & IB_ACCESS_REMOTE_WRITE ? T3_MEM_ACCESS_REM_WRITE : 0) |
  269. (acc & IB_ACCESS_REMOTE_READ ? T3_MEM_ACCESS_REM_READ : 0) |
  270. (acc & IB_ACCESS_LOCAL_WRITE ? T3_MEM_ACCESS_LOCAL_WRITE : 0) |
  271. T3_MEM_ACCESS_LOCAL_READ;
  272. }
  273. enum iwch_mmid_state {
  274. IWCH_STAG_STATE_VALID,
  275. IWCH_STAG_STATE_INVALID
  276. };
  277. enum iwch_qp_query_flags {
  278. IWCH_QP_QUERY_CONTEXT_NONE = 0x0, /* No ctx; Only attrs */
  279. IWCH_QP_QUERY_CONTEXT_GET = 0x1, /* Get ctx + attrs */
  280. IWCH_QP_QUERY_CONTEXT_SUSPEND = 0x2, /* Not Supported */
  281. /*
  282. * Quiesce QP context; Consumer
  283. * will NOT replay outstanding WR
  284. */
  285. IWCH_QP_QUERY_CONTEXT_QUIESCE = 0x4,
  286. IWCH_QP_QUERY_CONTEXT_REMOVE = 0x8,
  287. IWCH_QP_QUERY_TEST_USERWRITE = 0x32 /* Test special */
  288. };
  289. int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
  290. struct ib_send_wr **bad_wr);
  291. int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
  292. struct ib_recv_wr **bad_wr);
  293. int iwch_bind_mw(struct ib_qp *qp,
  294. struct ib_mw *mw,
  295. struct ib_mw_bind *mw_bind);
  296. int iwch_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
  297. int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg);
  298. int iwch_register_device(struct iwch_dev *dev);
  299. void iwch_unregister_device(struct iwch_dev *dev);
  300. int iwch_quiesce_qps(struct iwch_cq *chp);
  301. int iwch_resume_qps(struct iwch_cq *chp);
  302. void stop_read_rep_timer(struct iwch_qp *qhp);
  303. int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
  304. struct iwch_mr *mhp,
  305. int shift,
  306. __be64 *page_list);
  307. int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,
  308. struct iwch_mr *mhp,
  309. int shift,
  310. __be64 *page_list,
  311. int npages);
  312. int build_phys_page_list(struct ib_phys_buf *buffer_list,
  313. int num_phys_buf,
  314. u64 *iova_start,
  315. u64 *total_size,
  316. int *npages,
  317. int *shift,
  318. __be64 **page_list);
  319. #define IWCH_NODE_DESC "cxgb3 Chelsio Communications"
  320. #endif