iwch_provider.c 32 KB

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  1. /*
  2. * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/module.h>
  33. #include <linux/moduleparam.h>
  34. #include <linux/device.h>
  35. #include <linux/netdevice.h>
  36. #include <linux/etherdevice.h>
  37. #include <linux/delay.h>
  38. #include <linux/errno.h>
  39. #include <linux/list.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/ethtool.h>
  42. #include <asm/io.h>
  43. #include <asm/irq.h>
  44. #include <asm/byteorder.h>
  45. #include <rdma/iw_cm.h>
  46. #include <rdma/ib_verbs.h>
  47. #include <rdma/ib_smi.h>
  48. #include <rdma/ib_umem.h>
  49. #include <rdma/ib_user_verbs.h>
  50. #include "cxio_hal.h"
  51. #include "iwch.h"
  52. #include "iwch_provider.h"
  53. #include "iwch_cm.h"
  54. #include "iwch_user.h"
  55. static int iwch_modify_port(struct ib_device *ibdev,
  56. u8 port, int port_modify_mask,
  57. struct ib_port_modify *props)
  58. {
  59. return -ENOSYS;
  60. }
  61. static struct ib_ah *iwch_ah_create(struct ib_pd *pd,
  62. struct ib_ah_attr *ah_attr)
  63. {
  64. return ERR_PTR(-ENOSYS);
  65. }
  66. static int iwch_ah_destroy(struct ib_ah *ah)
  67. {
  68. return -ENOSYS;
  69. }
  70. static int iwch_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  71. {
  72. return -ENOSYS;
  73. }
  74. static int iwch_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  75. {
  76. return -ENOSYS;
  77. }
  78. static int iwch_process_mad(struct ib_device *ibdev,
  79. int mad_flags,
  80. u8 port_num,
  81. struct ib_wc *in_wc,
  82. struct ib_grh *in_grh,
  83. struct ib_mad *in_mad, struct ib_mad *out_mad)
  84. {
  85. return -ENOSYS;
  86. }
  87. static int iwch_dealloc_ucontext(struct ib_ucontext *context)
  88. {
  89. struct iwch_dev *rhp = to_iwch_dev(context->device);
  90. struct iwch_ucontext *ucontext = to_iwch_ucontext(context);
  91. struct iwch_mm_entry *mm, *tmp;
  92. PDBG("%s context %p\n", __FUNCTION__, context);
  93. list_for_each_entry_safe(mm, tmp, &ucontext->mmaps, entry)
  94. kfree(mm);
  95. cxio_release_ucontext(&rhp->rdev, &ucontext->uctx);
  96. kfree(ucontext);
  97. return 0;
  98. }
  99. static struct ib_ucontext *iwch_alloc_ucontext(struct ib_device *ibdev,
  100. struct ib_udata *udata)
  101. {
  102. struct iwch_ucontext *context;
  103. struct iwch_dev *rhp = to_iwch_dev(ibdev);
  104. PDBG("%s ibdev %p\n", __FUNCTION__, ibdev);
  105. context = kzalloc(sizeof(*context), GFP_KERNEL);
  106. if (!context)
  107. return ERR_PTR(-ENOMEM);
  108. cxio_init_ucontext(&rhp->rdev, &context->uctx);
  109. INIT_LIST_HEAD(&context->mmaps);
  110. spin_lock_init(&context->mmap_lock);
  111. return &context->ibucontext;
  112. }
  113. static int iwch_destroy_cq(struct ib_cq *ib_cq)
  114. {
  115. struct iwch_cq *chp;
  116. PDBG("%s ib_cq %p\n", __FUNCTION__, ib_cq);
  117. chp = to_iwch_cq(ib_cq);
  118. remove_handle(chp->rhp, &chp->rhp->cqidr, chp->cq.cqid);
  119. atomic_dec(&chp->refcnt);
  120. wait_event(chp->wait, !atomic_read(&chp->refcnt));
  121. cxio_destroy_cq(&chp->rhp->rdev, &chp->cq);
  122. kfree(chp);
  123. return 0;
  124. }
  125. static struct ib_cq *iwch_create_cq(struct ib_device *ibdev, int entries, int vector,
  126. struct ib_ucontext *ib_context,
  127. struct ib_udata *udata)
  128. {
  129. struct iwch_dev *rhp;
  130. struct iwch_cq *chp;
  131. struct iwch_create_cq_resp uresp;
  132. struct iwch_create_cq_req ureq;
  133. struct iwch_ucontext *ucontext = NULL;
  134. PDBG("%s ib_dev %p entries %d\n", __FUNCTION__, ibdev, entries);
  135. rhp = to_iwch_dev(ibdev);
  136. chp = kzalloc(sizeof(*chp), GFP_KERNEL);
  137. if (!chp)
  138. return ERR_PTR(-ENOMEM);
  139. if (ib_context) {
  140. ucontext = to_iwch_ucontext(ib_context);
  141. if (!t3a_device(rhp)) {
  142. if (ib_copy_from_udata(&ureq, udata, sizeof (ureq))) {
  143. kfree(chp);
  144. return ERR_PTR(-EFAULT);
  145. }
  146. chp->user_rptr_addr = (u32 __user *)(unsigned long)ureq.user_rptr_addr;
  147. }
  148. }
  149. if (t3a_device(rhp)) {
  150. /*
  151. * T3A: Add some fluff to handle extra CQEs inserted
  152. * for various errors.
  153. * Additional CQE possibilities:
  154. * TERMINATE,
  155. * incoming RDMA WRITE Failures
  156. * incoming RDMA READ REQUEST FAILUREs
  157. * NOTE: We cannot ensure the CQ won't overflow.
  158. */
  159. entries += 16;
  160. }
  161. entries = roundup_pow_of_two(entries);
  162. chp->cq.size_log2 = ilog2(entries);
  163. if (cxio_create_cq(&rhp->rdev, &chp->cq)) {
  164. kfree(chp);
  165. return ERR_PTR(-ENOMEM);
  166. }
  167. chp->rhp = rhp;
  168. chp->ibcq.cqe = (1 << chp->cq.size_log2) - 1;
  169. spin_lock_init(&chp->lock);
  170. atomic_set(&chp->refcnt, 1);
  171. init_waitqueue_head(&chp->wait);
  172. insert_handle(rhp, &rhp->cqidr, chp, chp->cq.cqid);
  173. if (ucontext) {
  174. struct iwch_mm_entry *mm;
  175. mm = kmalloc(sizeof *mm, GFP_KERNEL);
  176. if (!mm) {
  177. iwch_destroy_cq(&chp->ibcq);
  178. return ERR_PTR(-ENOMEM);
  179. }
  180. uresp.cqid = chp->cq.cqid;
  181. uresp.size_log2 = chp->cq.size_log2;
  182. spin_lock(&ucontext->mmap_lock);
  183. uresp.key = ucontext->key;
  184. ucontext->key += PAGE_SIZE;
  185. spin_unlock(&ucontext->mmap_lock);
  186. if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) {
  187. kfree(mm);
  188. iwch_destroy_cq(&chp->ibcq);
  189. return ERR_PTR(-EFAULT);
  190. }
  191. mm->key = uresp.key;
  192. mm->addr = virt_to_phys(chp->cq.queue);
  193. mm->len = PAGE_ALIGN((1UL << uresp.size_log2) *
  194. sizeof (struct t3_cqe));
  195. insert_mmap(ucontext, mm);
  196. }
  197. PDBG("created cqid 0x%0x chp %p size 0x%0x, dma_addr 0x%0llx\n",
  198. chp->cq.cqid, chp, (1 << chp->cq.size_log2),
  199. (unsigned long long) chp->cq.dma_addr);
  200. return &chp->ibcq;
  201. }
  202. static int iwch_resize_cq(struct ib_cq *cq, int cqe, struct ib_udata *udata)
  203. {
  204. #ifdef notyet
  205. struct iwch_cq *chp = to_iwch_cq(cq);
  206. struct t3_cq oldcq, newcq;
  207. int ret;
  208. PDBG("%s ib_cq %p cqe %d\n", __FUNCTION__, cq, cqe);
  209. /* We don't downsize... */
  210. if (cqe <= cq->cqe)
  211. return 0;
  212. /* create new t3_cq with new size */
  213. cqe = roundup_pow_of_two(cqe+1);
  214. newcq.size_log2 = ilog2(cqe);
  215. /* Dont allow resize to less than the current wce count */
  216. if (cqe < Q_COUNT(chp->cq.rptr, chp->cq.wptr)) {
  217. return -ENOMEM;
  218. }
  219. /* Quiesce all QPs using this CQ */
  220. ret = iwch_quiesce_qps(chp);
  221. if (ret) {
  222. return ret;
  223. }
  224. ret = cxio_create_cq(&chp->rhp->rdev, &newcq);
  225. if (ret) {
  226. return ret;
  227. }
  228. /* copy CQEs */
  229. memcpy(newcq.queue, chp->cq.queue, (1 << chp->cq.size_log2) *
  230. sizeof(struct t3_cqe));
  231. /* old iwch_qp gets new t3_cq but keeps old cqid */
  232. oldcq = chp->cq;
  233. chp->cq = newcq;
  234. chp->cq.cqid = oldcq.cqid;
  235. /* resize new t3_cq to update the HW context */
  236. ret = cxio_resize_cq(&chp->rhp->rdev, &chp->cq);
  237. if (ret) {
  238. chp->cq = oldcq;
  239. return ret;
  240. }
  241. chp->ibcq.cqe = (1<<chp->cq.size_log2) - 1;
  242. /* destroy old t3_cq */
  243. oldcq.cqid = newcq.cqid;
  244. ret = cxio_destroy_cq(&chp->rhp->rdev, &oldcq);
  245. if (ret) {
  246. printk(KERN_ERR MOD "%s - cxio_destroy_cq failed %d\n",
  247. __FUNCTION__, ret);
  248. }
  249. /* add user hooks here */
  250. /* resume qps */
  251. ret = iwch_resume_qps(chp);
  252. return ret;
  253. #else
  254. return -ENOSYS;
  255. #endif
  256. }
  257. static int iwch_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags)
  258. {
  259. struct iwch_dev *rhp;
  260. struct iwch_cq *chp;
  261. enum t3_cq_opcode cq_op;
  262. int err;
  263. unsigned long flag;
  264. u32 rptr;
  265. chp = to_iwch_cq(ibcq);
  266. rhp = chp->rhp;
  267. if ((flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED)
  268. cq_op = CQ_ARM_SE;
  269. else
  270. cq_op = CQ_ARM_AN;
  271. if (chp->user_rptr_addr) {
  272. if (get_user(rptr, chp->user_rptr_addr))
  273. return -EFAULT;
  274. spin_lock_irqsave(&chp->lock, flag);
  275. chp->cq.rptr = rptr;
  276. } else
  277. spin_lock_irqsave(&chp->lock, flag);
  278. PDBG("%s rptr 0x%x\n", __FUNCTION__, chp->cq.rptr);
  279. err = cxio_hal_cq_op(&rhp->rdev, &chp->cq, cq_op, 0);
  280. spin_unlock_irqrestore(&chp->lock, flag);
  281. if (err < 0)
  282. printk(KERN_ERR MOD "Error %d rearming CQID 0x%x\n", err,
  283. chp->cq.cqid);
  284. if (err > 0 && !(flags & IB_CQ_REPORT_MISSED_EVENTS))
  285. err = 0;
  286. return err;
  287. }
  288. static int iwch_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  289. {
  290. int len = vma->vm_end - vma->vm_start;
  291. u32 key = vma->vm_pgoff << PAGE_SHIFT;
  292. struct cxio_rdev *rdev_p;
  293. int ret = 0;
  294. struct iwch_mm_entry *mm;
  295. struct iwch_ucontext *ucontext;
  296. u64 addr;
  297. PDBG("%s pgoff 0x%lx key 0x%x len %d\n", __FUNCTION__, vma->vm_pgoff,
  298. key, len);
  299. if (vma->vm_start & (PAGE_SIZE-1)) {
  300. return -EINVAL;
  301. }
  302. rdev_p = &(to_iwch_dev(context->device)->rdev);
  303. ucontext = to_iwch_ucontext(context);
  304. mm = remove_mmap(ucontext, key, len);
  305. if (!mm)
  306. return -EINVAL;
  307. addr = mm->addr;
  308. kfree(mm);
  309. if ((addr >= rdev_p->rnic_info.udbell_physbase) &&
  310. (addr < (rdev_p->rnic_info.udbell_physbase +
  311. rdev_p->rnic_info.udbell_len))) {
  312. /*
  313. * Map T3 DB register.
  314. */
  315. if (vma->vm_flags & VM_READ) {
  316. return -EPERM;
  317. }
  318. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  319. vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
  320. vma->vm_flags &= ~VM_MAYREAD;
  321. ret = io_remap_pfn_range(vma, vma->vm_start,
  322. addr >> PAGE_SHIFT,
  323. len, vma->vm_page_prot);
  324. } else {
  325. /*
  326. * Map WQ or CQ contig dma memory...
  327. */
  328. ret = remap_pfn_range(vma, vma->vm_start,
  329. addr >> PAGE_SHIFT,
  330. len, vma->vm_page_prot);
  331. }
  332. return ret;
  333. }
  334. static int iwch_deallocate_pd(struct ib_pd *pd)
  335. {
  336. struct iwch_dev *rhp;
  337. struct iwch_pd *php;
  338. php = to_iwch_pd(pd);
  339. rhp = php->rhp;
  340. PDBG("%s ibpd %p pdid 0x%x\n", __FUNCTION__, pd, php->pdid);
  341. cxio_hal_put_pdid(rhp->rdev.rscp, php->pdid);
  342. kfree(php);
  343. return 0;
  344. }
  345. static struct ib_pd *iwch_allocate_pd(struct ib_device *ibdev,
  346. struct ib_ucontext *context,
  347. struct ib_udata *udata)
  348. {
  349. struct iwch_pd *php;
  350. u32 pdid;
  351. struct iwch_dev *rhp;
  352. PDBG("%s ibdev %p\n", __FUNCTION__, ibdev);
  353. rhp = (struct iwch_dev *) ibdev;
  354. pdid = cxio_hal_get_pdid(rhp->rdev.rscp);
  355. if (!pdid)
  356. return ERR_PTR(-EINVAL);
  357. php = kzalloc(sizeof(*php), GFP_KERNEL);
  358. if (!php) {
  359. cxio_hal_put_pdid(rhp->rdev.rscp, pdid);
  360. return ERR_PTR(-ENOMEM);
  361. }
  362. php->pdid = pdid;
  363. php->rhp = rhp;
  364. if (context) {
  365. if (ib_copy_to_udata(udata, &php->pdid, sizeof (__u32))) {
  366. iwch_deallocate_pd(&php->ibpd);
  367. return ERR_PTR(-EFAULT);
  368. }
  369. }
  370. PDBG("%s pdid 0x%0x ptr 0x%p\n", __FUNCTION__, pdid, php);
  371. return &php->ibpd;
  372. }
  373. static int iwch_dereg_mr(struct ib_mr *ib_mr)
  374. {
  375. struct iwch_dev *rhp;
  376. struct iwch_mr *mhp;
  377. u32 mmid;
  378. PDBG("%s ib_mr %p\n", __FUNCTION__, ib_mr);
  379. /* There can be no memory windows */
  380. if (atomic_read(&ib_mr->usecnt))
  381. return -EINVAL;
  382. mhp = to_iwch_mr(ib_mr);
  383. rhp = mhp->rhp;
  384. mmid = mhp->attr.stag >> 8;
  385. cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
  386. mhp->attr.pbl_addr);
  387. remove_handle(rhp, &rhp->mmidr, mmid);
  388. if (mhp->kva)
  389. kfree((void *) (unsigned long) mhp->kva);
  390. if (mhp->umem)
  391. ib_umem_release(mhp->umem);
  392. PDBG("%s mmid 0x%x ptr %p\n", __FUNCTION__, mmid, mhp);
  393. kfree(mhp);
  394. return 0;
  395. }
  396. static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
  397. struct ib_phys_buf *buffer_list,
  398. int num_phys_buf,
  399. int acc,
  400. u64 *iova_start)
  401. {
  402. __be64 *page_list;
  403. int shift;
  404. u64 total_size;
  405. int npages;
  406. struct iwch_dev *rhp;
  407. struct iwch_pd *php;
  408. struct iwch_mr *mhp;
  409. int ret;
  410. PDBG("%s ib_pd %p\n", __FUNCTION__, pd);
  411. php = to_iwch_pd(pd);
  412. rhp = php->rhp;
  413. mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);
  414. if (!mhp)
  415. return ERR_PTR(-ENOMEM);
  416. /* First check that we have enough alignment */
  417. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK)) {
  418. ret = -EINVAL;
  419. goto err;
  420. }
  421. if (num_phys_buf > 1 &&
  422. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK)) {
  423. ret = -EINVAL;
  424. goto err;
  425. }
  426. ret = build_phys_page_list(buffer_list, num_phys_buf, iova_start,
  427. &total_size, &npages, &shift, &page_list);
  428. if (ret)
  429. goto err;
  430. mhp->rhp = rhp;
  431. mhp->attr.pdid = php->pdid;
  432. mhp->attr.zbva = 0;
  433. mhp->attr.perms = iwch_ib_to_tpt_access(acc);
  434. mhp->attr.va_fbo = *iova_start;
  435. mhp->attr.page_size = shift - 12;
  436. mhp->attr.len = (u32) total_size;
  437. mhp->attr.pbl_size = npages;
  438. ret = iwch_register_mem(rhp, php, mhp, shift, page_list);
  439. kfree(page_list);
  440. if (ret) {
  441. goto err;
  442. }
  443. return &mhp->ibmr;
  444. err:
  445. kfree(mhp);
  446. return ERR_PTR(ret);
  447. }
  448. static int iwch_reregister_phys_mem(struct ib_mr *mr,
  449. int mr_rereg_mask,
  450. struct ib_pd *pd,
  451. struct ib_phys_buf *buffer_list,
  452. int num_phys_buf,
  453. int acc, u64 * iova_start)
  454. {
  455. struct iwch_mr mh, *mhp;
  456. struct iwch_pd *php;
  457. struct iwch_dev *rhp;
  458. __be64 *page_list = NULL;
  459. int shift = 0;
  460. u64 total_size;
  461. int npages;
  462. int ret;
  463. PDBG("%s ib_mr %p ib_pd %p\n", __FUNCTION__, mr, pd);
  464. /* There can be no memory windows */
  465. if (atomic_read(&mr->usecnt))
  466. return -EINVAL;
  467. mhp = to_iwch_mr(mr);
  468. rhp = mhp->rhp;
  469. php = to_iwch_pd(mr->pd);
  470. /* make sure we are on the same adapter */
  471. if (rhp != php->rhp)
  472. return -EINVAL;
  473. memcpy(&mh, mhp, sizeof *mhp);
  474. if (mr_rereg_mask & IB_MR_REREG_PD)
  475. php = to_iwch_pd(pd);
  476. if (mr_rereg_mask & IB_MR_REREG_ACCESS)
  477. mh.attr.perms = iwch_ib_to_tpt_access(acc);
  478. if (mr_rereg_mask & IB_MR_REREG_TRANS) {
  479. ret = build_phys_page_list(buffer_list, num_phys_buf,
  480. iova_start,
  481. &total_size, &npages,
  482. &shift, &page_list);
  483. if (ret)
  484. return ret;
  485. }
  486. ret = iwch_reregister_mem(rhp, php, &mh, shift, page_list, npages);
  487. kfree(page_list);
  488. if (ret) {
  489. return ret;
  490. }
  491. if (mr_rereg_mask & IB_MR_REREG_PD)
  492. mhp->attr.pdid = php->pdid;
  493. if (mr_rereg_mask & IB_MR_REREG_ACCESS)
  494. mhp->attr.perms = iwch_ib_to_tpt_access(acc);
  495. if (mr_rereg_mask & IB_MR_REREG_TRANS) {
  496. mhp->attr.zbva = 0;
  497. mhp->attr.va_fbo = *iova_start;
  498. mhp->attr.page_size = shift - 12;
  499. mhp->attr.len = (u32) total_size;
  500. mhp->attr.pbl_size = npages;
  501. }
  502. return 0;
  503. }
  504. static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  505. u64 virt, int acc, struct ib_udata *udata)
  506. {
  507. __be64 *pages;
  508. int shift, n, len;
  509. int i, j, k;
  510. int err = 0;
  511. struct ib_umem_chunk *chunk;
  512. struct iwch_dev *rhp;
  513. struct iwch_pd *php;
  514. struct iwch_mr *mhp;
  515. struct iwch_reg_user_mr_resp uresp;
  516. PDBG("%s ib_pd %p\n", __FUNCTION__, pd);
  517. php = to_iwch_pd(pd);
  518. rhp = php->rhp;
  519. mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);
  520. if (!mhp)
  521. return ERR_PTR(-ENOMEM);
  522. mhp->umem = ib_umem_get(pd->uobject->context, start, length, acc);
  523. if (IS_ERR(mhp->umem)) {
  524. err = PTR_ERR(mhp->umem);
  525. kfree(mhp);
  526. return ERR_PTR(err);
  527. }
  528. shift = ffs(mhp->umem->page_size) - 1;
  529. n = 0;
  530. list_for_each_entry(chunk, &mhp->umem->chunk_list, list)
  531. n += chunk->nents;
  532. pages = kmalloc(n * sizeof(u64), GFP_KERNEL);
  533. if (!pages) {
  534. err = -ENOMEM;
  535. goto err;
  536. }
  537. i = n = 0;
  538. list_for_each_entry(chunk, &mhp->umem->chunk_list, list)
  539. for (j = 0; j < chunk->nmap; ++j) {
  540. len = sg_dma_len(&chunk->page_list[j]) >> shift;
  541. for (k = 0; k < len; ++k) {
  542. pages[i++] = cpu_to_be64(sg_dma_address(
  543. &chunk->page_list[j]) +
  544. mhp->umem->page_size * k);
  545. }
  546. }
  547. mhp->rhp = rhp;
  548. mhp->attr.pdid = php->pdid;
  549. mhp->attr.zbva = 0;
  550. mhp->attr.perms = iwch_ib_to_tpt_access(acc);
  551. mhp->attr.va_fbo = virt;
  552. mhp->attr.page_size = shift - 12;
  553. mhp->attr.len = (u32) length;
  554. mhp->attr.pbl_size = i;
  555. err = iwch_register_mem(rhp, php, mhp, shift, pages);
  556. kfree(pages);
  557. if (err)
  558. goto err;
  559. if (udata && t3b_device(rhp)) {
  560. uresp.pbl_addr = (mhp->attr.pbl_addr -
  561. rhp->rdev.rnic_info.pbl_base) >> 3;
  562. PDBG("%s user resp pbl_addr 0x%x\n", __FUNCTION__,
  563. uresp.pbl_addr);
  564. if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) {
  565. iwch_dereg_mr(&mhp->ibmr);
  566. err = -EFAULT;
  567. goto err;
  568. }
  569. }
  570. return &mhp->ibmr;
  571. err:
  572. ib_umem_release(mhp->umem);
  573. kfree(mhp);
  574. return ERR_PTR(err);
  575. }
  576. static struct ib_mr *iwch_get_dma_mr(struct ib_pd *pd, int acc)
  577. {
  578. struct ib_phys_buf bl;
  579. u64 kva;
  580. struct ib_mr *ibmr;
  581. PDBG("%s ib_pd %p\n", __FUNCTION__, pd);
  582. /*
  583. * T3 only supports 32 bits of size.
  584. */
  585. bl.size = 0xffffffff;
  586. bl.addr = 0;
  587. kva = 0;
  588. ibmr = iwch_register_phys_mem(pd, &bl, 1, acc, &kva);
  589. return ibmr;
  590. }
  591. static struct ib_mw *iwch_alloc_mw(struct ib_pd *pd)
  592. {
  593. struct iwch_dev *rhp;
  594. struct iwch_pd *php;
  595. struct iwch_mw *mhp;
  596. u32 mmid;
  597. u32 stag = 0;
  598. int ret;
  599. php = to_iwch_pd(pd);
  600. rhp = php->rhp;
  601. mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);
  602. if (!mhp)
  603. return ERR_PTR(-ENOMEM);
  604. ret = cxio_allocate_window(&rhp->rdev, &stag, php->pdid);
  605. if (ret) {
  606. kfree(mhp);
  607. return ERR_PTR(ret);
  608. }
  609. mhp->rhp = rhp;
  610. mhp->attr.pdid = php->pdid;
  611. mhp->attr.type = TPT_MW;
  612. mhp->attr.stag = stag;
  613. mmid = (stag) >> 8;
  614. insert_handle(rhp, &rhp->mmidr, mhp, mmid);
  615. PDBG("%s mmid 0x%x mhp %p stag 0x%x\n", __FUNCTION__, mmid, mhp, stag);
  616. return &(mhp->ibmw);
  617. }
  618. static int iwch_dealloc_mw(struct ib_mw *mw)
  619. {
  620. struct iwch_dev *rhp;
  621. struct iwch_mw *mhp;
  622. u32 mmid;
  623. mhp = to_iwch_mw(mw);
  624. rhp = mhp->rhp;
  625. mmid = (mw->rkey) >> 8;
  626. cxio_deallocate_window(&rhp->rdev, mhp->attr.stag);
  627. remove_handle(rhp, &rhp->mmidr, mmid);
  628. kfree(mhp);
  629. PDBG("%s ib_mw %p mmid 0x%x ptr %p\n", __FUNCTION__, mw, mmid, mhp);
  630. return 0;
  631. }
  632. static int iwch_destroy_qp(struct ib_qp *ib_qp)
  633. {
  634. struct iwch_dev *rhp;
  635. struct iwch_qp *qhp;
  636. struct iwch_qp_attributes attrs;
  637. struct iwch_ucontext *ucontext;
  638. qhp = to_iwch_qp(ib_qp);
  639. rhp = qhp->rhp;
  640. attrs.next_state = IWCH_QP_STATE_ERROR;
  641. iwch_modify_qp(rhp, qhp, IWCH_QP_ATTR_NEXT_STATE, &attrs, 0);
  642. wait_event(qhp->wait, !qhp->ep);
  643. remove_handle(rhp, &rhp->qpidr, qhp->wq.qpid);
  644. atomic_dec(&qhp->refcnt);
  645. wait_event(qhp->wait, !atomic_read(&qhp->refcnt));
  646. ucontext = ib_qp->uobject ? to_iwch_ucontext(ib_qp->uobject->context)
  647. : NULL;
  648. cxio_destroy_qp(&rhp->rdev, &qhp->wq,
  649. ucontext ? &ucontext->uctx : &rhp->rdev.uctx);
  650. PDBG("%s ib_qp %p qpid 0x%0x qhp %p\n", __FUNCTION__,
  651. ib_qp, qhp->wq.qpid, qhp);
  652. kfree(qhp);
  653. return 0;
  654. }
  655. static struct ib_qp *iwch_create_qp(struct ib_pd *pd,
  656. struct ib_qp_init_attr *attrs,
  657. struct ib_udata *udata)
  658. {
  659. struct iwch_dev *rhp;
  660. struct iwch_qp *qhp;
  661. struct iwch_pd *php;
  662. struct iwch_cq *schp;
  663. struct iwch_cq *rchp;
  664. struct iwch_create_qp_resp uresp;
  665. int wqsize, sqsize, rqsize;
  666. struct iwch_ucontext *ucontext;
  667. PDBG("%s ib_pd %p\n", __FUNCTION__, pd);
  668. if (attrs->qp_type != IB_QPT_RC)
  669. return ERR_PTR(-EINVAL);
  670. php = to_iwch_pd(pd);
  671. rhp = php->rhp;
  672. schp = get_chp(rhp, ((struct iwch_cq *) attrs->send_cq)->cq.cqid);
  673. rchp = get_chp(rhp, ((struct iwch_cq *) attrs->recv_cq)->cq.cqid);
  674. if (!schp || !rchp)
  675. return ERR_PTR(-EINVAL);
  676. /* The RQT size must be # of entries + 1 rounded up to a power of two */
  677. rqsize = roundup_pow_of_two(attrs->cap.max_recv_wr);
  678. if (rqsize == attrs->cap.max_recv_wr)
  679. rqsize = roundup_pow_of_two(attrs->cap.max_recv_wr+1);
  680. /* T3 doesn't support RQT depth < 16 */
  681. if (rqsize < 16)
  682. rqsize = 16;
  683. if (rqsize > T3_MAX_RQ_SIZE)
  684. return ERR_PTR(-EINVAL);
  685. if (attrs->cap.max_inline_data > T3_MAX_INLINE)
  686. return ERR_PTR(-EINVAL);
  687. /*
  688. * NOTE: The SQ and total WQ sizes don't need to be
  689. * a power of two. However, all the code assumes
  690. * they are. EG: Q_FREECNT() and friends.
  691. */
  692. sqsize = roundup_pow_of_two(attrs->cap.max_send_wr);
  693. wqsize = roundup_pow_of_two(rqsize + sqsize);
  694. PDBG("%s wqsize %d sqsize %d rqsize %d\n", __FUNCTION__,
  695. wqsize, sqsize, rqsize);
  696. qhp = kzalloc(sizeof(*qhp), GFP_KERNEL);
  697. if (!qhp)
  698. return ERR_PTR(-ENOMEM);
  699. qhp->wq.size_log2 = ilog2(wqsize);
  700. qhp->wq.rq_size_log2 = ilog2(rqsize);
  701. qhp->wq.sq_size_log2 = ilog2(sqsize);
  702. ucontext = pd->uobject ? to_iwch_ucontext(pd->uobject->context) : NULL;
  703. if (cxio_create_qp(&rhp->rdev, !udata, &qhp->wq,
  704. ucontext ? &ucontext->uctx : &rhp->rdev.uctx)) {
  705. kfree(qhp);
  706. return ERR_PTR(-ENOMEM);
  707. }
  708. attrs->cap.max_recv_wr = rqsize - 1;
  709. attrs->cap.max_send_wr = sqsize;
  710. qhp->rhp = rhp;
  711. qhp->attr.pd = php->pdid;
  712. qhp->attr.scq = ((struct iwch_cq *) attrs->send_cq)->cq.cqid;
  713. qhp->attr.rcq = ((struct iwch_cq *) attrs->recv_cq)->cq.cqid;
  714. qhp->attr.sq_num_entries = attrs->cap.max_send_wr;
  715. qhp->attr.rq_num_entries = attrs->cap.max_recv_wr;
  716. qhp->attr.sq_max_sges = attrs->cap.max_send_sge;
  717. qhp->attr.sq_max_sges_rdma_write = attrs->cap.max_send_sge;
  718. qhp->attr.rq_max_sges = attrs->cap.max_recv_sge;
  719. qhp->attr.state = IWCH_QP_STATE_IDLE;
  720. qhp->attr.next_state = IWCH_QP_STATE_IDLE;
  721. /*
  722. * XXX - These don't get passed in from the openib user
  723. * at create time. The CM sets them via a QP modify.
  724. * Need to fix... I think the CM should
  725. */
  726. qhp->attr.enable_rdma_read = 1;
  727. qhp->attr.enable_rdma_write = 1;
  728. qhp->attr.enable_bind = 1;
  729. qhp->attr.max_ord = 1;
  730. qhp->attr.max_ird = 1;
  731. spin_lock_init(&qhp->lock);
  732. init_waitqueue_head(&qhp->wait);
  733. atomic_set(&qhp->refcnt, 1);
  734. insert_handle(rhp, &rhp->qpidr, qhp, qhp->wq.qpid);
  735. if (udata) {
  736. struct iwch_mm_entry *mm1, *mm2;
  737. mm1 = kmalloc(sizeof *mm1, GFP_KERNEL);
  738. if (!mm1) {
  739. iwch_destroy_qp(&qhp->ibqp);
  740. return ERR_PTR(-ENOMEM);
  741. }
  742. mm2 = kmalloc(sizeof *mm2, GFP_KERNEL);
  743. if (!mm2) {
  744. kfree(mm1);
  745. iwch_destroy_qp(&qhp->ibqp);
  746. return ERR_PTR(-ENOMEM);
  747. }
  748. uresp.qpid = qhp->wq.qpid;
  749. uresp.size_log2 = qhp->wq.size_log2;
  750. uresp.sq_size_log2 = qhp->wq.sq_size_log2;
  751. uresp.rq_size_log2 = qhp->wq.rq_size_log2;
  752. spin_lock(&ucontext->mmap_lock);
  753. uresp.key = ucontext->key;
  754. ucontext->key += PAGE_SIZE;
  755. uresp.db_key = ucontext->key;
  756. ucontext->key += PAGE_SIZE;
  757. spin_unlock(&ucontext->mmap_lock);
  758. if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) {
  759. kfree(mm1);
  760. kfree(mm2);
  761. iwch_destroy_qp(&qhp->ibqp);
  762. return ERR_PTR(-EFAULT);
  763. }
  764. mm1->key = uresp.key;
  765. mm1->addr = virt_to_phys(qhp->wq.queue);
  766. mm1->len = PAGE_ALIGN(wqsize * sizeof (union t3_wr));
  767. insert_mmap(ucontext, mm1);
  768. mm2->key = uresp.db_key;
  769. mm2->addr = qhp->wq.udb & PAGE_MASK;
  770. mm2->len = PAGE_SIZE;
  771. insert_mmap(ucontext, mm2);
  772. }
  773. qhp->ibqp.qp_num = qhp->wq.qpid;
  774. init_timer(&(qhp->timer));
  775. PDBG("%s sq_num_entries %d, rq_num_entries %d "
  776. "qpid 0x%0x qhp %p dma_addr 0x%llx size %d\n",
  777. __FUNCTION__, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries,
  778. qhp->wq.qpid, qhp, (unsigned long long) qhp->wq.dma_addr,
  779. 1 << qhp->wq.size_log2);
  780. return &qhp->ibqp;
  781. }
  782. static int iwch_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  783. int attr_mask, struct ib_udata *udata)
  784. {
  785. struct iwch_dev *rhp;
  786. struct iwch_qp *qhp;
  787. enum iwch_qp_attr_mask mask = 0;
  788. struct iwch_qp_attributes attrs;
  789. PDBG("%s ib_qp %p\n", __FUNCTION__, ibqp);
  790. /* iwarp does not support the RTR state */
  791. if ((attr_mask & IB_QP_STATE) && (attr->qp_state == IB_QPS_RTR))
  792. attr_mask &= ~IB_QP_STATE;
  793. /* Make sure we still have something left to do */
  794. if (!attr_mask)
  795. return 0;
  796. memset(&attrs, 0, sizeof attrs);
  797. qhp = to_iwch_qp(ibqp);
  798. rhp = qhp->rhp;
  799. attrs.next_state = iwch_convert_state(attr->qp_state);
  800. attrs.enable_rdma_read = (attr->qp_access_flags &
  801. IB_ACCESS_REMOTE_READ) ? 1 : 0;
  802. attrs.enable_rdma_write = (attr->qp_access_flags &
  803. IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
  804. attrs.enable_bind = (attr->qp_access_flags & IB_ACCESS_MW_BIND) ? 1 : 0;
  805. mask |= (attr_mask & IB_QP_STATE) ? IWCH_QP_ATTR_NEXT_STATE : 0;
  806. mask |= (attr_mask & IB_QP_ACCESS_FLAGS) ?
  807. (IWCH_QP_ATTR_ENABLE_RDMA_READ |
  808. IWCH_QP_ATTR_ENABLE_RDMA_WRITE |
  809. IWCH_QP_ATTR_ENABLE_RDMA_BIND) : 0;
  810. return iwch_modify_qp(rhp, qhp, mask, &attrs, 0);
  811. }
  812. void iwch_qp_add_ref(struct ib_qp *qp)
  813. {
  814. PDBG("%s ib_qp %p\n", __FUNCTION__, qp);
  815. atomic_inc(&(to_iwch_qp(qp)->refcnt));
  816. }
  817. void iwch_qp_rem_ref(struct ib_qp *qp)
  818. {
  819. PDBG("%s ib_qp %p\n", __FUNCTION__, qp);
  820. if (atomic_dec_and_test(&(to_iwch_qp(qp)->refcnt)))
  821. wake_up(&(to_iwch_qp(qp)->wait));
  822. }
  823. static struct ib_qp *iwch_get_qp(struct ib_device *dev, int qpn)
  824. {
  825. PDBG("%s ib_dev %p qpn 0x%x\n", __FUNCTION__, dev, qpn);
  826. return (struct ib_qp *)get_qhp(to_iwch_dev(dev), qpn);
  827. }
  828. static int iwch_query_pkey(struct ib_device *ibdev,
  829. u8 port, u16 index, u16 * pkey)
  830. {
  831. PDBG("%s ibdev %p\n", __FUNCTION__, ibdev);
  832. *pkey = 0;
  833. return 0;
  834. }
  835. static int iwch_query_gid(struct ib_device *ibdev, u8 port,
  836. int index, union ib_gid *gid)
  837. {
  838. struct iwch_dev *dev;
  839. PDBG("%s ibdev %p, port %d, index %d, gid %p\n",
  840. __FUNCTION__, ibdev, port, index, gid);
  841. dev = to_iwch_dev(ibdev);
  842. BUG_ON(port == 0 || port > 2);
  843. memset(&(gid->raw[0]), 0, sizeof(gid->raw));
  844. memcpy(&(gid->raw[0]), dev->rdev.port_info.lldevs[port-1]->dev_addr, 6);
  845. return 0;
  846. }
  847. static int iwch_query_device(struct ib_device *ibdev,
  848. struct ib_device_attr *props)
  849. {
  850. struct iwch_dev *dev;
  851. PDBG("%s ibdev %p\n", __FUNCTION__, ibdev);
  852. dev = to_iwch_dev(ibdev);
  853. memset(props, 0, sizeof *props);
  854. memcpy(&props->sys_image_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6);
  855. props->device_cap_flags = dev->device_cap_flags;
  856. props->vendor_id = (u32)dev->rdev.rnic_info.pdev->vendor;
  857. props->vendor_part_id = (u32)dev->rdev.rnic_info.pdev->device;
  858. props->max_mr_size = ~0ull;
  859. props->max_qp = dev->attr.max_qps;
  860. props->max_qp_wr = dev->attr.max_wrs;
  861. props->max_sge = dev->attr.max_sge_per_wr;
  862. props->max_sge_rd = 1;
  863. props->max_qp_rd_atom = dev->attr.max_rdma_reads_per_qp;
  864. props->max_cq = dev->attr.max_cqs;
  865. props->max_cqe = dev->attr.max_cqes_per_cq;
  866. props->max_mr = dev->attr.max_mem_regs;
  867. props->max_pd = dev->attr.max_pds;
  868. props->local_ca_ack_delay = 0;
  869. return 0;
  870. }
  871. static int iwch_query_port(struct ib_device *ibdev,
  872. u8 port, struct ib_port_attr *props)
  873. {
  874. PDBG("%s ibdev %p\n", __FUNCTION__, ibdev);
  875. props->max_mtu = IB_MTU_4096;
  876. props->lid = 0;
  877. props->lmc = 0;
  878. props->sm_lid = 0;
  879. props->sm_sl = 0;
  880. props->state = IB_PORT_ACTIVE;
  881. props->phys_state = 0;
  882. props->port_cap_flags =
  883. IB_PORT_CM_SUP |
  884. IB_PORT_SNMP_TUNNEL_SUP |
  885. IB_PORT_REINIT_SUP |
  886. IB_PORT_DEVICE_MGMT_SUP |
  887. IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
  888. props->gid_tbl_len = 1;
  889. props->pkey_tbl_len = 1;
  890. props->qkey_viol_cntr = 0;
  891. props->active_width = 2;
  892. props->active_speed = 2;
  893. props->max_msg_sz = -1;
  894. return 0;
  895. }
  896. static ssize_t show_rev(struct class_device *cdev, char *buf)
  897. {
  898. struct iwch_dev *dev = container_of(cdev, struct iwch_dev,
  899. ibdev.class_dev);
  900. PDBG("%s class dev 0x%p\n", __FUNCTION__, cdev);
  901. return sprintf(buf, "%d\n", dev->rdev.t3cdev_p->type);
  902. }
  903. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  904. {
  905. struct iwch_dev *dev = container_of(cdev, struct iwch_dev,
  906. ibdev.class_dev);
  907. struct ethtool_drvinfo info;
  908. struct net_device *lldev = dev->rdev.t3cdev_p->lldev;
  909. PDBG("%s class dev 0x%p\n", __FUNCTION__, cdev);
  910. lldev->ethtool_ops->get_drvinfo(lldev, &info);
  911. return sprintf(buf, "%s\n", info.fw_version);
  912. }
  913. static ssize_t show_hca(struct class_device *cdev, char *buf)
  914. {
  915. struct iwch_dev *dev = container_of(cdev, struct iwch_dev,
  916. ibdev.class_dev);
  917. struct ethtool_drvinfo info;
  918. struct net_device *lldev = dev->rdev.t3cdev_p->lldev;
  919. PDBG("%s class dev 0x%p\n", __FUNCTION__, cdev);
  920. lldev->ethtool_ops->get_drvinfo(lldev, &info);
  921. return sprintf(buf, "%s\n", info.driver);
  922. }
  923. static ssize_t show_board(struct class_device *cdev, char *buf)
  924. {
  925. struct iwch_dev *dev = container_of(cdev, struct iwch_dev,
  926. ibdev.class_dev);
  927. PDBG("%s class dev 0x%p\n", __FUNCTION__, dev);
  928. return sprintf(buf, "%x.%x\n", dev->rdev.rnic_info.pdev->vendor,
  929. dev->rdev.rnic_info.pdev->device);
  930. }
  931. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  932. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  933. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  934. static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  935. static struct class_device_attribute *iwch_class_attributes[] = {
  936. &class_device_attr_hw_rev,
  937. &class_device_attr_fw_ver,
  938. &class_device_attr_hca_type,
  939. &class_device_attr_board_id
  940. };
  941. int iwch_register_device(struct iwch_dev *dev)
  942. {
  943. int ret;
  944. int i;
  945. PDBG("%s iwch_dev %p\n", __FUNCTION__, dev);
  946. strlcpy(dev->ibdev.name, "cxgb3_%d", IB_DEVICE_NAME_MAX);
  947. memset(&dev->ibdev.node_guid, 0, sizeof(dev->ibdev.node_guid));
  948. memcpy(&dev->ibdev.node_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6);
  949. dev->ibdev.owner = THIS_MODULE;
  950. dev->device_cap_flags =
  951. (IB_DEVICE_ZERO_STAG |
  952. IB_DEVICE_SEND_W_INV | IB_DEVICE_MEM_WINDOW);
  953. dev->ibdev.uverbs_cmd_mask =
  954. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  955. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  956. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  957. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  958. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  959. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  960. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  961. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  962. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  963. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  964. (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
  965. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  966. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  967. (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
  968. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  969. (1ull << IB_USER_VERBS_CMD_POST_SEND) |
  970. (1ull << IB_USER_VERBS_CMD_POST_RECV);
  971. dev->ibdev.node_type = RDMA_NODE_RNIC;
  972. memcpy(dev->ibdev.node_desc, IWCH_NODE_DESC, sizeof(IWCH_NODE_DESC));
  973. dev->ibdev.phys_port_cnt = dev->rdev.port_info.nports;
  974. dev->ibdev.num_comp_vectors = 1;
  975. dev->ibdev.dma_device = &(dev->rdev.rnic_info.pdev->dev);
  976. dev->ibdev.query_device = iwch_query_device;
  977. dev->ibdev.query_port = iwch_query_port;
  978. dev->ibdev.modify_port = iwch_modify_port;
  979. dev->ibdev.query_pkey = iwch_query_pkey;
  980. dev->ibdev.query_gid = iwch_query_gid;
  981. dev->ibdev.alloc_ucontext = iwch_alloc_ucontext;
  982. dev->ibdev.dealloc_ucontext = iwch_dealloc_ucontext;
  983. dev->ibdev.mmap = iwch_mmap;
  984. dev->ibdev.alloc_pd = iwch_allocate_pd;
  985. dev->ibdev.dealloc_pd = iwch_deallocate_pd;
  986. dev->ibdev.create_ah = iwch_ah_create;
  987. dev->ibdev.destroy_ah = iwch_ah_destroy;
  988. dev->ibdev.create_qp = iwch_create_qp;
  989. dev->ibdev.modify_qp = iwch_ib_modify_qp;
  990. dev->ibdev.destroy_qp = iwch_destroy_qp;
  991. dev->ibdev.create_cq = iwch_create_cq;
  992. dev->ibdev.destroy_cq = iwch_destroy_cq;
  993. dev->ibdev.resize_cq = iwch_resize_cq;
  994. dev->ibdev.poll_cq = iwch_poll_cq;
  995. dev->ibdev.get_dma_mr = iwch_get_dma_mr;
  996. dev->ibdev.reg_phys_mr = iwch_register_phys_mem;
  997. dev->ibdev.rereg_phys_mr = iwch_reregister_phys_mem;
  998. dev->ibdev.reg_user_mr = iwch_reg_user_mr;
  999. dev->ibdev.dereg_mr = iwch_dereg_mr;
  1000. dev->ibdev.alloc_mw = iwch_alloc_mw;
  1001. dev->ibdev.bind_mw = iwch_bind_mw;
  1002. dev->ibdev.dealloc_mw = iwch_dealloc_mw;
  1003. dev->ibdev.attach_mcast = iwch_multicast_attach;
  1004. dev->ibdev.detach_mcast = iwch_multicast_detach;
  1005. dev->ibdev.process_mad = iwch_process_mad;
  1006. dev->ibdev.req_notify_cq = iwch_arm_cq;
  1007. dev->ibdev.post_send = iwch_post_send;
  1008. dev->ibdev.post_recv = iwch_post_receive;
  1009. dev->ibdev.iwcm =
  1010. (struct iw_cm_verbs *) kmalloc(sizeof(struct iw_cm_verbs),
  1011. GFP_KERNEL);
  1012. dev->ibdev.iwcm->connect = iwch_connect;
  1013. dev->ibdev.iwcm->accept = iwch_accept_cr;
  1014. dev->ibdev.iwcm->reject = iwch_reject_cr;
  1015. dev->ibdev.iwcm->create_listen = iwch_create_listen;
  1016. dev->ibdev.iwcm->destroy_listen = iwch_destroy_listen;
  1017. dev->ibdev.iwcm->add_ref = iwch_qp_add_ref;
  1018. dev->ibdev.iwcm->rem_ref = iwch_qp_rem_ref;
  1019. dev->ibdev.iwcm->get_qp = iwch_get_qp;
  1020. ret = ib_register_device(&dev->ibdev);
  1021. if (ret)
  1022. goto bail1;
  1023. for (i = 0; i < ARRAY_SIZE(iwch_class_attributes); ++i) {
  1024. ret = class_device_create_file(&dev->ibdev.class_dev,
  1025. iwch_class_attributes[i]);
  1026. if (ret) {
  1027. goto bail2;
  1028. }
  1029. }
  1030. return 0;
  1031. bail2:
  1032. ib_unregister_device(&dev->ibdev);
  1033. bail1:
  1034. return ret;
  1035. }
  1036. void iwch_unregister_device(struct iwch_dev *dev)
  1037. {
  1038. int i;
  1039. PDBG("%s iwch_dev %p\n", __FUNCTION__, dev);
  1040. for (i = 0; i < ARRAY_SIZE(iwch_class_attributes); ++i)
  1041. class_device_remove_file(&dev->ibdev.class_dev,
  1042. iwch_class_attributes[i]);
  1043. ib_unregister_device(&dev->ibdev);
  1044. return;
  1045. }