iwch_mem.c 4.6 KB

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  1. /*
  2. * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <asm/byteorder.h>
  33. #include <rdma/iw_cm.h>
  34. #include <rdma/ib_verbs.h>
  35. #include "cxio_hal.h"
  36. #include "iwch.h"
  37. #include "iwch_provider.h"
  38. int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
  39. struct iwch_mr *mhp,
  40. int shift,
  41. __be64 *page_list)
  42. {
  43. u32 stag;
  44. u32 mmid;
  45. if (cxio_register_phys_mem(&rhp->rdev,
  46. &stag, mhp->attr.pdid,
  47. mhp->attr.perms,
  48. mhp->attr.zbva,
  49. mhp->attr.va_fbo,
  50. mhp->attr.len,
  51. shift-12,
  52. page_list,
  53. &mhp->attr.pbl_size, &mhp->attr.pbl_addr))
  54. return -ENOMEM;
  55. mhp->attr.state = 1;
  56. mhp->attr.stag = stag;
  57. mmid = stag >> 8;
  58. mhp->ibmr.rkey = mhp->ibmr.lkey = stag;
  59. insert_handle(rhp, &rhp->mmidr, mhp, mmid);
  60. PDBG("%s mmid 0x%x mhp %p\n", __FUNCTION__, mmid, mhp);
  61. return 0;
  62. }
  63. int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,
  64. struct iwch_mr *mhp,
  65. int shift,
  66. __be64 *page_list,
  67. int npages)
  68. {
  69. u32 stag;
  70. u32 mmid;
  71. /* We could support this... */
  72. if (npages > mhp->attr.pbl_size)
  73. return -ENOMEM;
  74. stag = mhp->attr.stag;
  75. if (cxio_reregister_phys_mem(&rhp->rdev,
  76. &stag, mhp->attr.pdid,
  77. mhp->attr.perms,
  78. mhp->attr.zbva,
  79. mhp->attr.va_fbo,
  80. mhp->attr.len,
  81. shift-12,
  82. page_list,
  83. &mhp->attr.pbl_size, &mhp->attr.pbl_addr))
  84. return -ENOMEM;
  85. mhp->attr.state = 1;
  86. mhp->attr.stag = stag;
  87. mmid = stag >> 8;
  88. mhp->ibmr.rkey = mhp->ibmr.lkey = stag;
  89. insert_handle(rhp, &rhp->mmidr, mhp, mmid);
  90. PDBG("%s mmid 0x%x mhp %p\n", __FUNCTION__, mmid, mhp);
  91. return 0;
  92. }
  93. int build_phys_page_list(struct ib_phys_buf *buffer_list,
  94. int num_phys_buf,
  95. u64 *iova_start,
  96. u64 *total_size,
  97. int *npages,
  98. int *shift,
  99. __be64 **page_list)
  100. {
  101. u64 mask;
  102. int i, j, n;
  103. mask = 0;
  104. *total_size = 0;
  105. for (i = 0; i < num_phys_buf; ++i) {
  106. if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
  107. return -EINVAL;
  108. if (i != 0 && i != num_phys_buf - 1 &&
  109. (buffer_list[i].size & ~PAGE_MASK))
  110. return -EINVAL;
  111. *total_size += buffer_list[i].size;
  112. if (i > 0)
  113. mask |= buffer_list[i].addr;
  114. }
  115. if (*total_size > 0xFFFFFFFFULL)
  116. return -ENOMEM;
  117. /* Find largest page shift we can use to cover buffers */
  118. for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift))
  119. if (num_phys_buf > 1) {
  120. if ((1ULL << *shift) & mask)
  121. break;
  122. } else
  123. if (1ULL << *shift >=
  124. buffer_list[0].size +
  125. (buffer_list[0].addr & ((1ULL << *shift) - 1)))
  126. break;
  127. buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1);
  128. buffer_list[0].addr &= ~0ull << *shift;
  129. *npages = 0;
  130. for (i = 0; i < num_phys_buf; ++i)
  131. *npages += (buffer_list[i].size +
  132. (1ULL << *shift) - 1) >> *shift;
  133. if (!*npages)
  134. return -EINVAL;
  135. *page_list = kmalloc(sizeof(u64) * *npages, GFP_KERNEL);
  136. if (!*page_list)
  137. return -ENOMEM;
  138. n = 0;
  139. for (i = 0; i < num_phys_buf; ++i)
  140. for (j = 0;
  141. j < (buffer_list[i].size + (1ULL << *shift) - 1) >> *shift;
  142. ++j)
  143. (*page_list)[n++] = cpu_to_be64(buffer_list[i].addr +
  144. ((u64) j << *shift));
  145. PDBG("%s va 0x%llx mask 0x%llx shift %d len %lld pbl_size %d\n",
  146. __FUNCTION__, (unsigned long long) *iova_start,
  147. (unsigned long long) mask, *shift, (unsigned long long) *total_size,
  148. *npages);
  149. return 0;
  150. }