c2.c 33 KB

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  1. /*
  2. * Copyright (c) 2005 Ammasso, Inc. All rights reserved.
  3. * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/module.h>
  34. #include <linux/moduleparam.h>
  35. #include <linux/pci.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/inetdevice.h>
  39. #include <linux/delay.h>
  40. #include <linux/ethtool.h>
  41. #include <linux/mii.h>
  42. #include <linux/if_vlan.h>
  43. #include <linux/crc32.h>
  44. #include <linux/in.h>
  45. #include <linux/ip.h>
  46. #include <linux/tcp.h>
  47. #include <linux/init.h>
  48. #include <linux/dma-mapping.h>
  49. #include <asm/io.h>
  50. #include <asm/irq.h>
  51. #include <asm/byteorder.h>
  52. #include <rdma/ib_smi.h>
  53. #include "c2.h"
  54. #include "c2_provider.h"
  55. MODULE_AUTHOR("Tom Tucker <tom@opengridcomputing.com>");
  56. MODULE_DESCRIPTION("Ammasso AMSO1100 Low-level iWARP Driver");
  57. MODULE_LICENSE("Dual BSD/GPL");
  58. MODULE_VERSION(DRV_VERSION);
  59. static const u32 default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
  60. | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
  61. static int debug = -1; /* defaults above */
  62. module_param(debug, int, 0);
  63. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  64. static int c2_up(struct net_device *netdev);
  65. static int c2_down(struct net_device *netdev);
  66. static int c2_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  67. static void c2_tx_interrupt(struct net_device *netdev);
  68. static void c2_rx_interrupt(struct net_device *netdev);
  69. static irqreturn_t c2_interrupt(int irq, void *dev_id);
  70. static void c2_tx_timeout(struct net_device *netdev);
  71. static int c2_change_mtu(struct net_device *netdev, int new_mtu);
  72. static void c2_reset(struct c2_port *c2_port);
  73. static struct net_device_stats *c2_get_stats(struct net_device *netdev);
  74. static struct pci_device_id c2_pci_table[] = {
  75. { PCI_DEVICE(0x18b8, 0xb001) },
  76. { 0 }
  77. };
  78. MODULE_DEVICE_TABLE(pci, c2_pci_table);
  79. static void c2_print_macaddr(struct net_device *netdev)
  80. {
  81. pr_debug("%s: MAC %02X:%02X:%02X:%02X:%02X:%02X, "
  82. "IRQ %u\n", netdev->name,
  83. netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
  84. netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5],
  85. netdev->irq);
  86. }
  87. static void c2_set_rxbufsize(struct c2_port *c2_port)
  88. {
  89. struct net_device *netdev = c2_port->netdev;
  90. if (netdev->mtu > RX_BUF_SIZE)
  91. c2_port->rx_buf_size =
  92. netdev->mtu + ETH_HLEN + sizeof(struct c2_rxp_hdr) +
  93. NET_IP_ALIGN;
  94. else
  95. c2_port->rx_buf_size = sizeof(struct c2_rxp_hdr) + RX_BUF_SIZE;
  96. }
  97. /*
  98. * Allocate TX ring elements and chain them together.
  99. * One-to-one association of adapter descriptors with ring elements.
  100. */
  101. static int c2_tx_ring_alloc(struct c2_ring *tx_ring, void *vaddr,
  102. dma_addr_t base, void __iomem * mmio_txp_ring)
  103. {
  104. struct c2_tx_desc *tx_desc;
  105. struct c2_txp_desc __iomem *txp_desc;
  106. struct c2_element *elem;
  107. int i;
  108. tx_ring->start = kmalloc(sizeof(*elem) * tx_ring->count, GFP_KERNEL);
  109. if (!tx_ring->start)
  110. return -ENOMEM;
  111. elem = tx_ring->start;
  112. tx_desc = vaddr;
  113. txp_desc = mmio_txp_ring;
  114. for (i = 0; i < tx_ring->count; i++, elem++, tx_desc++, txp_desc++) {
  115. tx_desc->len = 0;
  116. tx_desc->status = 0;
  117. /* Set TXP_HTXD_UNINIT */
  118. __raw_writeq(cpu_to_be64(0x1122334455667788ULL),
  119. (void __iomem *) txp_desc + C2_TXP_ADDR);
  120. __raw_writew(0, (void __iomem *) txp_desc + C2_TXP_LEN);
  121. __raw_writew(cpu_to_be16(TXP_HTXD_UNINIT),
  122. (void __iomem *) txp_desc + C2_TXP_FLAGS);
  123. elem->skb = NULL;
  124. elem->ht_desc = tx_desc;
  125. elem->hw_desc = txp_desc;
  126. if (i == tx_ring->count - 1) {
  127. elem->next = tx_ring->start;
  128. tx_desc->next_offset = base;
  129. } else {
  130. elem->next = elem + 1;
  131. tx_desc->next_offset =
  132. base + (i + 1) * sizeof(*tx_desc);
  133. }
  134. }
  135. tx_ring->to_use = tx_ring->to_clean = tx_ring->start;
  136. return 0;
  137. }
  138. /*
  139. * Allocate RX ring elements and chain them together.
  140. * One-to-one association of adapter descriptors with ring elements.
  141. */
  142. static int c2_rx_ring_alloc(struct c2_ring *rx_ring, void *vaddr,
  143. dma_addr_t base, void __iomem * mmio_rxp_ring)
  144. {
  145. struct c2_rx_desc *rx_desc;
  146. struct c2_rxp_desc __iomem *rxp_desc;
  147. struct c2_element *elem;
  148. int i;
  149. rx_ring->start = kmalloc(sizeof(*elem) * rx_ring->count, GFP_KERNEL);
  150. if (!rx_ring->start)
  151. return -ENOMEM;
  152. elem = rx_ring->start;
  153. rx_desc = vaddr;
  154. rxp_desc = mmio_rxp_ring;
  155. for (i = 0; i < rx_ring->count; i++, elem++, rx_desc++, rxp_desc++) {
  156. rx_desc->len = 0;
  157. rx_desc->status = 0;
  158. /* Set RXP_HRXD_UNINIT */
  159. __raw_writew(cpu_to_be16(RXP_HRXD_OK),
  160. (void __iomem *) rxp_desc + C2_RXP_STATUS);
  161. __raw_writew(0, (void __iomem *) rxp_desc + C2_RXP_COUNT);
  162. __raw_writew(0, (void __iomem *) rxp_desc + C2_RXP_LEN);
  163. __raw_writeq(cpu_to_be64(0x99aabbccddeeffULL),
  164. (void __iomem *) rxp_desc + C2_RXP_ADDR);
  165. __raw_writew(cpu_to_be16(RXP_HRXD_UNINIT),
  166. (void __iomem *) rxp_desc + C2_RXP_FLAGS);
  167. elem->skb = NULL;
  168. elem->ht_desc = rx_desc;
  169. elem->hw_desc = rxp_desc;
  170. if (i == rx_ring->count - 1) {
  171. elem->next = rx_ring->start;
  172. rx_desc->next_offset = base;
  173. } else {
  174. elem->next = elem + 1;
  175. rx_desc->next_offset =
  176. base + (i + 1) * sizeof(*rx_desc);
  177. }
  178. }
  179. rx_ring->to_use = rx_ring->to_clean = rx_ring->start;
  180. return 0;
  181. }
  182. /* Setup buffer for receiving */
  183. static inline int c2_rx_alloc(struct c2_port *c2_port, struct c2_element *elem)
  184. {
  185. struct c2_dev *c2dev = c2_port->c2dev;
  186. struct c2_rx_desc *rx_desc = elem->ht_desc;
  187. struct sk_buff *skb;
  188. dma_addr_t mapaddr;
  189. u32 maplen;
  190. struct c2_rxp_hdr *rxp_hdr;
  191. skb = dev_alloc_skb(c2_port->rx_buf_size);
  192. if (unlikely(!skb)) {
  193. pr_debug("%s: out of memory for receive\n",
  194. c2_port->netdev->name);
  195. return -ENOMEM;
  196. }
  197. /* Zero out the rxp hdr in the sk_buff */
  198. memset(skb->data, 0, sizeof(*rxp_hdr));
  199. skb->dev = c2_port->netdev;
  200. maplen = c2_port->rx_buf_size;
  201. mapaddr =
  202. pci_map_single(c2dev->pcidev, skb->data, maplen,
  203. PCI_DMA_FROMDEVICE);
  204. /* Set the sk_buff RXP_header to RXP_HRXD_READY */
  205. rxp_hdr = (struct c2_rxp_hdr *) skb->data;
  206. rxp_hdr->flags = RXP_HRXD_READY;
  207. __raw_writew(0, elem->hw_desc + C2_RXP_STATUS);
  208. __raw_writew(cpu_to_be16((u16) maplen - sizeof(*rxp_hdr)),
  209. elem->hw_desc + C2_RXP_LEN);
  210. __raw_writeq(cpu_to_be64(mapaddr), elem->hw_desc + C2_RXP_ADDR);
  211. __raw_writew(cpu_to_be16(RXP_HRXD_READY), elem->hw_desc + C2_RXP_FLAGS);
  212. elem->skb = skb;
  213. elem->mapaddr = mapaddr;
  214. elem->maplen = maplen;
  215. rx_desc->len = maplen;
  216. return 0;
  217. }
  218. /*
  219. * Allocate buffers for the Rx ring
  220. * For receive: rx_ring.to_clean is next received frame
  221. */
  222. static int c2_rx_fill(struct c2_port *c2_port)
  223. {
  224. struct c2_ring *rx_ring = &c2_port->rx_ring;
  225. struct c2_element *elem;
  226. int ret = 0;
  227. elem = rx_ring->start;
  228. do {
  229. if (c2_rx_alloc(c2_port, elem)) {
  230. ret = 1;
  231. break;
  232. }
  233. } while ((elem = elem->next) != rx_ring->start);
  234. rx_ring->to_clean = rx_ring->start;
  235. return ret;
  236. }
  237. /* Free all buffers in RX ring, assumes receiver stopped */
  238. static void c2_rx_clean(struct c2_port *c2_port)
  239. {
  240. struct c2_dev *c2dev = c2_port->c2dev;
  241. struct c2_ring *rx_ring = &c2_port->rx_ring;
  242. struct c2_element *elem;
  243. struct c2_rx_desc *rx_desc;
  244. elem = rx_ring->start;
  245. do {
  246. rx_desc = elem->ht_desc;
  247. rx_desc->len = 0;
  248. __raw_writew(0, elem->hw_desc + C2_RXP_STATUS);
  249. __raw_writew(0, elem->hw_desc + C2_RXP_COUNT);
  250. __raw_writew(0, elem->hw_desc + C2_RXP_LEN);
  251. __raw_writeq(cpu_to_be64(0x99aabbccddeeffULL),
  252. elem->hw_desc + C2_RXP_ADDR);
  253. __raw_writew(cpu_to_be16(RXP_HRXD_UNINIT),
  254. elem->hw_desc + C2_RXP_FLAGS);
  255. if (elem->skb) {
  256. pci_unmap_single(c2dev->pcidev, elem->mapaddr,
  257. elem->maplen, PCI_DMA_FROMDEVICE);
  258. dev_kfree_skb(elem->skb);
  259. elem->skb = NULL;
  260. }
  261. } while ((elem = elem->next) != rx_ring->start);
  262. }
  263. static inline int c2_tx_free(struct c2_dev *c2dev, struct c2_element *elem)
  264. {
  265. struct c2_tx_desc *tx_desc = elem->ht_desc;
  266. tx_desc->len = 0;
  267. pci_unmap_single(c2dev->pcidev, elem->mapaddr, elem->maplen,
  268. PCI_DMA_TODEVICE);
  269. if (elem->skb) {
  270. dev_kfree_skb_any(elem->skb);
  271. elem->skb = NULL;
  272. }
  273. return 0;
  274. }
  275. /* Free all buffers in TX ring, assumes transmitter stopped */
  276. static void c2_tx_clean(struct c2_port *c2_port)
  277. {
  278. struct c2_ring *tx_ring = &c2_port->tx_ring;
  279. struct c2_element *elem;
  280. struct c2_txp_desc txp_htxd;
  281. int retry;
  282. unsigned long flags;
  283. spin_lock_irqsave(&c2_port->tx_lock, flags);
  284. elem = tx_ring->start;
  285. do {
  286. retry = 0;
  287. do {
  288. txp_htxd.flags =
  289. readw(elem->hw_desc + C2_TXP_FLAGS);
  290. if (txp_htxd.flags == TXP_HTXD_READY) {
  291. retry = 1;
  292. __raw_writew(0,
  293. elem->hw_desc + C2_TXP_LEN);
  294. __raw_writeq(0,
  295. elem->hw_desc + C2_TXP_ADDR);
  296. __raw_writew(cpu_to_be16(TXP_HTXD_DONE),
  297. elem->hw_desc + C2_TXP_FLAGS);
  298. c2_port->netstats.tx_dropped++;
  299. break;
  300. } else {
  301. __raw_writew(0,
  302. elem->hw_desc + C2_TXP_LEN);
  303. __raw_writeq(cpu_to_be64(0x1122334455667788ULL),
  304. elem->hw_desc + C2_TXP_ADDR);
  305. __raw_writew(cpu_to_be16(TXP_HTXD_UNINIT),
  306. elem->hw_desc + C2_TXP_FLAGS);
  307. }
  308. c2_tx_free(c2_port->c2dev, elem);
  309. } while ((elem = elem->next) != tx_ring->start);
  310. } while (retry);
  311. c2_port->tx_avail = c2_port->tx_ring.count - 1;
  312. c2_port->c2dev->cur_tx = tx_ring->to_use - tx_ring->start;
  313. if (c2_port->tx_avail > MAX_SKB_FRAGS + 1)
  314. netif_wake_queue(c2_port->netdev);
  315. spin_unlock_irqrestore(&c2_port->tx_lock, flags);
  316. }
  317. /*
  318. * Process transmit descriptors marked 'DONE' by the firmware,
  319. * freeing up their unneeded sk_buffs.
  320. */
  321. static void c2_tx_interrupt(struct net_device *netdev)
  322. {
  323. struct c2_port *c2_port = netdev_priv(netdev);
  324. struct c2_dev *c2dev = c2_port->c2dev;
  325. struct c2_ring *tx_ring = &c2_port->tx_ring;
  326. struct c2_element *elem;
  327. struct c2_txp_desc txp_htxd;
  328. spin_lock(&c2_port->tx_lock);
  329. for (elem = tx_ring->to_clean; elem != tx_ring->to_use;
  330. elem = elem->next) {
  331. txp_htxd.flags =
  332. be16_to_cpu(readw(elem->hw_desc + C2_TXP_FLAGS));
  333. if (txp_htxd.flags != TXP_HTXD_DONE)
  334. break;
  335. if (netif_msg_tx_done(c2_port)) {
  336. /* PCI reads are expensive in fast path */
  337. txp_htxd.len =
  338. be16_to_cpu(readw(elem->hw_desc + C2_TXP_LEN));
  339. pr_debug("%s: tx done slot %3Zu status 0x%x len "
  340. "%5u bytes\n",
  341. netdev->name, elem - tx_ring->start,
  342. txp_htxd.flags, txp_htxd.len);
  343. }
  344. c2_tx_free(c2dev, elem);
  345. ++(c2_port->tx_avail);
  346. }
  347. tx_ring->to_clean = elem;
  348. if (netif_queue_stopped(netdev)
  349. && c2_port->tx_avail > MAX_SKB_FRAGS + 1)
  350. netif_wake_queue(netdev);
  351. spin_unlock(&c2_port->tx_lock);
  352. }
  353. static void c2_rx_error(struct c2_port *c2_port, struct c2_element *elem)
  354. {
  355. struct c2_rx_desc *rx_desc = elem->ht_desc;
  356. struct c2_rxp_hdr *rxp_hdr = (struct c2_rxp_hdr *) elem->skb->data;
  357. if (rxp_hdr->status != RXP_HRXD_OK ||
  358. rxp_hdr->len > (rx_desc->len - sizeof(*rxp_hdr))) {
  359. pr_debug("BAD RXP_HRXD\n");
  360. pr_debug(" rx_desc : %p\n", rx_desc);
  361. pr_debug(" index : %Zu\n",
  362. elem - c2_port->rx_ring.start);
  363. pr_debug(" len : %u\n", rx_desc->len);
  364. pr_debug(" rxp_hdr : %p [PA %p]\n", rxp_hdr,
  365. (void *) __pa((unsigned long) rxp_hdr));
  366. pr_debug(" flags : 0x%x\n", rxp_hdr->flags);
  367. pr_debug(" status: 0x%x\n", rxp_hdr->status);
  368. pr_debug(" len : %u\n", rxp_hdr->len);
  369. pr_debug(" rsvd : 0x%x\n", rxp_hdr->rsvd);
  370. }
  371. /* Setup the skb for reuse since we're dropping this pkt */
  372. elem->skb->data = elem->skb->head;
  373. skb_reset_tail_pointer(elem->skb);
  374. /* Zero out the rxp hdr in the sk_buff */
  375. memset(elem->skb->data, 0, sizeof(*rxp_hdr));
  376. /* Write the descriptor to the adapter's rx ring */
  377. __raw_writew(0, elem->hw_desc + C2_RXP_STATUS);
  378. __raw_writew(0, elem->hw_desc + C2_RXP_COUNT);
  379. __raw_writew(cpu_to_be16((u16) elem->maplen - sizeof(*rxp_hdr)),
  380. elem->hw_desc + C2_RXP_LEN);
  381. __raw_writeq(cpu_to_be64(elem->mapaddr), elem->hw_desc + C2_RXP_ADDR);
  382. __raw_writew(cpu_to_be16(RXP_HRXD_READY), elem->hw_desc + C2_RXP_FLAGS);
  383. pr_debug("packet dropped\n");
  384. c2_port->netstats.rx_dropped++;
  385. }
  386. static void c2_rx_interrupt(struct net_device *netdev)
  387. {
  388. struct c2_port *c2_port = netdev_priv(netdev);
  389. struct c2_dev *c2dev = c2_port->c2dev;
  390. struct c2_ring *rx_ring = &c2_port->rx_ring;
  391. struct c2_element *elem;
  392. struct c2_rx_desc *rx_desc;
  393. struct c2_rxp_hdr *rxp_hdr;
  394. struct sk_buff *skb;
  395. dma_addr_t mapaddr;
  396. u32 maplen, buflen;
  397. unsigned long flags;
  398. spin_lock_irqsave(&c2dev->lock, flags);
  399. /* Begin where we left off */
  400. rx_ring->to_clean = rx_ring->start + c2dev->cur_rx;
  401. for (elem = rx_ring->to_clean; elem->next != rx_ring->to_clean;
  402. elem = elem->next) {
  403. rx_desc = elem->ht_desc;
  404. mapaddr = elem->mapaddr;
  405. maplen = elem->maplen;
  406. skb = elem->skb;
  407. rxp_hdr = (struct c2_rxp_hdr *) skb->data;
  408. if (rxp_hdr->flags != RXP_HRXD_DONE)
  409. break;
  410. buflen = rxp_hdr->len;
  411. /* Sanity check the RXP header */
  412. if (rxp_hdr->status != RXP_HRXD_OK ||
  413. buflen > (rx_desc->len - sizeof(*rxp_hdr))) {
  414. c2_rx_error(c2_port, elem);
  415. continue;
  416. }
  417. /*
  418. * Allocate and map a new skb for replenishing the host
  419. * RX desc
  420. */
  421. if (c2_rx_alloc(c2_port, elem)) {
  422. c2_rx_error(c2_port, elem);
  423. continue;
  424. }
  425. /* Unmap the old skb */
  426. pci_unmap_single(c2dev->pcidev, mapaddr, maplen,
  427. PCI_DMA_FROMDEVICE);
  428. prefetch(skb->data);
  429. /*
  430. * Skip past the leading 8 bytes comprising of the
  431. * "struct c2_rxp_hdr", prepended by the adapter
  432. * to the usual Ethernet header ("struct ethhdr"),
  433. * to the start of the raw Ethernet packet.
  434. *
  435. * Fix up the various fields in the sk_buff before
  436. * passing it up to netif_rx(). The transfer size
  437. * (in bytes) specified by the adapter len field of
  438. * the "struct rxp_hdr_t" does NOT include the
  439. * "sizeof(struct c2_rxp_hdr)".
  440. */
  441. skb->data += sizeof(*rxp_hdr);
  442. skb_set_tail_pointer(skb, buflen);
  443. skb->len = buflen;
  444. skb->protocol = eth_type_trans(skb, netdev);
  445. netif_rx(skb);
  446. netdev->last_rx = jiffies;
  447. c2_port->netstats.rx_packets++;
  448. c2_port->netstats.rx_bytes += buflen;
  449. }
  450. /* Save where we left off */
  451. rx_ring->to_clean = elem;
  452. c2dev->cur_rx = elem - rx_ring->start;
  453. C2_SET_CUR_RX(c2dev, c2dev->cur_rx);
  454. spin_unlock_irqrestore(&c2dev->lock, flags);
  455. }
  456. /*
  457. * Handle netisr0 TX & RX interrupts.
  458. */
  459. static irqreturn_t c2_interrupt(int irq, void *dev_id)
  460. {
  461. unsigned int netisr0, dmaisr;
  462. int handled = 0;
  463. struct c2_dev *c2dev = (struct c2_dev *) dev_id;
  464. /* Process CCILNET interrupts */
  465. netisr0 = readl(c2dev->regs + C2_NISR0);
  466. if (netisr0) {
  467. /*
  468. * There is an issue with the firmware that always
  469. * provides the status of RX for both TX & RX
  470. * interrupts. So process both queues here.
  471. */
  472. c2_rx_interrupt(c2dev->netdev);
  473. c2_tx_interrupt(c2dev->netdev);
  474. /* Clear the interrupt */
  475. writel(netisr0, c2dev->regs + C2_NISR0);
  476. handled++;
  477. }
  478. /* Process RNIC interrupts */
  479. dmaisr = readl(c2dev->regs + C2_DISR);
  480. if (dmaisr) {
  481. writel(dmaisr, c2dev->regs + C2_DISR);
  482. c2_rnic_interrupt(c2dev);
  483. handled++;
  484. }
  485. if (handled) {
  486. return IRQ_HANDLED;
  487. } else {
  488. return IRQ_NONE;
  489. }
  490. }
  491. static int c2_up(struct net_device *netdev)
  492. {
  493. struct c2_port *c2_port = netdev_priv(netdev);
  494. struct c2_dev *c2dev = c2_port->c2dev;
  495. struct c2_element *elem;
  496. struct c2_rxp_hdr *rxp_hdr;
  497. struct in_device *in_dev;
  498. size_t rx_size, tx_size;
  499. int ret, i;
  500. unsigned int netimr0;
  501. if (netif_msg_ifup(c2_port))
  502. pr_debug("%s: enabling interface\n", netdev->name);
  503. /* Set the Rx buffer size based on MTU */
  504. c2_set_rxbufsize(c2_port);
  505. /* Allocate DMA'able memory for Tx/Rx host descriptor rings */
  506. rx_size = c2_port->rx_ring.count * sizeof(struct c2_rx_desc);
  507. tx_size = c2_port->tx_ring.count * sizeof(struct c2_tx_desc);
  508. c2_port->mem_size = tx_size + rx_size;
  509. c2_port->mem = pci_alloc_consistent(c2dev->pcidev, c2_port->mem_size,
  510. &c2_port->dma);
  511. if (c2_port->mem == NULL) {
  512. pr_debug("Unable to allocate memory for "
  513. "host descriptor rings\n");
  514. return -ENOMEM;
  515. }
  516. memset(c2_port->mem, 0, c2_port->mem_size);
  517. /* Create the Rx host descriptor ring */
  518. if ((ret =
  519. c2_rx_ring_alloc(&c2_port->rx_ring, c2_port->mem, c2_port->dma,
  520. c2dev->mmio_rxp_ring))) {
  521. pr_debug("Unable to create RX ring\n");
  522. goto bail0;
  523. }
  524. /* Allocate Rx buffers for the host descriptor ring */
  525. if (c2_rx_fill(c2_port)) {
  526. pr_debug("Unable to fill RX ring\n");
  527. goto bail1;
  528. }
  529. /* Create the Tx host descriptor ring */
  530. if ((ret = c2_tx_ring_alloc(&c2_port->tx_ring, c2_port->mem + rx_size,
  531. c2_port->dma + rx_size,
  532. c2dev->mmio_txp_ring))) {
  533. pr_debug("Unable to create TX ring\n");
  534. goto bail1;
  535. }
  536. /* Set the TX pointer to where we left off */
  537. c2_port->tx_avail = c2_port->tx_ring.count - 1;
  538. c2_port->tx_ring.to_use = c2_port->tx_ring.to_clean =
  539. c2_port->tx_ring.start + c2dev->cur_tx;
  540. /* missing: Initialize MAC */
  541. BUG_ON(c2_port->tx_ring.to_use != c2_port->tx_ring.to_clean);
  542. /* Reset the adapter, ensures the driver is in sync with the RXP */
  543. c2_reset(c2_port);
  544. /* Reset the READY bit in the sk_buff RXP headers & adapter HRXDQ */
  545. for (i = 0, elem = c2_port->rx_ring.start; i < c2_port->rx_ring.count;
  546. i++, elem++) {
  547. rxp_hdr = (struct c2_rxp_hdr *) elem->skb->data;
  548. rxp_hdr->flags = 0;
  549. __raw_writew(cpu_to_be16(RXP_HRXD_READY),
  550. elem->hw_desc + C2_RXP_FLAGS);
  551. }
  552. /* Enable network packets */
  553. netif_start_queue(netdev);
  554. /* Enable IRQ */
  555. writel(0, c2dev->regs + C2_IDIS);
  556. netimr0 = readl(c2dev->regs + C2_NIMR0);
  557. netimr0 &= ~(C2_PCI_HTX_INT | C2_PCI_HRX_INT);
  558. writel(netimr0, c2dev->regs + C2_NIMR0);
  559. /* Tell the stack to ignore arp requests for ipaddrs bound to
  560. * other interfaces. This is needed to prevent the host stack
  561. * from responding to arp requests to the ipaddr bound on the
  562. * rdma interface.
  563. */
  564. in_dev = in_dev_get(netdev);
  565. in_dev->cnf.arp_ignore = 1;
  566. in_dev_put(in_dev);
  567. return 0;
  568. bail1:
  569. c2_rx_clean(c2_port);
  570. kfree(c2_port->rx_ring.start);
  571. bail0:
  572. pci_free_consistent(c2dev->pcidev, c2_port->mem_size, c2_port->mem,
  573. c2_port->dma);
  574. return ret;
  575. }
  576. static int c2_down(struct net_device *netdev)
  577. {
  578. struct c2_port *c2_port = netdev_priv(netdev);
  579. struct c2_dev *c2dev = c2_port->c2dev;
  580. if (netif_msg_ifdown(c2_port))
  581. pr_debug("%s: disabling interface\n",
  582. netdev->name);
  583. /* Wait for all the queued packets to get sent */
  584. c2_tx_interrupt(netdev);
  585. /* Disable network packets */
  586. netif_stop_queue(netdev);
  587. /* Disable IRQs by clearing the interrupt mask */
  588. writel(1, c2dev->regs + C2_IDIS);
  589. writel(0, c2dev->regs + C2_NIMR0);
  590. /* missing: Stop transmitter */
  591. /* missing: Stop receiver */
  592. /* Reset the adapter, ensures the driver is in sync with the RXP */
  593. c2_reset(c2_port);
  594. /* missing: Turn off LEDs here */
  595. /* Free all buffers in the host descriptor rings */
  596. c2_tx_clean(c2_port);
  597. c2_rx_clean(c2_port);
  598. /* Free the host descriptor rings */
  599. kfree(c2_port->rx_ring.start);
  600. kfree(c2_port->tx_ring.start);
  601. pci_free_consistent(c2dev->pcidev, c2_port->mem_size, c2_port->mem,
  602. c2_port->dma);
  603. return 0;
  604. }
  605. static void c2_reset(struct c2_port *c2_port)
  606. {
  607. struct c2_dev *c2dev = c2_port->c2dev;
  608. unsigned int cur_rx = c2dev->cur_rx;
  609. /* Tell the hardware to quiesce */
  610. C2_SET_CUR_RX(c2dev, cur_rx | C2_PCI_HRX_QUI);
  611. /*
  612. * The hardware will reset the C2_PCI_HRX_QUI bit once
  613. * the RXP is quiesced. Wait 2 seconds for this.
  614. */
  615. ssleep(2);
  616. cur_rx = C2_GET_CUR_RX(c2dev);
  617. if (cur_rx & C2_PCI_HRX_QUI)
  618. pr_debug("c2_reset: failed to quiesce the hardware!\n");
  619. cur_rx &= ~C2_PCI_HRX_QUI;
  620. c2dev->cur_rx = cur_rx;
  621. pr_debug("Current RX: %u\n", c2dev->cur_rx);
  622. }
  623. static int c2_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  624. {
  625. struct c2_port *c2_port = netdev_priv(netdev);
  626. struct c2_dev *c2dev = c2_port->c2dev;
  627. struct c2_ring *tx_ring = &c2_port->tx_ring;
  628. struct c2_element *elem;
  629. dma_addr_t mapaddr;
  630. u32 maplen;
  631. unsigned long flags;
  632. unsigned int i;
  633. spin_lock_irqsave(&c2_port->tx_lock, flags);
  634. if (unlikely(c2_port->tx_avail < (skb_shinfo(skb)->nr_frags + 1))) {
  635. netif_stop_queue(netdev);
  636. spin_unlock_irqrestore(&c2_port->tx_lock, flags);
  637. pr_debug("%s: Tx ring full when queue awake!\n",
  638. netdev->name);
  639. return NETDEV_TX_BUSY;
  640. }
  641. maplen = skb_headlen(skb);
  642. mapaddr =
  643. pci_map_single(c2dev->pcidev, skb->data, maplen, PCI_DMA_TODEVICE);
  644. elem = tx_ring->to_use;
  645. elem->skb = skb;
  646. elem->mapaddr = mapaddr;
  647. elem->maplen = maplen;
  648. /* Tell HW to xmit */
  649. __raw_writeq(cpu_to_be64(mapaddr), elem->hw_desc + C2_TXP_ADDR);
  650. __raw_writew(cpu_to_be16(maplen), elem->hw_desc + C2_TXP_LEN);
  651. __raw_writew(cpu_to_be16(TXP_HTXD_READY), elem->hw_desc + C2_TXP_FLAGS);
  652. c2_port->netstats.tx_packets++;
  653. c2_port->netstats.tx_bytes += maplen;
  654. /* Loop thru additional data fragments and queue them */
  655. if (skb_shinfo(skb)->nr_frags) {
  656. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  657. skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  658. maplen = frag->size;
  659. mapaddr =
  660. pci_map_page(c2dev->pcidev, frag->page,
  661. frag->page_offset, maplen,
  662. PCI_DMA_TODEVICE);
  663. elem = elem->next;
  664. elem->skb = NULL;
  665. elem->mapaddr = mapaddr;
  666. elem->maplen = maplen;
  667. /* Tell HW to xmit */
  668. __raw_writeq(cpu_to_be64(mapaddr),
  669. elem->hw_desc + C2_TXP_ADDR);
  670. __raw_writew(cpu_to_be16(maplen),
  671. elem->hw_desc + C2_TXP_LEN);
  672. __raw_writew(cpu_to_be16(TXP_HTXD_READY),
  673. elem->hw_desc + C2_TXP_FLAGS);
  674. c2_port->netstats.tx_packets++;
  675. c2_port->netstats.tx_bytes += maplen;
  676. }
  677. }
  678. tx_ring->to_use = elem->next;
  679. c2_port->tx_avail -= (skb_shinfo(skb)->nr_frags + 1);
  680. if (c2_port->tx_avail <= MAX_SKB_FRAGS + 1) {
  681. netif_stop_queue(netdev);
  682. if (netif_msg_tx_queued(c2_port))
  683. pr_debug("%s: transmit queue full\n",
  684. netdev->name);
  685. }
  686. spin_unlock_irqrestore(&c2_port->tx_lock, flags);
  687. netdev->trans_start = jiffies;
  688. return NETDEV_TX_OK;
  689. }
  690. static struct net_device_stats *c2_get_stats(struct net_device *netdev)
  691. {
  692. struct c2_port *c2_port = netdev_priv(netdev);
  693. return &c2_port->netstats;
  694. }
  695. static void c2_tx_timeout(struct net_device *netdev)
  696. {
  697. struct c2_port *c2_port = netdev_priv(netdev);
  698. if (netif_msg_timer(c2_port))
  699. pr_debug("%s: tx timeout\n", netdev->name);
  700. c2_tx_clean(c2_port);
  701. }
  702. static int c2_change_mtu(struct net_device *netdev, int new_mtu)
  703. {
  704. int ret = 0;
  705. if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
  706. return -EINVAL;
  707. netdev->mtu = new_mtu;
  708. if (netif_running(netdev)) {
  709. c2_down(netdev);
  710. c2_up(netdev);
  711. }
  712. return ret;
  713. }
  714. /* Initialize network device */
  715. static struct net_device *c2_devinit(struct c2_dev *c2dev,
  716. void __iomem * mmio_addr)
  717. {
  718. struct c2_port *c2_port = NULL;
  719. struct net_device *netdev = alloc_etherdev(sizeof(*c2_port));
  720. if (!netdev) {
  721. pr_debug("c2_port etherdev alloc failed");
  722. return NULL;
  723. }
  724. SET_MODULE_OWNER(netdev);
  725. SET_NETDEV_DEV(netdev, &c2dev->pcidev->dev);
  726. netdev->open = c2_up;
  727. netdev->stop = c2_down;
  728. netdev->hard_start_xmit = c2_xmit_frame;
  729. netdev->get_stats = c2_get_stats;
  730. netdev->tx_timeout = c2_tx_timeout;
  731. netdev->change_mtu = c2_change_mtu;
  732. netdev->watchdog_timeo = C2_TX_TIMEOUT;
  733. netdev->irq = c2dev->pcidev->irq;
  734. c2_port = netdev_priv(netdev);
  735. c2_port->netdev = netdev;
  736. c2_port->c2dev = c2dev;
  737. c2_port->msg_enable = netif_msg_init(debug, default_msg);
  738. c2_port->tx_ring.count = C2_NUM_TX_DESC;
  739. c2_port->rx_ring.count = C2_NUM_RX_DESC;
  740. spin_lock_init(&c2_port->tx_lock);
  741. /* Copy our 48-bit ethernet hardware address */
  742. memcpy_fromio(netdev->dev_addr, mmio_addr + C2_REGS_ENADDR, 6);
  743. /* Validate the MAC address */
  744. if (!is_valid_ether_addr(netdev->dev_addr)) {
  745. pr_debug("Invalid MAC Address\n");
  746. c2_print_macaddr(netdev);
  747. free_netdev(netdev);
  748. return NULL;
  749. }
  750. c2dev->netdev = netdev;
  751. return netdev;
  752. }
  753. static int __devinit c2_probe(struct pci_dev *pcidev,
  754. const struct pci_device_id *ent)
  755. {
  756. int ret = 0, i;
  757. unsigned long reg0_start, reg0_flags, reg0_len;
  758. unsigned long reg2_start, reg2_flags, reg2_len;
  759. unsigned long reg4_start, reg4_flags, reg4_len;
  760. unsigned kva_map_size;
  761. struct net_device *netdev = NULL;
  762. struct c2_dev *c2dev = NULL;
  763. void __iomem *mmio_regs = NULL;
  764. printk(KERN_INFO PFX "AMSO1100 Gigabit Ethernet driver v%s loaded\n",
  765. DRV_VERSION);
  766. /* Enable PCI device */
  767. ret = pci_enable_device(pcidev);
  768. if (ret) {
  769. printk(KERN_ERR PFX "%s: Unable to enable PCI device\n",
  770. pci_name(pcidev));
  771. goto bail0;
  772. }
  773. reg0_start = pci_resource_start(pcidev, BAR_0);
  774. reg0_len = pci_resource_len(pcidev, BAR_0);
  775. reg0_flags = pci_resource_flags(pcidev, BAR_0);
  776. reg2_start = pci_resource_start(pcidev, BAR_2);
  777. reg2_len = pci_resource_len(pcidev, BAR_2);
  778. reg2_flags = pci_resource_flags(pcidev, BAR_2);
  779. reg4_start = pci_resource_start(pcidev, BAR_4);
  780. reg4_len = pci_resource_len(pcidev, BAR_4);
  781. reg4_flags = pci_resource_flags(pcidev, BAR_4);
  782. pr_debug("BAR0 size = 0x%lX bytes\n", reg0_len);
  783. pr_debug("BAR2 size = 0x%lX bytes\n", reg2_len);
  784. pr_debug("BAR4 size = 0x%lX bytes\n", reg4_len);
  785. /* Make sure PCI base addr are MMIO */
  786. if (!(reg0_flags & IORESOURCE_MEM) ||
  787. !(reg2_flags & IORESOURCE_MEM) || !(reg4_flags & IORESOURCE_MEM)) {
  788. printk(KERN_ERR PFX "PCI regions not an MMIO resource\n");
  789. ret = -ENODEV;
  790. goto bail1;
  791. }
  792. /* Check for weird/broken PCI region reporting */
  793. if ((reg0_len < C2_REG0_SIZE) ||
  794. (reg2_len < C2_REG2_SIZE) || (reg4_len < C2_REG4_SIZE)) {
  795. printk(KERN_ERR PFX "Invalid PCI region sizes\n");
  796. ret = -ENODEV;
  797. goto bail1;
  798. }
  799. /* Reserve PCI I/O and memory resources */
  800. ret = pci_request_regions(pcidev, DRV_NAME);
  801. if (ret) {
  802. printk(KERN_ERR PFX "%s: Unable to request regions\n",
  803. pci_name(pcidev));
  804. goto bail1;
  805. }
  806. if ((sizeof(dma_addr_t) > 4)) {
  807. ret = pci_set_dma_mask(pcidev, DMA_64BIT_MASK);
  808. if (ret < 0) {
  809. printk(KERN_ERR PFX "64b DMA configuration failed\n");
  810. goto bail2;
  811. }
  812. } else {
  813. ret = pci_set_dma_mask(pcidev, DMA_32BIT_MASK);
  814. if (ret < 0) {
  815. printk(KERN_ERR PFX "32b DMA configuration failed\n");
  816. goto bail2;
  817. }
  818. }
  819. /* Enables bus-mastering on the device */
  820. pci_set_master(pcidev);
  821. /* Remap the adapter PCI registers in BAR4 */
  822. mmio_regs = ioremap_nocache(reg4_start + C2_PCI_REGS_OFFSET,
  823. sizeof(struct c2_adapter_pci_regs));
  824. if (mmio_regs == 0UL) {
  825. printk(KERN_ERR PFX
  826. "Unable to remap adapter PCI registers in BAR4\n");
  827. ret = -EIO;
  828. goto bail2;
  829. }
  830. /* Validate PCI regs magic */
  831. for (i = 0; i < sizeof(c2_magic); i++) {
  832. if (c2_magic[i] != readb(mmio_regs + C2_REGS_MAGIC + i)) {
  833. printk(KERN_ERR PFX "Downlevel Firmware boot loader "
  834. "[%d/%Zd: got 0x%x, exp 0x%x]. Use the cc_flash "
  835. "utility to update your boot loader\n",
  836. i + 1, sizeof(c2_magic),
  837. readb(mmio_regs + C2_REGS_MAGIC + i),
  838. c2_magic[i]);
  839. printk(KERN_ERR PFX "Adapter not claimed\n");
  840. iounmap(mmio_regs);
  841. ret = -EIO;
  842. goto bail2;
  843. }
  844. }
  845. /* Validate the adapter version */
  846. if (be32_to_cpu(readl(mmio_regs + C2_REGS_VERS)) != C2_VERSION) {
  847. printk(KERN_ERR PFX "Version mismatch "
  848. "[fw=%u, c2=%u], Adapter not claimed\n",
  849. be32_to_cpu(readl(mmio_regs + C2_REGS_VERS)),
  850. C2_VERSION);
  851. ret = -EINVAL;
  852. iounmap(mmio_regs);
  853. goto bail2;
  854. }
  855. /* Validate the adapter IVN */
  856. if (be32_to_cpu(readl(mmio_regs + C2_REGS_IVN)) != C2_IVN) {
  857. printk(KERN_ERR PFX "Downlevel FIrmware level. You should be using "
  858. "the OpenIB device support kit. "
  859. "[fw=0x%x, c2=0x%x], Adapter not claimed\n",
  860. be32_to_cpu(readl(mmio_regs + C2_REGS_IVN)),
  861. C2_IVN);
  862. ret = -EINVAL;
  863. iounmap(mmio_regs);
  864. goto bail2;
  865. }
  866. /* Allocate hardware structure */
  867. c2dev = (struct c2_dev *) ib_alloc_device(sizeof(*c2dev));
  868. if (!c2dev) {
  869. printk(KERN_ERR PFX "%s: Unable to alloc hardware struct\n",
  870. pci_name(pcidev));
  871. ret = -ENOMEM;
  872. iounmap(mmio_regs);
  873. goto bail2;
  874. }
  875. memset(c2dev, 0, sizeof(*c2dev));
  876. spin_lock_init(&c2dev->lock);
  877. c2dev->pcidev = pcidev;
  878. c2dev->cur_tx = 0;
  879. /* Get the last RX index */
  880. c2dev->cur_rx =
  881. (be32_to_cpu(readl(mmio_regs + C2_REGS_HRX_CUR)) -
  882. 0xffffc000) / sizeof(struct c2_rxp_desc);
  883. /* Request an interrupt line for the driver */
  884. ret = request_irq(pcidev->irq, c2_interrupt, IRQF_SHARED, DRV_NAME, c2dev);
  885. if (ret) {
  886. printk(KERN_ERR PFX "%s: requested IRQ %u is busy\n",
  887. pci_name(pcidev), pcidev->irq);
  888. iounmap(mmio_regs);
  889. goto bail3;
  890. }
  891. /* Set driver specific data */
  892. pci_set_drvdata(pcidev, c2dev);
  893. /* Initialize network device */
  894. if ((netdev = c2_devinit(c2dev, mmio_regs)) == NULL) {
  895. iounmap(mmio_regs);
  896. goto bail4;
  897. }
  898. /* Save off the actual size prior to unmapping mmio_regs */
  899. kva_map_size = be32_to_cpu(readl(mmio_regs + C2_REGS_PCI_WINSIZE));
  900. /* Unmap the adapter PCI registers in BAR4 */
  901. iounmap(mmio_regs);
  902. /* Register network device */
  903. ret = register_netdev(netdev);
  904. if (ret) {
  905. printk(KERN_ERR PFX "Unable to register netdev, ret = %d\n",
  906. ret);
  907. goto bail5;
  908. }
  909. /* Disable network packets */
  910. netif_stop_queue(netdev);
  911. /* Remap the adapter HRXDQ PA space to kernel VA space */
  912. c2dev->mmio_rxp_ring = ioremap_nocache(reg4_start + C2_RXP_HRXDQ_OFFSET,
  913. C2_RXP_HRXDQ_SIZE);
  914. if (c2dev->mmio_rxp_ring == 0UL) {
  915. printk(KERN_ERR PFX "Unable to remap MMIO HRXDQ region\n");
  916. ret = -EIO;
  917. goto bail6;
  918. }
  919. /* Remap the adapter HTXDQ PA space to kernel VA space */
  920. c2dev->mmio_txp_ring = ioremap_nocache(reg4_start + C2_TXP_HTXDQ_OFFSET,
  921. C2_TXP_HTXDQ_SIZE);
  922. if (c2dev->mmio_txp_ring == 0UL) {
  923. printk(KERN_ERR PFX "Unable to remap MMIO HTXDQ region\n");
  924. ret = -EIO;
  925. goto bail7;
  926. }
  927. /* Save off the current RX index in the last 4 bytes of the TXP Ring */
  928. C2_SET_CUR_RX(c2dev, c2dev->cur_rx);
  929. /* Remap the PCI registers in adapter BAR0 to kernel VA space */
  930. c2dev->regs = ioremap_nocache(reg0_start, reg0_len);
  931. if (c2dev->regs == 0UL) {
  932. printk(KERN_ERR PFX "Unable to remap BAR0\n");
  933. ret = -EIO;
  934. goto bail8;
  935. }
  936. /* Remap the PCI registers in adapter BAR4 to kernel VA space */
  937. c2dev->pa = reg4_start + C2_PCI_REGS_OFFSET;
  938. c2dev->kva = ioremap_nocache(reg4_start + C2_PCI_REGS_OFFSET,
  939. kva_map_size);
  940. if (c2dev->kva == 0UL) {
  941. printk(KERN_ERR PFX "Unable to remap BAR4\n");
  942. ret = -EIO;
  943. goto bail9;
  944. }
  945. /* Print out the MAC address */
  946. c2_print_macaddr(netdev);
  947. ret = c2_rnic_init(c2dev);
  948. if (ret) {
  949. printk(KERN_ERR PFX "c2_rnic_init failed: %d\n", ret);
  950. goto bail10;
  951. }
  952. if (c2_register_device(c2dev))
  953. goto bail10;
  954. return 0;
  955. bail10:
  956. iounmap(c2dev->kva);
  957. bail9:
  958. iounmap(c2dev->regs);
  959. bail8:
  960. iounmap(c2dev->mmio_txp_ring);
  961. bail7:
  962. iounmap(c2dev->mmio_rxp_ring);
  963. bail6:
  964. unregister_netdev(netdev);
  965. bail5:
  966. free_netdev(netdev);
  967. bail4:
  968. free_irq(pcidev->irq, c2dev);
  969. bail3:
  970. ib_dealloc_device(&c2dev->ibdev);
  971. bail2:
  972. pci_release_regions(pcidev);
  973. bail1:
  974. pci_disable_device(pcidev);
  975. bail0:
  976. return ret;
  977. }
  978. static void __devexit c2_remove(struct pci_dev *pcidev)
  979. {
  980. struct c2_dev *c2dev = pci_get_drvdata(pcidev);
  981. struct net_device *netdev = c2dev->netdev;
  982. /* Unregister with OpenIB */
  983. c2_unregister_device(c2dev);
  984. /* Clean up the RNIC resources */
  985. c2_rnic_term(c2dev);
  986. /* Remove network device from the kernel */
  987. unregister_netdev(netdev);
  988. /* Free network device */
  989. free_netdev(netdev);
  990. /* Free the interrupt line */
  991. free_irq(pcidev->irq, c2dev);
  992. /* missing: Turn LEDs off here */
  993. /* Unmap adapter PA space */
  994. iounmap(c2dev->kva);
  995. iounmap(c2dev->regs);
  996. iounmap(c2dev->mmio_txp_ring);
  997. iounmap(c2dev->mmio_rxp_ring);
  998. /* Free the hardware structure */
  999. ib_dealloc_device(&c2dev->ibdev);
  1000. /* Release reserved PCI I/O and memory resources */
  1001. pci_release_regions(pcidev);
  1002. /* Disable PCI device */
  1003. pci_disable_device(pcidev);
  1004. /* Clear driver specific data */
  1005. pci_set_drvdata(pcidev, NULL);
  1006. }
  1007. static struct pci_driver c2_pci_driver = {
  1008. .name = DRV_NAME,
  1009. .id_table = c2_pci_table,
  1010. .probe = c2_probe,
  1011. .remove = __devexit_p(c2_remove),
  1012. };
  1013. static int __init c2_init_module(void)
  1014. {
  1015. return pci_register_driver(&c2_pci_driver);
  1016. }
  1017. static void __exit c2_exit_module(void)
  1018. {
  1019. pci_unregister_driver(&c2_pci_driver);
  1020. }
  1021. module_init(c2_init_module);
  1022. module_exit(c2_exit_module);