i2c-sis96x.c 8.9 KB

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  1. /*
  2. sis96x.c - Part of lm_sensors, Linux kernel modules for hardware
  3. monitoring
  4. Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. */
  17. /*
  18. This module must be considered BETA unless and until
  19. the chipset manufacturer releases a datasheet.
  20. The register definitions are based on the SiS630.
  21. This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c)
  22. for just about every machine for which users have reported.
  23. If this module isn't detecting your 96x south bridge, have a
  24. look there.
  25. We assume there can only be one SiS96x with one SMBus interface.
  26. */
  27. #include <linux/module.h>
  28. #include <linux/pci.h>
  29. #include <linux/kernel.h>
  30. #include <linux/delay.h>
  31. #include <linux/stddef.h>
  32. #include <linux/ioport.h>
  33. #include <linux/i2c.h>
  34. #include <linux/init.h>
  35. #include <asm/io.h>
  36. /* base address register in PCI config space */
  37. #define SIS96x_BAR 0x04
  38. /* SiS96x SMBus registers */
  39. #define SMB_STS 0x00
  40. #define SMB_EN 0x01
  41. #define SMB_CNT 0x02
  42. #define SMB_HOST_CNT 0x03
  43. #define SMB_ADDR 0x04
  44. #define SMB_CMD 0x05
  45. #define SMB_PCOUNT 0x06
  46. #define SMB_COUNT 0x07
  47. #define SMB_BYTE 0x08
  48. #define SMB_DEV_ADDR 0x10
  49. #define SMB_DB0 0x11
  50. #define SMB_DB1 0x12
  51. #define SMB_SAA 0x13
  52. /* register count for request_region */
  53. #define SMB_IOSIZE 0x20
  54. /* Other settings */
  55. #define MAX_TIMEOUT 500
  56. /* SiS96x SMBus constants */
  57. #define SIS96x_QUICK 0x00
  58. #define SIS96x_BYTE 0x01
  59. #define SIS96x_BYTE_DATA 0x02
  60. #define SIS96x_WORD_DATA 0x03
  61. #define SIS96x_PROC_CALL 0x04
  62. #define SIS96x_BLOCK_DATA 0x05
  63. static struct pci_driver sis96x_driver;
  64. static struct i2c_adapter sis96x_adapter;
  65. static u16 sis96x_smbus_base;
  66. static inline u8 sis96x_read(u8 reg)
  67. {
  68. return inb(sis96x_smbus_base + reg) ;
  69. }
  70. static inline void sis96x_write(u8 reg, u8 data)
  71. {
  72. outb(data, sis96x_smbus_base + reg) ;
  73. }
  74. /* Execute a SMBus transaction.
  75. int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA
  76. */
  77. static int sis96x_transaction(int size)
  78. {
  79. int temp;
  80. int result = 0;
  81. int timeout = 0;
  82. dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size);
  83. /* Make sure the SMBus host is ready to start transmitting */
  84. if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
  85. dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). "
  86. "Resetting...\n", temp);
  87. /* kill the transaction */
  88. sis96x_write(SMB_HOST_CNT, 0x20);
  89. /* check it again */
  90. if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
  91. dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp);
  92. return -1;
  93. } else {
  94. dev_dbg(&sis96x_adapter.dev, "Successful\n");
  95. }
  96. }
  97. /* Turn off timeout interrupts, set fast host clock */
  98. sis96x_write(SMB_CNT, 0x20);
  99. /* clear all (sticky) status flags */
  100. temp = sis96x_read(SMB_STS);
  101. sis96x_write(SMB_STS, temp & 0x1e);
  102. /* start the transaction by setting bit 4 and size bits */
  103. sis96x_write(SMB_HOST_CNT, 0x10 | (size & 0x07));
  104. /* We will always wait for a fraction of a second! */
  105. do {
  106. msleep(1);
  107. temp = sis96x_read(SMB_STS);
  108. } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
  109. /* If the SMBus is still busy, we give up */
  110. if (timeout >= MAX_TIMEOUT) {
  111. dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp);
  112. result = -1;
  113. }
  114. /* device error - probably missing ACK */
  115. if (temp & 0x02) {
  116. dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n");
  117. result = -1;
  118. }
  119. /* bus collision */
  120. if (temp & 0x04) {
  121. dev_dbg(&sis96x_adapter.dev, "Bus collision!\n");
  122. result = -1;
  123. }
  124. /* Finish up by resetting the bus */
  125. sis96x_write(SMB_STS, temp);
  126. if ((temp = sis96x_read(SMB_STS))) {
  127. dev_dbg(&sis96x_adapter.dev, "Failed reset at "
  128. "end of transaction! (0x%02x)\n", temp);
  129. }
  130. return result;
  131. }
  132. /* Return -1 on error. */
  133. static s32 sis96x_access(struct i2c_adapter * adap, u16 addr,
  134. unsigned short flags, char read_write,
  135. u8 command, int size, union i2c_smbus_data * data)
  136. {
  137. switch (size) {
  138. case I2C_SMBUS_QUICK:
  139. sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
  140. size = SIS96x_QUICK;
  141. break;
  142. case I2C_SMBUS_BYTE:
  143. sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
  144. if (read_write == I2C_SMBUS_WRITE)
  145. sis96x_write(SMB_CMD, command);
  146. size = SIS96x_BYTE;
  147. break;
  148. case I2C_SMBUS_BYTE_DATA:
  149. sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
  150. sis96x_write(SMB_CMD, command);
  151. if (read_write == I2C_SMBUS_WRITE)
  152. sis96x_write(SMB_BYTE, data->byte);
  153. size = SIS96x_BYTE_DATA;
  154. break;
  155. case I2C_SMBUS_PROC_CALL:
  156. case I2C_SMBUS_WORD_DATA:
  157. sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
  158. sis96x_write(SMB_CMD, command);
  159. if (read_write == I2C_SMBUS_WRITE) {
  160. sis96x_write(SMB_BYTE, data->word & 0xff);
  161. sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
  162. }
  163. size = (size == I2C_SMBUS_PROC_CALL ?
  164. SIS96x_PROC_CALL : SIS96x_WORD_DATA);
  165. break;
  166. case I2C_SMBUS_BLOCK_DATA:
  167. /* TO DO: */
  168. dev_info(&adap->dev, "SMBus block not implemented!\n");
  169. return -1;
  170. break;
  171. default:
  172. dev_info(&adap->dev, "Unsupported I2C size\n");
  173. return -1;
  174. break;
  175. }
  176. if (sis96x_transaction(size))
  177. return -1;
  178. if ((size != SIS96x_PROC_CALL) &&
  179. ((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK)))
  180. return 0;
  181. switch (size) {
  182. case SIS96x_BYTE:
  183. case SIS96x_BYTE_DATA:
  184. data->byte = sis96x_read(SMB_BYTE);
  185. break;
  186. case SIS96x_WORD_DATA:
  187. case SIS96x_PROC_CALL:
  188. data->word = sis96x_read(SMB_BYTE) +
  189. (sis96x_read(SMB_BYTE + 1) << 8);
  190. break;
  191. }
  192. return 0;
  193. }
  194. static u32 sis96x_func(struct i2c_adapter *adapter)
  195. {
  196. return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
  197. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
  198. I2C_FUNC_SMBUS_PROC_CALL;
  199. }
  200. static const struct i2c_algorithm smbus_algorithm = {
  201. .smbus_xfer = sis96x_access,
  202. .functionality = sis96x_func,
  203. };
  204. static struct i2c_adapter sis96x_adapter = {
  205. .owner = THIS_MODULE,
  206. .id = I2C_HW_SMBUS_SIS96X,
  207. .class = I2C_CLASS_HWMON,
  208. .algo = &smbus_algorithm,
  209. };
  210. static struct pci_device_id sis96x_ids[] = {
  211. { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) },
  212. { 0, }
  213. };
  214. MODULE_DEVICE_TABLE (pci, sis96x_ids);
  215. static int __devinit sis96x_probe(struct pci_dev *dev,
  216. const struct pci_device_id *id)
  217. {
  218. u16 ww = 0;
  219. int retval;
  220. if (sis96x_smbus_base) {
  221. dev_err(&dev->dev, "Only one device supported.\n");
  222. return -EBUSY;
  223. }
  224. pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww);
  225. if (PCI_CLASS_SERIAL_SMBUS != ww) {
  226. dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww);
  227. return -ENODEV;
  228. }
  229. sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR);
  230. if (!sis96x_smbus_base) {
  231. dev_err(&dev->dev, "SiS96x SMBus base address "
  232. "not initialized!\n");
  233. return -EINVAL;
  234. }
  235. dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n",
  236. sis96x_smbus_base);
  237. /* Everything is happy, let's grab the memory and set things up. */
  238. if (!request_region(sis96x_smbus_base, SMB_IOSIZE,
  239. sis96x_driver.name)) {
  240. dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x "
  241. "already in use!\n", sis96x_smbus_base,
  242. sis96x_smbus_base + SMB_IOSIZE - 1);
  243. sis96x_smbus_base = 0;
  244. return -EINVAL;
  245. }
  246. /* set up the sysfs linkage to our parent device */
  247. sis96x_adapter.dev.parent = &dev->dev;
  248. snprintf(sis96x_adapter.name, sizeof(sis96x_adapter.name),
  249. "SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base);
  250. if ((retval = i2c_add_adapter(&sis96x_adapter))) {
  251. dev_err(&dev->dev, "Couldn't register adapter!\n");
  252. release_region(sis96x_smbus_base, SMB_IOSIZE);
  253. sis96x_smbus_base = 0;
  254. }
  255. return retval;
  256. }
  257. static void __devexit sis96x_remove(struct pci_dev *dev)
  258. {
  259. if (sis96x_smbus_base) {
  260. i2c_del_adapter(&sis96x_adapter);
  261. release_region(sis96x_smbus_base, SMB_IOSIZE);
  262. sis96x_smbus_base = 0;
  263. }
  264. }
  265. static struct pci_driver sis96x_driver = {
  266. .name = "sis96x_smbus",
  267. .id_table = sis96x_ids,
  268. .probe = sis96x_probe,
  269. .remove = __devexit_p(sis96x_remove),
  270. };
  271. static int __init i2c_sis96x_init(void)
  272. {
  273. return pci_register_driver(&sis96x_driver);
  274. }
  275. static void __exit i2c_sis96x_exit(void)
  276. {
  277. pci_unregister_driver(&sis96x_driver);
  278. }
  279. MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>");
  280. MODULE_DESCRIPTION("SiS96x SMBus driver");
  281. MODULE_LICENSE("GPL");
  282. /* Register initialization functions using helper macros */
  283. module_init(i2c_sis96x_init);
  284. module_exit(i2c_sis96x_exit);