i2c-pasemi.c 10 KB

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  1. /*
  2. * Copyright (C) 2006-2007 PA Semi, Inc
  3. *
  4. * SMBus host driver for PA Semi PWRficient
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/module.h>
  20. #include <linux/pci.h>
  21. #include <linux/kernel.h>
  22. #include <linux/stddef.h>
  23. #include <linux/sched.h>
  24. #include <linux/i2c.h>
  25. #include <linux/delay.h>
  26. #include <asm/io.h>
  27. static struct pci_driver pasemi_smb_driver;
  28. struct pasemi_smbus {
  29. struct pci_dev *dev;
  30. struct i2c_adapter adapter;
  31. unsigned long base;
  32. int size;
  33. };
  34. /* Register offsets */
  35. #define REG_MTXFIFO 0x00
  36. #define REG_MRXFIFO 0x04
  37. #define REG_SMSTA 0x14
  38. #define REG_CTL 0x1c
  39. /* Register defs */
  40. #define MTXFIFO_READ 0x00000400
  41. #define MTXFIFO_STOP 0x00000200
  42. #define MTXFIFO_START 0x00000100
  43. #define MTXFIFO_DATA_M 0x000000ff
  44. #define MRXFIFO_EMPTY 0x00000100
  45. #define MRXFIFO_DATA_M 0x000000ff
  46. #define SMSTA_XEN 0x08000000
  47. #define CTL_MRR 0x00000400
  48. #define CTL_MTR 0x00000200
  49. #define CTL_CLK_M 0x000000ff
  50. #define CLK_100K_DIV 84
  51. #define CLK_400K_DIV 21
  52. static inline void reg_write(struct pasemi_smbus *smbus, int reg, int val)
  53. {
  54. dev_dbg(&smbus->dev->dev, "smbus write reg %lx val %08x\n",
  55. smbus->base + reg, val);
  56. outl(val, smbus->base + reg);
  57. }
  58. static inline int reg_read(struct pasemi_smbus *smbus, int reg)
  59. {
  60. int ret;
  61. ret = inl(smbus->base + reg);
  62. dev_dbg(&smbus->dev->dev, "smbus read reg %lx val %08x\n",
  63. smbus->base + reg, ret);
  64. return ret;
  65. }
  66. #define TXFIFO_WR(smbus, reg) reg_write((smbus), REG_MTXFIFO, (reg))
  67. #define RXFIFO_RD(smbus) reg_read((smbus), REG_MRXFIFO)
  68. static void pasemi_smb_clear(struct pasemi_smbus *smbus)
  69. {
  70. unsigned int status;
  71. status = reg_read(smbus, REG_SMSTA);
  72. reg_write(smbus, REG_SMSTA, status);
  73. }
  74. static unsigned int pasemi_smb_waitready(struct pasemi_smbus *smbus)
  75. {
  76. int timeout = 10;
  77. unsigned int status;
  78. status = reg_read(smbus, REG_SMSTA);
  79. while (!(status & SMSTA_XEN) && timeout--) {
  80. msleep(1);
  81. status = reg_read(smbus, REG_SMSTA);
  82. }
  83. if (timeout < 0) {
  84. dev_warn(&smbus->dev->dev, "Timeout, status 0x%08x\n", status);
  85. reg_write(smbus, REG_SMSTA, status);
  86. return -ETIME;
  87. }
  88. /* Clear XEN */
  89. reg_write(smbus, REG_SMSTA, SMSTA_XEN);
  90. return 0;
  91. }
  92. static int pasemi_i2c_xfer_msg(struct i2c_adapter *adapter,
  93. struct i2c_msg *msg, int stop)
  94. {
  95. struct pasemi_smbus *smbus = adapter->algo_data;
  96. int read, i, err;
  97. u32 rd;
  98. read = msg->flags & I2C_M_RD ? 1 : 0;
  99. TXFIFO_WR(smbus, MTXFIFO_START | (msg->addr << 1) | read);
  100. if (read) {
  101. TXFIFO_WR(smbus, msg->len | MTXFIFO_READ |
  102. (stop ? MTXFIFO_STOP : 0));
  103. err = pasemi_smb_waitready(smbus);
  104. if (err)
  105. goto reset_out;
  106. for (i = 0; i < msg->len; i++) {
  107. rd = RXFIFO_RD(smbus);
  108. if (rd & MRXFIFO_EMPTY) {
  109. err = -ENODATA;
  110. goto reset_out;
  111. }
  112. msg->buf[i] = rd & MRXFIFO_DATA_M;
  113. }
  114. } else {
  115. for (i = 0; i < msg->len - 1; i++)
  116. TXFIFO_WR(smbus, msg->buf[i]);
  117. TXFIFO_WR(smbus, msg->buf[msg->len-1] |
  118. (stop ? MTXFIFO_STOP : 0));
  119. }
  120. return 0;
  121. reset_out:
  122. reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR |
  123. (CLK_100K_DIV & CTL_CLK_M)));
  124. return err;
  125. }
  126. static int pasemi_i2c_xfer(struct i2c_adapter *adapter,
  127. struct i2c_msg *msgs, int num)
  128. {
  129. struct pasemi_smbus *smbus = adapter->algo_data;
  130. int ret, i;
  131. pasemi_smb_clear(smbus);
  132. ret = 0;
  133. for (i = 0; i < num && !ret; i++)
  134. ret = pasemi_i2c_xfer_msg(adapter, &msgs[i], (i == (num - 1)));
  135. return ret ? ret : num;
  136. }
  137. static int pasemi_smb_xfer(struct i2c_adapter *adapter,
  138. u16 addr, unsigned short flags, char read_write, u8 command,
  139. int size, union i2c_smbus_data *data)
  140. {
  141. struct pasemi_smbus *smbus = adapter->algo_data;
  142. unsigned int rd;
  143. int read_flag, err;
  144. int len = 0, i;
  145. /* All our ops take 8-bit shifted addresses */
  146. addr <<= 1;
  147. read_flag = read_write == I2C_SMBUS_READ;
  148. pasemi_smb_clear(smbus);
  149. switch (size) {
  150. case I2C_SMBUS_QUICK:
  151. TXFIFO_WR(smbus, addr | read_flag | MTXFIFO_START |
  152. MTXFIFO_STOP);
  153. break;
  154. case I2C_SMBUS_BYTE:
  155. TXFIFO_WR(smbus, addr | read_flag | MTXFIFO_START);
  156. if (read_write)
  157. TXFIFO_WR(smbus, 1 | MTXFIFO_STOP | MTXFIFO_READ);
  158. else
  159. TXFIFO_WR(smbus, MTXFIFO_STOP | command);
  160. break;
  161. case I2C_SMBUS_BYTE_DATA:
  162. TXFIFO_WR(smbus, addr | MTXFIFO_START);
  163. TXFIFO_WR(smbus, command);
  164. if (read_write) {
  165. TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START);
  166. TXFIFO_WR(smbus, 1 | MTXFIFO_READ | MTXFIFO_STOP);
  167. } else {
  168. TXFIFO_WR(smbus, MTXFIFO_STOP | data->byte);
  169. }
  170. break;
  171. case I2C_SMBUS_WORD_DATA:
  172. TXFIFO_WR(smbus, addr | MTXFIFO_START);
  173. TXFIFO_WR(smbus, command);
  174. if (read_write) {
  175. TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START);
  176. TXFIFO_WR(smbus, 2 | MTXFIFO_READ | MTXFIFO_STOP);
  177. } else {
  178. TXFIFO_WR(smbus, data->word & MTXFIFO_DATA_M);
  179. TXFIFO_WR(smbus, MTXFIFO_STOP | (data->word >> 8));
  180. }
  181. break;
  182. case I2C_SMBUS_BLOCK_DATA:
  183. TXFIFO_WR(smbus, addr | MTXFIFO_START);
  184. TXFIFO_WR(smbus, command);
  185. if (read_write) {
  186. TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START);
  187. TXFIFO_WR(smbus, 1 | MTXFIFO_READ);
  188. rd = RXFIFO_RD(smbus);
  189. len = min_t(u8, (rd & MRXFIFO_DATA_M),
  190. I2C_SMBUS_BLOCK_MAX);
  191. TXFIFO_WR(smbus, len | MTXFIFO_READ |
  192. MTXFIFO_STOP);
  193. } else {
  194. len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX);
  195. TXFIFO_WR(smbus, len);
  196. for (i = 1; i < len; i++)
  197. TXFIFO_WR(smbus, data->block[i]);
  198. TXFIFO_WR(smbus, data->block[len] | MTXFIFO_STOP);
  199. }
  200. break;
  201. case I2C_SMBUS_PROC_CALL:
  202. read_write = I2C_SMBUS_READ;
  203. TXFIFO_WR(smbus, addr | MTXFIFO_START);
  204. TXFIFO_WR(smbus, command);
  205. TXFIFO_WR(smbus, data->word & MTXFIFO_DATA_M);
  206. TXFIFO_WR(smbus, (data->word >> 8) & MTXFIFO_DATA_M);
  207. TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START);
  208. TXFIFO_WR(smbus, 2 | MTXFIFO_STOP | MTXFIFO_READ);
  209. break;
  210. case I2C_SMBUS_BLOCK_PROC_CALL:
  211. len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX - 1);
  212. read_write = I2C_SMBUS_READ;
  213. TXFIFO_WR(smbus, addr | MTXFIFO_START);
  214. TXFIFO_WR(smbus, command);
  215. TXFIFO_WR(smbus, len);
  216. for (i = 1; i <= len; i++)
  217. TXFIFO_WR(smbus, data->block[i]);
  218. TXFIFO_WR(smbus, addr | I2C_SMBUS_READ);
  219. TXFIFO_WR(smbus, MTXFIFO_READ | 1);
  220. rd = RXFIFO_RD(smbus);
  221. len = min_t(u8, (rd & MRXFIFO_DATA_M),
  222. I2C_SMBUS_BLOCK_MAX - len);
  223. TXFIFO_WR(smbus, len | MTXFIFO_READ | MTXFIFO_STOP);
  224. break;
  225. default:
  226. dev_warn(&adapter->dev, "Unsupported transaction %d\n", size);
  227. return -EINVAL;
  228. }
  229. err = pasemi_smb_waitready(smbus);
  230. if (err)
  231. goto reset_out;
  232. if (read_write == I2C_SMBUS_WRITE)
  233. return 0;
  234. switch (size) {
  235. case I2C_SMBUS_BYTE:
  236. case I2C_SMBUS_BYTE_DATA:
  237. rd = RXFIFO_RD(smbus);
  238. if (rd & MRXFIFO_EMPTY) {
  239. err = -ENODATA;
  240. goto reset_out;
  241. }
  242. data->byte = rd & MRXFIFO_DATA_M;
  243. break;
  244. case I2C_SMBUS_WORD_DATA:
  245. case I2C_SMBUS_PROC_CALL:
  246. rd = RXFIFO_RD(smbus);
  247. if (rd & MRXFIFO_EMPTY) {
  248. err = -ENODATA;
  249. goto reset_out;
  250. }
  251. data->word = rd & MRXFIFO_DATA_M;
  252. rd = RXFIFO_RD(smbus);
  253. if (rd & MRXFIFO_EMPTY) {
  254. err = -ENODATA;
  255. goto reset_out;
  256. }
  257. data->word |= (rd & MRXFIFO_DATA_M) << 8;
  258. break;
  259. case I2C_SMBUS_BLOCK_DATA:
  260. case I2C_SMBUS_BLOCK_PROC_CALL:
  261. data->block[0] = len;
  262. for (i = 1; i <= len; i ++) {
  263. rd = RXFIFO_RD(smbus);
  264. if (rd & MRXFIFO_EMPTY) {
  265. err = -ENODATA;
  266. goto reset_out;
  267. }
  268. data->block[i] = rd & MRXFIFO_DATA_M;
  269. }
  270. break;
  271. }
  272. return 0;
  273. reset_out:
  274. reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR |
  275. (CLK_100K_DIV & CTL_CLK_M)));
  276. return err;
  277. }
  278. static u32 pasemi_smb_func(struct i2c_adapter *adapter)
  279. {
  280. return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
  281. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
  282. I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_PROC_CALL |
  283. I2C_FUNC_SMBUS_BLOCK_PROC_CALL | I2C_FUNC_I2C;
  284. }
  285. static const struct i2c_algorithm smbus_algorithm = {
  286. .master_xfer = pasemi_i2c_xfer,
  287. .smbus_xfer = pasemi_smb_xfer,
  288. .functionality = pasemi_smb_func,
  289. };
  290. static int __devinit pasemi_smb_probe(struct pci_dev *dev,
  291. const struct pci_device_id *id)
  292. {
  293. struct pasemi_smbus *smbus;
  294. int error;
  295. if (!(pci_resource_flags(dev, 0) & IORESOURCE_IO))
  296. return -ENODEV;
  297. smbus = kzalloc(sizeof(struct pasemi_smbus), GFP_KERNEL);
  298. if (!smbus)
  299. return -ENOMEM;
  300. smbus->dev = dev;
  301. smbus->base = pci_resource_start(dev, 0);
  302. smbus->size = pci_resource_len(dev, 0);
  303. if (!request_region(smbus->base, smbus->size,
  304. pasemi_smb_driver.name)) {
  305. error = -EBUSY;
  306. goto out_kfree;
  307. }
  308. smbus->adapter.owner = THIS_MODULE;
  309. snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
  310. "PA Semi SMBus adapter at 0x%lx", smbus->base);
  311. smbus->adapter.class = I2C_CLASS_HWMON;
  312. smbus->adapter.algo = &smbus_algorithm;
  313. smbus->adapter.algo_data = smbus;
  314. /* set up the driverfs linkage to our parent device */
  315. smbus->adapter.dev.parent = &dev->dev;
  316. reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR |
  317. (CLK_100K_DIV & CTL_CLK_M)));
  318. error = i2c_add_adapter(&smbus->adapter);
  319. if (error)
  320. goto out_release_region;
  321. pci_set_drvdata(dev, smbus);
  322. return 0;
  323. out_release_region:
  324. release_region(smbus->base, smbus->size);
  325. out_kfree:
  326. kfree(smbus);
  327. return error;
  328. }
  329. static void __devexit pasemi_smb_remove(struct pci_dev *dev)
  330. {
  331. struct pasemi_smbus *smbus = pci_get_drvdata(dev);
  332. i2c_del_adapter(&smbus->adapter);
  333. release_region(smbus->base, smbus->size);
  334. kfree(smbus);
  335. }
  336. static struct pci_device_id pasemi_smb_ids[] = {
  337. { PCI_DEVICE(0x1959, 0xa003) },
  338. { 0, }
  339. };
  340. MODULE_DEVICE_TABLE(pci, pasemi_smb_ids);
  341. static struct pci_driver pasemi_smb_driver = {
  342. .name = "i2c-pasemi",
  343. .id_table = pasemi_smb_ids,
  344. .probe = pasemi_smb_probe,
  345. .remove = __devexit_p(pasemi_smb_remove),
  346. };
  347. static int __init pasemi_smb_init(void)
  348. {
  349. return pci_register_driver(&pasemi_smb_driver);
  350. }
  351. static void __exit pasemi_smb_exit(void)
  352. {
  353. pci_unregister_driver(&pasemi_smb_driver);
  354. }
  355. MODULE_LICENSE("GPL");
  356. MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
  357. MODULE_DESCRIPTION("PA Semi PWRficient SMBus driver");
  358. module_init(pasemi_smb_init);
  359. module_exit(pasemi_smb_exit);