soc.c 21 KB

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  1. /* soc.c: Sparc SUNW,soc (Serial Optical Channel) Fibre Channel Sbus adapter support.
  2. *
  3. * Copyright (C) 1996,1997,1999 Jakub Jelinek (jj@ultra.linux.cz)
  4. * Copyright (C) 1997,1998 Jirka Hanika (geo@ff.cuni.cz)
  5. *
  6. * Sources:
  7. * Fibre Channel Physical & Signaling Interface (FC-PH), dpANS, 1994
  8. * dpANS Fibre Channel Protocol for SCSI (X3.269-199X), Rev. 012, 1995
  9. *
  10. * Supported hardware:
  11. * Tested on SOC sbus card bought with SS1000 in Linux running on SS5 and Ultra1.
  12. * For SOC sbus cards, you have to make sure your FCode is 1.52 or later.
  13. * If you have older FCode, you should try to upgrade or get SOC microcode from Sun
  14. * (the microcode is present in Solaris soc driver as well). In that case you need
  15. * to #define HAVE_SOC_UCODE and format the microcode into soc_asm.c. For the exact
  16. * format mail me and I will tell you. I cannot offer you the actual microcode though,
  17. * unless Sun confirms they don't mind.
  18. */
  19. static char *version =
  20. "soc.c:v1.3 9/Feb/99 Jakub Jelinek (jj@ultra.linux.cz), Jirka Hanika (geo@ff.cuni.cz)\n";
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/types.h>
  24. #include <linux/fcntl.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/ptrace.h>
  27. #include <linux/ioport.h>
  28. #include <linux/in.h>
  29. #include <linux/slab.h>
  30. #include <linux/string.h>
  31. #include <linux/init.h>
  32. #include <linux/bitops.h>
  33. #include <asm/io.h>
  34. #include <asm/dma.h>
  35. #include <linux/errno.h>
  36. #include <asm/byteorder.h>
  37. #include <asm/openprom.h>
  38. #include <asm/oplib.h>
  39. #include <asm/pgtable.h>
  40. #include <asm/irq.h>
  41. /* #define SOCDEBUG */
  42. /* #define HAVE_SOC_UCODE */
  43. #include "fcp_impl.h"
  44. #include "soc.h"
  45. #ifdef HAVE_SOC_UCODE
  46. #include "soc_asm.h"
  47. #endif
  48. #define soc_printk printk ("soc%d: ", s->soc_no); printk
  49. #ifdef SOCDEBUG
  50. #define SOD(x) soc_printk x;
  51. #else
  52. #define SOD(x)
  53. #endif
  54. #define for_each_soc(s) for (s = socs; s; s = s->next)
  55. struct soc *socs = NULL;
  56. static inline void soc_disable(struct soc *s)
  57. {
  58. sbus_writel(0, s->regs + IMASK);
  59. sbus_writel(SOC_CMD_SOFT_RESET, s->regs + CMD);
  60. }
  61. static inline void soc_enable(struct soc *s)
  62. {
  63. SOD(("enable %08x\n", s->cfg))
  64. sbus_writel(0, s->regs + SAE);
  65. sbus_writel(s->cfg, s->regs + CFG);
  66. sbus_writel(SOC_CMD_RSP_QALL, s->regs + CMD);
  67. SOC_SETIMASK(s, SOC_IMASK_RSP_QALL | SOC_IMASK_SAE);
  68. SOD(("imask %08lx %08lx\n", s->imask, sbus_readl(s->regs + IMAK)));
  69. }
  70. static void soc_reset(fc_channel *fc)
  71. {
  72. soc_port *port = (soc_port *)fc;
  73. struct soc *s = port->s;
  74. /* FIXME */
  75. soc_disable(s);
  76. s->req[0].seqno = 1;
  77. s->req[1].seqno = 1;
  78. s->rsp[0].seqno = 1;
  79. s->rsp[1].seqno = 1;
  80. s->req[0].in = 0;
  81. s->req[1].in = 0;
  82. s->rsp[0].in = 0;
  83. s->rsp[1].in = 0;
  84. s->req[0].out = 0;
  85. s->req[1].out = 0;
  86. s->rsp[0].out = 0;
  87. s->rsp[1].out = 0;
  88. /* FIXME */
  89. soc_enable(s);
  90. }
  91. static inline void soc_solicited (struct soc *s)
  92. {
  93. fc_hdr fchdr;
  94. soc_rsp __iomem *hwrsp;
  95. soc_cq_rsp *sw_cq;
  96. int token;
  97. int status;
  98. fc_channel *fc;
  99. sw_cq = &s->rsp[SOC_SOLICITED_RSP_Q];
  100. if (sw_cq->pool == NULL)
  101. sw_cq->pool = (soc_req __iomem *)
  102. (s->xram + xram_get_32low ((xram_p)&sw_cq->hw_cq->address));
  103. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  104. SOD (("soc_solicited, %d pkts arrived\n", (sw_cq->in-sw_cq->out) & sw_cq->last))
  105. for (;;) {
  106. hwrsp = (soc_rsp __iomem *)sw_cq->pool + sw_cq->out;
  107. token = xram_get_32low ((xram_p)&hwrsp->shdr.token);
  108. status = xram_get_32low ((xram_p)&hwrsp->status);
  109. fc = (fc_channel *)(&s->port[(token >> 11) & 1]);
  110. if (status == SOC_OK) {
  111. fcp_receive_solicited(fc, token >> 12,
  112. token & ((1 << 11) - 1),
  113. FC_STATUS_OK, NULL);
  114. } else {
  115. xram_copy_from(&fchdr, (xram_p)&hwrsp->fchdr, sizeof(fchdr));
  116. /* We have intentionally defined FC_STATUS_* constants
  117. * to match SOC_* constants, otherwise we'd have to
  118. * translate status.
  119. */
  120. fcp_receive_solicited(fc, token >> 12,
  121. token & ((1 << 11) - 1),
  122. status, &fchdr);
  123. }
  124. if (++sw_cq->out > sw_cq->last) {
  125. sw_cq->seqno++;
  126. sw_cq->out = 0;
  127. }
  128. if (sw_cq->out == sw_cq->in) {
  129. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  130. if (sw_cq->out == sw_cq->in) {
  131. /* Tell the hardware about it */
  132. sbus_writel((sw_cq->out << 24) |
  133. (SOC_CMD_RSP_QALL &
  134. ~(SOC_CMD_RSP_Q0 << SOC_SOLICITED_RSP_Q)),
  135. s->regs + CMD);
  136. /* Read it, so that we're sure it has been updated */
  137. sbus_readl(s->regs + CMD);
  138. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  139. if (sw_cq->out == sw_cq->in)
  140. break;
  141. }
  142. }
  143. }
  144. }
  145. static inline void soc_request (struct soc *s, u32 cmd)
  146. {
  147. SOC_SETIMASK(s, s->imask & ~(cmd & SOC_CMD_REQ_QALL));
  148. SOD(("imask %08lx %08lx\n", s->imask, sbus_readl(s->regs + IMASK)));
  149. SOD(("Queues available %08x OUT %X %X\n", cmd,
  150. xram_get_8((xram_p)&s->req[0].hw_cq->out),
  151. xram_get_8((xram_p)&s->req[0].hw_cq->out)))
  152. if (s->port[s->curr_port].fc.state != FC_STATE_OFFLINE) {
  153. fcp_queue_empty ((fc_channel *)&(s->port[s->curr_port]));
  154. if (((s->req[1].in + 1) & s->req[1].last) != (s->req[1].out))
  155. fcp_queue_empty ((fc_channel *)&(s->port[1 - s->curr_port]));
  156. } else {
  157. fcp_queue_empty ((fc_channel *)&(s->port[1 - s->curr_port]));
  158. }
  159. if (s->port[1 - s->curr_port].fc.state != FC_STATE_OFFLINE)
  160. s->curr_port ^= 1;
  161. }
  162. static inline void soc_unsolicited (struct soc *s)
  163. {
  164. soc_rsp __iomem *hwrsp, *hwrspc;
  165. soc_cq_rsp *sw_cq;
  166. int count;
  167. int status;
  168. int flags;
  169. fc_channel *fc;
  170. sw_cq = &s->rsp[SOC_UNSOLICITED_RSP_Q];
  171. if (sw_cq->pool == NULL)
  172. sw_cq->pool = (soc_req __iomem *)
  173. (s->xram + (xram_get_32low ((xram_p)&sw_cq->hw_cq->address)));
  174. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  175. SOD (("soc_unsolicited, %d packets arrived\n", (sw_cq->in - sw_cq->out) & sw_cq->last))
  176. while (sw_cq->in != sw_cq->out) {
  177. /* ...real work per entry here... */
  178. hwrsp = (soc_rsp __iomem *)sw_cq->pool + sw_cq->out;
  179. hwrspc = NULL;
  180. flags = xram_get_16 ((xram_p)&hwrsp->shdr.flags);
  181. count = xram_get_8 ((xram_p)&hwrsp->count);
  182. fc = (fc_channel *)&s->port[flags & SOC_PORT_B];
  183. SOD(("FC %08lx fcp_state_change %08lx\n",
  184. (long)fc, (long)fc->fcp_state_change))
  185. if (count != 1) {
  186. /* Ugh, continuation entries */
  187. u8 in;
  188. if (count != 2) {
  189. printk("%s: Too many continuations entries %d\n",
  190. fc->name, count);
  191. goto update_out;
  192. }
  193. in = sw_cq->in;
  194. if (in < sw_cq->out) in += sw_cq->last + 1;
  195. if (in < sw_cq->out + 2) {
  196. /* Ask the hardware if they haven't arrived yet. */
  197. sbus_writel((sw_cq->out << 24) |
  198. (SOC_CMD_RSP_QALL &
  199. ~(SOC_CMD_RSP_Q0 << SOC_UNSOLICITED_RSP_Q)),
  200. s->regs + CMD);
  201. /* Read it, so that we're sure it has been updated */
  202. sbus_readl(s->regs + CMD);
  203. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  204. in = sw_cq->in;
  205. if (in < sw_cq->out)
  206. in += sw_cq->last + 1;
  207. if (in < sw_cq->out + 2) /* Nothing came, let us wait */
  208. return;
  209. }
  210. if (sw_cq->out == sw_cq->last)
  211. hwrspc = (soc_rsp __iomem *)sw_cq->pool;
  212. else
  213. hwrspc = hwrsp + 1;
  214. }
  215. switch (flags & ~SOC_PORT_B) {
  216. case SOC_STATUS:
  217. status = xram_get_32low ((xram_p)&hwrsp->status);
  218. switch (status) {
  219. case SOC_ONLINE:
  220. SOD(("State change to ONLINE\n"));
  221. fcp_state_change(fc, FC_STATE_ONLINE);
  222. break;
  223. case SOC_OFFLINE:
  224. SOD(("State change to OFFLINE\n"));
  225. fcp_state_change(fc, FC_STATE_OFFLINE);
  226. break;
  227. default:
  228. printk ("%s: Unknown STATUS no %d\n",
  229. fc->name, status);
  230. break;
  231. }
  232. break;
  233. case (SOC_UNSOLICITED|SOC_FC_HDR):
  234. {
  235. int r_ctl = xram_get_8 ((xram_p)&hwrsp->fchdr);
  236. unsigned len;
  237. char buf[64];
  238. if ((r_ctl & 0xf0) == R_CTL_EXTENDED_SVC) {
  239. len = xram_get_32 ((xram_p)&hwrsp->shdr.bytecnt);
  240. if (len < 4 || !hwrspc) {
  241. printk ("%s: Invalid R_CTL %02x "
  242. "continuation entries\n",
  243. fc->name, r_ctl);
  244. } else {
  245. if (len > 60)
  246. len = 60;
  247. xram_copy_from (buf, (xram_p)hwrspc,
  248. (len + 3) & ~3);
  249. if (*(u32 *)buf == LS_DISPLAY) {
  250. int i;
  251. for (i = 4; i < len; i++)
  252. if (buf[i] == '\n')
  253. buf[i] = ' ';
  254. buf[len] = 0;
  255. printk ("%s message: %s\n",
  256. fc->name, buf + 4);
  257. } else {
  258. printk ("%s: Unknown LS_CMD "
  259. "%02x\n", fc->name,
  260. buf[0]);
  261. }
  262. }
  263. } else {
  264. printk ("%s: Unsolicited R_CTL %02x "
  265. "not handled\n", fc->name, r_ctl);
  266. }
  267. }
  268. break;
  269. default:
  270. printk ("%s: Unexpected flags %08x\n", fc->name, flags);
  271. break;
  272. };
  273. update_out:
  274. if (++sw_cq->out > sw_cq->last) {
  275. sw_cq->seqno++;
  276. sw_cq->out = 0;
  277. }
  278. if (hwrspc) {
  279. if (++sw_cq->out > sw_cq->last) {
  280. sw_cq->seqno++;
  281. sw_cq->out = 0;
  282. }
  283. }
  284. if (sw_cq->out == sw_cq->in) {
  285. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  286. if (sw_cq->out == sw_cq->in) {
  287. /* Tell the hardware about it */
  288. sbus_writel((sw_cq->out << 24) |
  289. (SOC_CMD_RSP_QALL &
  290. ~(SOC_CMD_RSP_Q0 << SOC_UNSOLICITED_RSP_Q)),
  291. s->regs + CMD);
  292. /* Read it, so that we're sure it has been updated */
  293. sbus_readl(s->regs + CMD);
  294. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  295. }
  296. }
  297. }
  298. }
  299. static irqreturn_t soc_intr(int irq, void *dev_id)
  300. {
  301. u32 cmd;
  302. unsigned long flags;
  303. register struct soc *s = (struct soc *)dev_id;
  304. spin_lock_irqsave(&s->lock, flags);
  305. cmd = sbus_readl(s->regs + CMD);
  306. for (; (cmd = SOC_INTR (s, cmd)); cmd = sbus_readl(s->regs + CMD)) {
  307. if (cmd & SOC_CMD_RSP_Q1) soc_unsolicited (s);
  308. if (cmd & SOC_CMD_RSP_Q0) soc_solicited (s);
  309. if (cmd & SOC_CMD_REQ_QALL) soc_request (s, cmd);
  310. }
  311. spin_unlock_irqrestore(&s->lock, flags);
  312. return IRQ_HANDLED;
  313. }
  314. #define TOKEN(proto, port, token) (((proto)<<12)|(token)|(port))
  315. static int soc_hw_enque (fc_channel *fc, fcp_cmnd *fcmd)
  316. {
  317. soc_port *port = (soc_port *)fc;
  318. struct soc *s = port->s;
  319. int qno;
  320. soc_cq_req *sw_cq;
  321. int cq_next_in;
  322. soc_req *request;
  323. fc_hdr *fch;
  324. int i;
  325. if (fcmd->proto == TYPE_SCSI_FCP)
  326. qno = 1;
  327. else
  328. qno = 0;
  329. SOD(("Putting a FCP packet type %d into hw queue %d\n", fcmd->proto, qno))
  330. if (s->imask & (SOC_IMASK_REQ_Q0 << qno)) {
  331. SOD(("EIO %08x\n", s->imask))
  332. return -EIO;
  333. }
  334. sw_cq = s->req + qno;
  335. cq_next_in = (sw_cq->in + 1) & sw_cq->last;
  336. if (cq_next_in == sw_cq->out &&
  337. cq_next_in == (sw_cq->out = xram_get_8((xram_p)&sw_cq->hw_cq->out))) {
  338. SOD(("%d IN %d OUT %d LAST %d\n", qno, sw_cq->in, sw_cq->out, sw_cq->last))
  339. SOC_SETIMASK(s, s->imask | (SOC_IMASK_REQ_Q0 << qno));
  340. SOD(("imask %08lx %08lx\n", s->imask, sbus_readl(s->regs + IMASK)));
  341. /* If queue is full, just say NO */
  342. return -EBUSY;
  343. }
  344. request = sw_cq->pool + sw_cq->in;
  345. fch = &request->fchdr;
  346. switch (fcmd->proto) {
  347. case TYPE_SCSI_FCP:
  348. request->shdr.token = TOKEN(TYPE_SCSI_FCP, port->mask, fcmd->token);
  349. request->data[0].base = fc->dma_scsi_cmd + fcmd->token * sizeof(fcp_cmd);
  350. request->data[0].count = sizeof(fcp_cmd);
  351. request->data[1].base = fc->dma_scsi_rsp + fcmd->token * fc->rsp_size;
  352. request->data[1].count = fc->rsp_size;
  353. if (fcmd->data) {
  354. request->shdr.segcnt = 3;
  355. i = fc->scsi_cmd_pool[fcmd->token].fcp_data_len;
  356. request->shdr.bytecnt = i;
  357. request->data[2].base = fcmd->data;
  358. request->data[2].count = i;
  359. request->type =
  360. (fc->scsi_cmd_pool[fcmd->token].fcp_cntl & FCP_CNTL_WRITE) ?
  361. SOC_CQTYPE_IO_WRITE : SOC_CQTYPE_IO_READ;
  362. } else {
  363. request->shdr.segcnt = 2;
  364. request->shdr.bytecnt = 0;
  365. request->data[2].base = 0;
  366. request->data[2].count = 0;
  367. request->type = SOC_CQTYPE_SIMPLE;
  368. }
  369. FILL_FCHDR_RCTL_DID(fch, R_CTL_COMMAND, fc->did);
  370. FILL_FCHDR_SID(fch, fc->sid);
  371. FILL_FCHDR_TYPE_FCTL(fch, TYPE_SCSI_FCP,
  372. F_CTL_FIRST_SEQ | F_CTL_SEQ_INITIATIVE);
  373. FILL_FCHDR_SEQ_DF_SEQ(fch, 0, 0, 0);
  374. FILL_FCHDR_OXRX(fch, 0xffff, 0xffff);
  375. fch->param = 0;
  376. request->shdr.flags = port->flags;
  377. request->shdr.class = 2;
  378. break;
  379. case PROTO_OFFLINE:
  380. memset (request, 0, sizeof(*request));
  381. request->shdr.token = TOKEN(PROTO_OFFLINE, port->mask, fcmd->token);
  382. request->type = SOC_CQTYPE_OFFLINE;
  383. FILL_FCHDR_RCTL_DID(fch, R_CTL_COMMAND, fc->did);
  384. FILL_FCHDR_SID(fch, fc->sid);
  385. FILL_FCHDR_TYPE_FCTL(fch, TYPE_SCSI_FCP,
  386. F_CTL_FIRST_SEQ | F_CTL_SEQ_INITIATIVE);
  387. FILL_FCHDR_SEQ_DF_SEQ(fch, 0, 0, 0);
  388. FILL_FCHDR_OXRX(fch, 0xffff, 0xffff);
  389. request->shdr.flags = port->flags;
  390. break;
  391. case PROTO_REPORT_AL_MAP:
  392. /* SOC only supports Point-to-Point topology, no FC-AL, sorry... */
  393. return -ENOSYS;
  394. default:
  395. request->shdr.token = TOKEN(fcmd->proto, port->mask, fcmd->token);
  396. request->shdr.class = 2;
  397. request->shdr.flags = port->flags;
  398. memcpy (fch, &fcmd->fch, sizeof(fc_hdr));
  399. request->data[0].count = fcmd->cmdlen;
  400. request->data[1].count = fcmd->rsplen;
  401. request->type = fcmd->class;
  402. switch (fcmd->class) {
  403. case FC_CLASS_OUTBOUND:
  404. request->data[0].base = fcmd->cmd;
  405. request->data[0].count = fcmd->cmdlen;
  406. request->type = SOC_CQTYPE_OUTBOUND;
  407. request->shdr.bytecnt = fcmd->cmdlen;
  408. request->shdr.segcnt = 1;
  409. break;
  410. case FC_CLASS_INBOUND:
  411. request->data[0].base = fcmd->rsp;
  412. request->data[0].count = fcmd->rsplen;
  413. request->type = SOC_CQTYPE_INBOUND;
  414. request->shdr.bytecnt = 0;
  415. request->shdr.segcnt = 1;
  416. break;
  417. case FC_CLASS_SIMPLE:
  418. request->data[0].base = fcmd->cmd;
  419. request->data[1].base = fcmd->rsp;
  420. request->data[0].count = fcmd->cmdlen;
  421. request->data[1].count = fcmd->rsplen;
  422. request->type = SOC_CQTYPE_SIMPLE;
  423. request->shdr.bytecnt = fcmd->cmdlen;
  424. request->shdr.segcnt = 2;
  425. break;
  426. case FC_CLASS_IO_READ:
  427. case FC_CLASS_IO_WRITE:
  428. request->data[0].base = fcmd->cmd;
  429. request->data[1].base = fcmd->rsp;
  430. request->data[0].count = fcmd->cmdlen;
  431. request->data[1].count = fcmd->rsplen;
  432. request->type =
  433. (fcmd->class == FC_CLASS_IO_READ) ?
  434. SOC_CQTYPE_IO_READ : SOC_CQTYPE_IO_WRITE;
  435. if (fcmd->data) {
  436. request->data[2].base = fcmd->data;
  437. request->data[2].count = fcmd->datalen;
  438. request->shdr.bytecnt = fcmd->datalen;
  439. request->shdr.segcnt = 3;
  440. } else {
  441. request->shdr.bytecnt = 0;
  442. request->shdr.segcnt = 2;
  443. }
  444. break;
  445. };
  446. break;
  447. };
  448. request->count = 1;
  449. request->flags = 0;
  450. request->seqno = sw_cq->seqno;
  451. /* And now tell the SOC about it */
  452. if (++sw_cq->in > sw_cq->last) {
  453. sw_cq->in = 0;
  454. sw_cq->seqno++;
  455. }
  456. SOD(("Putting %08x into cmd\n",
  457. SOC_CMD_RSP_QALL | (sw_cq->in << 24) | (SOC_CMD_REQ_Q0 << qno)))
  458. sbus_writel(SOC_CMD_RSP_QALL | (sw_cq->in << 24) | (SOC_CMD_REQ_Q0 << qno),
  459. s->regs + CMD);
  460. /* Read so that command is completed. */
  461. sbus_readl(s->regs + CMD);
  462. return 0;
  463. }
  464. static inline void soc_download_fw(struct soc *s)
  465. {
  466. #ifdef HAVE_SOC_UCODE
  467. xram_copy_to (s->xram, soc_ucode, sizeof(soc_ucode));
  468. xram_bzero (s->xram + sizeof(soc_ucode), 32768 - sizeof(soc_ucode));
  469. #endif
  470. }
  471. /* Check for what the best SBUS burst we can use happens
  472. * to be on this machine.
  473. */
  474. static inline void soc_init_bursts(struct soc *s, struct sbus_dev *sdev)
  475. {
  476. int bsizes, bsizes_more;
  477. bsizes = (prom_getintdefault(sdev->prom_node,"burst-sizes",0xff) & 0xff);
  478. bsizes_more = (prom_getintdefault(sdev->bus->prom_node, "burst-sizes", 0xff) & 0xff);
  479. bsizes &= bsizes_more;
  480. if ((bsizes & 0x7f) == 0x7f)
  481. s->cfg = SOC_CFG_BURST_64;
  482. else if ((bsizes & 0x3f) == 0x3f)
  483. s->cfg = SOC_CFG_BURST_32;
  484. else if ((bsizes & 0x1f) == 0x1f)
  485. s->cfg = SOC_CFG_BURST_16;
  486. else
  487. s->cfg = SOC_CFG_BURST_4;
  488. }
  489. static inline void soc_init(struct sbus_dev *sdev, int no)
  490. {
  491. unsigned char tmp[60];
  492. int propl;
  493. struct soc *s;
  494. static int version_printed = 0;
  495. soc_hw_cq cq[8];
  496. int size, i;
  497. int irq;
  498. s = kzalloc (sizeof (struct soc), GFP_KERNEL);
  499. if (s == NULL)
  500. return;
  501. spin_lock_init(&s->lock);
  502. s->soc_no = no;
  503. SOD(("socs %08lx soc_intr %08lx soc_hw_enque %08x\n",
  504. (long)socs, (long)soc_intr, (long)soc_hw_enque))
  505. if (version_printed++ == 0)
  506. printk (version);
  507. s->port[0].fc.module = THIS_MODULE;
  508. s->port[1].fc.module = THIS_MODULE;
  509. s->next = socs;
  510. socs = s;
  511. s->port[0].fc.dev = sdev;
  512. s->port[1].fc.dev = sdev;
  513. s->port[0].s = s;
  514. s->port[1].s = s;
  515. s->port[0].fc.next = &s->port[1].fc;
  516. /* World Wide Name of SOC */
  517. propl = prom_getproperty (sdev->prom_node, "soc-wwn", tmp, sizeof(tmp));
  518. if (propl != sizeof (fc_wwn)) {
  519. s->wwn.naaid = NAAID_IEEE;
  520. s->wwn.lo = 0x12345678;
  521. } else
  522. memcpy (&s->wwn, tmp, sizeof (fc_wwn));
  523. propl = prom_getproperty (sdev->prom_node, "port-wwns", tmp, sizeof(tmp));
  524. if (propl != 2 * sizeof (fc_wwn)) {
  525. s->port[0].fc.wwn_nport.naaid = NAAID_IEEE_EXT;
  526. s->port[0].fc.wwn_nport.hi = s->wwn.hi;
  527. s->port[0].fc.wwn_nport.lo = s->wwn.lo;
  528. s->port[1].fc.wwn_nport.naaid = NAAID_IEEE_EXT;
  529. s->port[1].fc.wwn_nport.nportid = 1;
  530. s->port[1].fc.wwn_nport.hi = s->wwn.hi;
  531. s->port[1].fc.wwn_nport.lo = s->wwn.lo;
  532. } else {
  533. memcpy (&s->port[0].fc.wwn_nport, tmp, sizeof (fc_wwn));
  534. memcpy (&s->port[1].fc.wwn_nport, tmp + sizeof (fc_wwn), sizeof (fc_wwn));
  535. }
  536. memcpy (&s->port[0].fc.wwn_node, &s->wwn, sizeof (fc_wwn));
  537. memcpy (&s->port[1].fc.wwn_node, &s->wwn, sizeof (fc_wwn));
  538. SOD(("Got wwns %08x%08x ports %08x%08x and %08x%08x\n",
  539. *(u32 *)&s->port[0].fc.wwn_nport, s->port[0].fc.wwn_nport.lo,
  540. *(u32 *)&s->port[0].fc.wwn_nport, s->port[0].fc.wwn_nport.lo,
  541. *(u32 *)&s->port[1].fc.wwn_nport, s->port[1].fc.wwn_nport.lo))
  542. s->port[0].fc.sid = 1;
  543. s->port[1].fc.sid = 17;
  544. s->port[0].fc.did = 2;
  545. s->port[1].fc.did = 18;
  546. s->port[0].fc.reset = soc_reset;
  547. s->port[1].fc.reset = soc_reset;
  548. if (sdev->num_registers == 1) {
  549. /* Probably SunFire onboard SOC */
  550. s->xram = sbus_ioremap(&sdev->resource[0], 0,
  551. 0x10000UL, "soc xram");
  552. s->regs = sbus_ioremap(&sdev->resource[0], 0x10000UL,
  553. 0x10UL, "soc regs");
  554. } else {
  555. /* Probably SOC sbus card */
  556. s->xram = sbus_ioremap(&sdev->resource[1], 0,
  557. sdev->reg_addrs[1].reg_size, "soc xram");
  558. s->regs = sbus_ioremap(&sdev->resource[2], 0,
  559. sdev->reg_addrs[2].reg_size, "soc regs");
  560. }
  561. soc_init_bursts(s, sdev);
  562. SOD(("Disabling SOC\n"))
  563. soc_disable (s);
  564. irq = sdev->irqs[0];
  565. if (request_irq (irq, soc_intr, IRQF_SHARED, "SOC", (void *)s)) {
  566. soc_printk ("Cannot order irq %d to go\n", irq);
  567. socs = s->next;
  568. return;
  569. }
  570. SOD(("SOC uses IRQ %d\n", irq))
  571. s->port[0].fc.irq = irq;
  572. s->port[1].fc.irq = irq;
  573. sprintf (s->port[0].fc.name, "soc%d port A", no);
  574. sprintf (s->port[1].fc.name, "soc%d port B", no);
  575. s->port[0].flags = SOC_FC_HDR | SOC_PORT_A;
  576. s->port[1].flags = SOC_FC_HDR | SOC_PORT_B;
  577. s->port[1].mask = (1 << 11);
  578. s->port[0].fc.hw_enque = soc_hw_enque;
  579. s->port[1].fc.hw_enque = soc_hw_enque;
  580. soc_download_fw (s);
  581. SOD(("Downloaded firmware\n"))
  582. /* Now setup xram circular queues */
  583. memset (cq, 0, sizeof(cq));
  584. size = (SOC_CQ_REQ0_SIZE + SOC_CQ_REQ1_SIZE) * sizeof(soc_req);
  585. s->req_cpu = sbus_alloc_consistent(sdev, size, &s->req_dvma);
  586. s->req[0].pool = s->req_cpu;
  587. cq[0].address = s->req_dvma;
  588. s->req[1].pool = s->req[0].pool + SOC_CQ_REQ0_SIZE;
  589. s->req[0].hw_cq = (soc_hw_cq __iomem *)(s->xram + SOC_CQ_REQ_OFFSET);
  590. s->req[1].hw_cq = (soc_hw_cq __iomem *)(s->xram + SOC_CQ_REQ_OFFSET + sizeof(soc_hw_cq));
  591. s->rsp[0].hw_cq = (soc_hw_cq __iomem *)(s->xram + SOC_CQ_RSP_OFFSET);
  592. s->rsp[1].hw_cq = (soc_hw_cq __iomem *)(s->xram + SOC_CQ_RSP_OFFSET + sizeof(soc_hw_cq));
  593. cq[1].address = cq[0].address + (SOC_CQ_REQ0_SIZE * sizeof(soc_req));
  594. cq[4].address = 1;
  595. cq[5].address = 1;
  596. cq[0].last = SOC_CQ_REQ0_SIZE - 1;
  597. cq[1].last = SOC_CQ_REQ1_SIZE - 1;
  598. cq[4].last = SOC_CQ_RSP0_SIZE - 1;
  599. cq[5].last = SOC_CQ_RSP1_SIZE - 1;
  600. for (i = 0; i < 8; i++)
  601. cq[i].seqno = 1;
  602. s->req[0].last = SOC_CQ_REQ0_SIZE - 1;
  603. s->req[1].last = SOC_CQ_REQ1_SIZE - 1;
  604. s->rsp[0].last = SOC_CQ_RSP0_SIZE - 1;
  605. s->rsp[1].last = SOC_CQ_RSP1_SIZE - 1;
  606. s->req[0].seqno = 1;
  607. s->req[1].seqno = 1;
  608. s->rsp[0].seqno = 1;
  609. s->rsp[1].seqno = 1;
  610. xram_copy_to (s->xram + SOC_CQ_REQ_OFFSET, cq, sizeof(cq));
  611. /* Make our sw copy of SOC service parameters */
  612. xram_copy_from (s->serv_params, s->xram + 0x140, sizeof (s->serv_params));
  613. s->port[0].fc.common_svc = (common_svc_parm *)s->serv_params;
  614. s->port[0].fc.class_svcs = (svc_parm *)(s->serv_params + 0x20);
  615. s->port[1].fc.common_svc = (common_svc_parm *)&s->serv_params;
  616. s->port[1].fc.class_svcs = (svc_parm *)(s->serv_params + 0x20);
  617. soc_enable (s);
  618. SOD(("Enabled SOC\n"))
  619. }
  620. static int __init soc_probe(void)
  621. {
  622. struct sbus_bus *sbus;
  623. struct sbus_dev *sdev = NULL;
  624. struct soc *s;
  625. int cards = 0;
  626. for_each_sbus(sbus) {
  627. for_each_sbusdev(sdev, sbus) {
  628. if(!strcmp(sdev->prom_name, "SUNW,soc")) {
  629. soc_init(sdev, cards);
  630. cards++;
  631. }
  632. }
  633. }
  634. if (!cards) return -EIO;
  635. for_each_soc(s)
  636. if (s->next)
  637. s->port[1].fc.next = &s->next->port[0].fc;
  638. fcp_init (&socs->port[0].fc);
  639. return 0;
  640. }
  641. static void __exit soc_cleanup(void)
  642. {
  643. struct soc *s;
  644. int irq;
  645. struct sbus_dev *sdev;
  646. for_each_soc(s) {
  647. irq = s->port[0].fc.irq;
  648. free_irq (irq, s);
  649. fcp_release(&(s->port[0].fc), 2);
  650. sdev = s->port[0].fc.dev;
  651. if (sdev->num_registers == 1) {
  652. sbus_iounmap(s->xram, 0x10000UL);
  653. sbus_iounmap(s->regs, 0x10UL);
  654. } else {
  655. sbus_iounmap(s->xram, sdev->reg_addrs[1].reg_size);
  656. sbus_iounmap(s->regs, sdev->reg_addrs[2].reg_size);
  657. }
  658. sbus_free_consistent(sdev,
  659. (SOC_CQ_REQ0_SIZE+SOC_CQ_REQ1_SIZE)*sizeof(soc_req),
  660. s->req_cpu, s->req_dvma);
  661. }
  662. }
  663. module_init(soc_probe);
  664. module_exit(soc_cleanup);
  665. MODULE_LICENSE("GPL");