edac_mc.c 51 KB

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  1. /*
  2. * edac_mc kernel module
  3. * (C) 2005, 2006 Linux Networx (http://lnxi.com)
  4. * This file may be distributed under the terms of the
  5. * GNU General Public License.
  6. *
  7. * Written by Thayne Harbaugh
  8. * Based on work by Dan Hollis <goemon at anime dot net> and others.
  9. * http://www.anime.net/~goemon/linux-ecc/
  10. *
  11. * Modified by Dave Peterson and Doug Thompson
  12. *
  13. */
  14. #include <linux/module.h>
  15. #include <linux/proc_fs.h>
  16. #include <linux/kernel.h>
  17. #include <linux/types.h>
  18. #include <linux/smp.h>
  19. #include <linux/init.h>
  20. #include <linux/sysctl.h>
  21. #include <linux/highmem.h>
  22. #include <linux/timer.h>
  23. #include <linux/slab.h>
  24. #include <linux/jiffies.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/list.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/ctype.h>
  29. #include <linux/kthread.h>
  30. #include <linux/freezer.h>
  31. #include <asm/uaccess.h>
  32. #include <asm/page.h>
  33. #include <asm/edac.h>
  34. #include "edac_mc.h"
  35. #define EDAC_MC_VERSION "Ver: 2.0.1 " __DATE__
  36. #ifdef CONFIG_EDAC_DEBUG
  37. /* Values of 0 to 4 will generate output */
  38. int edac_debug_level = 1;
  39. EXPORT_SYMBOL_GPL(edac_debug_level);
  40. #endif
  41. /* EDAC Controls, setable by module parameter, and sysfs */
  42. static int log_ue = 1;
  43. static int log_ce = 1;
  44. static int panic_on_ue;
  45. static int poll_msec = 1000;
  46. /* lock to memory controller's control array */
  47. static DECLARE_MUTEX(mem_ctls_mutex);
  48. static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices);
  49. static struct task_struct *edac_thread;
  50. #ifdef CONFIG_PCI
  51. static int check_pci_parity = 0; /* default YES check PCI parity */
  52. static int panic_on_pci_parity; /* default no panic on PCI Parity */
  53. static atomic_t pci_parity_count = ATOMIC_INIT(0);
  54. static struct kobject edac_pci_kobj; /* /sys/devices/system/edac/pci */
  55. static struct completion edac_pci_kobj_complete;
  56. #endif /* CONFIG_PCI */
  57. /* START sysfs data and methods */
  58. static const char *mem_types[] = {
  59. [MEM_EMPTY] = "Empty",
  60. [MEM_RESERVED] = "Reserved",
  61. [MEM_UNKNOWN] = "Unknown",
  62. [MEM_FPM] = "FPM",
  63. [MEM_EDO] = "EDO",
  64. [MEM_BEDO] = "BEDO",
  65. [MEM_SDR] = "Unbuffered-SDR",
  66. [MEM_RDR] = "Registered-SDR",
  67. [MEM_DDR] = "Unbuffered-DDR",
  68. [MEM_RDDR] = "Registered-DDR",
  69. [MEM_RMBS] = "RMBS"
  70. };
  71. static const char *dev_types[] = {
  72. [DEV_UNKNOWN] = "Unknown",
  73. [DEV_X1] = "x1",
  74. [DEV_X2] = "x2",
  75. [DEV_X4] = "x4",
  76. [DEV_X8] = "x8",
  77. [DEV_X16] = "x16",
  78. [DEV_X32] = "x32",
  79. [DEV_X64] = "x64"
  80. };
  81. static const char *edac_caps[] = {
  82. [EDAC_UNKNOWN] = "Unknown",
  83. [EDAC_NONE] = "None",
  84. [EDAC_RESERVED] = "Reserved",
  85. [EDAC_PARITY] = "PARITY",
  86. [EDAC_EC] = "EC",
  87. [EDAC_SECDED] = "SECDED",
  88. [EDAC_S2ECD2ED] = "S2ECD2ED",
  89. [EDAC_S4ECD4ED] = "S4ECD4ED",
  90. [EDAC_S8ECD8ED] = "S8ECD8ED",
  91. [EDAC_S16ECD16ED] = "S16ECD16ED"
  92. };
  93. /* sysfs object: /sys/devices/system/edac */
  94. static struct sysdev_class edac_class = {
  95. set_kset_name("edac"),
  96. };
  97. /* sysfs object:
  98. * /sys/devices/system/edac/mc
  99. */
  100. static struct kobject edac_memctrl_kobj;
  101. /* We use these to wait for the reference counts on edac_memctrl_kobj and
  102. * edac_pci_kobj to reach 0.
  103. */
  104. static struct completion edac_memctrl_kobj_complete;
  105. /*
  106. * /sys/devices/system/edac/mc;
  107. * data structures and methods
  108. */
  109. static ssize_t memctrl_int_show(void *ptr, char *buffer)
  110. {
  111. int *value = (int*) ptr;
  112. return sprintf(buffer, "%u\n", *value);
  113. }
  114. static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count)
  115. {
  116. int *value = (int*) ptr;
  117. if (isdigit(*buffer))
  118. *value = simple_strtoul(buffer, NULL, 0);
  119. return count;
  120. }
  121. struct memctrl_dev_attribute {
  122. struct attribute attr;
  123. void *value;
  124. ssize_t (*show)(void *,char *);
  125. ssize_t (*store)(void *, const char *, size_t);
  126. };
  127. /* Set of show/store abstract level functions for memory control object */
  128. static ssize_t memctrl_dev_show(struct kobject *kobj,
  129. struct attribute *attr, char *buffer)
  130. {
  131. struct memctrl_dev_attribute *memctrl_dev;
  132. memctrl_dev = (struct memctrl_dev_attribute*)attr;
  133. if (memctrl_dev->show)
  134. return memctrl_dev->show(memctrl_dev->value, buffer);
  135. return -EIO;
  136. }
  137. static ssize_t memctrl_dev_store(struct kobject *kobj, struct attribute *attr,
  138. const char *buffer, size_t count)
  139. {
  140. struct memctrl_dev_attribute *memctrl_dev;
  141. memctrl_dev = (struct memctrl_dev_attribute*)attr;
  142. if (memctrl_dev->store)
  143. return memctrl_dev->store(memctrl_dev->value, buffer, count);
  144. return -EIO;
  145. }
  146. static struct sysfs_ops memctrlfs_ops = {
  147. .show = memctrl_dev_show,
  148. .store = memctrl_dev_store
  149. };
  150. #define MEMCTRL_ATTR(_name,_mode,_show,_store) \
  151. struct memctrl_dev_attribute attr_##_name = { \
  152. .attr = {.name = __stringify(_name), .mode = _mode }, \
  153. .value = &_name, \
  154. .show = _show, \
  155. .store = _store, \
  156. };
  157. #define MEMCTRL_STRING_ATTR(_name,_data,_mode,_show,_store) \
  158. struct memctrl_dev_attribute attr_##_name = { \
  159. .attr = {.name = __stringify(_name), .mode = _mode }, \
  160. .value = _data, \
  161. .show = _show, \
  162. .store = _store, \
  163. };
  164. /* csrow<id> control files */
  165. MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  166. MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  167. MEMCTRL_ATTR(log_ce,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  168. MEMCTRL_ATTR(poll_msec,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  169. /* Base Attributes of the memory ECC object */
  170. static struct memctrl_dev_attribute *memctrl_attr[] = {
  171. &attr_panic_on_ue,
  172. &attr_log_ue,
  173. &attr_log_ce,
  174. &attr_poll_msec,
  175. NULL,
  176. };
  177. /* Main MC kobject release() function */
  178. static void edac_memctrl_master_release(struct kobject *kobj)
  179. {
  180. debugf1("%s()\n", __func__);
  181. complete(&edac_memctrl_kobj_complete);
  182. }
  183. static struct kobj_type ktype_memctrl = {
  184. .release = edac_memctrl_master_release,
  185. .sysfs_ops = &memctrlfs_ops,
  186. .default_attrs = (struct attribute **) memctrl_attr,
  187. };
  188. /* Initialize the main sysfs entries for edac:
  189. * /sys/devices/system/edac
  190. *
  191. * and children
  192. *
  193. * Return: 0 SUCCESS
  194. * !0 FAILURE
  195. */
  196. static int edac_sysfs_memctrl_setup(void)
  197. {
  198. int err = 0;
  199. debugf1("%s()\n", __func__);
  200. /* create the /sys/devices/system/edac directory */
  201. err = sysdev_class_register(&edac_class);
  202. if (err) {
  203. debugf1("%s() error=%d\n", __func__, err);
  204. return err;
  205. }
  206. /* Init the MC's kobject */
  207. memset(&edac_memctrl_kobj, 0, sizeof (edac_memctrl_kobj));
  208. edac_memctrl_kobj.parent = &edac_class.kset.kobj;
  209. edac_memctrl_kobj.ktype = &ktype_memctrl;
  210. /* generate sysfs "..../edac/mc" */
  211. err = kobject_set_name(&edac_memctrl_kobj,"mc");
  212. if (err)
  213. goto fail;
  214. /* FIXME: maybe new sysdev_create_subdir() */
  215. err = kobject_register(&edac_memctrl_kobj);
  216. if (err) {
  217. debugf1("Failed to register '.../edac/mc'\n");
  218. goto fail;
  219. }
  220. debugf1("Registered '.../edac/mc' kobject\n");
  221. return 0;
  222. fail:
  223. sysdev_class_unregister(&edac_class);
  224. return err;
  225. }
  226. /*
  227. * MC teardown:
  228. * the '..../edac/mc' kobject followed by '..../edac' itself
  229. */
  230. static void edac_sysfs_memctrl_teardown(void)
  231. {
  232. debugf0("MC: " __FILE__ ": %s()\n", __func__);
  233. /* Unregister the MC's kobject and wait for reference count to reach
  234. * 0.
  235. */
  236. init_completion(&edac_memctrl_kobj_complete);
  237. kobject_unregister(&edac_memctrl_kobj);
  238. wait_for_completion(&edac_memctrl_kobj_complete);
  239. /* Unregister the 'edac' object */
  240. sysdev_class_unregister(&edac_class);
  241. }
  242. #ifdef CONFIG_PCI
  243. static ssize_t edac_pci_int_show(void *ptr, char *buffer)
  244. {
  245. int *value = ptr;
  246. return sprintf(buffer,"%d\n",*value);
  247. }
  248. static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
  249. {
  250. int *value = ptr;
  251. if (isdigit(*buffer))
  252. *value = simple_strtoul(buffer,NULL,0);
  253. return count;
  254. }
  255. struct edac_pci_dev_attribute {
  256. struct attribute attr;
  257. void *value;
  258. ssize_t (*show)(void *,char *);
  259. ssize_t (*store)(void *, const char *,size_t);
  260. };
  261. /* Set of show/store abstract level functions for PCI Parity object */
  262. static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
  263. char *buffer)
  264. {
  265. struct edac_pci_dev_attribute *edac_pci_dev;
  266. edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
  267. if (edac_pci_dev->show)
  268. return edac_pci_dev->show(edac_pci_dev->value, buffer);
  269. return -EIO;
  270. }
  271. static ssize_t edac_pci_dev_store(struct kobject *kobj,
  272. struct attribute *attr, const char *buffer, size_t count)
  273. {
  274. struct edac_pci_dev_attribute *edac_pci_dev;
  275. edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
  276. if (edac_pci_dev->show)
  277. return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
  278. return -EIO;
  279. }
  280. static struct sysfs_ops edac_pci_sysfs_ops = {
  281. .show = edac_pci_dev_show,
  282. .store = edac_pci_dev_store
  283. };
  284. #define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
  285. struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
  286. .attr = {.name = __stringify(_name), .mode = _mode }, \
  287. .value = &_name, \
  288. .show = _show, \
  289. .store = _store, \
  290. };
  291. #define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
  292. struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
  293. .attr = {.name = __stringify(_name), .mode = _mode }, \
  294. .value = _data, \
  295. .show = _show, \
  296. .store = _store, \
  297. };
  298. /* PCI Parity control files */
  299. EDAC_PCI_ATTR(check_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
  300. edac_pci_int_store);
  301. EDAC_PCI_ATTR(panic_on_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
  302. edac_pci_int_store);
  303. EDAC_PCI_ATTR(pci_parity_count, S_IRUGO, edac_pci_int_show, NULL);
  304. /* Base Attributes of the memory ECC object */
  305. static struct edac_pci_dev_attribute *edac_pci_attr[] = {
  306. &edac_pci_attr_check_pci_parity,
  307. &edac_pci_attr_panic_on_pci_parity,
  308. &edac_pci_attr_pci_parity_count,
  309. NULL,
  310. };
  311. /* No memory to release */
  312. static void edac_pci_release(struct kobject *kobj)
  313. {
  314. debugf1("%s()\n", __func__);
  315. complete(&edac_pci_kobj_complete);
  316. }
  317. static struct kobj_type ktype_edac_pci = {
  318. .release = edac_pci_release,
  319. .sysfs_ops = &edac_pci_sysfs_ops,
  320. .default_attrs = (struct attribute **) edac_pci_attr,
  321. };
  322. /**
  323. * edac_sysfs_pci_setup()
  324. *
  325. */
  326. static int edac_sysfs_pci_setup(void)
  327. {
  328. int err;
  329. debugf1("%s()\n", __func__);
  330. memset(&edac_pci_kobj, 0, sizeof(edac_pci_kobj));
  331. edac_pci_kobj.parent = &edac_class.kset.kobj;
  332. edac_pci_kobj.ktype = &ktype_edac_pci;
  333. err = kobject_set_name(&edac_pci_kobj, "pci");
  334. if (!err) {
  335. /* Instanstiate the csrow object */
  336. /* FIXME: maybe new sysdev_create_subdir() */
  337. err = kobject_register(&edac_pci_kobj);
  338. if (err)
  339. debugf1("Failed to register '.../edac/pci'\n");
  340. else
  341. debugf1("Registered '.../edac/pci' kobject\n");
  342. }
  343. return err;
  344. }
  345. static void edac_sysfs_pci_teardown(void)
  346. {
  347. debugf0("%s()\n", __func__);
  348. init_completion(&edac_pci_kobj_complete);
  349. kobject_unregister(&edac_pci_kobj);
  350. wait_for_completion(&edac_pci_kobj_complete);
  351. }
  352. static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
  353. {
  354. int where;
  355. u16 status;
  356. where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
  357. pci_read_config_word(dev, where, &status);
  358. /* If we get back 0xFFFF then we must suspect that the card has been
  359. * pulled but the Linux PCI layer has not yet finished cleaning up.
  360. * We don't want to report on such devices
  361. */
  362. if (status == 0xFFFF) {
  363. u32 sanity;
  364. pci_read_config_dword(dev, 0, &sanity);
  365. if (sanity == 0xFFFFFFFF)
  366. return 0;
  367. }
  368. status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
  369. PCI_STATUS_PARITY;
  370. if (status)
  371. /* reset only the bits we are interested in */
  372. pci_write_config_word(dev, where, status);
  373. return status;
  374. }
  375. typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
  376. /* Clear any PCI parity errors logged by this device. */
  377. static void edac_pci_dev_parity_clear(struct pci_dev *dev)
  378. {
  379. u8 header_type;
  380. get_pci_parity_status(dev, 0);
  381. /* read the device TYPE, looking for bridges */
  382. pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
  383. if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
  384. get_pci_parity_status(dev, 1);
  385. }
  386. /*
  387. * PCI Parity polling
  388. *
  389. */
  390. static void edac_pci_dev_parity_test(struct pci_dev *dev)
  391. {
  392. u16 status;
  393. u8 header_type;
  394. /* read the STATUS register on this device
  395. */
  396. status = get_pci_parity_status(dev, 0);
  397. debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
  398. /* check the status reg for errors */
  399. if (status) {
  400. if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
  401. edac_printk(KERN_CRIT, EDAC_PCI,
  402. "Signaled System Error on %s\n",
  403. pci_name(dev));
  404. if (status & (PCI_STATUS_PARITY)) {
  405. edac_printk(KERN_CRIT, EDAC_PCI,
  406. "Master Data Parity Error on %s\n",
  407. pci_name(dev));
  408. atomic_inc(&pci_parity_count);
  409. }
  410. if (status & (PCI_STATUS_DETECTED_PARITY)) {
  411. edac_printk(KERN_CRIT, EDAC_PCI,
  412. "Detected Parity Error on %s\n",
  413. pci_name(dev));
  414. atomic_inc(&pci_parity_count);
  415. }
  416. }
  417. /* read the device TYPE, looking for bridges */
  418. pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
  419. debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
  420. if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
  421. /* On bridges, need to examine secondary status register */
  422. status = get_pci_parity_status(dev, 1);
  423. debugf2("PCI SEC_STATUS= 0x%04x %s\n",
  424. status, dev->dev.bus_id );
  425. /* check the secondary status reg for errors */
  426. if (status) {
  427. if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
  428. edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
  429. "Signaled System Error on %s\n",
  430. pci_name(dev));
  431. if (status & (PCI_STATUS_PARITY)) {
  432. edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
  433. "Master Data Parity Error on "
  434. "%s\n", pci_name(dev));
  435. atomic_inc(&pci_parity_count);
  436. }
  437. if (status & (PCI_STATUS_DETECTED_PARITY)) {
  438. edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
  439. "Detected Parity Error on %s\n",
  440. pci_name(dev));
  441. atomic_inc(&pci_parity_count);
  442. }
  443. }
  444. }
  445. }
  446. /*
  447. * pci_dev parity list iterator
  448. * Scan the PCI device list for one iteration, looking for SERRORs
  449. * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
  450. */
  451. static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
  452. {
  453. struct pci_dev *dev = NULL;
  454. /* request for kernel access to the next PCI device, if any,
  455. * and while we are looking at it have its reference count
  456. * bumped until we are done with it
  457. */
  458. while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
  459. fn(dev);
  460. }
  461. }
  462. static void do_pci_parity_check(void)
  463. {
  464. unsigned long flags;
  465. int before_count;
  466. debugf3("%s()\n", __func__);
  467. if (!check_pci_parity)
  468. return;
  469. before_count = atomic_read(&pci_parity_count);
  470. /* scan all PCI devices looking for a Parity Error on devices and
  471. * bridges
  472. */
  473. local_irq_save(flags);
  474. edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
  475. local_irq_restore(flags);
  476. /* Only if operator has selected panic on PCI Error */
  477. if (panic_on_pci_parity) {
  478. /* If the count is different 'after' from 'before' */
  479. if (before_count != atomic_read(&pci_parity_count))
  480. panic("EDAC: PCI Parity Error");
  481. }
  482. }
  483. static inline void clear_pci_parity_errors(void)
  484. {
  485. /* Clear any PCI bus parity errors that devices initially have logged
  486. * in their registers.
  487. */
  488. edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
  489. }
  490. #else /* CONFIG_PCI */
  491. /* pre-process these away */
  492. #define do_pci_parity_check()
  493. #define clear_pci_parity_errors()
  494. #define edac_sysfs_pci_teardown()
  495. #define edac_sysfs_pci_setup() (0)
  496. #endif /* CONFIG_PCI */
  497. /* EDAC sysfs CSROW data structures and methods
  498. */
  499. /* Set of more default csrow<id> attribute show/store functions */
  500. static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data, int private)
  501. {
  502. return sprintf(data,"%u\n", csrow->ue_count);
  503. }
  504. static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data, int private)
  505. {
  506. return sprintf(data,"%u\n", csrow->ce_count);
  507. }
  508. static ssize_t csrow_size_show(struct csrow_info *csrow, char *data, int private)
  509. {
  510. return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages));
  511. }
  512. static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data, int private)
  513. {
  514. return sprintf(data,"%s\n", mem_types[csrow->mtype]);
  515. }
  516. static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data, int private)
  517. {
  518. return sprintf(data,"%s\n", dev_types[csrow->dtype]);
  519. }
  520. static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data, int private)
  521. {
  522. return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]);
  523. }
  524. /* show/store functions for DIMM Label attributes */
  525. static ssize_t channel_dimm_label_show(struct csrow_info *csrow,
  526. char *data, int channel)
  527. {
  528. return snprintf(data, EDAC_MC_LABEL_LEN,"%s",
  529. csrow->channels[channel].label);
  530. }
  531. static ssize_t channel_dimm_label_store(struct csrow_info *csrow,
  532. const char *data,
  533. size_t count,
  534. int channel)
  535. {
  536. ssize_t max_size = 0;
  537. max_size = min((ssize_t)count,(ssize_t)EDAC_MC_LABEL_LEN-1);
  538. strncpy(csrow->channels[channel].label, data, max_size);
  539. csrow->channels[channel].label[max_size] = '\0';
  540. return max_size;
  541. }
  542. /* show function for dynamic chX_ce_count attribute */
  543. static ssize_t channel_ce_count_show(struct csrow_info *csrow,
  544. char *data,
  545. int channel)
  546. {
  547. return sprintf(data, "%u\n", csrow->channels[channel].ce_count);
  548. }
  549. /* csrow specific attribute structure */
  550. struct csrowdev_attribute {
  551. struct attribute attr;
  552. ssize_t (*show)(struct csrow_info *,char *,int);
  553. ssize_t (*store)(struct csrow_info *, const char *,size_t,int);
  554. int private;
  555. };
  556. #define to_csrow(k) container_of(k, struct csrow_info, kobj)
  557. #define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr)
  558. /* Set of show/store higher level functions for default csrow attributes */
  559. static ssize_t csrowdev_show(struct kobject *kobj,
  560. struct attribute *attr,
  561. char *buffer)
  562. {
  563. struct csrow_info *csrow = to_csrow(kobj);
  564. struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
  565. if (csrowdev_attr->show)
  566. return csrowdev_attr->show(csrow,
  567. buffer,
  568. csrowdev_attr->private);
  569. return -EIO;
  570. }
  571. static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr,
  572. const char *buffer, size_t count)
  573. {
  574. struct csrow_info *csrow = to_csrow(kobj);
  575. struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr);
  576. if (csrowdev_attr->store)
  577. return csrowdev_attr->store(csrow,
  578. buffer,
  579. count,
  580. csrowdev_attr->private);
  581. return -EIO;
  582. }
  583. static struct sysfs_ops csrowfs_ops = {
  584. .show = csrowdev_show,
  585. .store = csrowdev_store
  586. };
  587. #define CSROWDEV_ATTR(_name,_mode,_show,_store,_private) \
  588. struct csrowdev_attribute attr_##_name = { \
  589. .attr = {.name = __stringify(_name), .mode = _mode }, \
  590. .show = _show, \
  591. .store = _store, \
  592. .private = _private, \
  593. };
  594. /* default cwrow<id>/attribute files */
  595. CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL,0);
  596. CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL,0);
  597. CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL,0);
  598. CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL,0);
  599. CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL,0);
  600. CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL,0);
  601. /* default attributes of the CSROW<id> object */
  602. static struct csrowdev_attribute *default_csrow_attr[] = {
  603. &attr_dev_type,
  604. &attr_mem_type,
  605. &attr_edac_mode,
  606. &attr_size_mb,
  607. &attr_ue_count,
  608. &attr_ce_count,
  609. NULL,
  610. };
  611. /* possible dynamic channel DIMM Label attribute files */
  612. CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR,
  613. channel_dimm_label_show,
  614. channel_dimm_label_store,
  615. 0 );
  616. CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR,
  617. channel_dimm_label_show,
  618. channel_dimm_label_store,
  619. 1 );
  620. CSROWDEV_ATTR(ch2_dimm_label,S_IRUGO|S_IWUSR,
  621. channel_dimm_label_show,
  622. channel_dimm_label_store,
  623. 2 );
  624. CSROWDEV_ATTR(ch3_dimm_label,S_IRUGO|S_IWUSR,
  625. channel_dimm_label_show,
  626. channel_dimm_label_store,
  627. 3 );
  628. CSROWDEV_ATTR(ch4_dimm_label,S_IRUGO|S_IWUSR,
  629. channel_dimm_label_show,
  630. channel_dimm_label_store,
  631. 4 );
  632. CSROWDEV_ATTR(ch5_dimm_label,S_IRUGO|S_IWUSR,
  633. channel_dimm_label_show,
  634. channel_dimm_label_store,
  635. 5 );
  636. /* Total possible dynamic DIMM Label attribute file table */
  637. static struct csrowdev_attribute *dynamic_csrow_dimm_attr[] = {
  638. &attr_ch0_dimm_label,
  639. &attr_ch1_dimm_label,
  640. &attr_ch2_dimm_label,
  641. &attr_ch3_dimm_label,
  642. &attr_ch4_dimm_label,
  643. &attr_ch5_dimm_label
  644. };
  645. /* possible dynamic channel ce_count attribute files */
  646. CSROWDEV_ATTR(ch0_ce_count,S_IRUGO|S_IWUSR,
  647. channel_ce_count_show,
  648. NULL,
  649. 0 );
  650. CSROWDEV_ATTR(ch1_ce_count,S_IRUGO|S_IWUSR,
  651. channel_ce_count_show,
  652. NULL,
  653. 1 );
  654. CSROWDEV_ATTR(ch2_ce_count,S_IRUGO|S_IWUSR,
  655. channel_ce_count_show,
  656. NULL,
  657. 2 );
  658. CSROWDEV_ATTR(ch3_ce_count,S_IRUGO|S_IWUSR,
  659. channel_ce_count_show,
  660. NULL,
  661. 3 );
  662. CSROWDEV_ATTR(ch4_ce_count,S_IRUGO|S_IWUSR,
  663. channel_ce_count_show,
  664. NULL,
  665. 4 );
  666. CSROWDEV_ATTR(ch5_ce_count,S_IRUGO|S_IWUSR,
  667. channel_ce_count_show,
  668. NULL,
  669. 5 );
  670. /* Total possible dynamic ce_count attribute file table */
  671. static struct csrowdev_attribute *dynamic_csrow_ce_count_attr[] = {
  672. &attr_ch0_ce_count,
  673. &attr_ch1_ce_count,
  674. &attr_ch2_ce_count,
  675. &attr_ch3_ce_count,
  676. &attr_ch4_ce_count,
  677. &attr_ch5_ce_count
  678. };
  679. #define EDAC_NR_CHANNELS 6
  680. /* Create dynamic CHANNEL files, indexed by 'chan', under specifed CSROW */
  681. static int edac_create_channel_files(struct kobject *kobj, int chan)
  682. {
  683. int err=-ENODEV;
  684. if (chan >= EDAC_NR_CHANNELS)
  685. return err;
  686. /* create the DIMM label attribute file */
  687. err = sysfs_create_file(kobj,
  688. (struct attribute *) dynamic_csrow_dimm_attr[chan]);
  689. if (!err) {
  690. /* create the CE Count attribute file */
  691. err = sysfs_create_file(kobj,
  692. (struct attribute *) dynamic_csrow_ce_count_attr[chan]);
  693. } else {
  694. debugf1("%s() dimm labels and ce_count files created", __func__);
  695. }
  696. return err;
  697. }
  698. /* No memory to release for this kobj */
  699. static void edac_csrow_instance_release(struct kobject *kobj)
  700. {
  701. struct csrow_info *cs;
  702. cs = container_of(kobj, struct csrow_info, kobj);
  703. complete(&cs->kobj_complete);
  704. }
  705. /* the kobj_type instance for a CSROW */
  706. static struct kobj_type ktype_csrow = {
  707. .release = edac_csrow_instance_release,
  708. .sysfs_ops = &csrowfs_ops,
  709. .default_attrs = (struct attribute **) default_csrow_attr,
  710. };
  711. /* Create a CSROW object under specifed edac_mc_device */
  712. static int edac_create_csrow_object(
  713. struct kobject *edac_mci_kobj,
  714. struct csrow_info *csrow,
  715. int index)
  716. {
  717. int err = 0;
  718. int chan;
  719. memset(&csrow->kobj, 0, sizeof(csrow->kobj));
  720. /* generate ..../edac/mc/mc<id>/csrow<index> */
  721. csrow->kobj.parent = edac_mci_kobj;
  722. csrow->kobj.ktype = &ktype_csrow;
  723. /* name this instance of csrow<id> */
  724. err = kobject_set_name(&csrow->kobj,"csrow%d",index);
  725. if (err)
  726. goto error_exit;
  727. /* Instanstiate the csrow object */
  728. err = kobject_register(&csrow->kobj);
  729. if (!err) {
  730. /* Create the dyanmic attribute files on this csrow,
  731. * namely, the DIMM labels and the channel ce_count
  732. */
  733. for (chan = 0; chan < csrow->nr_channels; chan++) {
  734. err = edac_create_channel_files(&csrow->kobj,chan);
  735. if (err)
  736. break;
  737. }
  738. }
  739. error_exit:
  740. return err;
  741. }
  742. /* default sysfs methods and data structures for the main MCI kobject */
  743. static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
  744. const char *data, size_t count)
  745. {
  746. int row, chan;
  747. mci->ue_noinfo_count = 0;
  748. mci->ce_noinfo_count = 0;
  749. mci->ue_count = 0;
  750. mci->ce_count = 0;
  751. for (row = 0; row < mci->nr_csrows; row++) {
  752. struct csrow_info *ri = &mci->csrows[row];
  753. ri->ue_count = 0;
  754. ri->ce_count = 0;
  755. for (chan = 0; chan < ri->nr_channels; chan++)
  756. ri->channels[chan].ce_count = 0;
  757. }
  758. mci->start_time = jiffies;
  759. return count;
  760. }
  761. /* memory scrubbing */
  762. static ssize_t mci_sdram_scrub_rate_store(struct mem_ctl_info *mci,
  763. const char *data, size_t count)
  764. {
  765. u32 bandwidth = -1;
  766. if (mci->set_sdram_scrub_rate) {
  767. memctrl_int_store(&bandwidth, data, count);
  768. if (!(*mci->set_sdram_scrub_rate)(mci, &bandwidth)) {
  769. edac_printk(KERN_DEBUG, EDAC_MC,
  770. "Scrub rate set successfully, applied: %d\n",
  771. bandwidth);
  772. } else {
  773. /* FIXME: error codes maybe? */
  774. edac_printk(KERN_DEBUG, EDAC_MC,
  775. "Scrub rate set FAILED, could not apply: %d\n",
  776. bandwidth);
  777. }
  778. } else {
  779. /* FIXME: produce "not implemented" ERROR for user-side. */
  780. edac_printk(KERN_WARNING, EDAC_MC,
  781. "Memory scrubbing 'set'control is not implemented!\n");
  782. }
  783. return count;
  784. }
  785. static ssize_t mci_sdram_scrub_rate_show(struct mem_ctl_info *mci, char *data)
  786. {
  787. u32 bandwidth = -1;
  788. if (mci->get_sdram_scrub_rate) {
  789. if (!(*mci->get_sdram_scrub_rate)(mci, &bandwidth)) {
  790. edac_printk(KERN_DEBUG, EDAC_MC,
  791. "Scrub rate successfully, fetched: %d\n",
  792. bandwidth);
  793. } else {
  794. /* FIXME: error codes maybe? */
  795. edac_printk(KERN_DEBUG, EDAC_MC,
  796. "Scrub rate fetch FAILED, got: %d\n",
  797. bandwidth);
  798. }
  799. } else {
  800. /* FIXME: produce "not implemented" ERROR for user-side. */
  801. edac_printk(KERN_WARNING, EDAC_MC,
  802. "Memory scrubbing 'get' control is not implemented!\n");
  803. }
  804. return sprintf(data, "%d\n", bandwidth);
  805. }
  806. /* default attribute files for the MCI object */
  807. static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data)
  808. {
  809. return sprintf(data,"%d\n", mci->ue_count);
  810. }
  811. static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data)
  812. {
  813. return sprintf(data,"%d\n", mci->ce_count);
  814. }
  815. static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data)
  816. {
  817. return sprintf(data,"%d\n", mci->ce_noinfo_count);
  818. }
  819. static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data)
  820. {
  821. return sprintf(data,"%d\n", mci->ue_noinfo_count);
  822. }
  823. static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data)
  824. {
  825. return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ);
  826. }
  827. static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data)
  828. {
  829. return sprintf(data,"%s\n", mci->ctl_name);
  830. }
  831. static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)
  832. {
  833. int total_pages, csrow_idx;
  834. for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows;
  835. csrow_idx++) {
  836. struct csrow_info *csrow = &mci->csrows[csrow_idx];
  837. if (!csrow->nr_pages)
  838. continue;
  839. total_pages += csrow->nr_pages;
  840. }
  841. return sprintf(data,"%u\n", PAGES_TO_MiB(total_pages));
  842. }
  843. struct mcidev_attribute {
  844. struct attribute attr;
  845. ssize_t (*show)(struct mem_ctl_info *,char *);
  846. ssize_t (*store)(struct mem_ctl_info *, const char *,size_t);
  847. };
  848. #define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj)
  849. #define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr)
  850. /* MCI show/store functions for top most object */
  851. static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr,
  852. char *buffer)
  853. {
  854. struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
  855. struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
  856. if (mcidev_attr->show)
  857. return mcidev_attr->show(mem_ctl_info, buffer);
  858. return -EIO;
  859. }
  860. static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr,
  861. const char *buffer, size_t count)
  862. {
  863. struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
  864. struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
  865. if (mcidev_attr->store)
  866. return mcidev_attr->store(mem_ctl_info, buffer, count);
  867. return -EIO;
  868. }
  869. static struct sysfs_ops mci_ops = {
  870. .show = mcidev_show,
  871. .store = mcidev_store
  872. };
  873. #define MCIDEV_ATTR(_name,_mode,_show,_store) \
  874. struct mcidev_attribute mci_attr_##_name = { \
  875. .attr = {.name = __stringify(_name), .mode = _mode }, \
  876. .show = _show, \
  877. .store = _store, \
  878. };
  879. /* default Control file */
  880. MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store);
  881. /* default Attribute files */
  882. MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL);
  883. MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL);
  884. MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL);
  885. MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL);
  886. MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL);
  887. MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL);
  888. MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL);
  889. /* memory scrubber attribute file */
  890. MCIDEV_ATTR(sdram_scrub_rate,S_IRUGO|S_IWUSR,mci_sdram_scrub_rate_show,mci_sdram_scrub_rate_store);
  891. static struct mcidev_attribute *mci_attr[] = {
  892. &mci_attr_reset_counters,
  893. &mci_attr_mc_name,
  894. &mci_attr_size_mb,
  895. &mci_attr_seconds_since_reset,
  896. &mci_attr_ue_noinfo_count,
  897. &mci_attr_ce_noinfo_count,
  898. &mci_attr_ue_count,
  899. &mci_attr_ce_count,
  900. &mci_attr_sdram_scrub_rate,
  901. NULL
  902. };
  903. /*
  904. * Release of a MC controlling instance
  905. */
  906. static void edac_mci_instance_release(struct kobject *kobj)
  907. {
  908. struct mem_ctl_info *mci;
  909. mci = to_mci(kobj);
  910. debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
  911. complete(&mci->kobj_complete);
  912. }
  913. static struct kobj_type ktype_mci = {
  914. .release = edac_mci_instance_release,
  915. .sysfs_ops = &mci_ops,
  916. .default_attrs = (struct attribute **) mci_attr,
  917. };
  918. #define EDAC_DEVICE_SYMLINK "device"
  919. /*
  920. * Create a new Memory Controller kobject instance,
  921. * mc<id> under the 'mc' directory
  922. *
  923. * Return:
  924. * 0 Success
  925. * !0 Failure
  926. */
  927. static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
  928. {
  929. int i;
  930. int err;
  931. struct csrow_info *csrow;
  932. struct kobject *edac_mci_kobj=&mci->edac_mci_kobj;
  933. debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
  934. memset(edac_mci_kobj, 0, sizeof(*edac_mci_kobj));
  935. /* set the name of the mc<id> object */
  936. err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx);
  937. if (err)
  938. return err;
  939. /* link to our parent the '..../edac/mc' object */
  940. edac_mci_kobj->parent = &edac_memctrl_kobj;
  941. edac_mci_kobj->ktype = &ktype_mci;
  942. /* register the mc<id> kobject */
  943. err = kobject_register(edac_mci_kobj);
  944. if (err)
  945. return err;
  946. /* create a symlink for the device */
  947. err = sysfs_create_link(edac_mci_kobj, &mci->dev->kobj,
  948. EDAC_DEVICE_SYMLINK);
  949. if (err)
  950. goto fail0;
  951. /* Make directories for each CSROW object
  952. * under the mc<id> kobject
  953. */
  954. for (i = 0; i < mci->nr_csrows; i++) {
  955. csrow = &mci->csrows[i];
  956. /* Only expose populated CSROWs */
  957. if (csrow->nr_pages > 0) {
  958. err = edac_create_csrow_object(edac_mci_kobj,csrow,i);
  959. if (err)
  960. goto fail1;
  961. }
  962. }
  963. return 0;
  964. /* CSROW error: backout what has already been registered, */
  965. fail1:
  966. for ( i--; i >= 0; i--) {
  967. if (csrow->nr_pages > 0) {
  968. init_completion(&csrow->kobj_complete);
  969. kobject_unregister(&mci->csrows[i].kobj);
  970. wait_for_completion(&csrow->kobj_complete);
  971. }
  972. }
  973. fail0:
  974. init_completion(&mci->kobj_complete);
  975. kobject_unregister(edac_mci_kobj);
  976. wait_for_completion(&mci->kobj_complete);
  977. return err;
  978. }
  979. /*
  980. * remove a Memory Controller instance
  981. */
  982. static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
  983. {
  984. int i;
  985. debugf0("%s()\n", __func__);
  986. /* remove all csrow kobjects */
  987. for (i = 0; i < mci->nr_csrows; i++) {
  988. if (mci->csrows[i].nr_pages > 0) {
  989. init_completion(&mci->csrows[i].kobj_complete);
  990. kobject_unregister(&mci->csrows[i].kobj);
  991. wait_for_completion(&mci->csrows[i].kobj_complete);
  992. }
  993. }
  994. sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK);
  995. init_completion(&mci->kobj_complete);
  996. kobject_unregister(&mci->edac_mci_kobj);
  997. wait_for_completion(&mci->kobj_complete);
  998. }
  999. /* END OF sysfs data and methods */
  1000. #ifdef CONFIG_EDAC_DEBUG
  1001. void edac_mc_dump_channel(struct channel_info *chan)
  1002. {
  1003. debugf4("\tchannel = %p\n", chan);
  1004. debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
  1005. debugf4("\tchannel->ce_count = %d\n", chan->ce_count);
  1006. debugf4("\tchannel->label = '%s'\n", chan->label);
  1007. debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
  1008. }
  1009. EXPORT_SYMBOL_GPL(edac_mc_dump_channel);
  1010. void edac_mc_dump_csrow(struct csrow_info *csrow)
  1011. {
  1012. debugf4("\tcsrow = %p\n", csrow);
  1013. debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
  1014. debugf4("\tcsrow->first_page = 0x%lx\n",
  1015. csrow->first_page);
  1016. debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page);
  1017. debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
  1018. debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages);
  1019. debugf4("\tcsrow->nr_channels = %d\n",
  1020. csrow->nr_channels);
  1021. debugf4("\tcsrow->channels = %p\n", csrow->channels);
  1022. debugf4("\tcsrow->mci = %p\n\n", csrow->mci);
  1023. }
  1024. EXPORT_SYMBOL_GPL(edac_mc_dump_csrow);
  1025. void edac_mc_dump_mci(struct mem_ctl_info *mci)
  1026. {
  1027. debugf3("\tmci = %p\n", mci);
  1028. debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap);
  1029. debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
  1030. debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap);
  1031. debugf4("\tmci->edac_check = %p\n", mci->edac_check);
  1032. debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
  1033. mci->nr_csrows, mci->csrows);
  1034. debugf3("\tdev = %p\n", mci->dev);
  1035. debugf3("\tmod_name:ctl_name = %s:%s\n",
  1036. mci->mod_name, mci->ctl_name);
  1037. debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
  1038. }
  1039. EXPORT_SYMBOL_GPL(edac_mc_dump_mci);
  1040. #endif /* CONFIG_EDAC_DEBUG */
  1041. /* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'.
  1042. * Adjust 'ptr' so that its alignment is at least as stringent as what the
  1043. * compiler would provide for X and return the aligned result.
  1044. *
  1045. * If 'size' is a constant, the compiler will optimize this whole function
  1046. * down to either a no-op or the addition of a constant to the value of 'ptr'.
  1047. */
  1048. static inline char * align_ptr(void *ptr, unsigned size)
  1049. {
  1050. unsigned align, r;
  1051. /* Here we assume that the alignment of a "long long" is the most
  1052. * stringent alignment that the compiler will ever provide by default.
  1053. * As far as I know, this is a reasonable assumption.
  1054. */
  1055. if (size > sizeof(long))
  1056. align = sizeof(long long);
  1057. else if (size > sizeof(int))
  1058. align = sizeof(long);
  1059. else if (size > sizeof(short))
  1060. align = sizeof(int);
  1061. else if (size > sizeof(char))
  1062. align = sizeof(short);
  1063. else
  1064. return (char *) ptr;
  1065. r = size % align;
  1066. if (r == 0)
  1067. return (char *) ptr;
  1068. return (char *) (((unsigned long) ptr) + align - r);
  1069. }
  1070. /**
  1071. * edac_mc_alloc: Allocate a struct mem_ctl_info structure
  1072. * @size_pvt: size of private storage needed
  1073. * @nr_csrows: Number of CWROWS needed for this MC
  1074. * @nr_chans: Number of channels for the MC
  1075. *
  1076. * Everything is kmalloc'ed as one big chunk - more efficient.
  1077. * Only can be used if all structures have the same lifetime - otherwise
  1078. * you have to allocate and initialize your own structures.
  1079. *
  1080. * Use edac_mc_free() to free mc structures allocated by this function.
  1081. *
  1082. * Returns:
  1083. * NULL allocation failed
  1084. * struct mem_ctl_info pointer
  1085. */
  1086. struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
  1087. unsigned nr_chans)
  1088. {
  1089. struct mem_ctl_info *mci;
  1090. struct csrow_info *csi, *csrow;
  1091. struct channel_info *chi, *chp, *chan;
  1092. void *pvt;
  1093. unsigned size;
  1094. int row, chn;
  1095. /* Figure out the offsets of the various items from the start of an mc
  1096. * structure. We want the alignment of each item to be at least as
  1097. * stringent as what the compiler would provide if we could simply
  1098. * hardcode everything into a single struct.
  1099. */
  1100. mci = (struct mem_ctl_info *) 0;
  1101. csi = (struct csrow_info *)align_ptr(&mci[1], sizeof(*csi));
  1102. chi = (struct channel_info *)
  1103. align_ptr(&csi[nr_csrows], sizeof(*chi));
  1104. pvt = align_ptr(&chi[nr_chans * nr_csrows], sz_pvt);
  1105. size = ((unsigned long) pvt) + sz_pvt;
  1106. if ((mci = kmalloc(size, GFP_KERNEL)) == NULL)
  1107. return NULL;
  1108. /* Adjust pointers so they point within the memory we just allocated
  1109. * rather than an imaginary chunk of memory located at address 0.
  1110. */
  1111. csi = (struct csrow_info *) (((char *) mci) + ((unsigned long) csi));
  1112. chi = (struct channel_info *) (((char *) mci) + ((unsigned long) chi));
  1113. pvt = sz_pvt ? (((char *) mci) + ((unsigned long) pvt)) : NULL;
  1114. memset(mci, 0, size); /* clear all fields */
  1115. mci->csrows = csi;
  1116. mci->pvt_info = pvt;
  1117. mci->nr_csrows = nr_csrows;
  1118. for (row = 0; row < nr_csrows; row++) {
  1119. csrow = &csi[row];
  1120. csrow->csrow_idx = row;
  1121. csrow->mci = mci;
  1122. csrow->nr_channels = nr_chans;
  1123. chp = &chi[row * nr_chans];
  1124. csrow->channels = chp;
  1125. for (chn = 0; chn < nr_chans; chn++) {
  1126. chan = &chp[chn];
  1127. chan->chan_idx = chn;
  1128. chan->csrow = csrow;
  1129. }
  1130. }
  1131. return mci;
  1132. }
  1133. EXPORT_SYMBOL_GPL(edac_mc_alloc);
  1134. /**
  1135. * edac_mc_free: Free a previously allocated 'mci' structure
  1136. * @mci: pointer to a struct mem_ctl_info structure
  1137. */
  1138. void edac_mc_free(struct mem_ctl_info *mci)
  1139. {
  1140. kfree(mci);
  1141. }
  1142. EXPORT_SYMBOL_GPL(edac_mc_free);
  1143. static struct mem_ctl_info *find_mci_by_dev(struct device *dev)
  1144. {
  1145. struct mem_ctl_info *mci;
  1146. struct list_head *item;
  1147. debugf3("%s()\n", __func__);
  1148. list_for_each(item, &mc_devices) {
  1149. mci = list_entry(item, struct mem_ctl_info, link);
  1150. if (mci->dev == dev)
  1151. return mci;
  1152. }
  1153. return NULL;
  1154. }
  1155. /* Return 0 on success, 1 on failure.
  1156. * Before calling this function, caller must
  1157. * assign a unique value to mci->mc_idx.
  1158. */
  1159. static int add_mc_to_global_list (struct mem_ctl_info *mci)
  1160. {
  1161. struct list_head *item, *insert_before;
  1162. struct mem_ctl_info *p;
  1163. insert_before = &mc_devices;
  1164. if (unlikely((p = find_mci_by_dev(mci->dev)) != NULL))
  1165. goto fail0;
  1166. list_for_each(item, &mc_devices) {
  1167. p = list_entry(item, struct mem_ctl_info, link);
  1168. if (p->mc_idx >= mci->mc_idx) {
  1169. if (unlikely(p->mc_idx == mci->mc_idx))
  1170. goto fail1;
  1171. insert_before = item;
  1172. break;
  1173. }
  1174. }
  1175. list_add_tail_rcu(&mci->link, insert_before);
  1176. return 0;
  1177. fail0:
  1178. edac_printk(KERN_WARNING, EDAC_MC,
  1179. "%s (%s) %s %s already assigned %d\n", p->dev->bus_id,
  1180. dev_name(p->dev), p->mod_name, p->ctl_name, p->mc_idx);
  1181. return 1;
  1182. fail1:
  1183. edac_printk(KERN_WARNING, EDAC_MC,
  1184. "bug in low-level driver: attempt to assign\n"
  1185. " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
  1186. return 1;
  1187. }
  1188. static void complete_mc_list_del(struct rcu_head *head)
  1189. {
  1190. struct mem_ctl_info *mci;
  1191. mci = container_of(head, struct mem_ctl_info, rcu);
  1192. INIT_LIST_HEAD(&mci->link);
  1193. complete(&mci->complete);
  1194. }
  1195. static void del_mc_from_global_list(struct mem_ctl_info *mci)
  1196. {
  1197. list_del_rcu(&mci->link);
  1198. init_completion(&mci->complete);
  1199. call_rcu(&mci->rcu, complete_mc_list_del);
  1200. wait_for_completion(&mci->complete);
  1201. }
  1202. /**
  1203. * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
  1204. * create sysfs entries associated with mci structure
  1205. * @mci: pointer to the mci structure to be added to the list
  1206. * @mc_idx: A unique numeric identifier to be assigned to the 'mci' structure.
  1207. *
  1208. * Return:
  1209. * 0 Success
  1210. * !0 Failure
  1211. */
  1212. /* FIXME - should a warning be printed if no error detection? correction? */
  1213. int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx)
  1214. {
  1215. debugf0("%s()\n", __func__);
  1216. mci->mc_idx = mc_idx;
  1217. #ifdef CONFIG_EDAC_DEBUG
  1218. if (edac_debug_level >= 3)
  1219. edac_mc_dump_mci(mci);
  1220. if (edac_debug_level >= 4) {
  1221. int i;
  1222. for (i = 0; i < mci->nr_csrows; i++) {
  1223. int j;
  1224. edac_mc_dump_csrow(&mci->csrows[i]);
  1225. for (j = 0; j < mci->csrows[i].nr_channels; j++)
  1226. edac_mc_dump_channel(
  1227. &mci->csrows[i].channels[j]);
  1228. }
  1229. }
  1230. #endif
  1231. down(&mem_ctls_mutex);
  1232. if (add_mc_to_global_list(mci))
  1233. goto fail0;
  1234. /* set load time so that error rate can be tracked */
  1235. mci->start_time = jiffies;
  1236. if (edac_create_sysfs_mci_device(mci)) {
  1237. edac_mc_printk(mci, KERN_WARNING,
  1238. "failed to create sysfs device\n");
  1239. goto fail1;
  1240. }
  1241. /* Report action taken */
  1242. edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: DEV %s\n",
  1243. mci->mod_name, mci->ctl_name, dev_name(mci->dev));
  1244. up(&mem_ctls_mutex);
  1245. return 0;
  1246. fail1:
  1247. del_mc_from_global_list(mci);
  1248. fail0:
  1249. up(&mem_ctls_mutex);
  1250. return 1;
  1251. }
  1252. EXPORT_SYMBOL_GPL(edac_mc_add_mc);
  1253. /**
  1254. * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
  1255. * remove mci structure from global list
  1256. * @pdev: Pointer to 'struct device' representing mci structure to remove.
  1257. *
  1258. * Return pointer to removed mci structure, or NULL if device not found.
  1259. */
  1260. struct mem_ctl_info * edac_mc_del_mc(struct device *dev)
  1261. {
  1262. struct mem_ctl_info *mci;
  1263. debugf0("MC: %s()\n", __func__);
  1264. down(&mem_ctls_mutex);
  1265. if ((mci = find_mci_by_dev(dev)) == NULL) {
  1266. up(&mem_ctls_mutex);
  1267. return NULL;
  1268. }
  1269. edac_remove_sysfs_mci_device(mci);
  1270. del_mc_from_global_list(mci);
  1271. up(&mem_ctls_mutex);
  1272. edac_printk(KERN_INFO, EDAC_MC,
  1273. "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
  1274. mci->mod_name, mci->ctl_name, dev_name(mci->dev));
  1275. return mci;
  1276. }
  1277. EXPORT_SYMBOL_GPL(edac_mc_del_mc);
  1278. void edac_mc_scrub_block(unsigned long page, unsigned long offset, u32 size)
  1279. {
  1280. struct page *pg;
  1281. void *virt_addr;
  1282. unsigned long flags = 0;
  1283. debugf3("%s()\n", __func__);
  1284. /* ECC error page was not in our memory. Ignore it. */
  1285. if(!pfn_valid(page))
  1286. return;
  1287. /* Find the actual page structure then map it and fix */
  1288. pg = pfn_to_page(page);
  1289. if (PageHighMem(pg))
  1290. local_irq_save(flags);
  1291. virt_addr = kmap_atomic(pg, KM_BOUNCE_READ);
  1292. /* Perform architecture specific atomic scrub operation */
  1293. atomic_scrub(virt_addr + offset, size);
  1294. /* Unmap and complete */
  1295. kunmap_atomic(virt_addr, KM_BOUNCE_READ);
  1296. if (PageHighMem(pg))
  1297. local_irq_restore(flags);
  1298. }
  1299. EXPORT_SYMBOL_GPL(edac_mc_scrub_block);
  1300. /* FIXME - should return -1 */
  1301. int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
  1302. {
  1303. struct csrow_info *csrows = mci->csrows;
  1304. int row, i;
  1305. debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page);
  1306. row = -1;
  1307. for (i = 0; i < mci->nr_csrows; i++) {
  1308. struct csrow_info *csrow = &csrows[i];
  1309. if (csrow->nr_pages == 0)
  1310. continue;
  1311. debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) "
  1312. "mask(0x%lx)\n", mci->mc_idx, __func__,
  1313. csrow->first_page, page, csrow->last_page,
  1314. csrow->page_mask);
  1315. if ((page >= csrow->first_page) &&
  1316. (page <= csrow->last_page) &&
  1317. ((page & csrow->page_mask) ==
  1318. (csrow->first_page & csrow->page_mask))) {
  1319. row = i;
  1320. break;
  1321. }
  1322. }
  1323. if (row == -1)
  1324. edac_mc_printk(mci, KERN_ERR,
  1325. "could not look up page error address %lx\n",
  1326. (unsigned long) page);
  1327. return row;
  1328. }
  1329. EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
  1330. /* FIXME - setable log (warning/emerg) levels */
  1331. /* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */
  1332. void edac_mc_handle_ce(struct mem_ctl_info *mci,
  1333. unsigned long page_frame_number, unsigned long offset_in_page,
  1334. unsigned long syndrome, int row, int channel, const char *msg)
  1335. {
  1336. unsigned long remapped_page;
  1337. debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
  1338. /* FIXME - maybe make panic on INTERNAL ERROR an option */
  1339. if (row >= mci->nr_csrows || row < 0) {
  1340. /* something is wrong */
  1341. edac_mc_printk(mci, KERN_ERR,
  1342. "INTERNAL ERROR: row out of range "
  1343. "(%d >= %d)\n", row, mci->nr_csrows);
  1344. edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
  1345. return;
  1346. }
  1347. if (channel >= mci->csrows[row].nr_channels || channel < 0) {
  1348. /* something is wrong */
  1349. edac_mc_printk(mci, KERN_ERR,
  1350. "INTERNAL ERROR: channel out of range "
  1351. "(%d >= %d)\n", channel,
  1352. mci->csrows[row].nr_channels);
  1353. edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
  1354. return;
  1355. }
  1356. if (log_ce)
  1357. /* FIXME - put in DIMM location */
  1358. edac_mc_printk(mci, KERN_WARNING,
  1359. "CE page 0x%lx, offset 0x%lx, grain %d, syndrome "
  1360. "0x%lx, row %d, channel %d, label \"%s\": %s\n",
  1361. page_frame_number, offset_in_page,
  1362. mci->csrows[row].grain, syndrome, row, channel,
  1363. mci->csrows[row].channels[channel].label, msg);
  1364. mci->ce_count++;
  1365. mci->csrows[row].ce_count++;
  1366. mci->csrows[row].channels[channel].ce_count++;
  1367. if (mci->scrub_mode & SCRUB_SW_SRC) {
  1368. /*
  1369. * Some MC's can remap memory so that it is still available
  1370. * at a different address when PCI devices map into memory.
  1371. * MC's that can't do this lose the memory where PCI devices
  1372. * are mapped. This mapping is MC dependant and so we call
  1373. * back into the MC driver for it to map the MC page to
  1374. * a physical (CPU) page which can then be mapped to a virtual
  1375. * page - which can then be scrubbed.
  1376. */
  1377. remapped_page = mci->ctl_page_to_phys ?
  1378. mci->ctl_page_to_phys(mci, page_frame_number) :
  1379. page_frame_number;
  1380. edac_mc_scrub_block(remapped_page, offset_in_page,
  1381. mci->csrows[row].grain);
  1382. }
  1383. }
  1384. EXPORT_SYMBOL_GPL(edac_mc_handle_ce);
  1385. void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, const char *msg)
  1386. {
  1387. if (log_ce)
  1388. edac_mc_printk(mci, KERN_WARNING,
  1389. "CE - no information available: %s\n", msg);
  1390. mci->ce_noinfo_count++;
  1391. mci->ce_count++;
  1392. }
  1393. EXPORT_SYMBOL_GPL(edac_mc_handle_ce_no_info);
  1394. void edac_mc_handle_ue(struct mem_ctl_info *mci,
  1395. unsigned long page_frame_number, unsigned long offset_in_page,
  1396. int row, const char *msg)
  1397. {
  1398. int len = EDAC_MC_LABEL_LEN * 4;
  1399. char labels[len + 1];
  1400. char *pos = labels;
  1401. int chan;
  1402. int chars;
  1403. debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
  1404. /* FIXME - maybe make panic on INTERNAL ERROR an option */
  1405. if (row >= mci->nr_csrows || row < 0) {
  1406. /* something is wrong */
  1407. edac_mc_printk(mci, KERN_ERR,
  1408. "INTERNAL ERROR: row out of range "
  1409. "(%d >= %d)\n", row, mci->nr_csrows);
  1410. edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");
  1411. return;
  1412. }
  1413. chars = snprintf(pos, len + 1, "%s",
  1414. mci->csrows[row].channels[0].label);
  1415. len -= chars;
  1416. pos += chars;
  1417. for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0);
  1418. chan++) {
  1419. chars = snprintf(pos, len + 1, ":%s",
  1420. mci->csrows[row].channels[chan].label);
  1421. len -= chars;
  1422. pos += chars;
  1423. }
  1424. if (log_ue)
  1425. edac_mc_printk(mci, KERN_EMERG,
  1426. "UE page 0x%lx, offset 0x%lx, grain %d, row %d, "
  1427. "labels \"%s\": %s\n", page_frame_number,
  1428. offset_in_page, mci->csrows[row].grain, row, labels,
  1429. msg);
  1430. if (panic_on_ue)
  1431. panic("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, "
  1432. "row %d, labels \"%s\": %s\n", mci->mc_idx,
  1433. page_frame_number, offset_in_page,
  1434. mci->csrows[row].grain, row, labels, msg);
  1435. mci->ue_count++;
  1436. mci->csrows[row].ue_count++;
  1437. }
  1438. EXPORT_SYMBOL_GPL(edac_mc_handle_ue);
  1439. void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg)
  1440. {
  1441. if (panic_on_ue)
  1442. panic("EDAC MC%d: Uncorrected Error", mci->mc_idx);
  1443. if (log_ue)
  1444. edac_mc_printk(mci, KERN_WARNING,
  1445. "UE - no information available: %s\n", msg);
  1446. mci->ue_noinfo_count++;
  1447. mci->ue_count++;
  1448. }
  1449. EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info);
  1450. /*************************************************************
  1451. * On Fully Buffered DIMM modules, this help function is
  1452. * called to process UE events
  1453. */
  1454. void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci,
  1455. unsigned int csrow,
  1456. unsigned int channela,
  1457. unsigned int channelb,
  1458. char *msg)
  1459. {
  1460. int len = EDAC_MC_LABEL_LEN * 4;
  1461. char labels[len + 1];
  1462. char *pos = labels;
  1463. int chars;
  1464. if (csrow >= mci->nr_csrows) {
  1465. /* something is wrong */
  1466. edac_mc_printk(mci, KERN_ERR,
  1467. "INTERNAL ERROR: row out of range (%d >= %d)\n",
  1468. csrow, mci->nr_csrows);
  1469. edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");
  1470. return;
  1471. }
  1472. if (channela >= mci->csrows[csrow].nr_channels) {
  1473. /* something is wrong */
  1474. edac_mc_printk(mci, KERN_ERR,
  1475. "INTERNAL ERROR: channel-a out of range "
  1476. "(%d >= %d)\n",
  1477. channela, mci->csrows[csrow].nr_channels);
  1478. edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");
  1479. return;
  1480. }
  1481. if (channelb >= mci->csrows[csrow].nr_channels) {
  1482. /* something is wrong */
  1483. edac_mc_printk(mci, KERN_ERR,
  1484. "INTERNAL ERROR: channel-b out of range "
  1485. "(%d >= %d)\n",
  1486. channelb, mci->csrows[csrow].nr_channels);
  1487. edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");
  1488. return;
  1489. }
  1490. mci->ue_count++;
  1491. mci->csrows[csrow].ue_count++;
  1492. /* Generate the DIMM labels from the specified channels */
  1493. chars = snprintf(pos, len + 1, "%s",
  1494. mci->csrows[csrow].channels[channela].label);
  1495. len -= chars; pos += chars;
  1496. chars = snprintf(pos, len + 1, "-%s",
  1497. mci->csrows[csrow].channels[channelb].label);
  1498. if (log_ue)
  1499. edac_mc_printk(mci, KERN_EMERG,
  1500. "UE row %d, channel-a= %d channel-b= %d "
  1501. "labels \"%s\": %s\n", csrow, channela, channelb,
  1502. labels, msg);
  1503. if (panic_on_ue)
  1504. panic("UE row %d, channel-a= %d channel-b= %d "
  1505. "labels \"%s\": %s\n", csrow, channela,
  1506. channelb, labels, msg);
  1507. }
  1508. EXPORT_SYMBOL(edac_mc_handle_fbd_ue);
  1509. /*************************************************************
  1510. * On Fully Buffered DIMM modules, this help function is
  1511. * called to process CE events
  1512. */
  1513. void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci,
  1514. unsigned int csrow,
  1515. unsigned int channel,
  1516. char *msg)
  1517. {
  1518. /* Ensure boundary values */
  1519. if (csrow >= mci->nr_csrows) {
  1520. /* something is wrong */
  1521. edac_mc_printk(mci, KERN_ERR,
  1522. "INTERNAL ERROR: row out of range (%d >= %d)\n",
  1523. csrow, mci->nr_csrows);
  1524. edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
  1525. return;
  1526. }
  1527. if (channel >= mci->csrows[csrow].nr_channels) {
  1528. /* something is wrong */
  1529. edac_mc_printk(mci, KERN_ERR,
  1530. "INTERNAL ERROR: channel out of range (%d >= %d)\n",
  1531. channel, mci->csrows[csrow].nr_channels);
  1532. edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
  1533. return;
  1534. }
  1535. if (log_ce)
  1536. /* FIXME - put in DIMM location */
  1537. edac_mc_printk(mci, KERN_WARNING,
  1538. "CE row %d, channel %d, label \"%s\": %s\n",
  1539. csrow, channel,
  1540. mci->csrows[csrow].channels[channel].label,
  1541. msg);
  1542. mci->ce_count++;
  1543. mci->csrows[csrow].ce_count++;
  1544. mci->csrows[csrow].channels[channel].ce_count++;
  1545. }
  1546. EXPORT_SYMBOL(edac_mc_handle_fbd_ce);
  1547. /*
  1548. * Iterate over all MC instances and check for ECC, et al, errors
  1549. */
  1550. static inline void check_mc_devices(void)
  1551. {
  1552. struct list_head *item;
  1553. struct mem_ctl_info *mci;
  1554. debugf3("%s()\n", __func__);
  1555. down(&mem_ctls_mutex);
  1556. list_for_each(item, &mc_devices) {
  1557. mci = list_entry(item, struct mem_ctl_info, link);
  1558. if (mci->edac_check != NULL)
  1559. mci->edac_check(mci);
  1560. }
  1561. up(&mem_ctls_mutex);
  1562. }
  1563. /*
  1564. * Check MC status every poll_msec.
  1565. * Check PCI status every poll_msec as well.
  1566. *
  1567. * This where the work gets done for edac.
  1568. *
  1569. * SMP safe, doesn't use NMI, and auto-rate-limits.
  1570. */
  1571. static void do_edac_check(void)
  1572. {
  1573. debugf3("%s()\n", __func__);
  1574. check_mc_devices();
  1575. do_pci_parity_check();
  1576. }
  1577. static int edac_kernel_thread(void *arg)
  1578. {
  1579. while (!kthread_should_stop()) {
  1580. do_edac_check();
  1581. /* goto sleep for the interval */
  1582. schedule_timeout_interruptible((HZ * poll_msec) / 1000);
  1583. try_to_freeze();
  1584. }
  1585. return 0;
  1586. }
  1587. /*
  1588. * edac_mc_init
  1589. * module initialization entry point
  1590. */
  1591. static int __init edac_mc_init(void)
  1592. {
  1593. edac_printk(KERN_INFO, EDAC_MC, EDAC_MC_VERSION "\n");
  1594. /*
  1595. * Harvest and clear any boot/initialization PCI parity errors
  1596. *
  1597. * FIXME: This only clears errors logged by devices present at time of
  1598. * module initialization. We should also do an initial clear
  1599. * of each newly hotplugged device.
  1600. */
  1601. clear_pci_parity_errors();
  1602. /* Create the MC sysfs entries */
  1603. if (edac_sysfs_memctrl_setup()) {
  1604. edac_printk(KERN_ERR, EDAC_MC,
  1605. "Error initializing sysfs code\n");
  1606. return -ENODEV;
  1607. }
  1608. /* Create the PCI parity sysfs entries */
  1609. if (edac_sysfs_pci_setup()) {
  1610. edac_sysfs_memctrl_teardown();
  1611. edac_printk(KERN_ERR, EDAC_MC,
  1612. "EDAC PCI: Error initializing sysfs code\n");
  1613. return -ENODEV;
  1614. }
  1615. /* create our kernel thread */
  1616. edac_thread = kthread_run(edac_kernel_thread, NULL, "kedac");
  1617. if (IS_ERR(edac_thread)) {
  1618. /* remove the sysfs entries */
  1619. edac_sysfs_memctrl_teardown();
  1620. edac_sysfs_pci_teardown();
  1621. return PTR_ERR(edac_thread);
  1622. }
  1623. return 0;
  1624. }
  1625. /*
  1626. * edac_mc_exit()
  1627. * module exit/termination functioni
  1628. */
  1629. static void __exit edac_mc_exit(void)
  1630. {
  1631. debugf0("%s()\n", __func__);
  1632. kthread_stop(edac_thread);
  1633. /* tear down the sysfs device */
  1634. edac_sysfs_memctrl_teardown();
  1635. edac_sysfs_pci_teardown();
  1636. }
  1637. module_init(edac_mc_init);
  1638. module_exit(edac_mc_exit);
  1639. MODULE_LICENSE("GPL");
  1640. MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
  1641. "Based on work by Dan Hollis et al");
  1642. MODULE_DESCRIPTION("Core library routines for MC reporting");
  1643. module_param(panic_on_ue, int, 0644);
  1644. MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
  1645. #ifdef CONFIG_PCI
  1646. module_param(check_pci_parity, int, 0644);
  1647. MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on");
  1648. module_param(panic_on_pci_parity, int, 0644);
  1649. MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on");
  1650. #endif
  1651. module_param(log_ue, int, 0644);
  1652. MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on");
  1653. module_param(log_ce, int, 0644);
  1654. MODULE_PARM_DESC(log_ce, "Log correctable error to console: 0=off 1=on");
  1655. module_param(poll_msec, int, 0644);
  1656. MODULE_PARM_DESC(poll_msec, "Polling period in milliseconds");
  1657. #ifdef CONFIG_EDAC_DEBUG
  1658. module_param(edac_debug_level, int, 0644);
  1659. MODULE_PARM_DESC(edac_debug_level, "Debug level");
  1660. #endif