i2ellis.h 22 KB

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  1. /*******************************************************************************
  2. *
  3. * (c) 1999 by Computone Corporation
  4. *
  5. ********************************************************************************
  6. *
  7. *
  8. * PACKAGE: Linux tty Device Driver for IntelliPort II family of multiport
  9. * serial I/O controllers.
  10. *
  11. * DESCRIPTION: Mainline code for the device driver
  12. *
  13. *******************************************************************************/
  14. //------------------------------------------------------------------------------
  15. // i2ellis.h
  16. //
  17. // IntelliPort-II and IntelliPort-IIEX
  18. //
  19. // Extremely
  20. // Low
  21. // Level
  22. // Interface
  23. // Services
  24. //
  25. // Structure Definitions and declarations for "ELLIS" service routines found in
  26. // i2ellis.c
  27. //
  28. // These routines are based on properties of the IntelliPort-II and -IIEX
  29. // hardware and bootstrap firmware, and are not sensitive to particular
  30. // conventions of any particular loadware.
  31. //
  32. // Unlike i2hw.h, which provides IRONCLAD hardware definitions, the material
  33. // here and in i2ellis.c is intended to provice a useful, but not required,
  34. // layer of insulation from the hardware specifics.
  35. //------------------------------------------------------------------------------
  36. #ifndef I2ELLIS_H /* To prevent multiple includes */
  37. #define I2ELLIS_H 1
  38. //------------------------------------------------
  39. // Revision History:
  40. //
  41. // 30 September 1991 MAG First Draft Started
  42. // 12 October 1991 ...continued...
  43. //
  44. // 20 December 1996 AKM Linux version
  45. //-------------------------------------------------
  46. //----------------------
  47. // Mandatory Includes:
  48. //----------------------
  49. #include "ip2types.h"
  50. #include "i2hw.h" // The hardware definitions
  51. //------------------------------------------
  52. // STAT_BOXIDS packets
  53. //------------------------------------------
  54. #define MAX_BOX 4
  55. typedef struct _bidStat
  56. {
  57. unsigned char bid_value[MAX_BOX];
  58. } bidStat, *bidStatPtr;
  59. // This packet is sent in response to a CMD_GET_BOXIDS bypass command. For -IIEX
  60. // boards, reports the hardware-specific "asynchronous resource register" on
  61. // each expansion box. Boxes not present report 0xff. For -II boards, the first
  62. // element contains 0x80 for 8-port, 0x40 for 4-port boards.
  63. // Box IDs aka ARR or Async Resource Register (more than you want to know)
  64. // 7 6 5 4 3 2 1 0
  65. // F F N N L S S S
  66. // =============================
  67. // F F - Product Family Designator
  68. // =====+++++++++++++++++++++++++++++++
  69. // 0 0 - Intelliport II EX / ISA-8
  70. // 1 0 - IntelliServer
  71. // 0 1 - SAC - Port Device (Intelliport III ??? )
  72. // =====+++++++++++++++++++++++++++++++++++++++
  73. // N N - Number of Ports
  74. // 0 0 - 8 (eight)
  75. // 0 1 - 4 (four)
  76. // 1 0 - 12 (twelve)
  77. // 1 1 - 16 (sixteen)
  78. // =++++++++++++++++++++++++++++++++++
  79. // L - LCD Display Module Present
  80. // 0 - No
  81. // 1 - LCD module present
  82. // =========+++++++++++++++++++++++++++++++++++++
  83. // S S S - Async Signals Supported Designator
  84. // 0 0 0 - 8dss, Mod DCE DB25 Female
  85. // 0 0 1 - 6dss, RJ-45
  86. // 0 1 0 - RS-232/422 dss, DB25 Female
  87. // 0 1 1 - RS-232/422 dss, separate 232/422 DB25 Female
  88. // 1 0 0 - 6dss, 921.6 I/F with ST654's
  89. // 1 0 1 - RS-423/232 8dss, RJ-45 10Pin
  90. // 1 1 0 - 6dss, Mod DCE DB25 Female
  91. // 1 1 1 - NO BOX PRESENT
  92. #define FF(c) ((c & 0xC0) >> 6)
  93. #define NN(c) ((c & 0x30) >> 4)
  94. #define L(c) ((c & 0x08) >> 3)
  95. #define SSS(c) (c & 0x07)
  96. #define BID_HAS_654(x) (SSS(x) == 0x04)
  97. #define BID_NO_BOX 0xff /* no box */
  98. #define BID_8PORT 0x80 /* IP2-8 port */
  99. #define BID_4PORT 0x81 /* IP2-4 port */
  100. #define BID_EXP_MASK 0x30 /* IP2-EX */
  101. #define BID_EXP_8PORT 0x00 /* 8, */
  102. #define BID_EXP_4PORT 0x10 /* 4, */
  103. #define BID_EXP_UNDEF 0x20 /* UNDEF, */
  104. #define BID_EXP_16PORT 0x30 /* 16, */
  105. #define BID_LCD_CTRL 0x08 /* LCD Controller */
  106. #define BID_LCD_NONE 0x00 /* - no controller present */
  107. #define BID_LCD_PRES 0x08 /* - controller present */
  108. #define BID_CON_MASK 0x07 /* - connector pinouts */
  109. #define BID_CON_DB25 0x00 /* - DB-25 F */
  110. #define BID_CON_RJ45 0x01 /* - rj45 */
  111. //------------------------------------------------------------------------------
  112. // i2eBordStr
  113. //
  114. // This structure contains all the information the ELLIS routines require in
  115. // dealing with a particular board.
  116. //------------------------------------------------------------------------------
  117. // There are some queues here which are guaranteed to never contain the entry
  118. // for a single channel twice. So they must be slightly larger to allow
  119. // unambiguous full/empty management
  120. //
  121. #define CH_QUEUE_SIZE ABS_MOST_PORTS+2
  122. typedef struct _i2eBordStr
  123. {
  124. porStr i2ePom; // Structure containing the power-on message.
  125. unsigned short i2ePomSize;
  126. // The number of bytes actually read if
  127. // different from sizeof i2ePom, indicates
  128. // there is an error!
  129. unsigned short i2eStartMail;
  130. // Contains whatever inbound mailbox data
  131. // present at startup. NO_MAIL_HERE indicates
  132. // nothing was present. No special
  133. // significance as of this writing, but may be
  134. // useful for diagnostic reasons.
  135. unsigned short i2eValid;
  136. // Indicates validity of the structure; if
  137. // i2eValid == I2E_MAGIC, then we can trust
  138. // the other fields. Some (especially
  139. // initialization) functions are good about
  140. // checking for validity. Many functions do
  141. // not, it being assumed that the larger
  142. // context assures we are using a valid
  143. // i2eBordStrPtr.
  144. unsigned short i2eError;
  145. // Used for returning an error condition from
  146. // several functions which use i2eBordStrPtr
  147. // as an argument.
  148. // Accelerators to characterize separate features of a board, derived from a
  149. // number of sources.
  150. unsigned short i2eFifoSize;
  151. // Always, the size of the FIFO. For
  152. // IntelliPort-II, always the same, for -IIEX
  153. // taken from the Power-On reset message.
  154. volatile
  155. unsigned short i2eFifoRemains;
  156. // Used during normal operation to indicate a
  157. // lower bound on the amount of data which
  158. // might be in the outbound fifo.
  159. unsigned char i2eFifoStyle;
  160. // Accelerator which tells which style (-II or
  161. // -IIEX) FIFO we are using.
  162. unsigned char i2eDataWidth16;
  163. // Accelerator which tells whether we should
  164. // do 8 or 16-bit data transfers.
  165. unsigned char i2eMaxIrq;
  166. // The highest allowable IRQ, based on the
  167. // slot size.
  168. unsigned char i2eChangeIrq;
  169. // Whether tis valid to change IRQ's
  170. // ISA = ok, EISA, MicroChannel, no
  171. // Accelerators for various addresses on the board
  172. int i2eBase; // I/O Address of the Board
  173. int i2eData; // From here data transfers happen
  174. int i2eStatus; // From here status reads happen
  175. int i2ePointer; // (IntelliPort-II: pointer/commands)
  176. int i2eXMail; // (IntelliPOrt-IIEX: mailboxes
  177. int i2eXMask; // (IntelliPort-IIEX: mask write
  178. //-------------------------------------------------------
  179. // Information presented in a common format across boards
  180. // For each box, bit map of the channels present. Box closest to
  181. // the host is box 0. LSB is channel 0. IntelliPort-II (non-expandable)
  182. // is taken to be box 0. These are derived from product i.d. registers.
  183. unsigned short i2eChannelMap[ABS_MAX_BOXES];
  184. // Same as above, except each is derived from firmware attempting to detect
  185. // the uart presence (by reading a valid GFRCR register). If bits are set in
  186. // i2eChannelMap and not in i2eGoodMap, there is a potential problem.
  187. unsigned short i2eGoodMap[ABS_MAX_BOXES];
  188. // ---------------------------
  189. // For indirect function calls
  190. // Routine to cause an N-millisecond delay: Patched by the ii2Initialize
  191. // function.
  192. void (*i2eDelay)(unsigned int);
  193. // Routine to write N bytes to the board through the FIFO. Returns true if
  194. // all copacetic, otherwise returns false and error is in i2eError field.
  195. // IF COUNT IS ODD, ROUNDS UP TO THE NEXT EVEN NUMBER.
  196. int (*i2eWriteBuf)(struct _i2eBordStr *, unsigned char *, int);
  197. // Routine to read N bytes from the board through the FIFO. Returns true if
  198. // copacetic, otherwise returns false and error in i2eError.
  199. // IF COUNT IS ODD, ROUNDS UP TO THE NEXT EVEN NUMBER.
  200. int (*i2eReadBuf)(struct _i2eBordStr *, unsigned char *, int);
  201. // Returns a word from FIFO. Will use 2 byte operations if needed.
  202. unsigned short (*i2eReadWord)(struct _i2eBordStr *);
  203. // Writes a word to FIFO. Will use 2 byte operations if needed.
  204. void (*i2eWriteWord)(struct _i2eBordStr *, unsigned short);
  205. // Waits specified time for the Transmit FIFO to go empty. Returns true if
  206. // ok, otherwise returns false and error in i2eError.
  207. int (*i2eWaitForTxEmpty)(struct _i2eBordStr *, int);
  208. // Returns true or false according to whether the outgoing mailbox is empty.
  209. int (*i2eTxMailEmpty)(struct _i2eBordStr *);
  210. // Checks whether outgoing mailbox is empty. If so, sends mail and returns
  211. // true. Otherwise returns false.
  212. int (*i2eTrySendMail)(struct _i2eBordStr *, unsigned char);
  213. // If no mail available, returns NO_MAIL_HERE, else returns the value in the
  214. // mailbox (guaranteed can't be NO_MAIL_HERE).
  215. unsigned short (*i2eGetMail)(struct _i2eBordStr *);
  216. // Enables the board to interrupt the host when it writes to the mailbox.
  217. // Irqs will not occur, however, until the loadware separately enables
  218. // interrupt generation to the host. The standard loadware does this in
  219. // response to a command packet sent by the host. (Also, disables
  220. // any other potential interrupt sources from the board -- other than the
  221. // inbound mailbox).
  222. void (*i2eEnableMailIrq)(struct _i2eBordStr *);
  223. // Writes an arbitrary value to the mask register.
  224. void (*i2eWriteMask)(struct _i2eBordStr *, unsigned char);
  225. // State information
  226. // During downloading, indicates the number of blocks remaining to download
  227. // to the board.
  228. short i2eToLoad;
  229. // State of board (see manifests below) (e.g., whether in reset condition,
  230. // whether standard loadware is installed, etc.
  231. unsigned char i2eState;
  232. // These three fields are only valid when there is loadware running on the
  233. // board. (i2eState == II_STATE_LOADED or i2eState == II_STATE_STDLOADED )
  234. unsigned char i2eLVersion; // Loadware version
  235. unsigned char i2eLRevision; // Loadware revision
  236. unsigned char i2eLSub; // Loadware subrevision
  237. // Flags which only have meaning in the context of the standard loadware.
  238. // Somewhat violates the layering concept, but there is so little additional
  239. // needed at the board level (while much additional at the channel level),
  240. // that this beats maintaining two different per-board structures.
  241. // Indicates which IRQ the board has been initialized (from software) to use
  242. // For MicroChannel boards, any value different from IRQ_UNDEFINED means
  243. // that the software command has been sent to enable interrupts (or specify
  244. // they are disabled). Special value: IRQ_UNDEFINED indicates that the
  245. // software command to select the interrupt has not yet been sent, therefore
  246. // (since the standard loadware insists that it be sent before any other
  247. // packets are sent) no other packets should be sent yet.
  248. unsigned short i2eUsingIrq;
  249. // This is set when we hit the MB_OUT_STUFFED mailbox, which prevents us
  250. // putting more in the mailbox until an appropriate mailbox message is
  251. // received.
  252. unsigned char i2eWaitingForEmptyFifo;
  253. // Any mailbox bits waiting to be sent to the board are OR'ed in here.
  254. unsigned char i2eOutMailWaiting;
  255. // The head of any incoming packet is read into here, is then examined and
  256. // we dispatch accordingly.
  257. unsigned short i2eLeadoffWord[1];
  258. // Running counter of interrupts where the mailbox indicated incoming data.
  259. unsigned short i2eFifoInInts;
  260. // Running counter of interrupts where the mailbox indicated outgoing data
  261. // had been stripped.
  262. unsigned short i2eFifoOutInts;
  263. // If not void, gives the address of a routine to call if fatal board error
  264. // is found (only applies to standard l/w).
  265. void (*i2eFatalTrap)(struct _i2eBordStr *);
  266. // Will point to an array of some sort of channel structures (whose format
  267. // is unknown at this level, being a function of what loadware is
  268. // installed and the code configuration (max sizes of buffers, etc.)).
  269. void *i2eChannelPtr;
  270. // Set indicates that the board has gone fatal.
  271. unsigned short i2eFatal;
  272. // The number of elements pointed to by i2eChannelPtr.
  273. unsigned short i2eChannelCnt;
  274. // Ring-buffers of channel structures whose channels have particular needs.
  275. rwlock_t Fbuf_spinlock;
  276. volatile
  277. unsigned short i2Fbuf_strip; // Strip index
  278. volatile
  279. unsigned short i2Fbuf_stuff; // Stuff index
  280. void *i2Fbuf[CH_QUEUE_SIZE]; // An array of channel pointers
  281. // of channels who need to send
  282. // flow control packets.
  283. rwlock_t Dbuf_spinlock;
  284. volatile
  285. unsigned short i2Dbuf_strip; // Strip index
  286. volatile
  287. unsigned short i2Dbuf_stuff; // Stuff index
  288. void *i2Dbuf[CH_QUEUE_SIZE]; // An array of channel pointers
  289. // of channels who need to send
  290. // data or in-line command packets.
  291. rwlock_t Bbuf_spinlock;
  292. volatile
  293. unsigned short i2Bbuf_strip; // Strip index
  294. volatile
  295. unsigned short i2Bbuf_stuff; // Stuff index
  296. void *i2Bbuf[CH_QUEUE_SIZE]; // An array of channel pointers
  297. // of channels who need to send
  298. // bypass command packets.
  299. /*
  300. * A set of flags to indicate that certain events have occurred on at least
  301. * one of the ports on this board. We use this to decide whether to spin
  302. * through the channels looking for breaks, etc.
  303. */
  304. int got_input;
  305. int status_change;
  306. bidStat channelBtypes;
  307. /*
  308. * Debugging counters, etc.
  309. */
  310. unsigned long debugFlowQueued;
  311. unsigned long debugInlineQueued;
  312. unsigned long debugDataQueued;
  313. unsigned long debugBypassQueued;
  314. unsigned long debugFlowCount;
  315. unsigned long debugInlineCount;
  316. unsigned long debugBypassCount;
  317. rwlock_t read_fifo_spinlock;
  318. rwlock_t write_fifo_spinlock;
  319. // For queuing interrupt bottom half handlers. /\/\|=mhw=|\/\/
  320. struct work_struct tqueue_interrupt;
  321. struct timer_list SendPendingTimer; // Used by iiSendPending
  322. unsigned int SendPendingRetry;
  323. } i2eBordStr, *i2eBordStrPtr;
  324. //-------------------------------------------------------------------
  325. // Macro Definitions for the indirect calls defined in the i2eBordStr
  326. //-------------------------------------------------------------------
  327. //
  328. #define iiDelay(a,b) (*(a)->i2eDelay)(b)
  329. #define iiWriteBuf(a,b,c) (*(a)->i2eWriteBuf)(a,b,c)
  330. #define iiReadBuf(a,b,c) (*(a)->i2eReadBuf)(a,b,c)
  331. #define iiWriteWord(a,b) (*(a)->i2eWriteWord)(a,b)
  332. #define iiReadWord(a) (*(a)->i2eReadWord)(a)
  333. #define iiWaitForTxEmpty(a,b) (*(a)->i2eWaitForTxEmpty)(a,b)
  334. #define iiTxMailEmpty(a) (*(a)->i2eTxMailEmpty)(a)
  335. #define iiTrySendMail(a,b) (*(a)->i2eTrySendMail)(a,b)
  336. #define iiGetMail(a) (*(a)->i2eGetMail)(a)
  337. #define iiEnableMailIrq(a) (*(a)->i2eEnableMailIrq)(a)
  338. #define iiDisableMailIrq(a) (*(a)->i2eWriteMask)(a,0)
  339. #define iiWriteMask(a,b) (*(a)->i2eWriteMask)(a,b)
  340. //-------------------------------------------
  341. // Manifests for i2eBordStr:
  342. //-------------------------------------------
  343. #define YES 1
  344. #define NO 0
  345. #define NULLFUNC (void (*)(void))0
  346. #define NULLPTR (void *)0
  347. typedef void (*delayFunc_t)(unsigned int);
  348. // i2eValid
  349. //
  350. #define I2E_MAGIC 0x4251 // Structure is valid.
  351. #define I2E_INCOMPLETE 0x1122 // Structure failed during init.
  352. // i2eError
  353. //
  354. #define I2EE_GOOD 0 // Operation successful
  355. #define I2EE_BADADDR 1 // Address out of range
  356. #define I2EE_BADSTATE 2 // Attempt to perform a function when the board
  357. // structure was in the incorrect state
  358. #define I2EE_BADMAGIC 3 // Bad magic number from Power On test (i2ePomSize
  359. // reflects what was read
  360. #define I2EE_PORM_SHORT 4 // Power On message too short
  361. #define I2EE_PORM_LONG 5 // Power On message too long
  362. #define I2EE_BAD_FAMILY 6 // Un-supported board family type
  363. #define I2EE_INCONSIST 7 // Firmware reports something impossible,
  364. // e.g. unexpected number of ports... Almost no
  365. // excuse other than bad FIFO...
  366. #define I2EE_POSTERR 8 // Power-On self test reported a bad error
  367. #define I2EE_BADBUS 9 // Unknown Bus type declared in message
  368. #define I2EE_TXE_TIME 10 // Timed out waiting for TX Fifo to empty
  369. #define I2EE_INVALID 11 // i2eValid field does not indicate a valid and
  370. // complete board structure (for functions which
  371. // require this be so.)
  372. #define I2EE_BAD_PORT 12 // Discrepancy between channels actually found and
  373. // what the product is supposed to have. Check
  374. // i2eGoodMap vs i2eChannelMap for details.
  375. #define I2EE_BAD_IRQ 13 // Someone specified an unsupported IRQ
  376. #define I2EE_NOCHANNELS 14 // No channel structures have been defined (for
  377. // functions requiring this).
  378. // i2eFifoStyle
  379. //
  380. #define FIFO_II 0 /* IntelliPort-II style: see also i2hw.h */
  381. #define FIFO_IIEX 1 /* IntelliPort-IIEX style */
  382. // i2eGetMail
  383. //
  384. #define NO_MAIL_HERE 0x1111 // Since mail is unsigned char, cannot possibly
  385. // promote to 0x1111.
  386. // i2eState
  387. //
  388. #define II_STATE_COLD 0 // Addresses have been defined, but board not even
  389. // reset yet.
  390. #define II_STATE_RESET 1 // Board,if it exists, has just been reset
  391. #define II_STATE_READY 2 // Board ready for its first block
  392. #define II_STATE_LOADING 3 // Board continuing load
  393. #define II_STATE_LOADED 4 // Board has finished load: status ok
  394. #define II_STATE_BADLOAD 5 // Board has finished load: failed!
  395. #define II_STATE_STDLOADED 6 // Board has finished load: standard firmware
  396. // i2eUsingIrq
  397. //
  398. #define IRQ_UNDEFINED 0x1352 // No valid irq (or polling = 0) can ever
  399. // promote to this!
  400. //------------------------------------------
  401. // Handy Macros for i2ellis.c and others
  402. // Note these are common to -II and -IIEX
  403. //------------------------------------------
  404. // Given a pointer to the board structure, does the input FIFO have any data or
  405. // not?
  406. //
  407. #define HAS_INPUT(pB) !(INB(pB->i2eStatus) & ST_IN_EMPTY)
  408. #define HAS_NO_INPUT(pB) (INB(pB->i2eStatus) & ST_IN_EMPTY)
  409. // Given a pointer to board structure, read a byte or word from the fifo
  410. //
  411. #define BYTE_FROM(pB) (unsigned char)INB(pB->i2eData)
  412. #define WORD_FROM(pB) (unsigned short)INW(pB->i2eData)
  413. // Given a pointer to board structure, is there room for any data to be written
  414. // to the data fifo?
  415. //
  416. #define HAS_OUTROOM(pB) !(INB(pB->i2eStatus) & ST_OUT_FULL)
  417. #define HAS_NO_OUTROOM(pB) (INB(pB->i2eStatus) & ST_OUT_FULL)
  418. // Given a pointer to board structure, write a single byte to the fifo
  419. // structure. Note that for 16-bit interfaces, the high order byte is undefined
  420. // and unknown.
  421. //
  422. #define BYTE_TO(pB, c) OUTB(pB->i2eData,(c))
  423. // Write a word to the fifo structure. For 8-bit interfaces, this may have
  424. // unknown results.
  425. //
  426. #define WORD_TO(pB, c) OUTW(pB->i2eData,(c))
  427. // Given a pointer to the board structure, is there anything in the incoming
  428. // mailbox?
  429. //
  430. #define HAS_MAIL(pB) (INB(pB->i2eStatus) & ST_IN_MAIL)
  431. #define UPDATE_FIFO_ROOM(pB) (pB)->i2eFifoRemains=(pB)->i2eFifoSize
  432. // Handy macro to round up a number (like the buffer write and read routines do)
  433. //
  434. #define ROUNDUP(number) (((number)+1) & (~1))
  435. //------------------------------------------
  436. // Function Declarations for i2ellis.c
  437. //------------------------------------------
  438. //
  439. // Functions called directly
  440. //
  441. // Initialization of a board & structure is in four (five!) parts:
  442. //
  443. // 0) iiEllisInit() - Initialize iiEllis subsystem.
  444. // 1) iiSetAddress() - Define the board address & delay function for a board.
  445. // 2) iiReset() - Reset the board (provided it exists)
  446. // -- Note you may do this to several boards --
  447. // 3) iiResetDelay() - Delay for 2 seconds (once for all boards)
  448. // 4) iiInitialize() - Attempt to read Power-up message; further initialize
  449. // accelerators
  450. //
  451. // Then you may use iiDownloadAll() or iiDownloadFile() (in i2file.c) to write
  452. // loadware. To change loadware, you must begin again with step 2, resetting
  453. // the board again (step 1 not needed).
  454. static void iiEllisInit(void);
  455. static int iiSetAddress(i2eBordStrPtr, int, delayFunc_t );
  456. static int iiReset(i2eBordStrPtr);
  457. static int iiResetDelay(i2eBordStrPtr);
  458. static int iiInitialize(i2eBordStrPtr);
  459. // Routine to validate that all channels expected are there.
  460. //
  461. extern int iiValidateChannels(i2eBordStrPtr);
  462. // Routine used to download a block of loadware.
  463. //
  464. static int iiDownloadBlock(i2eBordStrPtr, loadHdrStrPtr, int);
  465. // Return values given by iiDownloadBlock, iiDownloadAll, iiDownloadFile:
  466. //
  467. #define II_DOWN_BADVALID 0 // board structure is invalid
  468. #define II_DOWN_CONTINUING 1 // So far, so good, firmware expects more
  469. #define II_DOWN_GOOD 2 // Download complete, CRC good
  470. #define II_DOWN_BAD 3 // Download complete, but CRC bad
  471. #define II_DOWN_BADFILE 4 // Bad magic number in loadware file
  472. #define II_DOWN_BADSTATE 5 // Board is in an inappropriate state for
  473. // downloading loadware. (see i2eState)
  474. #define II_DOWN_TIMEOUT 6 // Timeout waiting for firmware
  475. #define II_DOWN_OVER 7 // Too much data
  476. #define II_DOWN_UNDER 8 // Not enough data
  477. #define II_DOWN_NOFILE 9 // Loadware file not found
  478. // Routine to download an entire loadware module: Return values are a subset of
  479. // iiDownloadBlock's, excluding, of course, II_DOWN_CONTINUING
  480. //
  481. static int iiDownloadAll(i2eBordStrPtr, loadHdrStrPtr, int, int);
  482. // Called indirectly always. Needed externally so the routine might be
  483. // SPECIFIED as an argument to iiReset()
  484. //
  485. //static void ii2DelayIO(unsigned int); // N-millisecond delay using
  486. //hardware spin
  487. //static void ii2DelayTimer(unsigned int); // N-millisecond delay using Linux
  488. //timer
  489. // Many functions defined here return True if good, False otherwise, with an
  490. // error code in i2eError field. Here is a handy macro for setting the error
  491. // code and returning.
  492. //
  493. #define COMPLETE(pB,code) \
  494. do { \
  495. pB->i2eError = code; \
  496. return (code == I2EE_GOOD);\
  497. } while (0)
  498. #endif // I2ELLIS_H