via-rng.c 4.7 KB

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  1. /*
  2. * RNG driver for VIA RNGs
  3. *
  4. * Copyright 2005 (c) MontaVista Software, Inc.
  5. *
  6. * with the majority of the code coming from:
  7. *
  8. * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
  9. * (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com>
  10. *
  11. * derived from
  12. *
  13. * Hardware driver for the AMD 768 Random Number Generator (RNG)
  14. * (c) Copyright 2001 Red Hat Inc <alan@redhat.com>
  15. *
  16. * derived from
  17. *
  18. * Hardware driver for Intel i810 Random Number Generator (RNG)
  19. * Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com>
  20. * Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com>
  21. *
  22. * This file is licensed under the terms of the GNU General Public
  23. * License version 2. This program is licensed "as is" without any
  24. * warranty of any kind, whether express or implied.
  25. */
  26. #include <linux/module.h>
  27. #include <linux/kernel.h>
  28. #include <linux/hw_random.h>
  29. #include <asm/io.h>
  30. #include <asm/msr.h>
  31. #include <asm/cpufeature.h>
  32. #define PFX KBUILD_MODNAME ": "
  33. enum {
  34. VIA_STRFILT_CNT_SHIFT = 16,
  35. VIA_STRFILT_FAIL = (1 << 15),
  36. VIA_STRFILT_ENABLE = (1 << 14),
  37. VIA_RAWBITS_ENABLE = (1 << 13),
  38. VIA_RNG_ENABLE = (1 << 6),
  39. VIA_XSTORE_CNT_MASK = 0x0F,
  40. VIA_RNG_CHUNK_8 = 0x00, /* 64 rand bits, 64 stored bits */
  41. VIA_RNG_CHUNK_4 = 0x01, /* 32 rand bits, 32 stored bits */
  42. VIA_RNG_CHUNK_4_MASK = 0xFFFFFFFF,
  43. VIA_RNG_CHUNK_2 = 0x02, /* 16 rand bits, 32 stored bits */
  44. VIA_RNG_CHUNK_2_MASK = 0xFFFF,
  45. VIA_RNG_CHUNK_1 = 0x03, /* 8 rand bits, 32 stored bits */
  46. VIA_RNG_CHUNK_1_MASK = 0xFF,
  47. };
  48. /*
  49. * Investigate using the 'rep' prefix to obtain 32 bits of random data
  50. * in one insn. The upside is potentially better performance. The
  51. * downside is that the instruction becomes no longer atomic. Due to
  52. * this, just like familiar issues with /dev/random itself, the worst
  53. * case of a 'rep xstore' could potentially pause a cpu for an
  54. * unreasonably long time. In practice, this condition would likely
  55. * only occur when the hardware is failing. (or so we hope :))
  56. *
  57. * Another possible performance boost may come from simply buffering
  58. * until we have 4 bytes, thus returning a u32 at a time,
  59. * instead of the current u8-at-a-time.
  60. */
  61. static inline u32 xstore(u32 *addr, u32 edx_in)
  62. {
  63. u32 eax_out;
  64. asm(".byte 0x0F,0xA7,0xC0 /* xstore %%edi (addr=%0) */"
  65. :"=m"(*addr), "=a"(eax_out)
  66. :"D"(addr), "d"(edx_in));
  67. return eax_out;
  68. }
  69. static int via_rng_data_present(struct hwrng *rng)
  70. {
  71. u32 bytes_out;
  72. u32 *via_rng_datum = (u32 *)(&rng->priv);
  73. /* We choose the recommended 1-byte-per-instruction RNG rate,
  74. * for greater randomness at the expense of speed. Larger
  75. * values 2, 4, or 8 bytes-per-instruction yield greater
  76. * speed at lesser randomness.
  77. *
  78. * If you change this to another VIA_CHUNK_n, you must also
  79. * change the ->n_bytes values in rng_vendor_ops[] tables.
  80. * VIA_CHUNK_8 requires further code changes.
  81. *
  82. * A copy of MSR_VIA_RNG is placed in eax_out when xstore
  83. * completes.
  84. */
  85. *via_rng_datum = 0; /* paranoia, not really necessary */
  86. bytes_out = xstore(via_rng_datum, VIA_RNG_CHUNK_1);
  87. bytes_out &= VIA_XSTORE_CNT_MASK;
  88. if (bytes_out == 0)
  89. return 0;
  90. return 1;
  91. }
  92. static int via_rng_data_read(struct hwrng *rng, u32 *data)
  93. {
  94. u32 via_rng_datum = (u32)rng->priv;
  95. *data = via_rng_datum;
  96. return 1;
  97. }
  98. static int via_rng_init(struct hwrng *rng)
  99. {
  100. u32 lo, hi, old_lo;
  101. /* Control the RNG via MSR. Tread lightly and pay very close
  102. * close attention to values written, as the reserved fields
  103. * are documented to be "undefined and unpredictable"; but it
  104. * does not say to write them as zero, so I make a guess that
  105. * we restore the values we find in the register.
  106. */
  107. rdmsr(MSR_VIA_RNG, lo, hi);
  108. old_lo = lo;
  109. lo &= ~(0x7f << VIA_STRFILT_CNT_SHIFT);
  110. lo &= ~VIA_XSTORE_CNT_MASK;
  111. lo &= ~(VIA_STRFILT_ENABLE | VIA_STRFILT_FAIL | VIA_RAWBITS_ENABLE);
  112. lo |= VIA_RNG_ENABLE;
  113. if (lo != old_lo)
  114. wrmsr(MSR_VIA_RNG, lo, hi);
  115. /* perhaps-unnecessary sanity check; remove after testing if
  116. unneeded */
  117. rdmsr(MSR_VIA_RNG, lo, hi);
  118. if ((lo & VIA_RNG_ENABLE) == 0) {
  119. printk(KERN_ERR PFX "cannot enable VIA C3 RNG, aborting\n");
  120. return -ENODEV;
  121. }
  122. return 0;
  123. }
  124. static struct hwrng via_rng = {
  125. .name = "via",
  126. .init = via_rng_init,
  127. .data_present = via_rng_data_present,
  128. .data_read = via_rng_data_read,
  129. };
  130. static int __init mod_init(void)
  131. {
  132. int err;
  133. if (!cpu_has_xstore)
  134. return -ENODEV;
  135. printk(KERN_INFO "VIA RNG detected\n");
  136. err = hwrng_register(&via_rng);
  137. if (err) {
  138. printk(KERN_ERR PFX "RNG registering failed (%d)\n",
  139. err);
  140. goto out;
  141. }
  142. out:
  143. return err;
  144. }
  145. static void __exit mod_exit(void)
  146. {
  147. hwrng_unregister(&via_rng);
  148. }
  149. module_init(mod_init);
  150. module_exit(mod_exit);
  151. MODULE_DESCRIPTION("H/W RNG driver for VIA chipsets");
  152. MODULE_LICENSE("GPL");