pata_radisys.c 8.1 KB

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  1. /*
  2. * pata_radisys.c - Intel PATA/SATA controllers
  3. *
  4. * (C) 2006 Red Hat <alan@redhat.com>
  5. *
  6. * Some parts based on ata_piix.c by Jeff Garzik and others.
  7. *
  8. * A PIIX relative, this device has a single ATA channel and no
  9. * slave timings, SITRE or PPE. In that sense it is a close relative
  10. * of the original PIIX. It does however support UDMA 33/66 per channel
  11. * although no other modes/timings. Also lacking is 32bit I/O on the ATA
  12. * port.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/pci.h>
  17. #include <linux/init.h>
  18. #include <linux/blkdev.h>
  19. #include <linux/delay.h>
  20. #include <linux/device.h>
  21. #include <scsi/scsi_host.h>
  22. #include <linux/libata.h>
  23. #include <linux/ata.h>
  24. #define DRV_NAME "pata_radisys"
  25. #define DRV_VERSION "0.4.4"
  26. /**
  27. * radisys_set_piomode - Initialize host controller PATA PIO timings
  28. * @ap: ATA port
  29. * @adev: Device whose timings we are configuring
  30. *
  31. * Set PIO mode for device, in host controller PCI config space.
  32. *
  33. * LOCKING:
  34. * None (inherited from caller).
  35. */
  36. static void radisys_set_piomode (struct ata_port *ap, struct ata_device *adev)
  37. {
  38. unsigned int pio = adev->pio_mode - XFER_PIO_0;
  39. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  40. u16 idetm_data;
  41. int control = 0;
  42. /*
  43. * See Intel Document 298600-004 for the timing programing rules
  44. * for PIIX/ICH. Note that the early PIIX does not have the slave
  45. * timing port at 0x44. The Radisys is a relative of the PIIX
  46. * but not the same so be careful.
  47. */
  48. static const /* ISP RTC */
  49. u8 timings[][2] = { { 0, 0 }, /* Check me */
  50. { 0, 0 },
  51. { 1, 1 },
  52. { 2, 2 },
  53. { 3, 3 }, };
  54. if (pio > 0)
  55. control |= 1; /* TIME1 enable */
  56. if (ata_pio_need_iordy(adev))
  57. control |= 2; /* IE IORDY */
  58. pci_read_config_word(dev, 0x40, &idetm_data);
  59. /* Enable IE and TIME as appropriate. Clear the other
  60. drive timing bits */
  61. idetm_data &= 0xCCCC;
  62. idetm_data |= (control << (4 * adev->devno));
  63. idetm_data |= (timings[pio][0] << 12) |
  64. (timings[pio][1] << 8);
  65. pci_write_config_word(dev, 0x40, idetm_data);
  66. /* Track which port is configured */
  67. ap->private_data = adev;
  68. }
  69. /**
  70. * radisys_set_dmamode - Initialize host controller PATA DMA timings
  71. * @ap: Port whose timings we are configuring
  72. * @adev: Device to program
  73. * @isich: True if the device is an ICH and has IOCFG registers
  74. *
  75. * Set MWDMA mode for device, in host controller PCI config space.
  76. *
  77. * LOCKING:
  78. * None (inherited from caller).
  79. */
  80. static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev)
  81. {
  82. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  83. u16 idetm_data;
  84. u8 udma_enable;
  85. static const /* ISP RTC */
  86. u8 timings[][2] = { { 0, 0 },
  87. { 0, 0 },
  88. { 1, 1 },
  89. { 2, 2 },
  90. { 3, 3 }, };
  91. /*
  92. * MWDMA is driven by the PIO timings. We must also enable
  93. * IORDY unconditionally.
  94. */
  95. pci_read_config_word(dev, 0x40, &idetm_data);
  96. pci_read_config_byte(dev, 0x48, &udma_enable);
  97. if (adev->dma_mode < XFER_UDMA_0) {
  98. unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0;
  99. const unsigned int needed_pio[3] = {
  100. XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
  101. };
  102. int pio = needed_pio[mwdma] - XFER_PIO_0;
  103. int control = 3; /* IORDY|TIME0 */
  104. /* If the drive MWDMA is faster than it can do PIO then
  105. we must force PIO0 for PIO cycles. */
  106. if (adev->pio_mode < needed_pio[mwdma])
  107. control = 1;
  108. /* Mask out the relevant control and timing bits we will load. Also
  109. clear the other drive TIME register as a precaution */
  110. idetm_data &= 0xCCCC;
  111. idetm_data |= control << (4 * adev->devno);
  112. idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
  113. udma_enable &= ~(1 << adev->devno);
  114. } else {
  115. u8 udma_mode;
  116. /* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */
  117. pci_read_config_byte(dev, 0x4A, &udma_mode);
  118. if (adev->xfer_mode == XFER_UDMA_2)
  119. udma_mode &= ~ (1 << adev->devno);
  120. else /* UDMA 4 */
  121. udma_mode |= (1 << adev->devno);
  122. pci_write_config_byte(dev, 0x4A, udma_mode);
  123. udma_enable |= (1 << adev->devno);
  124. }
  125. pci_write_config_word(dev, 0x40, idetm_data);
  126. pci_write_config_byte(dev, 0x48, udma_enable);
  127. /* Track which port is configured */
  128. ap->private_data = adev;
  129. }
  130. /**
  131. * radisys_qc_issue_prot - command issue
  132. * @qc: command pending
  133. *
  134. * Called when the libata layer is about to issue a command. We wrap
  135. * this interface so that we can load the correct ATA timings if
  136. * neccessary. Our logic also clears TIME0/TIME1 for the other device so
  137. * that, even if we get this wrong, cycles to the other device will
  138. * be made PIO0.
  139. */
  140. static unsigned int radisys_qc_issue_prot(struct ata_queued_cmd *qc)
  141. {
  142. struct ata_port *ap = qc->ap;
  143. struct ata_device *adev = qc->dev;
  144. if (adev != ap->private_data) {
  145. /* UDMA timing is not shared */
  146. if (adev->dma_mode < XFER_UDMA_0) {
  147. if (adev->dma_mode)
  148. radisys_set_dmamode(ap, adev);
  149. else if (adev->pio_mode)
  150. radisys_set_piomode(ap, adev);
  151. }
  152. }
  153. return ata_qc_issue_prot(qc);
  154. }
  155. static struct scsi_host_template radisys_sht = {
  156. .module = THIS_MODULE,
  157. .name = DRV_NAME,
  158. .ioctl = ata_scsi_ioctl,
  159. .queuecommand = ata_scsi_queuecmd,
  160. .can_queue = ATA_DEF_QUEUE,
  161. .this_id = ATA_SHT_THIS_ID,
  162. .sg_tablesize = LIBATA_MAX_PRD,
  163. .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
  164. .emulated = ATA_SHT_EMULATED,
  165. .use_clustering = ATA_SHT_USE_CLUSTERING,
  166. .proc_name = DRV_NAME,
  167. .dma_boundary = ATA_DMA_BOUNDARY,
  168. .slave_configure = ata_scsi_slave_config,
  169. .slave_destroy = ata_scsi_slave_destroy,
  170. .bios_param = ata_std_bios_param,
  171. };
  172. static const struct ata_port_operations radisys_pata_ops = {
  173. .port_disable = ata_port_disable,
  174. .set_piomode = radisys_set_piomode,
  175. .set_dmamode = radisys_set_dmamode,
  176. .mode_filter = ata_pci_default_filter,
  177. .tf_load = ata_tf_load,
  178. .tf_read = ata_tf_read,
  179. .check_status = ata_check_status,
  180. .exec_command = ata_exec_command,
  181. .dev_select = ata_std_dev_select,
  182. .freeze = ata_bmdma_freeze,
  183. .thaw = ata_bmdma_thaw,
  184. .error_handler = ata_bmdma_error_handler,
  185. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  186. .cable_detect = ata_cable_unknown,
  187. .bmdma_setup = ata_bmdma_setup,
  188. .bmdma_start = ata_bmdma_start,
  189. .bmdma_stop = ata_bmdma_stop,
  190. .bmdma_status = ata_bmdma_status,
  191. .qc_prep = ata_qc_prep,
  192. .qc_issue = radisys_qc_issue_prot,
  193. .data_xfer = ata_data_xfer,
  194. .irq_handler = ata_interrupt,
  195. .irq_clear = ata_bmdma_irq_clear,
  196. .irq_on = ata_irq_on,
  197. .irq_ack = ata_irq_ack,
  198. .port_start = ata_port_start,
  199. };
  200. /**
  201. * radisys_init_one - Register PIIX ATA PCI device with kernel services
  202. * @pdev: PCI device to register
  203. * @ent: Entry in radisys_pci_tbl matching with @pdev
  204. *
  205. * Called from kernel PCI layer. We probe for combined mode (sigh),
  206. * and then hand over control to libata, for it to do the rest.
  207. *
  208. * LOCKING:
  209. * Inherited from PCI layer (may sleep).
  210. *
  211. * RETURNS:
  212. * Zero on success, or -ERRNO value.
  213. */
  214. static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
  215. {
  216. static int printed_version;
  217. static const struct ata_port_info info = {
  218. .sht = &radisys_sht,
  219. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  220. .pio_mask = 0x1f, /* pio0-4 */
  221. .mwdma_mask = 0x07, /* mwdma1-2 */
  222. .udma_mask = 0x14, /* UDMA33/66 only */
  223. .port_ops = &radisys_pata_ops,
  224. };
  225. const struct ata_port_info *ppi[] = { &info, NULL };
  226. if (!printed_version++)
  227. dev_printk(KERN_DEBUG, &pdev->dev,
  228. "version " DRV_VERSION "\n");
  229. return ata_pci_init_one(pdev, ppi);
  230. }
  231. static const struct pci_device_id radisys_pci_tbl[] = {
  232. { PCI_VDEVICE(RADISYS, 0x8201), },
  233. { } /* terminate list */
  234. };
  235. static struct pci_driver radisys_pci_driver = {
  236. .name = DRV_NAME,
  237. .id_table = radisys_pci_tbl,
  238. .probe = radisys_init_one,
  239. .remove = ata_pci_remove_one,
  240. #ifdef CONFIG_PM
  241. .suspend = ata_pci_device_suspend,
  242. .resume = ata_pci_device_resume,
  243. #endif
  244. };
  245. static int __init radisys_init(void)
  246. {
  247. return pci_register_driver(&radisys_pci_driver);
  248. }
  249. static void __exit radisys_exit(void)
  250. {
  251. pci_unregister_driver(&radisys_pci_driver);
  252. }
  253. module_init(radisys_init);
  254. module_exit(radisys_exit);
  255. MODULE_AUTHOR("Alan Cox");
  256. MODULE_DESCRIPTION("SCSI low-level driver for Radisys R82600 controllers");
  257. MODULE_LICENSE("GPL");
  258. MODULE_DEVICE_TABLE(pci, radisys_pci_tbl);
  259. MODULE_VERSION(DRV_VERSION);