processor_idle.c 34 KB

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  1. /*
  2. * processor_idle - idle state submodule to the ACPI processor driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
  8. * - Added processor hotplug support
  9. * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  10. * - Added support for C3 on SMP
  11. *
  12. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or (at
  17. * your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful, but
  20. * WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  22. * General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License along
  25. * with this program; if not, write to the Free Software Foundation, Inc.,
  26. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27. *
  28. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/cpufreq.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/acpi.h>
  37. #include <linux/dmi.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/sched.h> /* need_resched() */
  40. #include <linux/latency.h>
  41. #include <linux/clockchips.h>
  42. /*
  43. * Include the apic definitions for x86 to have the APIC timer related defines
  44. * available also for UP (on SMP it gets magically included via linux/smp.h).
  45. * asm/acpi.h is not an option, as it would require more include magic. Also
  46. * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
  47. */
  48. #ifdef CONFIG_X86
  49. #include <asm/apic.h>
  50. #endif
  51. #include <asm/io.h>
  52. #include <asm/uaccess.h>
  53. #include <acpi/acpi_bus.h>
  54. #include <acpi/processor.h>
  55. #define ACPI_PROCESSOR_COMPONENT 0x01000000
  56. #define ACPI_PROCESSOR_CLASS "processor"
  57. #define _COMPONENT ACPI_PROCESSOR_COMPONENT
  58. ACPI_MODULE_NAME("processor_idle");
  59. #define ACPI_PROCESSOR_FILE_POWER "power"
  60. #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
  61. #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
  62. #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
  63. static void (*pm_idle_save) (void) __read_mostly;
  64. module_param(max_cstate, uint, 0644);
  65. static unsigned int nocst __read_mostly;
  66. module_param(nocst, uint, 0000);
  67. /*
  68. * bm_history -- bit-mask with a bit per jiffy of bus-master activity
  69. * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
  70. * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
  71. * 100 HZ: 0x0000000F: 4 jiffies = 40ms
  72. * reduce history for more aggressive entry into C3
  73. */
  74. static unsigned int bm_history __read_mostly =
  75. (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
  76. module_param(bm_history, uint, 0644);
  77. /* --------------------------------------------------------------------------
  78. Power Management
  79. -------------------------------------------------------------------------- */
  80. /*
  81. * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  82. * For now disable this. Probably a bug somewhere else.
  83. *
  84. * To skip this limit, boot/load with a large max_cstate limit.
  85. */
  86. static int set_max_cstate(struct dmi_system_id *id)
  87. {
  88. if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
  89. return 0;
  90. printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
  91. " Override with \"processor.max_cstate=%d\"\n", id->ident,
  92. (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
  93. max_cstate = (long)id->driver_data;
  94. return 0;
  95. }
  96. /* Actually this shouldn't be __cpuinitdata, would be better to fix the
  97. callers to only run once -AK */
  98. static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
  99. { set_max_cstate, "IBM ThinkPad R40e", {
  100. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  101. DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
  102. { set_max_cstate, "IBM ThinkPad R40e", {
  103. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  104. DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
  105. { set_max_cstate, "IBM ThinkPad R40e", {
  106. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  107. DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
  108. { set_max_cstate, "IBM ThinkPad R40e", {
  109. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  110. DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
  111. { set_max_cstate, "IBM ThinkPad R40e", {
  112. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  113. DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
  114. { set_max_cstate, "IBM ThinkPad R40e", {
  115. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  116. DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
  117. { set_max_cstate, "IBM ThinkPad R40e", {
  118. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  119. DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
  120. { set_max_cstate, "IBM ThinkPad R40e", {
  121. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  122. DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
  123. { set_max_cstate, "IBM ThinkPad R40e", {
  124. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  125. DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
  126. { set_max_cstate, "IBM ThinkPad R40e", {
  127. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  128. DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
  129. { set_max_cstate, "IBM ThinkPad R40e", {
  130. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  131. DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
  132. { set_max_cstate, "IBM ThinkPad R40e", {
  133. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  134. DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
  135. { set_max_cstate, "IBM ThinkPad R40e", {
  136. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  137. DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
  138. { set_max_cstate, "IBM ThinkPad R40e", {
  139. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  140. DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
  141. { set_max_cstate, "IBM ThinkPad R40e", {
  142. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  143. DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
  144. { set_max_cstate, "IBM ThinkPad R40e", {
  145. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  146. DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
  147. { set_max_cstate, "Medion 41700", {
  148. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  149. DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
  150. { set_max_cstate, "Clevo 5600D", {
  151. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  152. DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
  153. (void *)2},
  154. {},
  155. };
  156. static inline u32 ticks_elapsed(u32 t1, u32 t2)
  157. {
  158. if (t2 >= t1)
  159. return (t2 - t1);
  160. else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
  161. return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
  162. else
  163. return ((0xFFFFFFFF - t1) + t2);
  164. }
  165. static void
  166. acpi_processor_power_activate(struct acpi_processor *pr,
  167. struct acpi_processor_cx *new)
  168. {
  169. struct acpi_processor_cx *old;
  170. if (!pr || !new)
  171. return;
  172. old = pr->power.state;
  173. if (old)
  174. old->promotion.count = 0;
  175. new->demotion.count = 0;
  176. /* Cleanup from old state. */
  177. if (old) {
  178. switch (old->type) {
  179. case ACPI_STATE_C3:
  180. /* Disable bus master reload */
  181. if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
  182. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
  183. break;
  184. }
  185. }
  186. /* Prepare to use new state. */
  187. switch (new->type) {
  188. case ACPI_STATE_C3:
  189. /* Enable bus master reload */
  190. if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
  191. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
  192. break;
  193. }
  194. pr->power.state = new;
  195. return;
  196. }
  197. static void acpi_safe_halt(void)
  198. {
  199. current_thread_info()->status &= ~TS_POLLING;
  200. /*
  201. * TS_POLLING-cleared state must be visible before we
  202. * test NEED_RESCHED:
  203. */
  204. smp_mb();
  205. if (!need_resched())
  206. safe_halt();
  207. current_thread_info()->status |= TS_POLLING;
  208. }
  209. static atomic_t c3_cpu_count;
  210. /* Common C-state entry for C2, C3, .. */
  211. static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
  212. {
  213. if (cstate->space_id == ACPI_CSTATE_FFH) {
  214. /* Call into architectural FFH based C-state */
  215. acpi_processor_ffh_cstate_enter(cstate);
  216. } else {
  217. int unused;
  218. /* IO port based C-state */
  219. inb(cstate->address);
  220. /* Dummy wait op - must do something useless after P_LVL2 read
  221. because chipsets cannot guarantee that STPCLK# signal
  222. gets asserted in time to freeze execution properly. */
  223. unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
  224. }
  225. }
  226. #ifdef ARCH_APICTIMER_STOPS_ON_C3
  227. /*
  228. * Some BIOS implementations switch to C3 in the published C2 state.
  229. * This seems to be a common problem on AMD boxen, but other vendors
  230. * are affected too. We pick the most conservative approach: we assume
  231. * that the local APIC stops in both C2 and C3.
  232. */
  233. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  234. struct acpi_processor_cx *cx)
  235. {
  236. struct acpi_processor_power *pwr = &pr->power;
  237. u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
  238. /*
  239. * Check, if one of the previous states already marked the lapic
  240. * unstable
  241. */
  242. if (pwr->timer_broadcast_on_state < state)
  243. return;
  244. if (cx->type >= type)
  245. pr->power.timer_broadcast_on_state = state;
  246. }
  247. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
  248. {
  249. #ifdef CONFIG_GENERIC_CLOCKEVENTS
  250. unsigned long reason;
  251. reason = pr->power.timer_broadcast_on_state < INT_MAX ?
  252. CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
  253. clockevents_notify(reason, &pr->id);
  254. #else
  255. cpumask_t mask = cpumask_of_cpu(pr->id);
  256. if (pr->power.timer_broadcast_on_state < INT_MAX)
  257. on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
  258. else
  259. on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
  260. #endif
  261. }
  262. /* Power(C) State timer broadcast control */
  263. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  264. struct acpi_processor_cx *cx,
  265. int broadcast)
  266. {
  267. #ifdef CONFIG_GENERIC_CLOCKEVENTS
  268. int state = cx - pr->power.states;
  269. if (state >= pr->power.timer_broadcast_on_state) {
  270. unsigned long reason;
  271. reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
  272. CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
  273. clockevents_notify(reason, &pr->id);
  274. }
  275. #endif
  276. }
  277. #else
  278. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  279. struct acpi_processor_cx *cstate) { }
  280. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
  281. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  282. struct acpi_processor_cx *cx,
  283. int broadcast)
  284. {
  285. }
  286. #endif
  287. static void acpi_processor_idle(void)
  288. {
  289. struct acpi_processor *pr = NULL;
  290. struct acpi_processor_cx *cx = NULL;
  291. struct acpi_processor_cx *next_state = NULL;
  292. int sleep_ticks = 0;
  293. u32 t1, t2 = 0;
  294. pr = processors[smp_processor_id()];
  295. if (!pr)
  296. return;
  297. /*
  298. * Interrupts must be disabled during bus mastering calculations and
  299. * for C2/C3 transitions.
  300. */
  301. local_irq_disable();
  302. /*
  303. * Check whether we truly need to go idle, or should
  304. * reschedule:
  305. */
  306. if (unlikely(need_resched())) {
  307. local_irq_enable();
  308. return;
  309. }
  310. cx = pr->power.state;
  311. if (!cx) {
  312. if (pm_idle_save)
  313. pm_idle_save();
  314. else
  315. acpi_safe_halt();
  316. return;
  317. }
  318. /*
  319. * Check BM Activity
  320. * -----------------
  321. * Check for bus mastering activity (if required), record, and check
  322. * for demotion.
  323. */
  324. if (pr->flags.bm_check) {
  325. u32 bm_status = 0;
  326. unsigned long diff = jiffies - pr->power.bm_check_timestamp;
  327. if (diff > 31)
  328. diff = 31;
  329. pr->power.bm_activity <<= diff;
  330. acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
  331. if (bm_status) {
  332. pr->power.bm_activity |= 0x1;
  333. acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
  334. }
  335. /*
  336. * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
  337. * the true state of bus mastering activity; forcing us to
  338. * manually check the BMIDEA bit of each IDE channel.
  339. */
  340. else if (errata.piix4.bmisx) {
  341. if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
  342. || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
  343. pr->power.bm_activity |= 0x1;
  344. }
  345. pr->power.bm_check_timestamp = jiffies;
  346. /*
  347. * If bus mastering is or was active this jiffy, demote
  348. * to avoid a faulty transition. Note that the processor
  349. * won't enter a low-power state during this call (to this
  350. * function) but should upon the next.
  351. *
  352. * TBD: A better policy might be to fallback to the demotion
  353. * state (use it for this quantum only) istead of
  354. * demoting -- and rely on duration as our sole demotion
  355. * qualification. This may, however, introduce DMA
  356. * issues (e.g. floppy DMA transfer overrun/underrun).
  357. */
  358. if ((pr->power.bm_activity & 0x1) &&
  359. cx->demotion.threshold.bm) {
  360. local_irq_enable();
  361. next_state = cx->demotion.state;
  362. goto end;
  363. }
  364. }
  365. #ifdef CONFIG_HOTPLUG_CPU
  366. /*
  367. * Check for P_LVL2_UP flag before entering C2 and above on
  368. * an SMP system. We do it here instead of doing it at _CST/P_LVL
  369. * detection phase, to work cleanly with logical CPU hotplug.
  370. */
  371. if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  372. !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  373. cx = &pr->power.states[ACPI_STATE_C1];
  374. #endif
  375. /*
  376. * Sleep:
  377. * ------
  378. * Invoke the current Cx state to put the processor to sleep.
  379. */
  380. if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
  381. current_thread_info()->status &= ~TS_POLLING;
  382. /*
  383. * TS_POLLING-cleared state must be visible before we
  384. * test NEED_RESCHED:
  385. */
  386. smp_mb();
  387. if (need_resched()) {
  388. current_thread_info()->status |= TS_POLLING;
  389. local_irq_enable();
  390. return;
  391. }
  392. }
  393. switch (cx->type) {
  394. case ACPI_STATE_C1:
  395. /*
  396. * Invoke C1.
  397. * Use the appropriate idle routine, the one that would
  398. * be used without acpi C-states.
  399. */
  400. if (pm_idle_save)
  401. pm_idle_save();
  402. else
  403. acpi_safe_halt();
  404. /*
  405. * TBD: Can't get time duration while in C1, as resumes
  406. * go to an ISR rather than here. Need to instrument
  407. * base interrupt handler.
  408. */
  409. sleep_ticks = 0xFFFFFFFF;
  410. break;
  411. case ACPI_STATE_C2:
  412. /* Get start time (ticks) */
  413. t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  414. /* Invoke C2 */
  415. acpi_state_timer_broadcast(pr, cx, 1);
  416. acpi_cstate_enter(cx);
  417. /* Get end time (ticks) */
  418. t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  419. #ifdef CONFIG_GENERIC_TIME
  420. /* TSC halts in C2, so notify users */
  421. mark_tsc_unstable("possible TSC halt in C2");
  422. #endif
  423. /* Re-enable interrupts */
  424. local_irq_enable();
  425. current_thread_info()->status |= TS_POLLING;
  426. /* Compute time (ticks) that we were actually asleep */
  427. sleep_ticks =
  428. ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
  429. acpi_state_timer_broadcast(pr, cx, 0);
  430. break;
  431. case ACPI_STATE_C3:
  432. if (pr->flags.bm_check) {
  433. if (atomic_inc_return(&c3_cpu_count) ==
  434. num_online_cpus()) {
  435. /*
  436. * All CPUs are trying to go to C3
  437. * Disable bus master arbitration
  438. */
  439. acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
  440. }
  441. } else {
  442. /* SMP with no shared cache... Invalidate cache */
  443. ACPI_FLUSH_CPU_CACHE();
  444. }
  445. /* Get start time (ticks) */
  446. t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  447. /* Invoke C3 */
  448. acpi_state_timer_broadcast(pr, cx, 1);
  449. acpi_cstate_enter(cx);
  450. /* Get end time (ticks) */
  451. t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  452. if (pr->flags.bm_check) {
  453. /* Enable bus master arbitration */
  454. atomic_dec(&c3_cpu_count);
  455. acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
  456. }
  457. #ifdef CONFIG_GENERIC_TIME
  458. /* TSC halts in C3, so notify users */
  459. mark_tsc_unstable("TSC halts in C3");
  460. #endif
  461. /* Re-enable interrupts */
  462. local_irq_enable();
  463. current_thread_info()->status |= TS_POLLING;
  464. /* Compute time (ticks) that we were actually asleep */
  465. sleep_ticks =
  466. ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
  467. acpi_state_timer_broadcast(pr, cx, 0);
  468. break;
  469. default:
  470. local_irq_enable();
  471. return;
  472. }
  473. cx->usage++;
  474. if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
  475. cx->time += sleep_ticks;
  476. next_state = pr->power.state;
  477. #ifdef CONFIG_HOTPLUG_CPU
  478. /* Don't do promotion/demotion */
  479. if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  480. !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
  481. next_state = cx;
  482. goto end;
  483. }
  484. #endif
  485. /*
  486. * Promotion?
  487. * ----------
  488. * Track the number of longs (time asleep is greater than threshold)
  489. * and promote when the count threshold is reached. Note that bus
  490. * mastering activity may prevent promotions.
  491. * Do not promote above max_cstate.
  492. */
  493. if (cx->promotion.state &&
  494. ((cx->promotion.state - pr->power.states) <= max_cstate)) {
  495. if (sleep_ticks > cx->promotion.threshold.ticks &&
  496. cx->promotion.state->latency <= system_latency_constraint()) {
  497. cx->promotion.count++;
  498. cx->demotion.count = 0;
  499. if (cx->promotion.count >=
  500. cx->promotion.threshold.count) {
  501. if (pr->flags.bm_check) {
  502. if (!
  503. (pr->power.bm_activity & cx->
  504. promotion.threshold.bm)) {
  505. next_state =
  506. cx->promotion.state;
  507. goto end;
  508. }
  509. } else {
  510. next_state = cx->promotion.state;
  511. goto end;
  512. }
  513. }
  514. }
  515. }
  516. /*
  517. * Demotion?
  518. * ---------
  519. * Track the number of shorts (time asleep is less than time threshold)
  520. * and demote when the usage threshold is reached.
  521. */
  522. if (cx->demotion.state) {
  523. if (sleep_ticks < cx->demotion.threshold.ticks) {
  524. cx->demotion.count++;
  525. cx->promotion.count = 0;
  526. if (cx->demotion.count >= cx->demotion.threshold.count) {
  527. next_state = cx->demotion.state;
  528. goto end;
  529. }
  530. }
  531. }
  532. end:
  533. /*
  534. * Demote if current state exceeds max_cstate
  535. * or if the latency of the current state is unacceptable
  536. */
  537. if ((pr->power.state - pr->power.states) > max_cstate ||
  538. pr->power.state->latency > system_latency_constraint()) {
  539. if (cx->demotion.state)
  540. next_state = cx->demotion.state;
  541. }
  542. /*
  543. * New Cx State?
  544. * -------------
  545. * If we're going to start using a new Cx state we must clean up
  546. * from the previous and prepare to use the new.
  547. */
  548. if (next_state != pr->power.state)
  549. acpi_processor_power_activate(pr, next_state);
  550. }
  551. static int acpi_processor_set_power_policy(struct acpi_processor *pr)
  552. {
  553. unsigned int i;
  554. unsigned int state_is_set = 0;
  555. struct acpi_processor_cx *lower = NULL;
  556. struct acpi_processor_cx *higher = NULL;
  557. struct acpi_processor_cx *cx;
  558. if (!pr)
  559. return -EINVAL;
  560. /*
  561. * This function sets the default Cx state policy (OS idle handler).
  562. * Our scheme is to promote quickly to C2 but more conservatively
  563. * to C3. We're favoring C2 for its characteristics of low latency
  564. * (quick response), good power savings, and ability to allow bus
  565. * mastering activity. Note that the Cx state policy is completely
  566. * customizable and can be altered dynamically.
  567. */
  568. /* startup state */
  569. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  570. cx = &pr->power.states[i];
  571. if (!cx->valid)
  572. continue;
  573. if (!state_is_set)
  574. pr->power.state = cx;
  575. state_is_set++;
  576. break;
  577. }
  578. if (!state_is_set)
  579. return -ENODEV;
  580. /* demotion */
  581. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  582. cx = &pr->power.states[i];
  583. if (!cx->valid)
  584. continue;
  585. if (lower) {
  586. cx->demotion.state = lower;
  587. cx->demotion.threshold.ticks = cx->latency_ticks;
  588. cx->demotion.threshold.count = 1;
  589. if (cx->type == ACPI_STATE_C3)
  590. cx->demotion.threshold.bm = bm_history;
  591. }
  592. lower = cx;
  593. }
  594. /* promotion */
  595. for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
  596. cx = &pr->power.states[i];
  597. if (!cx->valid)
  598. continue;
  599. if (higher) {
  600. cx->promotion.state = higher;
  601. cx->promotion.threshold.ticks = cx->latency_ticks;
  602. if (cx->type >= ACPI_STATE_C2)
  603. cx->promotion.threshold.count = 4;
  604. else
  605. cx->promotion.threshold.count = 10;
  606. if (higher->type == ACPI_STATE_C3)
  607. cx->promotion.threshold.bm = bm_history;
  608. }
  609. higher = cx;
  610. }
  611. return 0;
  612. }
  613. static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
  614. {
  615. if (!pr)
  616. return -EINVAL;
  617. if (!pr->pblk)
  618. return -ENODEV;
  619. /* if info is obtained from pblk/fadt, type equals state */
  620. pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
  621. pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
  622. #ifndef CONFIG_HOTPLUG_CPU
  623. /*
  624. * Check for P_LVL2_UP flag before entering C2 and above on
  625. * an SMP system.
  626. */
  627. if ((num_online_cpus() > 1) &&
  628. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  629. return -ENODEV;
  630. #endif
  631. /* determine C2 and C3 address from pblk */
  632. pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
  633. pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
  634. /* determine latencies from FADT */
  635. pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
  636. pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
  637. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  638. "lvl2[0x%08x] lvl3[0x%08x]\n",
  639. pr->power.states[ACPI_STATE_C2].address,
  640. pr->power.states[ACPI_STATE_C3].address));
  641. return 0;
  642. }
  643. static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
  644. {
  645. if (!pr->power.states[ACPI_STATE_C1].valid) {
  646. /* set the first C-State to C1 */
  647. /* all processors need to support C1 */
  648. pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
  649. pr->power.states[ACPI_STATE_C1].valid = 1;
  650. }
  651. /* the C0 state only exists as a filler in our array */
  652. pr->power.states[ACPI_STATE_C0].valid = 1;
  653. return 0;
  654. }
  655. static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
  656. {
  657. acpi_status status = 0;
  658. acpi_integer count;
  659. int current_count;
  660. int i;
  661. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  662. union acpi_object *cst;
  663. if (nocst)
  664. return -ENODEV;
  665. current_count = 0;
  666. status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
  667. if (ACPI_FAILURE(status)) {
  668. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
  669. return -ENODEV;
  670. }
  671. cst = buffer.pointer;
  672. /* There must be at least 2 elements */
  673. if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
  674. printk(KERN_ERR PREFIX "not enough elements in _CST\n");
  675. status = -EFAULT;
  676. goto end;
  677. }
  678. count = cst->package.elements[0].integer.value;
  679. /* Validate number of power states. */
  680. if (count < 1 || count != cst->package.count - 1) {
  681. printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
  682. status = -EFAULT;
  683. goto end;
  684. }
  685. /* Tell driver that at least _CST is supported. */
  686. pr->flags.has_cst = 1;
  687. for (i = 1; i <= count; i++) {
  688. union acpi_object *element;
  689. union acpi_object *obj;
  690. struct acpi_power_register *reg;
  691. struct acpi_processor_cx cx;
  692. memset(&cx, 0, sizeof(cx));
  693. element = &(cst->package.elements[i]);
  694. if (element->type != ACPI_TYPE_PACKAGE)
  695. continue;
  696. if (element->package.count != 4)
  697. continue;
  698. obj = &(element->package.elements[0]);
  699. if (obj->type != ACPI_TYPE_BUFFER)
  700. continue;
  701. reg = (struct acpi_power_register *)obj->buffer.pointer;
  702. if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
  703. (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
  704. continue;
  705. /* There should be an easy way to extract an integer... */
  706. obj = &(element->package.elements[1]);
  707. if (obj->type != ACPI_TYPE_INTEGER)
  708. continue;
  709. cx.type = obj->integer.value;
  710. /*
  711. * Some buggy BIOSes won't list C1 in _CST -
  712. * Let acpi_processor_get_power_info_default() handle them later
  713. */
  714. if (i == 1 && cx.type != ACPI_STATE_C1)
  715. current_count++;
  716. cx.address = reg->address;
  717. cx.index = current_count + 1;
  718. cx.space_id = ACPI_CSTATE_SYSTEMIO;
  719. if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
  720. if (acpi_processor_ffh_cstate_probe
  721. (pr->id, &cx, reg) == 0) {
  722. cx.space_id = ACPI_CSTATE_FFH;
  723. } else if (cx.type != ACPI_STATE_C1) {
  724. /*
  725. * C1 is a special case where FIXED_HARDWARE
  726. * can be handled in non-MWAIT way as well.
  727. * In that case, save this _CST entry info.
  728. * That is, we retain space_id of SYSTEM_IO for
  729. * halt based C1.
  730. * Otherwise, ignore this info and continue.
  731. */
  732. continue;
  733. }
  734. }
  735. obj = &(element->package.elements[2]);
  736. if (obj->type != ACPI_TYPE_INTEGER)
  737. continue;
  738. cx.latency = obj->integer.value;
  739. obj = &(element->package.elements[3]);
  740. if (obj->type != ACPI_TYPE_INTEGER)
  741. continue;
  742. cx.power = obj->integer.value;
  743. current_count++;
  744. memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
  745. /*
  746. * We support total ACPI_PROCESSOR_MAX_POWER - 1
  747. * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
  748. */
  749. if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
  750. printk(KERN_WARNING
  751. "Limiting number of power states to max (%d)\n",
  752. ACPI_PROCESSOR_MAX_POWER);
  753. printk(KERN_WARNING
  754. "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
  755. break;
  756. }
  757. }
  758. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
  759. current_count));
  760. /* Validate number of power states discovered */
  761. if (current_count < 2)
  762. status = -EFAULT;
  763. end:
  764. kfree(buffer.pointer);
  765. return status;
  766. }
  767. static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
  768. {
  769. if (!cx->address)
  770. return;
  771. /*
  772. * C2 latency must be less than or equal to 100
  773. * microseconds.
  774. */
  775. else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
  776. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  777. "latency too large [%d]\n", cx->latency));
  778. return;
  779. }
  780. /*
  781. * Otherwise we've met all of our C2 requirements.
  782. * Normalize the C2 latency to expidite policy
  783. */
  784. cx->valid = 1;
  785. cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
  786. return;
  787. }
  788. static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
  789. struct acpi_processor_cx *cx)
  790. {
  791. static int bm_check_flag;
  792. if (!cx->address)
  793. return;
  794. /*
  795. * C3 latency must be less than or equal to 1000
  796. * microseconds.
  797. */
  798. else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
  799. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  800. "latency too large [%d]\n", cx->latency));
  801. return;
  802. }
  803. /*
  804. * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
  805. * DMA transfers are used by any ISA device to avoid livelock.
  806. * Note that we could disable Type-F DMA (as recommended by
  807. * the erratum), but this is known to disrupt certain ISA
  808. * devices thus we take the conservative approach.
  809. */
  810. else if (errata.piix4.fdma) {
  811. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  812. "C3 not supported on PIIX4 with Type-F DMA\n"));
  813. return;
  814. }
  815. /* All the logic here assumes flags.bm_check is same across all CPUs */
  816. if (!bm_check_flag) {
  817. /* Determine whether bm_check is needed based on CPU */
  818. acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
  819. bm_check_flag = pr->flags.bm_check;
  820. } else {
  821. pr->flags.bm_check = bm_check_flag;
  822. }
  823. if (pr->flags.bm_check) {
  824. /* bus mastering control is necessary */
  825. if (!pr->flags.bm_control) {
  826. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  827. "C3 support requires bus mastering control\n"));
  828. return;
  829. }
  830. } else {
  831. /*
  832. * WBINVD should be set in fadt, for C3 state to be
  833. * supported on when bm_check is not required.
  834. */
  835. if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
  836. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  837. "Cache invalidation should work properly"
  838. " for C3 to be enabled on SMP systems\n"));
  839. return;
  840. }
  841. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
  842. }
  843. /*
  844. * Otherwise we've met all of our C3 requirements.
  845. * Normalize the C3 latency to expidite policy. Enable
  846. * checking of bus mastering status (bm_check) so we can
  847. * use this in our C3 policy
  848. */
  849. cx->valid = 1;
  850. cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
  851. return;
  852. }
  853. static int acpi_processor_power_verify(struct acpi_processor *pr)
  854. {
  855. unsigned int i;
  856. unsigned int working = 0;
  857. pr->power.timer_broadcast_on_state = INT_MAX;
  858. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  859. struct acpi_processor_cx *cx = &pr->power.states[i];
  860. switch (cx->type) {
  861. case ACPI_STATE_C1:
  862. cx->valid = 1;
  863. break;
  864. case ACPI_STATE_C2:
  865. acpi_processor_power_verify_c2(cx);
  866. if (cx->valid)
  867. acpi_timer_check_state(i, pr, cx);
  868. break;
  869. case ACPI_STATE_C3:
  870. acpi_processor_power_verify_c3(pr, cx);
  871. if (cx->valid)
  872. acpi_timer_check_state(i, pr, cx);
  873. break;
  874. }
  875. if (cx->valid)
  876. working++;
  877. }
  878. acpi_propagate_timer_broadcast(pr);
  879. return (working);
  880. }
  881. static int acpi_processor_get_power_info(struct acpi_processor *pr)
  882. {
  883. unsigned int i;
  884. int result;
  885. /* NOTE: the idle thread may not be running while calling
  886. * this function */
  887. /* Zero initialize all the C-states info. */
  888. memset(pr->power.states, 0, sizeof(pr->power.states));
  889. result = acpi_processor_get_power_info_cst(pr);
  890. if (result == -ENODEV)
  891. result = acpi_processor_get_power_info_fadt(pr);
  892. if (result)
  893. return result;
  894. acpi_processor_get_power_info_default(pr);
  895. pr->power.count = acpi_processor_power_verify(pr);
  896. /*
  897. * Set Default Policy
  898. * ------------------
  899. * Now that we know which states are supported, set the default
  900. * policy. Note that this policy can be changed dynamically
  901. * (e.g. encourage deeper sleeps to conserve battery life when
  902. * not on AC).
  903. */
  904. result = acpi_processor_set_power_policy(pr);
  905. if (result)
  906. return result;
  907. /*
  908. * if one state of type C2 or C3 is available, mark this
  909. * CPU as being "idle manageable"
  910. */
  911. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  912. if (pr->power.states[i].valid) {
  913. pr->power.count = i;
  914. if (pr->power.states[i].type >= ACPI_STATE_C2)
  915. pr->flags.power = 1;
  916. }
  917. }
  918. return 0;
  919. }
  920. int acpi_processor_cst_has_changed(struct acpi_processor *pr)
  921. {
  922. int result = 0;
  923. if (!pr)
  924. return -EINVAL;
  925. if (nocst) {
  926. return -ENODEV;
  927. }
  928. if (!pr->flags.power_setup_done)
  929. return -ENODEV;
  930. /* Fall back to the default idle loop */
  931. pm_idle = pm_idle_save;
  932. synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
  933. pr->flags.power = 0;
  934. result = acpi_processor_get_power_info(pr);
  935. if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
  936. pm_idle = acpi_processor_idle;
  937. return result;
  938. }
  939. /* proc interface */
  940. static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
  941. {
  942. struct acpi_processor *pr = seq->private;
  943. unsigned int i;
  944. if (!pr)
  945. goto end;
  946. seq_printf(seq, "active state: C%zd\n"
  947. "max_cstate: C%d\n"
  948. "bus master activity: %08x\n"
  949. "maximum allowed latency: %d usec\n",
  950. pr->power.state ? pr->power.state - pr->power.states : 0,
  951. max_cstate, (unsigned)pr->power.bm_activity,
  952. system_latency_constraint());
  953. seq_puts(seq, "states:\n");
  954. for (i = 1; i <= pr->power.count; i++) {
  955. seq_printf(seq, " %cC%d: ",
  956. (&pr->power.states[i] ==
  957. pr->power.state ? '*' : ' '), i);
  958. if (!pr->power.states[i].valid) {
  959. seq_puts(seq, "<not supported>\n");
  960. continue;
  961. }
  962. switch (pr->power.states[i].type) {
  963. case ACPI_STATE_C1:
  964. seq_printf(seq, "type[C1] ");
  965. break;
  966. case ACPI_STATE_C2:
  967. seq_printf(seq, "type[C2] ");
  968. break;
  969. case ACPI_STATE_C3:
  970. seq_printf(seq, "type[C3] ");
  971. break;
  972. default:
  973. seq_printf(seq, "type[--] ");
  974. break;
  975. }
  976. if (pr->power.states[i].promotion.state)
  977. seq_printf(seq, "promotion[C%zd] ",
  978. (pr->power.states[i].promotion.state -
  979. pr->power.states));
  980. else
  981. seq_puts(seq, "promotion[--] ");
  982. if (pr->power.states[i].demotion.state)
  983. seq_printf(seq, "demotion[C%zd] ",
  984. (pr->power.states[i].demotion.state -
  985. pr->power.states));
  986. else
  987. seq_puts(seq, "demotion[--] ");
  988. seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
  989. pr->power.states[i].latency,
  990. pr->power.states[i].usage,
  991. (unsigned long long)pr->power.states[i].time);
  992. }
  993. end:
  994. return 0;
  995. }
  996. static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
  997. {
  998. return single_open(file, acpi_processor_power_seq_show,
  999. PDE(inode)->data);
  1000. }
  1001. static const struct file_operations acpi_processor_power_fops = {
  1002. .open = acpi_processor_power_open_fs,
  1003. .read = seq_read,
  1004. .llseek = seq_lseek,
  1005. .release = single_release,
  1006. };
  1007. #ifdef CONFIG_SMP
  1008. static void smp_callback(void *v)
  1009. {
  1010. /* we already woke the CPU up, nothing more to do */
  1011. }
  1012. /*
  1013. * This function gets called when a part of the kernel has a new latency
  1014. * requirement. This means we need to get all processors out of their C-state,
  1015. * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
  1016. * wakes them all right up.
  1017. */
  1018. static int acpi_processor_latency_notify(struct notifier_block *b,
  1019. unsigned long l, void *v)
  1020. {
  1021. smp_call_function(smp_callback, NULL, 0, 1);
  1022. return NOTIFY_OK;
  1023. }
  1024. static struct notifier_block acpi_processor_latency_notifier = {
  1025. .notifier_call = acpi_processor_latency_notify,
  1026. };
  1027. #endif
  1028. int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
  1029. struct acpi_device *device)
  1030. {
  1031. acpi_status status = 0;
  1032. static int first_run;
  1033. struct proc_dir_entry *entry = NULL;
  1034. unsigned int i;
  1035. if (!first_run) {
  1036. dmi_check_system(processor_power_dmi_table);
  1037. if (max_cstate < ACPI_C_STATES_MAX)
  1038. printk(KERN_NOTICE
  1039. "ACPI: processor limited to max C-state %d\n",
  1040. max_cstate);
  1041. first_run++;
  1042. #ifdef CONFIG_SMP
  1043. register_latency_notifier(&acpi_processor_latency_notifier);
  1044. #endif
  1045. }
  1046. if (!pr)
  1047. return -EINVAL;
  1048. if (acpi_gbl_FADT.cst_control && !nocst) {
  1049. status =
  1050. acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
  1051. if (ACPI_FAILURE(status)) {
  1052. ACPI_EXCEPTION((AE_INFO, status,
  1053. "Notifying BIOS of _CST ability failed"));
  1054. }
  1055. }
  1056. acpi_processor_get_power_info(pr);
  1057. /*
  1058. * Install the idle handler if processor power management is supported.
  1059. * Note that we use previously set idle handler will be used on
  1060. * platforms that only support C1.
  1061. */
  1062. if ((pr->flags.power) && (!boot_option_idle_override)) {
  1063. printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
  1064. for (i = 1; i <= pr->power.count; i++)
  1065. if (pr->power.states[i].valid)
  1066. printk(" C%d[C%d]", i,
  1067. pr->power.states[i].type);
  1068. printk(")\n");
  1069. if (pr->id == 0) {
  1070. pm_idle_save = pm_idle;
  1071. pm_idle = acpi_processor_idle;
  1072. }
  1073. }
  1074. /* 'power' [R] */
  1075. entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  1076. S_IRUGO, acpi_device_dir(device));
  1077. if (!entry)
  1078. return -EIO;
  1079. else {
  1080. entry->proc_fops = &acpi_processor_power_fops;
  1081. entry->data = acpi_driver_data(device);
  1082. entry->owner = THIS_MODULE;
  1083. }
  1084. pr->flags.power_setup_done = 1;
  1085. return 0;
  1086. }
  1087. int acpi_processor_power_exit(struct acpi_processor *pr,
  1088. struct acpi_device *device)
  1089. {
  1090. pr->flags.power_setup_done = 0;
  1091. if (acpi_device_dir(device))
  1092. remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  1093. acpi_device_dir(device));
  1094. /* Unregister the idle handler when processor #0 is removed. */
  1095. if (pr->id == 0) {
  1096. pm_idle = pm_idle_save;
  1097. /*
  1098. * We are about to unload the current idle thread pm callback
  1099. * (pm_idle), Wait for all processors to update cached/local
  1100. * copies of pm_idle before proceeding.
  1101. */
  1102. cpu_idle_wait();
  1103. #ifdef CONFIG_SMP
  1104. unregister_latency_notifier(&acpi_processor_latency_notifier);
  1105. #endif
  1106. }
  1107. return 0;
  1108. }