tsc.c 5.0 KB

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  1. #include <linux/kernel.h>
  2. #include <linux/sched.h>
  3. #include <linux/interrupt.h>
  4. #include <linux/init.h>
  5. #include <linux/clocksource.h>
  6. #include <linux/time.h>
  7. #include <linux/acpi.h>
  8. #include <linux/cpufreq.h>
  9. #include <asm/timex.h>
  10. static int notsc __initdata = 0;
  11. unsigned int cpu_khz; /* TSC clocks / usec, not used here */
  12. EXPORT_SYMBOL(cpu_khz);
  13. unsigned int tsc_khz;
  14. EXPORT_SYMBOL(tsc_khz);
  15. static unsigned int cyc2ns_scale __read_mostly;
  16. void set_cyc2ns_scale(unsigned long khz)
  17. {
  18. cyc2ns_scale = (NSEC_PER_MSEC << NS_SCALE) / khz;
  19. }
  20. static unsigned long long cycles_2_ns(unsigned long long cyc)
  21. {
  22. return (cyc * cyc2ns_scale) >> NS_SCALE;
  23. }
  24. unsigned long long sched_clock(void)
  25. {
  26. unsigned long a = 0;
  27. /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
  28. * which means it is not completely exact and may not be monotonous
  29. * between CPUs. But the errors should be too small to matter for
  30. * scheduling purposes.
  31. */
  32. rdtscll(a);
  33. return cycles_2_ns(a);
  34. }
  35. static int tsc_unstable;
  36. static inline int check_tsc_unstable(void)
  37. {
  38. return tsc_unstable;
  39. }
  40. #ifdef CONFIG_CPU_FREQ
  41. /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
  42. * changes.
  43. *
  44. * RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
  45. * not that important because current Opteron setups do not support
  46. * scaling on SMP anyroads.
  47. *
  48. * Should fix up last_tsc too. Currently gettimeofday in the
  49. * first tick after the change will be slightly wrong.
  50. */
  51. #include <linux/workqueue.h>
  52. static unsigned int cpufreq_delayed_issched = 0;
  53. static unsigned int cpufreq_init = 0;
  54. static struct work_struct cpufreq_delayed_get_work;
  55. static void handle_cpufreq_delayed_get(struct work_struct *v)
  56. {
  57. unsigned int cpu;
  58. for_each_online_cpu(cpu) {
  59. cpufreq_get(cpu);
  60. }
  61. cpufreq_delayed_issched = 0;
  62. }
  63. static unsigned int ref_freq = 0;
  64. static unsigned long loops_per_jiffy_ref = 0;
  65. static unsigned long tsc_khz_ref = 0;
  66. static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
  67. void *data)
  68. {
  69. struct cpufreq_freqs *freq = data;
  70. unsigned long *lpj, dummy;
  71. if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC))
  72. return 0;
  73. lpj = &dummy;
  74. if (!(freq->flags & CPUFREQ_CONST_LOOPS))
  75. #ifdef CONFIG_SMP
  76. lpj = &cpu_data[freq->cpu].loops_per_jiffy;
  77. #else
  78. lpj = &boot_cpu_data.loops_per_jiffy;
  79. #endif
  80. if (!ref_freq) {
  81. ref_freq = freq->old;
  82. loops_per_jiffy_ref = *lpj;
  83. tsc_khz_ref = tsc_khz;
  84. }
  85. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  86. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
  87. (val == CPUFREQ_RESUMECHANGE)) {
  88. *lpj =
  89. cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
  90. tsc_khz = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
  91. if (!(freq->flags & CPUFREQ_CONST_LOOPS))
  92. mark_tsc_unstable("cpufreq changes");
  93. }
  94. set_cyc2ns_scale(tsc_khz_ref);
  95. return 0;
  96. }
  97. static struct notifier_block time_cpufreq_notifier_block = {
  98. .notifier_call = time_cpufreq_notifier
  99. };
  100. static int __init cpufreq_tsc(void)
  101. {
  102. INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get);
  103. if (!cpufreq_register_notifier(&time_cpufreq_notifier_block,
  104. CPUFREQ_TRANSITION_NOTIFIER))
  105. cpufreq_init = 1;
  106. return 0;
  107. }
  108. core_initcall(cpufreq_tsc);
  109. #endif
  110. static int tsc_unstable = 0;
  111. /*
  112. * Make an educated guess if the TSC is trustworthy and synchronized
  113. * over all CPUs.
  114. */
  115. __cpuinit int unsynchronized_tsc(void)
  116. {
  117. if (tsc_unstable)
  118. return 1;
  119. #ifdef CONFIG_SMP
  120. if (apic_is_clustered_box())
  121. return 1;
  122. #endif
  123. /* Most intel systems have synchronized TSCs except for
  124. multi node systems */
  125. if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
  126. #ifdef CONFIG_ACPI
  127. /* But TSC doesn't tick in C3 so don't use it there */
  128. if (acpi_gbl_FADT.header.length > 0 && acpi_gbl_FADT.C3latency < 1000)
  129. return 1;
  130. #endif
  131. return 0;
  132. }
  133. /* Assume multi socket systems are not synchronized */
  134. return num_present_cpus() > 1;
  135. }
  136. int __init notsc_setup(char *s)
  137. {
  138. notsc = 1;
  139. return 1;
  140. }
  141. __setup("notsc", notsc_setup);
  142. /* clock source code: */
  143. static cycle_t read_tsc(void)
  144. {
  145. cycle_t ret = (cycle_t)get_cycles_sync();
  146. return ret;
  147. }
  148. static cycle_t __vsyscall_fn vread_tsc(void)
  149. {
  150. cycle_t ret = (cycle_t)get_cycles_sync();
  151. return ret;
  152. }
  153. static struct clocksource clocksource_tsc = {
  154. .name = "tsc",
  155. .rating = 300,
  156. .read = read_tsc,
  157. .mask = CLOCKSOURCE_MASK(64),
  158. .shift = 22,
  159. .flags = CLOCK_SOURCE_IS_CONTINUOUS |
  160. CLOCK_SOURCE_MUST_VERIFY,
  161. .vread = vread_tsc,
  162. };
  163. void mark_tsc_unstable(char *reason)
  164. {
  165. if (!tsc_unstable) {
  166. tsc_unstable = 1;
  167. printk("Marking TSC unstable due to %s\n", reason);
  168. /* Change only the rating, when not registered */
  169. if (clocksource_tsc.mult)
  170. clocksource_change_rating(&clocksource_tsc, 0);
  171. else
  172. clocksource_tsc.rating = 0;
  173. }
  174. }
  175. EXPORT_SYMBOL_GPL(mark_tsc_unstable);
  176. void __init init_tsc_clocksource(void)
  177. {
  178. if (!notsc) {
  179. clocksource_tsc.mult = clocksource_khz2mult(tsc_khz,
  180. clocksource_tsc.shift);
  181. if (check_tsc_unstable())
  182. clocksource_tsc.rating = 0;
  183. clocksource_register(&clocksource_tsc);
  184. }
  185. }