time.c 16 KB

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  1. /* $Id: time.c,v 1.60 2002/01/23 14:33:55 davem Exp $
  2. * linux/arch/sparc/kernel/time.c
  3. *
  4. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5. * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
  6. *
  7. * Chris Davis (cdavis@cois.on.ca) 03/27/1998
  8. * Added support for the intersil on the sun4/4200
  9. *
  10. * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
  11. * Support for MicroSPARC-IIep, PCI CPU.
  12. *
  13. * This file handles the Sparc specific time handling details.
  14. *
  15. * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
  16. * "A Kernel Model for Precision Timekeeping" by Dave Mills
  17. */
  18. #include <linux/errno.h>
  19. #include <linux/module.h>
  20. #include <linux/sched.h>
  21. #include <linux/kernel.h>
  22. #include <linux/param.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/time.h>
  27. #include <linux/timex.h>
  28. #include <linux/init.h>
  29. #include <linux/pci.h>
  30. #include <linux/ioport.h>
  31. #include <linux/profile.h>
  32. #include <asm/oplib.h>
  33. #include <asm/timer.h>
  34. #include <asm/mostek.h>
  35. #include <asm/system.h>
  36. #include <asm/irq.h>
  37. #include <asm/io.h>
  38. #include <asm/idprom.h>
  39. #include <asm/machines.h>
  40. #include <asm/sun4paddr.h>
  41. #include <asm/page.h>
  42. #include <asm/pcic.h>
  43. #include <asm/of_device.h>
  44. #include <asm/irq_regs.h>
  45. DEFINE_SPINLOCK(rtc_lock);
  46. enum sparc_clock_type sp_clock_typ;
  47. DEFINE_SPINLOCK(mostek_lock);
  48. void __iomem *mstk48t02_regs = NULL;
  49. static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
  50. static int set_rtc_mmss(unsigned long);
  51. static int sbus_do_settimeofday(struct timespec *tv);
  52. #ifdef CONFIG_SUN4
  53. struct intersil *intersil_clock;
  54. #define intersil_cmd(intersil_reg, intsil_cmd) intersil_reg->int_cmd_reg = \
  55. (intsil_cmd)
  56. #define intersil_intr(intersil_reg, intsil_cmd) intersil_reg->int_intr_reg = \
  57. (intsil_cmd)
  58. #define intersil_start(intersil_reg) intersil_cmd(intersil_reg, \
  59. ( INTERSIL_START | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
  60. INTERSIL_INTR_ENABLE))
  61. #define intersil_stop(intersil_reg) intersil_cmd(intersil_reg, \
  62. ( INTERSIL_STOP | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
  63. INTERSIL_INTR_ENABLE))
  64. #define intersil_read_intr(intersil_reg, towhere) towhere = \
  65. intersil_reg->int_intr_reg
  66. #endif
  67. unsigned long profile_pc(struct pt_regs *regs)
  68. {
  69. extern char __copy_user_begin[], __copy_user_end[];
  70. extern char __atomic_begin[], __atomic_end[];
  71. extern char __bzero_begin[], __bzero_end[];
  72. unsigned long pc = regs->pc;
  73. if (in_lock_functions(pc) ||
  74. (pc >= (unsigned long) __copy_user_begin &&
  75. pc < (unsigned long) __copy_user_end) ||
  76. (pc >= (unsigned long) __atomic_begin &&
  77. pc < (unsigned long) __atomic_end) ||
  78. (pc >= (unsigned long) __bzero_begin &&
  79. pc < (unsigned long) __bzero_end))
  80. pc = regs->u_regs[UREG_RETPC];
  81. return pc;
  82. }
  83. EXPORT_SYMBOL(profile_pc);
  84. __volatile__ unsigned int *master_l10_counter;
  85. __volatile__ unsigned int *master_l10_limit;
  86. /*
  87. * timer_interrupt() needs to keep up the real-time clock,
  88. * as well as call the "do_timer()" routine every clocktick
  89. */
  90. #define TICK_SIZE (tick_nsec / 1000)
  91. irqreturn_t timer_interrupt(int irq, void *dev_id)
  92. {
  93. /* last time the cmos clock got updated */
  94. static long last_rtc_update;
  95. #ifndef CONFIG_SMP
  96. profile_tick(CPU_PROFILING);
  97. #endif
  98. /* Protect counter clear so that do_gettimeoffset works */
  99. write_seqlock(&xtime_lock);
  100. #ifdef CONFIG_SUN4
  101. if((idprom->id_machtype == (SM_SUN4 | SM_4_260)) ||
  102. (idprom->id_machtype == (SM_SUN4 | SM_4_110))) {
  103. int temp;
  104. intersil_read_intr(intersil_clock, temp);
  105. /* re-enable the irq */
  106. enable_pil_irq(10);
  107. }
  108. #endif
  109. clear_clock_irq();
  110. do_timer(1);
  111. #ifndef CONFIG_SMP
  112. update_process_times(user_mode(get_irq_regs()));
  113. #endif
  114. /* Determine when to update the Mostek clock. */
  115. if (ntp_synced() &&
  116. xtime.tv_sec > last_rtc_update + 660 &&
  117. (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
  118. (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
  119. if (set_rtc_mmss(xtime.tv_sec) == 0)
  120. last_rtc_update = xtime.tv_sec;
  121. else
  122. last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
  123. }
  124. write_sequnlock(&xtime_lock);
  125. return IRQ_HANDLED;
  126. }
  127. /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
  128. static void __init kick_start_clock(void)
  129. {
  130. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  131. unsigned char sec;
  132. int i, count;
  133. prom_printf("CLOCK: Clock was stopped. Kick start ");
  134. spin_lock_irq(&mostek_lock);
  135. /* Turn on the kick start bit to start the oscillator. */
  136. regs->creg |= MSTK_CREG_WRITE;
  137. regs->sec &= ~MSTK_STOP;
  138. regs->hour |= MSTK_KICK_START;
  139. regs->creg &= ~MSTK_CREG_WRITE;
  140. spin_unlock_irq(&mostek_lock);
  141. /* Delay to allow the clock oscillator to start. */
  142. sec = MSTK_REG_SEC(regs);
  143. for (i = 0; i < 3; i++) {
  144. while (sec == MSTK_REG_SEC(regs))
  145. for (count = 0; count < 100000; count++)
  146. /* nothing */ ;
  147. prom_printf(".");
  148. sec = regs->sec;
  149. }
  150. prom_printf("\n");
  151. spin_lock_irq(&mostek_lock);
  152. /* Turn off kick start and set a "valid" time and date. */
  153. regs->creg |= MSTK_CREG_WRITE;
  154. regs->hour &= ~MSTK_KICK_START;
  155. MSTK_SET_REG_SEC(regs,0);
  156. MSTK_SET_REG_MIN(regs,0);
  157. MSTK_SET_REG_HOUR(regs,0);
  158. MSTK_SET_REG_DOW(regs,5);
  159. MSTK_SET_REG_DOM(regs,1);
  160. MSTK_SET_REG_MONTH(regs,8);
  161. MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
  162. regs->creg &= ~MSTK_CREG_WRITE;
  163. spin_unlock_irq(&mostek_lock);
  164. /* Ensure the kick start bit is off. If it isn't, turn it off. */
  165. while (regs->hour & MSTK_KICK_START) {
  166. prom_printf("CLOCK: Kick start still on!\n");
  167. spin_lock_irq(&mostek_lock);
  168. regs->creg |= MSTK_CREG_WRITE;
  169. regs->hour &= ~MSTK_KICK_START;
  170. regs->creg &= ~MSTK_CREG_WRITE;
  171. spin_unlock_irq(&mostek_lock);
  172. }
  173. prom_printf("CLOCK: Kick start procedure successful.\n");
  174. }
  175. /* Return nonzero if the clock chip battery is low. */
  176. static __inline__ int has_low_battery(void)
  177. {
  178. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  179. unsigned char data1, data2;
  180. spin_lock_irq(&mostek_lock);
  181. data1 = regs->eeprom[0]; /* Read some data. */
  182. regs->eeprom[0] = ~data1; /* Write back the complement. */
  183. data2 = regs->eeprom[0]; /* Read back the complement. */
  184. regs->eeprom[0] = data1; /* Restore the original value. */
  185. spin_unlock_irq(&mostek_lock);
  186. return (data1 == data2); /* Was the write blocked? */
  187. }
  188. static void __init mostek_set_system_time(void)
  189. {
  190. unsigned int year, mon, day, hour, min, sec;
  191. struct mostek48t02 *mregs;
  192. mregs = (struct mostek48t02 *)mstk48t02_regs;
  193. if(!mregs) {
  194. prom_printf("Something wrong, clock regs not mapped yet.\n");
  195. prom_halt();
  196. }
  197. spin_lock_irq(&mostek_lock);
  198. mregs->creg |= MSTK_CREG_READ;
  199. sec = MSTK_REG_SEC(mregs);
  200. min = MSTK_REG_MIN(mregs);
  201. hour = MSTK_REG_HOUR(mregs);
  202. day = MSTK_REG_DOM(mregs);
  203. mon = MSTK_REG_MONTH(mregs);
  204. year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
  205. xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
  206. xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
  207. set_normalized_timespec(&wall_to_monotonic,
  208. -xtime.tv_sec, -xtime.tv_nsec);
  209. mregs->creg &= ~MSTK_CREG_READ;
  210. spin_unlock_irq(&mostek_lock);
  211. }
  212. /* Probe for the real time clock chip on Sun4 */
  213. static __inline__ void sun4_clock_probe(void)
  214. {
  215. #ifdef CONFIG_SUN4
  216. int temp;
  217. struct resource r;
  218. memset(&r, 0, sizeof(r));
  219. if( idprom->id_machtype == (SM_SUN4 | SM_4_330) ) {
  220. sp_clock_typ = MSTK48T02;
  221. r.start = sun4_clock_physaddr;
  222. mstk48t02_regs = sbus_ioremap(&r, 0,
  223. sizeof(struct mostek48t02), NULL);
  224. mstk48t08_regs = NULL; /* To catch weirdness */
  225. intersil_clock = NULL; /* just in case */
  226. /* Kick start the clock if it is completely stopped. */
  227. if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
  228. kick_start_clock();
  229. } else if( idprom->id_machtype == (SM_SUN4 | SM_4_260)) {
  230. /* intersil setup code */
  231. printk("Clock: INTERSIL at %8x ",sun4_clock_physaddr);
  232. sp_clock_typ = INTERSIL;
  233. r.start = sun4_clock_physaddr;
  234. intersil_clock = (struct intersil *)
  235. sbus_ioremap(&r, 0, sizeof(*intersil_clock), "intersil");
  236. mstk48t02_regs = 0; /* just be sure */
  237. mstk48t08_regs = NULL; /* ditto */
  238. /* initialise the clock */
  239. intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
  240. intersil_start(intersil_clock);
  241. intersil_read_intr(intersil_clock, temp);
  242. while (!(temp & 0x80))
  243. intersil_read_intr(intersil_clock, temp);
  244. intersil_read_intr(intersil_clock, temp);
  245. while (!(temp & 0x80))
  246. intersil_read_intr(intersil_clock, temp);
  247. intersil_stop(intersil_clock);
  248. }
  249. #endif
  250. }
  251. #ifndef CONFIG_SUN4
  252. static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
  253. {
  254. struct device_node *dp = op->node;
  255. const char *model = of_get_property(dp, "model", NULL);
  256. if (!model)
  257. return -ENODEV;
  258. if (!strcmp(model, "mk48t02")) {
  259. sp_clock_typ = MSTK48T02;
  260. /* Map the clock register io area read-only */
  261. mstk48t02_regs = of_ioremap(&op->resource[0], 0,
  262. sizeof(struct mostek48t02),
  263. "mk48t02");
  264. mstk48t08_regs = NULL; /* To catch weirdness */
  265. } else if (!strcmp(model, "mk48t08")) {
  266. sp_clock_typ = MSTK48T08;
  267. mstk48t08_regs = of_ioremap(&op->resource[0], 0,
  268. sizeof(struct mostek48t08),
  269. "mk48t08");
  270. mstk48t02_regs = &mstk48t08_regs->regs;
  271. } else
  272. return -ENODEV;
  273. /* Report a low battery voltage condition. */
  274. if (has_low_battery())
  275. printk(KERN_CRIT "NVRAM: Low battery voltage!\n");
  276. /* Kick start the clock if it is completely stopped. */
  277. if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
  278. kick_start_clock();
  279. mostek_set_system_time();
  280. return 0;
  281. }
  282. static struct of_device_id clock_match[] = {
  283. {
  284. .name = "eeprom",
  285. },
  286. {},
  287. };
  288. static struct of_platform_driver clock_driver = {
  289. .name = "clock",
  290. .match_table = clock_match,
  291. .probe = clock_probe,
  292. };
  293. /* Probe for the mostek real time clock chip. */
  294. static int __init clock_init(void)
  295. {
  296. return of_register_driver(&clock_driver, &of_bus_type);
  297. }
  298. /* Must be after subsys_initcall() so that busses are probed. Must
  299. * be before device_initcall() because things like the RTC driver
  300. * need to see the clock registers.
  301. */
  302. fs_initcall(clock_init);
  303. #endif /* !CONFIG_SUN4 */
  304. void __init sbus_time_init(void)
  305. {
  306. BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
  307. btfixup();
  308. if (ARCH_SUN4)
  309. sun4_clock_probe();
  310. sparc_init_timers(timer_interrupt);
  311. #ifdef CONFIG_SUN4
  312. if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) {
  313. mostek_set_system_time();
  314. } else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) {
  315. /* initialise the intersil on sun4 */
  316. unsigned int year, mon, day, hour, min, sec;
  317. int temp;
  318. struct intersil *iregs;
  319. iregs=intersil_clock;
  320. if(!iregs) {
  321. prom_printf("Something wrong, clock regs not mapped yet.\n");
  322. prom_halt();
  323. }
  324. intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
  325. disable_pil_irq(10);
  326. intersil_stop(iregs);
  327. intersil_read_intr(intersil_clock, temp);
  328. temp = iregs->clk.int_csec;
  329. sec = iregs->clk.int_sec;
  330. min = iregs->clk.int_min;
  331. hour = iregs->clk.int_hour;
  332. day = iregs->clk.int_day;
  333. mon = iregs->clk.int_month;
  334. year = MSTK_CVT_YEAR(iregs->clk.int_year);
  335. enable_pil_irq(10);
  336. intersil_start(iregs);
  337. xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
  338. xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
  339. set_normalized_timespec(&wall_to_monotonic,
  340. -xtime.tv_sec, -xtime.tv_nsec);
  341. printk("%u/%u/%u %u:%u:%u\n",day,mon,year,hour,min,sec);
  342. }
  343. #endif
  344. /* Now that OBP ticker has been silenced, it is safe to enable IRQ. */
  345. local_irq_enable();
  346. }
  347. void __init time_init(void)
  348. {
  349. #ifdef CONFIG_PCI
  350. extern void pci_time_init(void);
  351. if (pcic_present()) {
  352. pci_time_init();
  353. return;
  354. }
  355. #endif
  356. sbus_time_init();
  357. }
  358. static inline unsigned long do_gettimeoffset(void)
  359. {
  360. return (*master_l10_counter >> 10) & 0x1fffff;
  361. }
  362. /* Ok, my cute asm atomicity trick doesn't work anymore.
  363. * There are just too many variables that need to be protected
  364. * now (both members of xtime, et al.)
  365. */
  366. void do_gettimeofday(struct timeval *tv)
  367. {
  368. unsigned long flags;
  369. unsigned long seq;
  370. unsigned long usec, sec;
  371. unsigned long max_ntp_tick = tick_usec - tickadj;
  372. do {
  373. seq = read_seqbegin_irqsave(&xtime_lock, flags);
  374. usec = do_gettimeoffset();
  375. /*
  376. * If time_adjust is negative then NTP is slowing the clock
  377. * so make sure not to go into next possible interval.
  378. * Better to lose some accuracy than have time go backwards..
  379. */
  380. if (unlikely(time_adjust < 0))
  381. usec = min(usec, max_ntp_tick);
  382. sec = xtime.tv_sec;
  383. usec += (xtime.tv_nsec / 1000);
  384. } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
  385. while (usec >= 1000000) {
  386. usec -= 1000000;
  387. sec++;
  388. }
  389. tv->tv_sec = sec;
  390. tv->tv_usec = usec;
  391. }
  392. EXPORT_SYMBOL(do_gettimeofday);
  393. int do_settimeofday(struct timespec *tv)
  394. {
  395. int ret;
  396. write_seqlock_irq(&xtime_lock);
  397. ret = bus_do_settimeofday(tv);
  398. write_sequnlock_irq(&xtime_lock);
  399. clock_was_set();
  400. return ret;
  401. }
  402. EXPORT_SYMBOL(do_settimeofday);
  403. static int sbus_do_settimeofday(struct timespec *tv)
  404. {
  405. time_t wtm_sec, sec = tv->tv_sec;
  406. long wtm_nsec, nsec = tv->tv_nsec;
  407. if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
  408. return -EINVAL;
  409. /*
  410. * This is revolting. We need to set "xtime" correctly. However, the
  411. * value in this location is the value at the most recent update of
  412. * wall time. Discover what correction gettimeofday() would have
  413. * made, and then undo it!
  414. */
  415. nsec -= 1000 * do_gettimeoffset();
  416. wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
  417. wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
  418. set_normalized_timespec(&xtime, sec, nsec);
  419. set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
  420. ntp_clear();
  421. return 0;
  422. }
  423. /*
  424. * BUG: This routine does not handle hour overflow properly; it just
  425. * sets the minutes. Usually you won't notice until after reboot!
  426. */
  427. static int set_rtc_mmss(unsigned long nowtime)
  428. {
  429. int real_seconds, real_minutes, mostek_minutes;
  430. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  431. unsigned long flags;
  432. #ifdef CONFIG_SUN4
  433. struct intersil *iregs = intersil_clock;
  434. int temp;
  435. #endif
  436. /* Not having a register set can lead to trouble. */
  437. if (!regs) {
  438. #ifdef CONFIG_SUN4
  439. if(!iregs)
  440. return -1;
  441. else {
  442. temp = iregs->clk.int_csec;
  443. mostek_minutes = iregs->clk.int_min;
  444. real_seconds = nowtime % 60;
  445. real_minutes = nowtime / 60;
  446. if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
  447. real_minutes += 30; /* correct for half hour time zone */
  448. real_minutes %= 60;
  449. if (abs(real_minutes - mostek_minutes) < 30) {
  450. intersil_stop(iregs);
  451. iregs->clk.int_sec=real_seconds;
  452. iregs->clk.int_min=real_minutes;
  453. intersil_start(iregs);
  454. } else {
  455. printk(KERN_WARNING
  456. "set_rtc_mmss: can't update from %d to %d\n",
  457. mostek_minutes, real_minutes);
  458. return -1;
  459. }
  460. return 0;
  461. }
  462. #endif
  463. }
  464. spin_lock_irqsave(&mostek_lock, flags);
  465. /* Read the current RTC minutes. */
  466. regs->creg |= MSTK_CREG_READ;
  467. mostek_minutes = MSTK_REG_MIN(regs);
  468. regs->creg &= ~MSTK_CREG_READ;
  469. /*
  470. * since we're only adjusting minutes and seconds,
  471. * don't interfere with hour overflow. This avoids
  472. * messing with unknown time zones but requires your
  473. * RTC not to be off by more than 15 minutes
  474. */
  475. real_seconds = nowtime % 60;
  476. real_minutes = nowtime / 60;
  477. if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
  478. real_minutes += 30; /* correct for half hour time zone */
  479. real_minutes %= 60;
  480. if (abs(real_minutes - mostek_minutes) < 30) {
  481. regs->creg |= MSTK_CREG_WRITE;
  482. MSTK_SET_REG_SEC(regs,real_seconds);
  483. MSTK_SET_REG_MIN(regs,real_minutes);
  484. regs->creg &= ~MSTK_CREG_WRITE;
  485. spin_unlock_irqrestore(&mostek_lock, flags);
  486. return 0;
  487. } else {
  488. spin_unlock_irqrestore(&mostek_lock, flags);
  489. return -1;
  490. }
  491. }