smp.c 10.0 KB

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  1. /* smp.c: Sparc SMP support.
  2. *
  3. * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
  4. * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  5. * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org)
  6. */
  7. #include <asm/head.h>
  8. #include <linux/kernel.h>
  9. #include <linux/sched.h>
  10. #include <linux/threads.h>
  11. #include <linux/smp.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/init.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/mm.h>
  17. #include <linux/fs.h>
  18. #include <linux/seq_file.h>
  19. #include <linux/cache.h>
  20. #include <linux/delay.h>
  21. #include <asm/ptrace.h>
  22. #include <asm/atomic.h>
  23. #include <asm/irq.h>
  24. #include <asm/page.h>
  25. #include <asm/pgalloc.h>
  26. #include <asm/pgtable.h>
  27. #include <asm/oplib.h>
  28. #include <asm/cacheflush.h>
  29. #include <asm/tlbflush.h>
  30. #include <asm/cpudata.h>
  31. int smp_num_cpus = 1;
  32. volatile unsigned long cpu_callin_map[NR_CPUS] __initdata = {0,};
  33. unsigned char boot_cpu_id = 0;
  34. unsigned char boot_cpu_id4 = 0; /* boot_cpu_id << 2 */
  35. int smp_activated = 0;
  36. volatile int __cpu_number_map[NR_CPUS];
  37. volatile int __cpu_logical_map[NR_CPUS];
  38. cpumask_t cpu_online_map = CPU_MASK_NONE;
  39. cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
  40. cpumask_t smp_commenced_mask = CPU_MASK_NONE;
  41. /* The only guaranteed locking primitive available on all Sparc
  42. * processors is 'ldstub [%reg + immediate], %dest_reg' which atomically
  43. * places the current byte at the effective address into dest_reg and
  44. * places 0xff there afterwards. Pretty lame locking primitive
  45. * compared to the Alpha and the Intel no? Most Sparcs have 'swap'
  46. * instruction which is much better...
  47. */
  48. /* Used to make bitops atomic */
  49. unsigned char bitops_spinlock = 0;
  50. void __cpuinit smp_store_cpu_info(int id)
  51. {
  52. int cpu_node;
  53. cpu_data(id).udelay_val = loops_per_jiffy;
  54. cpu_find_by_mid(id, &cpu_node);
  55. cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
  56. "clock-frequency", 0);
  57. cpu_data(id).prom_node = cpu_node;
  58. cpu_data(id).mid = cpu_get_hwmid(cpu_node);
  59. /* this is required to tune the scheduler correctly */
  60. /* is it possible to have CPUs with different cache sizes? */
  61. if (id == boot_cpu_id) {
  62. int cache_line,cache_nlines;
  63. cache_line = 0x20;
  64. cache_line = prom_getintdefault(cpu_node, "ecache-line-size", cache_line);
  65. cache_nlines = 0x8000;
  66. cache_nlines = prom_getintdefault(cpu_node, "ecache-nlines", cache_nlines);
  67. max_cache_size = cache_line * cache_nlines;
  68. }
  69. if (cpu_data(id).mid < 0)
  70. panic("No MID found for CPU%d at node 0x%08d", id, cpu_node);
  71. }
  72. void __init smp_cpus_done(unsigned int max_cpus)
  73. {
  74. extern void smp4m_smp_done(void);
  75. extern void smp4d_smp_done(void);
  76. unsigned long bogosum = 0;
  77. int cpu, num;
  78. for (cpu = 0, num = 0; cpu < NR_CPUS; cpu++)
  79. if (cpu_online(cpu)) {
  80. num++;
  81. bogosum += cpu_data(cpu).udelay_val;
  82. }
  83. printk("Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
  84. num, bogosum/(500000/HZ),
  85. (bogosum/(5000/HZ))%100);
  86. switch(sparc_cpu_model) {
  87. case sun4:
  88. printk("SUN4\n");
  89. BUG();
  90. break;
  91. case sun4c:
  92. printk("SUN4C\n");
  93. BUG();
  94. break;
  95. case sun4m:
  96. smp4m_smp_done();
  97. break;
  98. case sun4d:
  99. smp4d_smp_done();
  100. break;
  101. case sun4e:
  102. printk("SUN4E\n");
  103. BUG();
  104. break;
  105. case sun4u:
  106. printk("SUN4U\n");
  107. BUG();
  108. break;
  109. default:
  110. printk("UNKNOWN!\n");
  111. BUG();
  112. break;
  113. };
  114. }
  115. void cpu_panic(void)
  116. {
  117. printk("CPU[%d]: Returns from cpu_idle!\n", smp_processor_id());
  118. panic("SMP bolixed\n");
  119. }
  120. struct linux_prom_registers smp_penguin_ctable __initdata = { 0 };
  121. void smp_send_reschedule(int cpu)
  122. {
  123. /* See sparc64 */
  124. }
  125. void smp_send_stop(void)
  126. {
  127. }
  128. void smp_flush_cache_all(void)
  129. {
  130. xc0((smpfunc_t) BTFIXUP_CALL(local_flush_cache_all));
  131. local_flush_cache_all();
  132. }
  133. void smp_flush_tlb_all(void)
  134. {
  135. xc0((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_all));
  136. local_flush_tlb_all();
  137. }
  138. void smp_flush_cache_mm(struct mm_struct *mm)
  139. {
  140. if(mm->context != NO_CONTEXT) {
  141. cpumask_t cpu_mask = mm->cpu_vm_mask;
  142. cpu_clear(smp_processor_id(), cpu_mask);
  143. if (!cpus_empty(cpu_mask))
  144. xc1((smpfunc_t) BTFIXUP_CALL(local_flush_cache_mm), (unsigned long) mm);
  145. local_flush_cache_mm(mm);
  146. }
  147. }
  148. void smp_flush_tlb_mm(struct mm_struct *mm)
  149. {
  150. if(mm->context != NO_CONTEXT) {
  151. cpumask_t cpu_mask = mm->cpu_vm_mask;
  152. cpu_clear(smp_processor_id(), cpu_mask);
  153. if (!cpus_empty(cpu_mask)) {
  154. xc1((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_mm), (unsigned long) mm);
  155. if(atomic_read(&mm->mm_users) == 1 && current->active_mm == mm)
  156. mm->cpu_vm_mask = cpumask_of_cpu(smp_processor_id());
  157. }
  158. local_flush_tlb_mm(mm);
  159. }
  160. }
  161. void smp_flush_cache_range(struct vm_area_struct *vma, unsigned long start,
  162. unsigned long end)
  163. {
  164. struct mm_struct *mm = vma->vm_mm;
  165. if (mm->context != NO_CONTEXT) {
  166. cpumask_t cpu_mask = mm->cpu_vm_mask;
  167. cpu_clear(smp_processor_id(), cpu_mask);
  168. if (!cpus_empty(cpu_mask))
  169. xc3((smpfunc_t) BTFIXUP_CALL(local_flush_cache_range), (unsigned long) vma, start, end);
  170. local_flush_cache_range(vma, start, end);
  171. }
  172. }
  173. void smp_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
  174. unsigned long end)
  175. {
  176. struct mm_struct *mm = vma->vm_mm;
  177. if (mm->context != NO_CONTEXT) {
  178. cpumask_t cpu_mask = mm->cpu_vm_mask;
  179. cpu_clear(smp_processor_id(), cpu_mask);
  180. if (!cpus_empty(cpu_mask))
  181. xc3((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_range), (unsigned long) vma, start, end);
  182. local_flush_tlb_range(vma, start, end);
  183. }
  184. }
  185. void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page)
  186. {
  187. struct mm_struct *mm = vma->vm_mm;
  188. if(mm->context != NO_CONTEXT) {
  189. cpumask_t cpu_mask = mm->cpu_vm_mask;
  190. cpu_clear(smp_processor_id(), cpu_mask);
  191. if (!cpus_empty(cpu_mask))
  192. xc2((smpfunc_t) BTFIXUP_CALL(local_flush_cache_page), (unsigned long) vma, page);
  193. local_flush_cache_page(vma, page);
  194. }
  195. }
  196. void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
  197. {
  198. struct mm_struct *mm = vma->vm_mm;
  199. if(mm->context != NO_CONTEXT) {
  200. cpumask_t cpu_mask = mm->cpu_vm_mask;
  201. cpu_clear(smp_processor_id(), cpu_mask);
  202. if (!cpus_empty(cpu_mask))
  203. xc2((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_page), (unsigned long) vma, page);
  204. local_flush_tlb_page(vma, page);
  205. }
  206. }
  207. void smp_reschedule_irq(void)
  208. {
  209. set_need_resched();
  210. }
  211. void smp_flush_page_to_ram(unsigned long page)
  212. {
  213. /* Current theory is that those who call this are the one's
  214. * who have just dirtied their cache with the pages contents
  215. * in kernel space, therefore we only run this on local cpu.
  216. *
  217. * XXX This experiment failed, research further... -DaveM
  218. */
  219. #if 1
  220. xc1((smpfunc_t) BTFIXUP_CALL(local_flush_page_to_ram), page);
  221. #endif
  222. local_flush_page_to_ram(page);
  223. }
  224. void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr)
  225. {
  226. cpumask_t cpu_mask = mm->cpu_vm_mask;
  227. cpu_clear(smp_processor_id(), cpu_mask);
  228. if (!cpus_empty(cpu_mask))
  229. xc2((smpfunc_t) BTFIXUP_CALL(local_flush_sig_insns), (unsigned long) mm, insn_addr);
  230. local_flush_sig_insns(mm, insn_addr);
  231. }
  232. extern unsigned int lvl14_resolution;
  233. /* /proc/profile writes can call this, don't __init it please. */
  234. static DEFINE_SPINLOCK(prof_setup_lock);
  235. int setup_profiling_timer(unsigned int multiplier)
  236. {
  237. int i;
  238. unsigned long flags;
  239. /* Prevent level14 ticker IRQ flooding. */
  240. if((!multiplier) || (lvl14_resolution / multiplier) < 500)
  241. return -EINVAL;
  242. spin_lock_irqsave(&prof_setup_lock, flags);
  243. for_each_possible_cpu(i) {
  244. load_profile_irq(i, lvl14_resolution / multiplier);
  245. prof_multiplier(i) = multiplier;
  246. }
  247. spin_unlock_irqrestore(&prof_setup_lock, flags);
  248. return 0;
  249. }
  250. void __init smp_prepare_cpus(unsigned int max_cpus)
  251. {
  252. extern void __init smp4m_boot_cpus(void);
  253. extern void __init smp4d_boot_cpus(void);
  254. int i, cpuid, extra;
  255. printk("Entering SMP Mode...\n");
  256. extra = 0;
  257. for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) {
  258. if (cpuid >= NR_CPUS)
  259. extra++;
  260. }
  261. /* i = number of cpus */
  262. if (extra && max_cpus > i - extra)
  263. printk("Warning: NR_CPUS is too low to start all cpus\n");
  264. smp_store_cpu_info(boot_cpu_id);
  265. switch(sparc_cpu_model) {
  266. case sun4:
  267. printk("SUN4\n");
  268. BUG();
  269. break;
  270. case sun4c:
  271. printk("SUN4C\n");
  272. BUG();
  273. break;
  274. case sun4m:
  275. smp4m_boot_cpus();
  276. break;
  277. case sun4d:
  278. smp4d_boot_cpus();
  279. break;
  280. case sun4e:
  281. printk("SUN4E\n");
  282. BUG();
  283. break;
  284. case sun4u:
  285. printk("SUN4U\n");
  286. BUG();
  287. break;
  288. default:
  289. printk("UNKNOWN!\n");
  290. BUG();
  291. break;
  292. };
  293. }
  294. /* Set this up early so that things like the scheduler can init
  295. * properly. We use the same cpu mask for both the present and
  296. * possible cpu map.
  297. */
  298. void __init smp_setup_cpu_possible_map(void)
  299. {
  300. int instance, mid;
  301. instance = 0;
  302. while (!cpu_find_by_instance(instance, NULL, &mid)) {
  303. if (mid < NR_CPUS) {
  304. cpu_set(mid, phys_cpu_present_map);
  305. cpu_set(mid, cpu_present_map);
  306. }
  307. instance++;
  308. }
  309. }
  310. void __init smp_prepare_boot_cpu(void)
  311. {
  312. int cpuid = hard_smp_processor_id();
  313. if (cpuid >= NR_CPUS) {
  314. prom_printf("Serious problem, boot cpu id >= NR_CPUS\n");
  315. prom_halt();
  316. }
  317. if (cpuid != 0)
  318. printk("boot cpu id != 0, this could work but is untested\n");
  319. current_thread_info()->cpu = cpuid;
  320. cpu_set(cpuid, cpu_online_map);
  321. cpu_set(cpuid, phys_cpu_present_map);
  322. }
  323. int __cpuinit __cpu_up(unsigned int cpu)
  324. {
  325. extern int __cpuinit smp4m_boot_one_cpu(int);
  326. extern int __cpuinit smp4d_boot_one_cpu(int);
  327. int ret=0;
  328. switch(sparc_cpu_model) {
  329. case sun4:
  330. printk("SUN4\n");
  331. BUG();
  332. break;
  333. case sun4c:
  334. printk("SUN4C\n");
  335. BUG();
  336. break;
  337. case sun4m:
  338. ret = smp4m_boot_one_cpu(cpu);
  339. break;
  340. case sun4d:
  341. ret = smp4d_boot_one_cpu(cpu);
  342. break;
  343. case sun4e:
  344. printk("SUN4E\n");
  345. BUG();
  346. break;
  347. case sun4u:
  348. printk("SUN4U\n");
  349. BUG();
  350. break;
  351. default:
  352. printk("UNKNOWN!\n");
  353. BUG();
  354. break;
  355. };
  356. if (!ret) {
  357. cpu_set(cpu, smp_commenced_mask);
  358. while (!cpu_online(cpu))
  359. mb();
  360. }
  361. return ret;
  362. }
  363. void smp_bogo(struct seq_file *m)
  364. {
  365. int i;
  366. for_each_online_cpu(i) {
  367. seq_printf(m,
  368. "Cpu%dBogo\t: %lu.%02lu\n",
  369. i,
  370. cpu_data(i).udelay_val/(500000/HZ),
  371. (cpu_data(i).udelay_val/(5000/HZ))%100);
  372. }
  373. }
  374. void smp_info(struct seq_file *m)
  375. {
  376. int i;
  377. seq_printf(m, "State:\n");
  378. for_each_online_cpu(i)
  379. seq_printf(m, "CPU%d\t\t: online\n", i);
  380. }