setup-sh7760.c 4.3 KB

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  1. /*
  2. * SH7760 Setup
  3. *
  4. * Copyright (C) 2006 Paul Mundt
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/platform_device.h>
  11. #include <linux/init.h>
  12. #include <linux/serial.h>
  13. #include <asm/sci.h>
  14. static struct plat_sci_port sci_platform_data[] = {
  15. {
  16. .mapbase = 0xfe600000,
  17. .flags = UPF_BOOT_AUTOCONF,
  18. .type = PORT_SCIF,
  19. .irqs = { 52, 53, 55, 54 },
  20. }, {
  21. .mapbase = 0xfe610000,
  22. .flags = UPF_BOOT_AUTOCONF,
  23. .type = PORT_SCIF,
  24. .irqs = { 72, 73, 75, 74 },
  25. }, {
  26. .mapbase = 0xfe620000,
  27. .flags = UPF_BOOT_AUTOCONF,
  28. .type = PORT_SCIF,
  29. .irqs = { 76, 77, 79, 78 },
  30. }, {
  31. .flags = 0,
  32. }
  33. };
  34. static struct platform_device sci_device = {
  35. .name = "sh-sci",
  36. .id = -1,
  37. .dev = {
  38. .platform_data = sci_platform_data,
  39. },
  40. };
  41. static struct platform_device *sh7760_devices[] __initdata = {
  42. &sci_device,
  43. };
  44. static int __init sh7760_devices_setup(void)
  45. {
  46. return platform_add_devices(sh7760_devices,
  47. ARRAY_SIZE(sh7760_devices));
  48. }
  49. __initcall(sh7760_devices_setup);
  50. static struct intc2_data intc2_irq_table[] = {
  51. {48, 0, 28, 0, 31, 3}, /* IRQ 4 */
  52. {49, 0, 24, 0, 30, 3}, /* IRQ 3 */
  53. {50, 0, 20, 0, 29, 3}, /* IRQ 2 */
  54. {51, 0, 16, 0, 28, 3}, /* IRQ 1 */
  55. {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */
  56. {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */
  57. {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */
  58. {59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */
  59. {60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */
  60. {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
  61. {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
  62. {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
  63. {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
  64. {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
  65. {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
  66. {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
  67. {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
  68. {65, 8, 24, 0, 16, 3}, /* LCDC */
  69. {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
  70. {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
  71. {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
  72. {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
  73. {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
  74. {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
  75. {75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */
  76. {76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */
  77. {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
  78. {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
  79. {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
  80. {80, 8, 4, 4, 23, 3}, /* SIM_ERI */
  81. {81, 8, 4, 4, 22, 3}, /* SIM_RXI */
  82. {82, 8, 4, 4, 21, 3}, /* SIM_TXI */
  83. {83, 8, 4, 4, 20, 3}, /* SIM_TEI */
  84. {84, 8, 0, 4, 19, 3}, /* HSPII */
  85. {88, 12, 20, 4, 18, 3}, /* MMCI0 */
  86. {89, 12, 20, 4, 17, 3}, /* MMCI1 */
  87. {90, 12, 20, 4, 16, 3}, /* MMCI2 */
  88. {91, 12, 20, 4, 15, 3}, /* MMCI3 */
  89. {92, 12, 12, 4, 6, 3}, /* MFI */
  90. {108,12, 4, 4, 1, 3}, /* ADC */
  91. {109,12, 0, 4, 0, 3}, /* CMTI */
  92. };
  93. static struct ipr_data sh7760_ipr_map[] = {
  94. /* IRQ, IPR-idx, shift, priority */
  95. { 16, 0, 12, 2 }, /* TMU0 TUNI*/
  96. { 17, 0, 8, 2 }, /* TMU1 TUNI */
  97. { 18, 0, 4, 2 }, /* TMU2 TUNI */
  98. { 19, 0, 4, 2 }, /* TMU2 TIPCI */
  99. { 27, 1, 12, 2 }, /* WDT ITI */
  100. { 28, 1, 8, 2 }, /* REF RCMI */
  101. { 29, 1, 8, 2 }, /* REF ROVI */
  102. { 32, 2, 0, 7 }, /* HUDI */
  103. { 33, 2, 12, 7 }, /* GPIOI */
  104. { 34, 2, 8, 7 }, /* DMAC DMTE0 */
  105. { 35, 2, 8, 7 }, /* DMAC DMTE1 */
  106. { 36, 2, 8, 7 }, /* DMAC DMTE2 */
  107. { 37, 2, 8, 7 }, /* DMAC DMTE3 */
  108. { 38, 2, 8, 7 }, /* DMAC DMAE */
  109. { 44, 2, 8, 7 }, /* DMAC DMTE4 */
  110. { 45, 2, 8, 7 }, /* DMAC DMTE5 */
  111. { 46, 2, 8, 7 }, /* DMAC DMTE6 */
  112. { 47, 2, 8, 7 }, /* DMAC DMTE7 */
  113. /* these here are only valid if INTC_ICR bit 7 is set to 1!
  114. * XXX: maybe CONFIG_SH_IRLMODE symbol? SH7751 could use it too */
  115. #if 0
  116. { 2, 3, 12, 3 }, /* IRL0 */
  117. { 5, 3, 8, 3 }, /* IRL1 */
  118. { 8, 3, 4, 3 }, /* IRL2 */
  119. { 11, 3, 0, 3 }, /* IRL3 */
  120. #endif
  121. };
  122. static unsigned long ipr_offsets[] = {
  123. 0xffd00004UL, /* 0: IPRA */
  124. 0xffd00008UL, /* 1: IPRB */
  125. 0xffd0000cUL, /* 2: IPRC */
  126. 0xffd00010UL, /* 3: IPRD */
  127. };
  128. /* given the IPR index return the address of the IPR register */
  129. unsigned int map_ipridx_to_addr(int idx)
  130. {
  131. if (idx >= ARRAY_SIZE(ipr_offsets))
  132. return 0;
  133. return ipr_offsets[idx];
  134. }
  135. void __init init_IRQ_intc2(void)
  136. {
  137. make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
  138. }
  139. void __init init_IRQ_ipr(void)
  140. {
  141. make_ipr_irq(sh7760_ipr_map, ARRAY_SIZE(sh7760_ipr_map));
  142. }