cf-enabler.c 4.0 KB

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  1. /* $Id: cf-enabler.c,v 1.4 2004/02/22 22:44:36 kkojima Exp $
  2. *
  3. * linux/drivers/block/cf-enabler.c
  4. *
  5. * Copyright (C) 1999 Niibe Yutaka
  6. * Copyright (C) 2000 Toshiharu Nozawa
  7. * Copyright (C) 2001 A&D Co., Ltd.
  8. *
  9. * Enable the CF configuration.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/mm.h>
  13. #include <linux/vmalloc.h>
  14. #include <asm/io.h>
  15. #include <asm/irq.h>
  16. /*
  17. * You can connect Compact Flash directly to the bus of SuperH.
  18. * This is the enabler for that.
  19. *
  20. * SIM: How generic is this really? It looks pretty board, or at
  21. * least SH sub-type, specific to me.
  22. * I know it doesn't work on the Overdrive!
  23. */
  24. /*
  25. * 0xB8000000 : Attribute
  26. * 0xB8001000 : Common Memory
  27. * 0xBA000000 : I/O
  28. */
  29. #if defined(CONFIG_CPU_SH4)
  30. /* SH4 can't access PCMCIA interface through P2 area.
  31. * we must remap it with appropreate attribute bit of the page set.
  32. * this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */
  33. #if defined(CONFIG_CF_AREA6)
  34. #define slot_no 0
  35. #else
  36. #define slot_no 1
  37. #endif
  38. /* use this pointer to access to directly connected compact flash io area*/
  39. void *cf_io_base;
  40. static int __init allocate_cf_area(void)
  41. {
  42. pgprot_t prot;
  43. unsigned long paddrbase, psize;
  44. /* open I/O area window */
  45. paddrbase = virt_to_phys((void*)CONFIG_CF_BASE_ADDR);
  46. psize = PAGE_SIZE;
  47. prot = PAGE_KERNEL_PCC(slot_no, _PAGE_PCC_IO16);
  48. cf_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
  49. if (!cf_io_base) {
  50. printk("allocate_cf_area : can't open CF I/O window!\n");
  51. return -ENOMEM;
  52. }
  53. /* printk("p3_ioremap(paddr=0x%08lx, psize=0x%08lx, prot=0x%08lx)=0x%08lx\n",
  54. paddrbase, psize, prot.pgprot, cf_io_base);*/
  55. /* XXX : do we need attribute and common-memory area also? */
  56. return 0;
  57. }
  58. #endif
  59. static int __init cf_init_default(void)
  60. {
  61. /* You must have enabled the card, and set the level interrupt
  62. * before reaching this point. Possibly in boot ROM or boot loader.
  63. */
  64. #if defined(CONFIG_CPU_SH4)
  65. allocate_cf_area();
  66. #endif
  67. #if defined(CONFIG_SH_UNKNOWN)
  68. /* This should be done in each board's init_xxx_irq. */
  69. make_imask_irq(14);
  70. disable_irq(14);
  71. #endif
  72. return 0;
  73. }
  74. #if defined(CONFIG_SH_SOLUTION_ENGINE)
  75. #include <asm/se.h>
  76. #elif defined(CONFIG_SH_7722_SOLUTION_ENGINE)
  77. #include <asm/se7722.h>
  78. #endif
  79. /*
  80. * SolutionEngine Seriese
  81. *
  82. * about MS770xSE
  83. * 0xB8400000 : Common Memory
  84. * 0xB8500000 : Attribute
  85. * 0xB8600000 : I/O
  86. *
  87. * about MS7722SE
  88. * 0xB0400000 : Common Memory
  89. * 0xB0500000 : Attribute
  90. * 0xB0600000 : I/O
  91. */
  92. #if defined(CONFIG_SH_SOLUTION_ENGINE) || defined(CONFIG_SH_7722_SOLUTION_ENGINE)
  93. static int __init cf_init_se(void)
  94. {
  95. if ((ctrl_inw(MRSHPC_CSR) & 0x000c) != 0)
  96. return 0; /* Not detected */
  97. if ((ctrl_inw(MRSHPC_CSR) & 0x0080) == 0) {
  98. ctrl_outw(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
  99. } else {
  100. ctrl_outw(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */
  101. }
  102. /*
  103. * PC-Card window open
  104. * flag == COMMON/ATTRIBUTE/IO
  105. */
  106. /* common window open */
  107. ctrl_outw(0x8a84, MRSHPC_MW0CR1);
  108. if((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
  109. /* common mode & bus width 16bit SWAP = 1*/
  110. ctrl_outw(0x0b00, MRSHPC_MW0CR2);
  111. else
  112. /* common mode & bus width 16bit SWAP = 0*/
  113. ctrl_outw(0x0300, MRSHPC_MW0CR2);
  114. /* attribute window open */
  115. ctrl_outw(0x8a85, MRSHPC_MW1CR1);
  116. if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
  117. /* attribute mode & bus width 16bit SWAP = 1*/
  118. ctrl_outw(0x0a00, MRSHPC_MW1CR2);
  119. else
  120. /* attribute mode & bus width 16bit SWAP = 0*/
  121. ctrl_outw(0x0200, MRSHPC_MW1CR2);
  122. /* I/O window open */
  123. ctrl_outw(0x8a86, MRSHPC_IOWCR1);
  124. ctrl_outw(0x0008, MRSHPC_CDCR); /* I/O card mode */
  125. if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
  126. ctrl_outw(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
  127. else
  128. ctrl_outw(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/
  129. ctrl_outw(0x2000, MRSHPC_ICR);
  130. ctrl_outb(0x00, PA_MRSHPC_MW2 + 0x206);
  131. ctrl_outb(0x42, PA_MRSHPC_MW2 + 0x200);
  132. return 0;
  133. }
  134. #endif
  135. int __init cf_init(void)
  136. {
  137. if( mach_is_se() || mach_is_7722se() ){
  138. return cf_init_se();
  139. }
  140. return cf_init_default();
  141. }
  142. __initcall (cf_init);