ops-se7780.c 2.6 KB

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  1. /*
  2. * linux/arch/sh/drivers/pci/ops-se7780.c
  3. *
  4. * Copyright (C) 2006 Nobuhiro Iwamatsu
  5. *
  6. * PCI initialization for the Hitachi UL Solution Engine 7780SE03
  7. *
  8. * May be copied or modified under the terms of the GNU General Public
  9. * License. See linux/COPYING for more information.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/types.h>
  13. #include <linux/init.h>
  14. #include <linux/delay.h>
  15. #include <linux/pci.h>
  16. #include <asm/se7780.h>
  17. #include <asm/io.h>
  18. #include "pci-sh4.h"
  19. /*
  20. * IDSEL = AD16 PCI slot
  21. * IDSEL = AD17 PCI slot
  22. * IDSEL = AD18 Serial ATA Controller (Silicon Image SiL3512A)
  23. * IDSEL = AD19 USB Host Controller (NEC uPD7210100A)
  24. */
  25. /* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
  26. static char se7780_irq_tab[4][16] __initdata = {
  27. /* INTA */
  28. { 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
  29. /* INTB */
  30. { 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
  31. /* INTC */
  32. { 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
  33. /* INTD */
  34. { 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
  35. };
  36. int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
  37. {
  38. return se7780_irq_tab[pin-1][slot];
  39. }
  40. static struct resource se7780_io_resource = {
  41. .name = "SH7780_IO",
  42. .start = 0x2000,
  43. .end = 0x2000 + SH7780_PCI_IO_SIZE - 1,
  44. .flags = IORESOURCE_IO
  45. };
  46. static struct resource se7780_mem_resource = {
  47. .name = "SH7780_mem",
  48. .start = SH7780_PCI_MEMORY_BASE,
  49. .end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
  50. .flags = IORESOURCE_MEM
  51. };
  52. extern struct pci_ops se7780_pci_ops;
  53. struct pci_channel board_pci_channels[] = {
  54. { &sh4_pci_ops, &se7780_io_resource, &se7780_mem_resource, 0, 0xff },
  55. { NULL, NULL, NULL, 0, 0 },
  56. };
  57. EXPORT_SYMBOL(board_pci_channels);
  58. static struct sh4_pci_address_map se7780_pci_map = {
  59. .window0 = {
  60. .base = SH7780_CS2_BASE_ADDR,
  61. .size = 0x04000000,
  62. },
  63. .flags = SH4_PCIC_NO_RESET,
  64. };
  65. int __init pcibios_init_platform(void)
  66. {
  67. printk("SH7780 PCI: Finished initialization of the PCI controller\n");
  68. /*
  69. * FPGA PCISEL register initialize
  70. *
  71. * CPU || SLOT1 | SLOT2 | S-ATA | USB
  72. * -------------------------------------
  73. * INTA || INTA | INTD | -- | INTB
  74. * -------------------------------------
  75. * INTB || INTB | INTA | -- | INTC
  76. * -------------------------------------
  77. * INTC || INTC | INTB | INTA | --
  78. * -------------------------------------
  79. * INTD || INTD | INTC | -- | INTA
  80. * -------------------------------------
  81. */
  82. ctrl_outw(0x0013, FPGA_PCI_INTSEL1);
  83. ctrl_outw(0xE402, FPGA_PCI_INTSEL2);
  84. return sh7780_pcic_init(&se7780_pci_map);
  85. }