fsl_soc.c 25 KB

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  1. /*
  2. * FSL SoC setup code
  3. *
  4. * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5. *
  6. * 2006 (c) MontaVista Software, Inc.
  7. * Vitaly Bordug <vbordug@ru.mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/errno.h>
  18. #include <linux/major.h>
  19. #include <linux/delay.h>
  20. #include <linux/irq.h>
  21. #include <linux/module.h>
  22. #include <linux/device.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/phy.h>
  25. #include <linux/fsl_devices.h>
  26. #include <linux/fs_enet_pd.h>
  27. #include <linux/fs_uart_pd.h>
  28. #include <asm/system.h>
  29. #include <asm/atomic.h>
  30. #include <asm/io.h>
  31. #include <asm/irq.h>
  32. #include <asm/time.h>
  33. #include <asm/prom.h>
  34. #include <sysdev/fsl_soc.h>
  35. #include <mm/mmu_decl.h>
  36. #include <asm/cpm2.h>
  37. extern void init_fcc_ioports(struct fs_platform_info*);
  38. extern void init_fec_ioports(struct fs_platform_info*);
  39. extern void init_smc_ioports(struct fs_uart_platform_info*);
  40. static phys_addr_t immrbase = -1;
  41. phys_addr_t get_immrbase(void)
  42. {
  43. struct device_node *soc;
  44. if (immrbase != -1)
  45. return immrbase;
  46. soc = of_find_node_by_type(NULL, "soc");
  47. if (soc) {
  48. unsigned int size;
  49. const void *prop = of_get_property(soc, "reg", &size);
  50. if (prop)
  51. immrbase = of_translate_address(soc, prop);
  52. of_node_put(soc);
  53. };
  54. return immrbase;
  55. }
  56. EXPORT_SYMBOL(get_immrbase);
  57. #if defined(CONFIG_CPM2) || defined(CONFIG_8xx)
  58. static u32 brgfreq = -1;
  59. u32 get_brgfreq(void)
  60. {
  61. struct device_node *node;
  62. if (brgfreq != -1)
  63. return brgfreq;
  64. node = of_find_node_by_type(NULL, "cpm");
  65. if (node) {
  66. unsigned int size;
  67. const unsigned int *prop = of_get_property(node,
  68. "brg-frequency", &size);
  69. if (prop)
  70. brgfreq = *prop;
  71. of_node_put(node);
  72. };
  73. return brgfreq;
  74. }
  75. EXPORT_SYMBOL(get_brgfreq);
  76. static u32 fs_baudrate = -1;
  77. u32 get_baudrate(void)
  78. {
  79. struct device_node *node;
  80. if (fs_baudrate != -1)
  81. return fs_baudrate;
  82. node = of_find_node_by_type(NULL, "serial");
  83. if (node) {
  84. unsigned int size;
  85. const unsigned int *prop = of_get_property(node,
  86. "current-speed", &size);
  87. if (prop)
  88. fs_baudrate = *prop;
  89. of_node_put(node);
  90. };
  91. return fs_baudrate;
  92. }
  93. EXPORT_SYMBOL(get_baudrate);
  94. #endif /* CONFIG_CPM2 */
  95. static int __init gfar_mdio_of_init(void)
  96. {
  97. struct device_node *np;
  98. unsigned int i;
  99. struct platform_device *mdio_dev;
  100. struct resource res;
  101. int ret;
  102. for (np = NULL, i = 0;
  103. (np = of_find_compatible_node(np, "mdio", "gianfar")) != NULL;
  104. i++) {
  105. int k;
  106. struct device_node *child = NULL;
  107. struct gianfar_mdio_data mdio_data;
  108. memset(&res, 0, sizeof(res));
  109. memset(&mdio_data, 0, sizeof(mdio_data));
  110. ret = of_address_to_resource(np, 0, &res);
  111. if (ret)
  112. goto err;
  113. mdio_dev =
  114. platform_device_register_simple("fsl-gianfar_mdio",
  115. res.start, &res, 1);
  116. if (IS_ERR(mdio_dev)) {
  117. ret = PTR_ERR(mdio_dev);
  118. goto err;
  119. }
  120. for (k = 0; k < 32; k++)
  121. mdio_data.irq[k] = PHY_POLL;
  122. while ((child = of_get_next_child(np, child)) != NULL) {
  123. int irq = irq_of_parse_and_map(child, 0);
  124. if (irq != NO_IRQ) {
  125. const u32 *id = of_get_property(child,
  126. "reg", NULL);
  127. mdio_data.irq[*id] = irq;
  128. }
  129. }
  130. ret =
  131. platform_device_add_data(mdio_dev, &mdio_data,
  132. sizeof(struct gianfar_mdio_data));
  133. if (ret)
  134. goto unreg;
  135. }
  136. return 0;
  137. unreg:
  138. platform_device_unregister(mdio_dev);
  139. err:
  140. return ret;
  141. }
  142. arch_initcall(gfar_mdio_of_init);
  143. static const char *gfar_tx_intr = "tx";
  144. static const char *gfar_rx_intr = "rx";
  145. static const char *gfar_err_intr = "error";
  146. static int __init gfar_of_init(void)
  147. {
  148. struct device_node *np;
  149. unsigned int i;
  150. struct platform_device *gfar_dev;
  151. struct resource res;
  152. int ret;
  153. for (np = NULL, i = 0;
  154. (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
  155. i++) {
  156. struct resource r[4];
  157. struct device_node *phy, *mdio;
  158. struct gianfar_platform_data gfar_data;
  159. const unsigned int *id;
  160. const char *model;
  161. const void *mac_addr;
  162. const phandle *ph;
  163. int n_res = 2;
  164. memset(r, 0, sizeof(r));
  165. memset(&gfar_data, 0, sizeof(gfar_data));
  166. ret = of_address_to_resource(np, 0, &r[0]);
  167. if (ret)
  168. goto err;
  169. of_irq_to_resource(np, 0, &r[1]);
  170. model = of_get_property(np, "model", NULL);
  171. /* If we aren't the FEC we have multiple interrupts */
  172. if (model && strcasecmp(model, "FEC")) {
  173. r[1].name = gfar_tx_intr;
  174. r[2].name = gfar_rx_intr;
  175. of_irq_to_resource(np, 1, &r[2]);
  176. r[3].name = gfar_err_intr;
  177. of_irq_to_resource(np, 2, &r[3]);
  178. n_res += 2;
  179. }
  180. gfar_dev =
  181. platform_device_register_simple("fsl-gianfar", i, &r[0],
  182. n_res);
  183. if (IS_ERR(gfar_dev)) {
  184. ret = PTR_ERR(gfar_dev);
  185. goto err;
  186. }
  187. mac_addr = of_get_mac_address(np);
  188. if (mac_addr)
  189. memcpy(gfar_data.mac_addr, mac_addr, 6);
  190. if (model && !strcasecmp(model, "TSEC"))
  191. gfar_data.device_flags =
  192. FSL_GIANFAR_DEV_HAS_GIGABIT |
  193. FSL_GIANFAR_DEV_HAS_COALESCE |
  194. FSL_GIANFAR_DEV_HAS_RMON |
  195. FSL_GIANFAR_DEV_HAS_MULTI_INTR;
  196. if (model && !strcasecmp(model, "eTSEC"))
  197. gfar_data.device_flags =
  198. FSL_GIANFAR_DEV_HAS_GIGABIT |
  199. FSL_GIANFAR_DEV_HAS_COALESCE |
  200. FSL_GIANFAR_DEV_HAS_RMON |
  201. FSL_GIANFAR_DEV_HAS_MULTI_INTR |
  202. FSL_GIANFAR_DEV_HAS_CSUM |
  203. FSL_GIANFAR_DEV_HAS_VLAN |
  204. FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
  205. ph = of_get_property(np, "phy-handle", NULL);
  206. phy = of_find_node_by_phandle(*ph);
  207. if (phy == NULL) {
  208. ret = -ENODEV;
  209. goto unreg;
  210. }
  211. mdio = of_get_parent(phy);
  212. id = of_get_property(phy, "reg", NULL);
  213. ret = of_address_to_resource(mdio, 0, &res);
  214. if (ret) {
  215. of_node_put(phy);
  216. of_node_put(mdio);
  217. goto unreg;
  218. }
  219. gfar_data.phy_id = *id;
  220. gfar_data.bus_id = res.start;
  221. of_node_put(phy);
  222. of_node_put(mdio);
  223. ret =
  224. platform_device_add_data(gfar_dev, &gfar_data,
  225. sizeof(struct
  226. gianfar_platform_data));
  227. if (ret)
  228. goto unreg;
  229. }
  230. return 0;
  231. unreg:
  232. platform_device_unregister(gfar_dev);
  233. err:
  234. return ret;
  235. }
  236. arch_initcall(gfar_of_init);
  237. static int __init fsl_i2c_of_init(void)
  238. {
  239. struct device_node *np;
  240. unsigned int i;
  241. struct platform_device *i2c_dev;
  242. int ret;
  243. for (np = NULL, i = 0;
  244. (np = of_find_compatible_node(np, "i2c", "fsl-i2c")) != NULL;
  245. i++) {
  246. struct resource r[2];
  247. struct fsl_i2c_platform_data i2c_data;
  248. const unsigned char *flags = NULL;
  249. memset(&r, 0, sizeof(r));
  250. memset(&i2c_data, 0, sizeof(i2c_data));
  251. ret = of_address_to_resource(np, 0, &r[0]);
  252. if (ret)
  253. goto err;
  254. of_irq_to_resource(np, 0, &r[1]);
  255. i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
  256. if (IS_ERR(i2c_dev)) {
  257. ret = PTR_ERR(i2c_dev);
  258. goto err;
  259. }
  260. i2c_data.device_flags = 0;
  261. flags = of_get_property(np, "dfsrr", NULL);
  262. if (flags)
  263. i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
  264. flags = of_get_property(np, "fsl5200-clocking", NULL);
  265. if (flags)
  266. i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
  267. ret =
  268. platform_device_add_data(i2c_dev, &i2c_data,
  269. sizeof(struct
  270. fsl_i2c_platform_data));
  271. if (ret)
  272. goto unreg;
  273. }
  274. return 0;
  275. unreg:
  276. platform_device_unregister(i2c_dev);
  277. err:
  278. return ret;
  279. }
  280. arch_initcall(fsl_i2c_of_init);
  281. #ifdef CONFIG_PPC_83xx
  282. static int __init mpc83xx_wdt_init(void)
  283. {
  284. struct resource r;
  285. struct device_node *soc, *np;
  286. struct platform_device *dev;
  287. const unsigned int *freq;
  288. int ret;
  289. np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
  290. if (!np) {
  291. ret = -ENODEV;
  292. goto nodev;
  293. }
  294. soc = of_find_node_by_type(NULL, "soc");
  295. if (!soc) {
  296. ret = -ENODEV;
  297. goto nosoc;
  298. }
  299. freq = of_get_property(soc, "bus-frequency", NULL);
  300. if (!freq) {
  301. ret = -ENODEV;
  302. goto err;
  303. }
  304. memset(&r, 0, sizeof(r));
  305. ret = of_address_to_resource(np, 0, &r);
  306. if (ret)
  307. goto err;
  308. dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
  309. if (IS_ERR(dev)) {
  310. ret = PTR_ERR(dev);
  311. goto err;
  312. }
  313. ret = platform_device_add_data(dev, freq, sizeof(int));
  314. if (ret)
  315. goto unreg;
  316. of_node_put(soc);
  317. of_node_put(np);
  318. return 0;
  319. unreg:
  320. platform_device_unregister(dev);
  321. err:
  322. of_node_put(soc);
  323. nosoc:
  324. of_node_put(np);
  325. nodev:
  326. return ret;
  327. }
  328. arch_initcall(mpc83xx_wdt_init);
  329. #endif
  330. static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
  331. {
  332. if (!phy_type)
  333. return FSL_USB2_PHY_NONE;
  334. if (!strcasecmp(phy_type, "ulpi"))
  335. return FSL_USB2_PHY_ULPI;
  336. if (!strcasecmp(phy_type, "utmi"))
  337. return FSL_USB2_PHY_UTMI;
  338. if (!strcasecmp(phy_type, "utmi_wide"))
  339. return FSL_USB2_PHY_UTMI_WIDE;
  340. if (!strcasecmp(phy_type, "serial"))
  341. return FSL_USB2_PHY_SERIAL;
  342. return FSL_USB2_PHY_NONE;
  343. }
  344. static int __init fsl_usb_of_init(void)
  345. {
  346. struct device_node *np;
  347. unsigned int i;
  348. struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
  349. *usb_dev_dr_client = NULL;
  350. int ret;
  351. for (np = NULL, i = 0;
  352. (np = of_find_compatible_node(np, "usb", "fsl-usb2-mph")) != NULL;
  353. i++) {
  354. struct resource r[2];
  355. struct fsl_usb2_platform_data usb_data;
  356. const unsigned char *prop = NULL;
  357. memset(&r, 0, sizeof(r));
  358. memset(&usb_data, 0, sizeof(usb_data));
  359. ret = of_address_to_resource(np, 0, &r[0]);
  360. if (ret)
  361. goto err;
  362. of_irq_to_resource(np, 0, &r[1]);
  363. usb_dev_mph =
  364. platform_device_register_simple("fsl-ehci", i, r, 2);
  365. if (IS_ERR(usb_dev_mph)) {
  366. ret = PTR_ERR(usb_dev_mph);
  367. goto err;
  368. }
  369. usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
  370. usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
  371. usb_data.operating_mode = FSL_USB2_MPH_HOST;
  372. prop = of_get_property(np, "port0", NULL);
  373. if (prop)
  374. usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
  375. prop = of_get_property(np, "port1", NULL);
  376. if (prop)
  377. usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
  378. prop = of_get_property(np, "phy_type", NULL);
  379. usb_data.phy_mode = determine_usb_phy(prop);
  380. ret =
  381. platform_device_add_data(usb_dev_mph, &usb_data,
  382. sizeof(struct
  383. fsl_usb2_platform_data));
  384. if (ret)
  385. goto unreg_mph;
  386. }
  387. for (np = NULL;
  388. (np = of_find_compatible_node(np, "usb", "fsl-usb2-dr")) != NULL;
  389. i++) {
  390. struct resource r[2];
  391. struct fsl_usb2_platform_data usb_data;
  392. const unsigned char *prop = NULL;
  393. memset(&r, 0, sizeof(r));
  394. memset(&usb_data, 0, sizeof(usb_data));
  395. ret = of_address_to_resource(np, 0, &r[0]);
  396. if (ret)
  397. goto unreg_mph;
  398. of_irq_to_resource(np, 0, &r[1]);
  399. prop = of_get_property(np, "dr_mode", NULL);
  400. if (!prop || !strcmp(prop, "host")) {
  401. usb_data.operating_mode = FSL_USB2_DR_HOST;
  402. usb_dev_dr_host = platform_device_register_simple(
  403. "fsl-ehci", i, r, 2);
  404. if (IS_ERR(usb_dev_dr_host)) {
  405. ret = PTR_ERR(usb_dev_dr_host);
  406. goto err;
  407. }
  408. } else if (prop && !strcmp(prop, "peripheral")) {
  409. usb_data.operating_mode = FSL_USB2_DR_DEVICE;
  410. usb_dev_dr_client = platform_device_register_simple(
  411. "fsl-usb2-udc", i, r, 2);
  412. if (IS_ERR(usb_dev_dr_client)) {
  413. ret = PTR_ERR(usb_dev_dr_client);
  414. goto err;
  415. }
  416. } else if (prop && !strcmp(prop, "otg")) {
  417. usb_data.operating_mode = FSL_USB2_DR_OTG;
  418. usb_dev_dr_host = platform_device_register_simple(
  419. "fsl-ehci", i, r, 2);
  420. if (IS_ERR(usb_dev_dr_host)) {
  421. ret = PTR_ERR(usb_dev_dr_host);
  422. goto err;
  423. }
  424. usb_dev_dr_client = platform_device_register_simple(
  425. "fsl-usb2-udc", i, r, 2);
  426. if (IS_ERR(usb_dev_dr_client)) {
  427. ret = PTR_ERR(usb_dev_dr_client);
  428. goto err;
  429. }
  430. } else {
  431. ret = -EINVAL;
  432. goto err;
  433. }
  434. prop = of_get_property(np, "phy_type", NULL);
  435. usb_data.phy_mode = determine_usb_phy(prop);
  436. if (usb_dev_dr_host) {
  437. usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
  438. usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
  439. dev.coherent_dma_mask;
  440. if ((ret = platform_device_add_data(usb_dev_dr_host,
  441. &usb_data, sizeof(struct
  442. fsl_usb2_platform_data))))
  443. goto unreg_dr;
  444. }
  445. if (usb_dev_dr_client) {
  446. usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
  447. usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
  448. dev.coherent_dma_mask;
  449. if ((ret = platform_device_add_data(usb_dev_dr_client,
  450. &usb_data, sizeof(struct
  451. fsl_usb2_platform_data))))
  452. goto unreg_dr;
  453. }
  454. }
  455. return 0;
  456. unreg_dr:
  457. if (usb_dev_dr_host)
  458. platform_device_unregister(usb_dev_dr_host);
  459. if (usb_dev_dr_client)
  460. platform_device_unregister(usb_dev_dr_client);
  461. unreg_mph:
  462. if (usb_dev_mph)
  463. platform_device_unregister(usb_dev_mph);
  464. err:
  465. return ret;
  466. }
  467. arch_initcall(fsl_usb_of_init);
  468. #ifdef CONFIG_CPM2
  469. extern void init_scc_ioports(struct fs_uart_platform_info*);
  470. static const char fcc_regs[] = "fcc_regs";
  471. static const char fcc_regs_c[] = "fcc_regs_c";
  472. static const char fcc_pram[] = "fcc_pram";
  473. static char bus_id[9][BUS_ID_SIZE];
  474. static int __init fs_enet_of_init(void)
  475. {
  476. struct device_node *np;
  477. unsigned int i;
  478. struct platform_device *fs_enet_dev;
  479. struct resource res;
  480. int ret;
  481. for (np = NULL, i = 0;
  482. (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
  483. i++) {
  484. struct resource r[4];
  485. struct device_node *phy, *mdio;
  486. struct fs_platform_info fs_enet_data;
  487. const unsigned int *id, *phy_addr, *phy_irq;
  488. const void *mac_addr;
  489. const phandle *ph;
  490. const char *model;
  491. memset(r, 0, sizeof(r));
  492. memset(&fs_enet_data, 0, sizeof(fs_enet_data));
  493. ret = of_address_to_resource(np, 0, &r[0]);
  494. if (ret)
  495. goto err;
  496. r[0].name = fcc_regs;
  497. ret = of_address_to_resource(np, 1, &r[1]);
  498. if (ret)
  499. goto err;
  500. r[1].name = fcc_pram;
  501. ret = of_address_to_resource(np, 2, &r[2]);
  502. if (ret)
  503. goto err;
  504. r[2].name = fcc_regs_c;
  505. fs_enet_data.fcc_regs_c = r[2].start;
  506. of_irq_to_resource(np, 0, &r[3]);
  507. fs_enet_dev =
  508. platform_device_register_simple("fsl-cpm-fcc", i, &r[0], 4);
  509. if (IS_ERR(fs_enet_dev)) {
  510. ret = PTR_ERR(fs_enet_dev);
  511. goto err;
  512. }
  513. model = of_get_property(np, "model", NULL);
  514. if (model == NULL) {
  515. ret = -ENODEV;
  516. goto unreg;
  517. }
  518. mac_addr = of_get_mac_address(np);
  519. if (mac_addr)
  520. memcpy(fs_enet_data.macaddr, mac_addr, 6);
  521. ph = of_get_property(np, "phy-handle", NULL);
  522. phy = of_find_node_by_phandle(*ph);
  523. if (phy == NULL) {
  524. ret = -ENODEV;
  525. goto unreg;
  526. }
  527. phy_addr = of_get_property(phy, "reg", NULL);
  528. fs_enet_data.phy_addr = *phy_addr;
  529. phy_irq = of_get_property(phy, "interrupts", NULL);
  530. id = of_get_property(np, "device-id", NULL);
  531. fs_enet_data.fs_no = *id;
  532. strcpy(fs_enet_data.fs_type, model);
  533. mdio = of_get_parent(phy);
  534. ret = of_address_to_resource(mdio, 0, &res);
  535. if (ret) {
  536. of_node_put(phy);
  537. of_node_put(mdio);
  538. goto unreg;
  539. }
  540. fs_enet_data.clk_rx = *((u32 *)of_get_property(np,
  541. "rx-clock", NULL));
  542. fs_enet_data.clk_tx = *((u32 *)of_get_property(np,
  543. "tx-clock", NULL));
  544. if (strstr(model, "FCC")) {
  545. int fcc_index = *id - 1;
  546. const unsigned char *mdio_bb_prop;
  547. fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0);
  548. fs_enet_data.rx_ring = 32;
  549. fs_enet_data.tx_ring = 32;
  550. fs_enet_data.rx_copybreak = 240;
  551. fs_enet_data.use_napi = 0;
  552. fs_enet_data.napi_weight = 17;
  553. fs_enet_data.mem_offset = FCC_MEM_OFFSET(fcc_index);
  554. fs_enet_data.cp_page = CPM_CR_FCC_PAGE(fcc_index);
  555. fs_enet_data.cp_block = CPM_CR_FCC_SBLOCK(fcc_index);
  556. snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x",
  557. (u32)res.start, fs_enet_data.phy_addr);
  558. fs_enet_data.bus_id = (char*)&bus_id[(*id)];
  559. fs_enet_data.init_ioports = init_fcc_ioports;
  560. mdio_bb_prop = of_get_property(phy, "bitbang", NULL);
  561. if (mdio_bb_prop) {
  562. struct platform_device *fs_enet_mdio_bb_dev;
  563. struct fs_mii_bb_platform_info fs_enet_mdio_bb_data;
  564. fs_enet_mdio_bb_dev =
  565. platform_device_register_simple("fsl-bb-mdio",
  566. i, NULL, 0);
  567. memset(&fs_enet_mdio_bb_data, 0,
  568. sizeof(struct fs_mii_bb_platform_info));
  569. fs_enet_mdio_bb_data.mdio_dat.bit =
  570. mdio_bb_prop[0];
  571. fs_enet_mdio_bb_data.mdio_dir.bit =
  572. mdio_bb_prop[1];
  573. fs_enet_mdio_bb_data.mdc_dat.bit =
  574. mdio_bb_prop[2];
  575. fs_enet_mdio_bb_data.mdio_port =
  576. mdio_bb_prop[3];
  577. fs_enet_mdio_bb_data.mdc_port =
  578. mdio_bb_prop[4];
  579. fs_enet_mdio_bb_data.delay =
  580. mdio_bb_prop[5];
  581. fs_enet_mdio_bb_data.irq[0] = phy_irq[0];
  582. fs_enet_mdio_bb_data.irq[1] = -1;
  583. fs_enet_mdio_bb_data.irq[2] = -1;
  584. fs_enet_mdio_bb_data.irq[3] = phy_irq[0];
  585. fs_enet_mdio_bb_data.irq[31] = -1;
  586. fs_enet_mdio_bb_data.mdio_dat.offset =
  587. (u32)&cpm2_immr->im_ioport.iop_pdatc;
  588. fs_enet_mdio_bb_data.mdio_dir.offset =
  589. (u32)&cpm2_immr->im_ioport.iop_pdirc;
  590. fs_enet_mdio_bb_data.mdc_dat.offset =
  591. (u32)&cpm2_immr->im_ioport.iop_pdatc;
  592. ret = platform_device_add_data(
  593. fs_enet_mdio_bb_dev,
  594. &fs_enet_mdio_bb_data,
  595. sizeof(struct fs_mii_bb_platform_info));
  596. if (ret)
  597. goto unreg;
  598. }
  599. of_node_put(phy);
  600. of_node_put(mdio);
  601. ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
  602. sizeof(struct
  603. fs_platform_info));
  604. if (ret)
  605. goto unreg;
  606. }
  607. }
  608. return 0;
  609. unreg:
  610. platform_device_unregister(fs_enet_dev);
  611. err:
  612. return ret;
  613. }
  614. arch_initcall(fs_enet_of_init);
  615. static const char scc_regs[] = "regs";
  616. static const char scc_pram[] = "pram";
  617. static int __init cpm_uart_of_init(void)
  618. {
  619. struct device_node *np;
  620. unsigned int i;
  621. struct platform_device *cpm_uart_dev;
  622. int ret;
  623. for (np = NULL, i = 0;
  624. (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
  625. i++) {
  626. struct resource r[3];
  627. struct fs_uart_platform_info cpm_uart_data;
  628. const int *id;
  629. const char *model;
  630. memset(r, 0, sizeof(r));
  631. memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
  632. ret = of_address_to_resource(np, 0, &r[0]);
  633. if (ret)
  634. goto err;
  635. r[0].name = scc_regs;
  636. ret = of_address_to_resource(np, 1, &r[1]);
  637. if (ret)
  638. goto err;
  639. r[1].name = scc_pram;
  640. of_irq_to_resource(np, 0, &r[2]);
  641. cpm_uart_dev =
  642. platform_device_register_simple("fsl-cpm-scc:uart", i, &r[0], 3);
  643. if (IS_ERR(cpm_uart_dev)) {
  644. ret = PTR_ERR(cpm_uart_dev);
  645. goto err;
  646. }
  647. id = of_get_property(np, "device-id", NULL);
  648. cpm_uart_data.fs_no = *id;
  649. model = of_get_property(np, "model", NULL);
  650. strcpy(cpm_uart_data.fs_type, model);
  651. cpm_uart_data.uart_clk = ppc_proc_freq;
  652. cpm_uart_data.tx_num_fifo = 4;
  653. cpm_uart_data.tx_buf_size = 32;
  654. cpm_uart_data.rx_num_fifo = 4;
  655. cpm_uart_data.rx_buf_size = 32;
  656. cpm_uart_data.clk_rx = *((u32 *)of_get_property(np,
  657. "rx-clock", NULL));
  658. cpm_uart_data.clk_tx = *((u32 *)of_get_property(np,
  659. "tx-clock", NULL));
  660. ret =
  661. platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
  662. sizeof(struct
  663. fs_uart_platform_info));
  664. if (ret)
  665. goto unreg;
  666. }
  667. return 0;
  668. unreg:
  669. platform_device_unregister(cpm_uart_dev);
  670. err:
  671. return ret;
  672. }
  673. arch_initcall(cpm_uart_of_init);
  674. #endif /* CONFIG_CPM2 */
  675. #ifdef CONFIG_8xx
  676. extern void init_scc_ioports(struct fs_platform_info*);
  677. extern int platform_device_skip(const char *model, int id);
  678. static int __init fs_enet_mdio_of_init(void)
  679. {
  680. struct device_node *np;
  681. unsigned int i;
  682. struct platform_device *mdio_dev;
  683. struct resource res;
  684. int ret;
  685. for (np = NULL, i = 0;
  686. (np = of_find_compatible_node(np, "mdio", "fs_enet")) != NULL;
  687. i++) {
  688. struct fs_mii_fec_platform_info mdio_data;
  689. memset(&res, 0, sizeof(res));
  690. memset(&mdio_data, 0, sizeof(mdio_data));
  691. ret = of_address_to_resource(np, 0, &res);
  692. if (ret)
  693. goto err;
  694. mdio_dev =
  695. platform_device_register_simple("fsl-cpm-fec-mdio",
  696. res.start, &res, 1);
  697. if (IS_ERR(mdio_dev)) {
  698. ret = PTR_ERR(mdio_dev);
  699. goto err;
  700. }
  701. mdio_data.mii_speed = ((((ppc_proc_freq + 4999999) / 2500000) / 2) & 0x3F) << 1;
  702. ret =
  703. platform_device_add_data(mdio_dev, &mdio_data,
  704. sizeof(struct fs_mii_fec_platform_info));
  705. if (ret)
  706. goto unreg;
  707. }
  708. return 0;
  709. unreg:
  710. platform_device_unregister(mdio_dev);
  711. err:
  712. return ret;
  713. }
  714. arch_initcall(fs_enet_mdio_of_init);
  715. static const char *enet_regs = "regs";
  716. static const char *enet_pram = "pram";
  717. static const char *enet_irq = "interrupt";
  718. static char bus_id[9][BUS_ID_SIZE];
  719. static int __init fs_enet_of_init(void)
  720. {
  721. struct device_node *np;
  722. unsigned int i;
  723. struct platform_device *fs_enet_dev = NULL;
  724. struct resource res;
  725. int ret;
  726. for (np = NULL, i = 0;
  727. (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
  728. i++) {
  729. struct resource r[4];
  730. struct device_node *phy = NULL, *mdio = NULL;
  731. struct fs_platform_info fs_enet_data;
  732. const unsigned int *id;
  733. const unsigned int *phy_addr;
  734. const void *mac_addr;
  735. const phandle *ph;
  736. const char *model;
  737. memset(r, 0, sizeof(r));
  738. memset(&fs_enet_data, 0, sizeof(fs_enet_data));
  739. model = of_get_property(np, "model", NULL);
  740. if (model == NULL) {
  741. ret = -ENODEV;
  742. goto unreg;
  743. }
  744. id = of_get_property(np, "device-id", NULL);
  745. fs_enet_data.fs_no = *id;
  746. if (platform_device_skip(model, *id))
  747. continue;
  748. ret = of_address_to_resource(np, 0, &r[0]);
  749. if (ret)
  750. goto err;
  751. r[0].name = enet_regs;
  752. mac_addr = of_get_mac_address(np);
  753. if (mac_addr)
  754. memcpy(fs_enet_data.macaddr, mac_addr, 6);
  755. ph = of_get_property(np, "phy-handle", NULL);
  756. if (ph != NULL)
  757. phy = of_find_node_by_phandle(*ph);
  758. if (phy != NULL) {
  759. phy_addr = of_get_property(phy, "reg", NULL);
  760. fs_enet_data.phy_addr = *phy_addr;
  761. fs_enet_data.has_phy = 1;
  762. mdio = of_get_parent(phy);
  763. ret = of_address_to_resource(mdio, 0, &res);
  764. if (ret) {
  765. of_node_put(phy);
  766. of_node_put(mdio);
  767. goto unreg;
  768. }
  769. }
  770. model = of_get_property(np, "model", NULL);
  771. strcpy(fs_enet_data.fs_type, model);
  772. if (strstr(model, "FEC")) {
  773. r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
  774. r[1].flags = IORESOURCE_IRQ;
  775. r[1].name = enet_irq;
  776. fs_enet_dev =
  777. platform_device_register_simple("fsl-cpm-fec", i, &r[0], 2);
  778. if (IS_ERR(fs_enet_dev)) {
  779. ret = PTR_ERR(fs_enet_dev);
  780. goto err;
  781. }
  782. fs_enet_data.rx_ring = 128;
  783. fs_enet_data.tx_ring = 16;
  784. fs_enet_data.rx_copybreak = 240;
  785. fs_enet_data.use_napi = 1;
  786. fs_enet_data.napi_weight = 17;
  787. snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%x:%02x",
  788. (u32)res.start, fs_enet_data.phy_addr);
  789. fs_enet_data.bus_id = (char*)&bus_id[i];
  790. fs_enet_data.init_ioports = init_fec_ioports;
  791. }
  792. if (strstr(model, "SCC")) {
  793. ret = of_address_to_resource(np, 1, &r[1]);
  794. if (ret)
  795. goto err;
  796. r[1].name = enet_pram;
  797. r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
  798. r[2].flags = IORESOURCE_IRQ;
  799. r[2].name = enet_irq;
  800. fs_enet_dev =
  801. platform_device_register_simple("fsl-cpm-scc", i, &r[0], 3);
  802. if (IS_ERR(fs_enet_dev)) {
  803. ret = PTR_ERR(fs_enet_dev);
  804. goto err;
  805. }
  806. fs_enet_data.rx_ring = 64;
  807. fs_enet_data.tx_ring = 8;
  808. fs_enet_data.rx_copybreak = 240;
  809. fs_enet_data.use_napi = 1;
  810. fs_enet_data.napi_weight = 17;
  811. snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%s", "fixed@10:1");
  812. fs_enet_data.bus_id = (char*)&bus_id[i];
  813. fs_enet_data.init_ioports = init_scc_ioports;
  814. }
  815. of_node_put(phy);
  816. of_node_put(mdio);
  817. ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
  818. sizeof(struct
  819. fs_platform_info));
  820. if (ret)
  821. goto unreg;
  822. }
  823. return 0;
  824. unreg:
  825. platform_device_unregister(fs_enet_dev);
  826. err:
  827. return ret;
  828. }
  829. arch_initcall(fs_enet_of_init);
  830. static const char *smc_regs = "regs";
  831. static const char *smc_pram = "pram";
  832. static int __init cpm_smc_uart_of_init(void)
  833. {
  834. struct device_node *np;
  835. unsigned int i;
  836. struct platform_device *cpm_uart_dev;
  837. int ret;
  838. for (np = NULL, i = 0;
  839. (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
  840. i++) {
  841. struct resource r[3];
  842. struct fs_uart_platform_info cpm_uart_data;
  843. const int *id;
  844. const char *model;
  845. memset(r, 0, sizeof(r));
  846. memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
  847. ret = of_address_to_resource(np, 0, &r[0]);
  848. if (ret)
  849. goto err;
  850. r[0].name = smc_regs;
  851. ret = of_address_to_resource(np, 1, &r[1]);
  852. if (ret)
  853. goto err;
  854. r[1].name = smc_pram;
  855. r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
  856. r[2].flags = IORESOURCE_IRQ;
  857. cpm_uart_dev =
  858. platform_device_register_simple("fsl-cpm-smc:uart", i, &r[0], 3);
  859. if (IS_ERR(cpm_uart_dev)) {
  860. ret = PTR_ERR(cpm_uart_dev);
  861. goto err;
  862. }
  863. model = of_get_property(np, "model", NULL);
  864. strcpy(cpm_uart_data.fs_type, model);
  865. id = of_get_property(np, "device-id", NULL);
  866. cpm_uart_data.fs_no = *id;
  867. cpm_uart_data.uart_clk = ppc_proc_freq;
  868. cpm_uart_data.tx_num_fifo = 4;
  869. cpm_uart_data.tx_buf_size = 32;
  870. cpm_uart_data.rx_num_fifo = 4;
  871. cpm_uart_data.rx_buf_size = 32;
  872. ret =
  873. platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
  874. sizeof(struct
  875. fs_uart_platform_info));
  876. if (ret)
  877. goto unreg;
  878. }
  879. return 0;
  880. unreg:
  881. platform_device_unregister(cpm_uart_dev);
  882. err:
  883. return ret;
  884. }
  885. arch_initcall(cpm_smc_uart_of_init);
  886. #endif /* CONFIG_8xx */