mpc836x_mds.c 4.4 KB

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  1. /*
  2. * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
  3. *
  4. * Author: Li Yang <LeoLi@freescale.com>
  5. * Yin Olivia <Hong-hua.Yin@freescale.com>
  6. *
  7. * Description:
  8. * MPC8360E MDS board specific routines.
  9. *
  10. * Changelog:
  11. * Jun 21, 2006 Initial version
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the
  15. * Free Software Foundation; either version 2 of the License, or (at your
  16. * option) any later version.
  17. */
  18. #include <linux/stddef.h>
  19. #include <linux/kernel.h>
  20. #include <linux/init.h>
  21. #include <linux/errno.h>
  22. #include <linux/reboot.h>
  23. #include <linux/pci.h>
  24. #include <linux/kdev_t.h>
  25. #include <linux/major.h>
  26. #include <linux/console.h>
  27. #include <linux/delay.h>
  28. #include <linux/seq_file.h>
  29. #include <linux/root_dev.h>
  30. #include <linux/initrd.h>
  31. #include <asm/of_device.h>
  32. #include <asm/of_platform.h>
  33. #include <asm/system.h>
  34. #include <asm/atomic.h>
  35. #include <asm/time.h>
  36. #include <asm/io.h>
  37. #include <asm/machdep.h>
  38. #include <asm/ipic.h>
  39. #include <asm/bootinfo.h>
  40. #include <asm/irq.h>
  41. #include <asm/prom.h>
  42. #include <asm/udbg.h>
  43. #include <sysdev/fsl_soc.h>
  44. #include <asm/qe.h>
  45. #include <asm/qe_ic.h>
  46. #include "mpc83xx.h"
  47. #undef DEBUG
  48. #ifdef DEBUG
  49. #define DBG(fmt...) udbg_printf(fmt)
  50. #else
  51. #define DBG(fmt...)
  52. #endif
  53. #ifndef CONFIG_PCI
  54. unsigned long isa_io_base = 0;
  55. unsigned long isa_mem_base = 0;
  56. #endif
  57. static u8 *bcsr_regs = NULL;
  58. /* ************************************************************************
  59. *
  60. * Setup the architecture
  61. *
  62. */
  63. static void __init mpc836x_mds_setup_arch(void)
  64. {
  65. struct device_node *np;
  66. if (ppc_md.progress)
  67. ppc_md.progress("mpc836x_mds_setup_arch()", 0);
  68. /* Map BCSR area */
  69. np = of_find_node_by_name(NULL, "bcsr");
  70. if (np != 0) {
  71. struct resource res;
  72. of_address_to_resource(np, 0, &res);
  73. bcsr_regs = ioremap(res.start, res.end - res.start +1);
  74. of_node_put(np);
  75. }
  76. #ifdef CONFIG_PCI
  77. for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
  78. add_bridge(np);
  79. ppc_md.pci_exclude_device = mpc83xx_exclude_device;
  80. #endif
  81. #ifdef CONFIG_QUICC_ENGINE
  82. qe_reset();
  83. if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
  84. par_io_init(np);
  85. of_node_put(np);
  86. for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
  87. par_io_of_config(np);
  88. }
  89. if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
  90. != NULL){
  91. /* Reset the Ethernet PHY */
  92. bcsr_regs[9] &= ~0x20;
  93. udelay(1000);
  94. bcsr_regs[9] |= 0x20;
  95. iounmap(bcsr_regs);
  96. of_node_put(np);
  97. }
  98. #endif /* CONFIG_QUICC_ENGINE */
  99. }
  100. static struct of_device_id mpc836x_ids[] = {
  101. { .type = "soc", },
  102. { .compatible = "soc", },
  103. { .type = "qe", },
  104. { .type = "mdio", },
  105. {},
  106. };
  107. static int __init mpc836x_declare_of_platform_devices(void)
  108. {
  109. if (!machine_is(mpc836x_mds))
  110. return 0;
  111. /* Publish the QE devices */
  112. of_platform_bus_probe(NULL, mpc836x_ids, NULL);
  113. return 0;
  114. }
  115. device_initcall(mpc836x_declare_of_platform_devices);
  116. static void __init mpc836x_mds_init_IRQ(void)
  117. {
  118. struct device_node *np;
  119. np = of_find_node_by_type(NULL, "ipic");
  120. if (!np)
  121. return;
  122. ipic_init(np, 0);
  123. /* Initialize the default interrupt mapping priorities,
  124. * in case the boot rom changed something on us.
  125. */
  126. ipic_set_default_priority();
  127. of_node_put(np);
  128. #ifdef CONFIG_QUICC_ENGINE
  129. np = of_find_node_by_type(NULL, "qeic");
  130. if (!np)
  131. return;
  132. qe_ic_init(np, 0);
  133. of_node_put(np);
  134. #endif /* CONFIG_QUICC_ENGINE */
  135. }
  136. #if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
  137. extern ulong ds1374_get_rtc_time(void);
  138. extern int ds1374_set_rtc_time(ulong);
  139. static int __init mpc8360_rtc_hookup(void)
  140. {
  141. struct timespec tv;
  142. if (!machine_is(mpc836x_mds))
  143. return 0;
  144. ppc_md.get_rtc_time = ds1374_get_rtc_time;
  145. ppc_md.set_rtc_time = ds1374_set_rtc_time;
  146. tv.tv_nsec = 0;
  147. tv.tv_sec = (ppc_md.get_rtc_time) ();
  148. do_settimeofday(&tv);
  149. return 0;
  150. }
  151. late_initcall(mpc8360_rtc_hookup);
  152. #endif
  153. /*
  154. * Called very early, MMU is off, device-tree isn't unflattened
  155. */
  156. static int __init mpc836x_mds_probe(void)
  157. {
  158. unsigned long root = of_get_flat_dt_root();
  159. return of_flat_dt_is_compatible(root, "MPC836xMDS");
  160. }
  161. define_machine(mpc836x_mds) {
  162. .name = "MPC836x MDS",
  163. .probe = mpc836x_mds_probe,
  164. .setup_arch = mpc836x_mds_setup_arch,
  165. .init_IRQ = mpc836x_mds_init_IRQ,
  166. .get_irq = ipic_get_irq,
  167. .restart = mpc83xx_restart,
  168. .time_init = mpc83xx_time_init,
  169. .calibrate_decr = generic_calibrate_decr,
  170. .progress = udbg_progress,
  171. };