efika.c 6.3 KB

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  1. /*
  2. * Efika 5K2 platform code
  3. * Some code really inspired from the lite5200b platform.
  4. *
  5. * Copyright (C) 2006 bplan GmbH
  6. *
  7. * This file is licensed under the terms of the GNU General Public License
  8. * version 2. This program is licensed "as is" without any warranty of any
  9. * kind, whether express or implied.
  10. */
  11. #include <linux/errno.h>
  12. #include <linux/kernel.h>
  13. #include <linux/slab.h>
  14. #include <linux/reboot.h>
  15. #include <linux/init.h>
  16. #include <linux/utsrelease.h>
  17. #include <linux/seq_file.h>
  18. #include <linux/string.h>
  19. #include <linux/root_dev.h>
  20. #include <linux/initrd.h>
  21. #include <linux/timer.h>
  22. #include <linux/pci.h>
  23. #include <asm/io.h>
  24. #include <asm/irq.h>
  25. #include <asm/sections.h>
  26. #include <asm/pci-bridge.h>
  27. #include <asm/pgtable.h>
  28. #include <asm/prom.h>
  29. #include <asm/time.h>
  30. #include <asm/machdep.h>
  31. #include <asm/rtas.h>
  32. #include <asm/of_device.h>
  33. #include <asm/of_platform.h>
  34. #include <asm/mpc52xx.h>
  35. #define EFIKA_PLATFORM_NAME "Efika"
  36. /* ------------------------------------------------------------------------ */
  37. /* PCI accesses thru RTAS */
  38. /* ------------------------------------------------------------------------ */
  39. #ifdef CONFIG_PCI
  40. /*
  41. * Access functions for PCI config space using RTAS calls.
  42. */
  43. static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
  44. int len, u32 * val)
  45. {
  46. struct pci_controller *hose = bus->sysdata;
  47. unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
  48. | (((bus->number - hose->first_busno) & 0xff) << 16)
  49. | (hose->index << 24);
  50. int ret = -1;
  51. int rval;
  52. rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
  53. *val = ret;
  54. return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
  55. }
  56. static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
  57. int offset, int len, u32 val)
  58. {
  59. struct pci_controller *hose = bus->sysdata;
  60. unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
  61. | (((bus->number - hose->first_busno) & 0xff) << 16)
  62. | (hose->index << 24);
  63. int rval;
  64. rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
  65. addr, len, val);
  66. return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
  67. }
  68. static struct pci_ops rtas_pci_ops = {
  69. rtas_read_config,
  70. rtas_write_config
  71. };
  72. void __init efika_pcisetup(void)
  73. {
  74. const int *bus_range;
  75. int len;
  76. struct pci_controller *hose;
  77. struct device_node *root;
  78. struct device_node *pcictrl;
  79. root = of_find_node_by_path("/");
  80. if (root == NULL) {
  81. printk(KERN_WARNING EFIKA_PLATFORM_NAME
  82. ": Unable to find the root node\n");
  83. return;
  84. }
  85. for (pcictrl = NULL;;) {
  86. pcictrl = of_get_next_child(root, pcictrl);
  87. if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0))
  88. break;
  89. }
  90. of_node_put(root);
  91. if (pcictrl == NULL) {
  92. printk(KERN_WARNING EFIKA_PLATFORM_NAME
  93. ": Unable to find the PCI bridge node\n");
  94. return;
  95. }
  96. bus_range = of_get_property(pcictrl, "bus-range", &len);
  97. if (bus_range == NULL || len < 2 * sizeof(int)) {
  98. printk(KERN_WARNING EFIKA_PLATFORM_NAME
  99. ": Can't get bus-range for %s\n", pcictrl->full_name);
  100. return;
  101. }
  102. if (bus_range[1] == bus_range[0])
  103. printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI bus %d",
  104. bus_range[0]);
  105. else
  106. printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI buses %d..%d",
  107. bus_range[0], bus_range[1]);
  108. printk(" controlled by %s\n", pcictrl->full_name);
  109. printk("\n");
  110. hose = pcibios_alloc_controller();
  111. if (!hose) {
  112. printk(KERN_WARNING EFIKA_PLATFORM_NAME
  113. ": Can't allocate PCI controller structure for %s\n",
  114. pcictrl->full_name);
  115. return;
  116. }
  117. hose->arch_data = of_node_get(pcictrl);
  118. hose->first_busno = bus_range[0];
  119. hose->last_busno = bus_range[1];
  120. hose->ops = &rtas_pci_ops;
  121. pci_process_bridge_OF_ranges(hose, pcictrl, 0);
  122. }
  123. #else
  124. void __init efika_pcisetup(void)
  125. {}
  126. #endif
  127. /* ------------------------------------------------------------------------ */
  128. /* Platform setup */
  129. /* ------------------------------------------------------------------------ */
  130. static void efika_show_cpuinfo(struct seq_file *m)
  131. {
  132. struct device_node *root;
  133. const char *revision;
  134. const char *codegendescription;
  135. const char *codegenvendor;
  136. root = of_find_node_by_path("/");
  137. if (!root)
  138. return;
  139. revision = of_get_property(root, "revision", NULL);
  140. codegendescription = of_get_property(root, "CODEGEN,description", NULL);
  141. codegenvendor = of_get_property(root, "CODEGEN,vendor", NULL);
  142. if (codegendescription)
  143. seq_printf(m, "machine\t\t: %s\n", codegendescription);
  144. else
  145. seq_printf(m, "machine\t\t: Efika\n");
  146. if (revision)
  147. seq_printf(m, "revision\t: %s\n", revision);
  148. if (codegenvendor)
  149. seq_printf(m, "vendor\t\t: %s\n", codegenvendor);
  150. of_node_put(root);
  151. }
  152. #ifdef CONFIG_PM
  153. static void efika_suspend_prepare(void __iomem *mbar)
  154. {
  155. u8 pin = 4; /* GPIO_WKUP_4 (GPIO_PSC6_0 - IRDA_RX) */
  156. u8 level = 1; /* wakeup on high level */
  157. /* IOW. to wake it up, short pins 1 and 3 on IRDA connector */
  158. mpc52xx_set_wakeup_gpio(pin, level);
  159. }
  160. #endif
  161. static void __init efika_setup_arch(void)
  162. {
  163. rtas_initialize();
  164. #ifdef CONFIG_BLK_DEV_INITRD
  165. initrd_below_start_ok = 1;
  166. if (initrd_start)
  167. ROOT_DEV = Root_RAM0;
  168. else
  169. #endif
  170. ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */
  171. efika_pcisetup();
  172. #ifdef CONFIG_PM
  173. mpc52xx_suspend.board_suspend_prepare = efika_suspend_prepare;
  174. mpc52xx_pm_init();
  175. #endif
  176. if (ppc_md.progress)
  177. ppc_md.progress("Linux/PPC " UTS_RELEASE " running on Efika ;-)\n", 0x0);
  178. }
  179. static int __init efika_probe(void)
  180. {
  181. char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
  182. "model", NULL);
  183. if (model == NULL)
  184. return 0;
  185. if (strcmp(model, "EFIKA5K2"))
  186. return 0;
  187. ISA_DMA_THRESHOLD = ~0L;
  188. DMA_MODE_READ = 0x44;
  189. DMA_MODE_WRITE = 0x48;
  190. return 1;
  191. }
  192. define_machine(efika)
  193. {
  194. .name = EFIKA_PLATFORM_NAME,
  195. .probe = efika_probe,
  196. .setup_arch = efika_setup_arch,
  197. .init = mpc52xx_declare_of_platform_devices,
  198. .show_cpuinfo = efika_show_cpuinfo,
  199. .init_IRQ = mpc52xx_init_irq,
  200. .get_irq = mpc52xx_get_irq,
  201. .restart = rtas_restart,
  202. .power_off = rtas_power_off,
  203. .halt = rtas_halt,
  204. .set_rtc_time = rtas_set_rtc_time,
  205. .get_rtc_time = rtas_get_rtc_time,
  206. .progress = rtas_progress,
  207. .get_boot_time = rtas_get_boot_time,
  208. .calibrate_decr = generic_calibrate_decr,
  209. .phys_mem_access_prot = pci_phys_mem_access_prot,
  210. };